xref: /linux/drivers/media/pci/cx88/cx88.h (revision 399426cadf5b0539a5b2a4d805257ce8acc6aba2)
1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  * v4l2 device driver for cx2388x based TV cards
3b285192aSMauro Carvalho Chehab  *
4b285192aSMauro Carvalho Chehab  * (c) 2003,04 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
5b285192aSMauro Carvalho Chehab  *
6b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
7b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
8b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
9b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
10b285192aSMauro Carvalho Chehab  *
11b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
12b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
15b285192aSMauro Carvalho Chehab  */
16b285192aSMauro Carvalho Chehab 
1765bc2fe8SMauro Carvalho Chehab #ifndef CX88_H
1865bc2fe8SMauro Carvalho Chehab #define CX88_H
1965bc2fe8SMauro Carvalho Chehab 
2065bc2fe8SMauro Carvalho Chehab #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
2165bc2fe8SMauro Carvalho Chehab 
22b285192aSMauro Carvalho Chehab #include <linux/pci.h>
23b285192aSMauro Carvalho Chehab #include <linux/i2c.h>
24b285192aSMauro Carvalho Chehab #include <linux/i2c-algo-bit.h>
25b285192aSMauro Carvalho Chehab #include <linux/videodev2.h>
26b285192aSMauro Carvalho Chehab #include <linux/kdev_t.h>
27b285192aSMauro Carvalho Chehab 
28b285192aSMauro Carvalho Chehab #include <media/v4l2-device.h>
29b285192aSMauro Carvalho Chehab #include <media/v4l2-fh.h>
30b285192aSMauro Carvalho Chehab #include <media/tuner.h>
31b285192aSMauro Carvalho Chehab #include <media/tveeprom.h>
320b6b6302SHans Verkuil #include <media/videobuf2-dma-sg.h>
33d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx2341x.h>
340b6b6302SHans Verkuil #include <media/videobuf2-dvb.h>
35b5dcee22SMauro Carvalho Chehab #include <media/i2c/ir-kbd-i2c.h>
36b5dcee22SMauro Carvalho Chehab #include <media/i2c/wm8775.h>
37b285192aSMauro Carvalho Chehab 
38b285192aSMauro Carvalho Chehab #include "cx88-reg.h"
39b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
40b285192aSMauro Carvalho Chehab 
41b285192aSMauro Carvalho Chehab #include <linux/mutex.h>
42b285192aSMauro Carvalho Chehab 
430b6b6302SHans Verkuil #define CX88_VERSION "1.0.0"
44b285192aSMauro Carvalho Chehab 
45b285192aSMauro Carvalho Chehab #define UNSET (-1U)
46b285192aSMauro Carvalho Chehab 
47b285192aSMauro Carvalho Chehab #define CX88_MAXBOARDS 8
48b285192aSMauro Carvalho Chehab 
49b285192aSMauro Carvalho Chehab /* Max number of inputs by card */
50b285192aSMauro Carvalho Chehab #define MAX_CX88_INPUT 8
51b285192aSMauro Carvalho Chehab 
52b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
53b285192aSMauro Carvalho Chehab /* defines and enums                                           */
54b285192aSMauro Carvalho Chehab 
55b285192aSMauro Carvalho Chehab /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM/LC */
56b285192aSMauro Carvalho Chehab #define CX88_NORMS (V4L2_STD_ALL		\
57b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_PAL_H		\
58b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_NTSC_M_KR	\
59b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_SECAM_LC)
60b285192aSMauro Carvalho Chehab 
61b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PACKED       0x01
62b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PLANAR       0x02
63b285192aSMauro Carvalho Chehab 
64c0d5b5fbSHans Verkuil #define VBI_LINE_PAL_COUNT              18
65c0d5b5fbSHans Verkuil #define VBI_LINE_NTSC_COUNT             12
66b285192aSMauro Carvalho Chehab #define VBI_LINE_LENGTH           2048
67b285192aSMauro Carvalho Chehab 
68b285192aSMauro Carvalho Chehab #define AUD_RDS_LINES		     4
69b285192aSMauro Carvalho Chehab 
70b285192aSMauro Carvalho Chehab /* need "shadow" registers for some write-only ones ... */
71b285192aSMauro Carvalho Chehab #define SHADOW_AUD_VOL_CTL           1
72b285192aSMauro Carvalho Chehab #define SHADOW_AUD_BAL_CTL           2
73b285192aSMauro Carvalho Chehab #define SHADOW_MAX                   3
74b285192aSMauro Carvalho Chehab 
75b285192aSMauro Carvalho Chehab /* FM Radio deemphasis type */
76b285192aSMauro Carvalho Chehab enum cx88_deemph_type {
77b285192aSMauro Carvalho Chehab 	FM_NO_DEEMPH = 0,
78b285192aSMauro Carvalho Chehab 	FM_DEEMPH_50,
79b285192aSMauro Carvalho Chehab 	FM_DEEMPH_75
80b285192aSMauro Carvalho Chehab };
81b285192aSMauro Carvalho Chehab 
82b285192aSMauro Carvalho Chehab enum cx88_board_type {
83b285192aSMauro Carvalho Chehab 	CX88_BOARD_NONE = 0,
84b285192aSMauro Carvalho Chehab 	CX88_MPEG_DVB,
85b285192aSMauro Carvalho Chehab 	CX88_MPEG_BLACKBIRD
86b285192aSMauro Carvalho Chehab };
87b285192aSMauro Carvalho Chehab 
88b285192aSMauro Carvalho Chehab enum cx8802_board_access {
89b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_SHARED    = 1,
90b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_EXCLUSIVE = 2,
91b285192aSMauro Carvalho Chehab };
92b285192aSMauro Carvalho Chehab 
93b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
94b285192aSMauro Carvalho Chehab /* tv norms                                                    */
95b285192aSMauro Carvalho Chehab 
9634206439SMauro Carvalho Chehab static inline unsigned int norm_maxw(v4l2_std_id norm)
97b285192aSMauro Carvalho Chehab {
980b6b6302SHans Verkuil 	return 720;
99b285192aSMauro Carvalho Chehab }
100b285192aSMauro Carvalho Chehab 
10134206439SMauro Carvalho Chehab static inline unsigned int norm_maxh(v4l2_std_id norm)
102b285192aSMauro Carvalho Chehab {
1030b6b6302SHans Verkuil 	return (norm & V4L2_STD_525_60) ? 480 : 576;
104b285192aSMauro Carvalho Chehab }
105b285192aSMauro Carvalho Chehab 
106b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
107b285192aSMauro Carvalho Chehab /* static data                                                 */
108b285192aSMauro Carvalho Chehab 
109b285192aSMauro Carvalho Chehab struct cx8800_fmt {
110b285192aSMauro Carvalho Chehab 	const char  *name;
111b285192aSMauro Carvalho Chehab 	u32   fourcc;          /* v4l2 format id */
112b285192aSMauro Carvalho Chehab 	int   depth;
113b285192aSMauro Carvalho Chehab 	int   flags;
114b285192aSMauro Carvalho Chehab 	u32   cxformat;
115b285192aSMauro Carvalho Chehab };
116b285192aSMauro Carvalho Chehab 
117b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
118b285192aSMauro Carvalho Chehab /* SRAM memory management data (see cx88-core.c)               */
119b285192aSMauro Carvalho Chehab 
120b285192aSMauro Carvalho Chehab #define SRAM_CH21 0   /* video */
121b285192aSMauro Carvalho Chehab #define SRAM_CH22 1
122b285192aSMauro Carvalho Chehab #define SRAM_CH23 2
123b285192aSMauro Carvalho Chehab #define SRAM_CH24 3   /* vbi   */
124b285192aSMauro Carvalho Chehab #define SRAM_CH25 4   /* audio */
125b285192aSMauro Carvalho Chehab #define SRAM_CH26 5
126b285192aSMauro Carvalho Chehab #define SRAM_CH28 6   /* mpeg */
127b285192aSMauro Carvalho Chehab #define SRAM_CH27 7   /* audio rds */
128b285192aSMauro Carvalho Chehab /* more */
129b285192aSMauro Carvalho Chehab 
130b285192aSMauro Carvalho Chehab struct sram_channel {
131b285192aSMauro Carvalho Chehab 	const char *name;
132b285192aSMauro Carvalho Chehab 	u32  cmds_start;
133b285192aSMauro Carvalho Chehab 	u32  ctrl_start;
134b285192aSMauro Carvalho Chehab 	u32  cdt;
135b285192aSMauro Carvalho Chehab 	u32  fifo_start;
136b285192aSMauro Carvalho Chehab 	u32  fifo_size;
137b285192aSMauro Carvalho Chehab 	u32  ptr1_reg;
138b285192aSMauro Carvalho Chehab 	u32  ptr2_reg;
139b285192aSMauro Carvalho Chehab 	u32  cnt1_reg;
140b285192aSMauro Carvalho Chehab 	u32  cnt2_reg;
141b285192aSMauro Carvalho Chehab };
142*399426caSMauro Carvalho Chehab 
143b285192aSMauro Carvalho Chehab extern const struct sram_channel cx88_sram_channels[];
144b285192aSMauro Carvalho Chehab 
145b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
146b285192aSMauro Carvalho Chehab /* card configuration                                          */
147b285192aSMauro Carvalho Chehab 
148b285192aSMauro Carvalho Chehab #define CX88_BOARD_NOAUTO               UNSET
149b285192aSMauro Carvalho Chehab #define CX88_BOARD_UNKNOWN                  0
150b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE                1
151b285192aSMauro Carvalho Chehab #define CX88_BOARD_GDI                      2
152b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW                3
153b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_WONDER_PRO           4
154b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST2000XP_EXPERT     5
155b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_STUDIO_303        6
156b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE_MASTER    7
157b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DV2000           8
158b285192aSMauro Carvalho Chehab #define CX88_BOARD_LEADTEK_PVR2000          9
159b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVVCP3PCI        10
160b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PLAYTVPVR       11
161b285192aSMauro Carvalho Chehab #define CX88_BOARD_ASUS_PVR_416            12
162b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE          13
163b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T            14
164b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
165b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_LTV883           16
166b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q  17
167b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_DVB_T1        18
168b285192aSMauro Carvalho Chehab #define CX88_BOARD_CONEXANT_DVB_T1         19
169b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROVIDEO_PV259          20
170b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
171b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD3000           22
172b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T         23
173b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_ROSLYN        24
174b285192aSMauro Carvalho Chehab #define CX88_BOARD_DIGITALLOGIC_MEC        25
175b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVBCTV7E         26
176b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
177b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T  28
178b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_DVB_T_PCI          29
179b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1  30
180b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
181b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
182b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
183b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_HDTVWONDER          34
184b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1000         35
185b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_303              36
186b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1  37
187b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASE2_S1    38
188b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVBS_100         39
189b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100       40
190b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100LP     41
191b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO     42
192b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T_CX22702    43
193b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
194b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
195b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
196b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD5500           47
197b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_MCE200_DELUXE    48
198b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_P7000  49
199b285192aSMauro Carvalho Chehab #define CX88_BOARD_NPGTECH_REALTV_TOP10FM  50
200b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H        51
201b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_DVBS          52
202b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR3000       53
203b285192aSMauro Carvalho Chehab #define CX88_BOARD_NORWOOD_MICRO           54
204b285192aSMauro Carvalho Chehab #define CX88_BOARD_TE_DTV_250_OEM_SWANN    55
205b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1300       56
206b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_PTV_390         57
207b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_PCTV_HD_800i   58
208b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
209b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_HYBRID_PCTV    60
210b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
211b285192aSMauro Carvalho Chehab #define CX88_BOARD_POWERCOLOR_REAL_ANGEL   62
212b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_X8000_MT      63
213b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
214b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
215b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_8000GT       66
216b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_ATSC_120         67
217b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000       68
218b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000LITE   69
219b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S460              70
220b285192aSMauro Carvalho Chehab #define CX88_BOARD_OMICOM_SS4_PCI          71
221b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8920                72
222b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S420              73
223b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
224b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7300               75
225b285192aSMauro Carvalho Chehab #define CX88_BOARD_SATTRADE_ST4200         76
226b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8910                77
227b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_6200               78
228b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
229b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_IRONLY        80
230b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H        81
231b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_J      82
232b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7301               83
233b285192aSMauro Carvalho Chehab #define CX88_BOARD_SAMSUNG_SMT_7020        84
234b285192aSMauro Carvalho Chehab #define CX88_BOARD_TWINHAN_VP1027_DVBS     85
235b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S464              86
236b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_PLUS   87
237b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
238b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
239b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
240b285192aSMauro Carvalho Chehab 
241b285192aSMauro Carvalho Chehab enum cx88_itype {
242b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE1 = 1,
243b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE2,
244b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE3,
245b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE4,
246b285192aSMauro Carvalho Chehab 	CX88_VMUX_SVIDEO,
247b285192aSMauro Carvalho Chehab 	CX88_VMUX_TELEVISION,
248b285192aSMauro Carvalho Chehab 	CX88_VMUX_CABLE,
249b285192aSMauro Carvalho Chehab 	CX88_VMUX_DVB,
250b285192aSMauro Carvalho Chehab 	CX88_VMUX_DEBUG,
251b285192aSMauro Carvalho Chehab 	CX88_RADIO,
252b285192aSMauro Carvalho Chehab };
253b285192aSMauro Carvalho Chehab 
254b285192aSMauro Carvalho Chehab struct cx88_input {
255b285192aSMauro Carvalho Chehab 	enum cx88_itype type;
256b285192aSMauro Carvalho Chehab 	u32             gpio0, gpio1, gpio2, gpio3;
257b285192aSMauro Carvalho Chehab 	unsigned int    vmux:2;
258b285192aSMauro Carvalho Chehab 	unsigned int    audioroute:4;
259b285192aSMauro Carvalho Chehab };
260b285192aSMauro Carvalho Chehab 
261facd2366SHans Verkuil enum cx88_audio_chip {
262f66b2a1cSHans Verkuil 	CX88_AUDIO_WM8775 = 1,
263facd2366SHans Verkuil 	CX88_AUDIO_TVAUDIO,
264facd2366SHans Verkuil };
265facd2366SHans Verkuil 
266b285192aSMauro Carvalho Chehab struct cx88_board {
267b285192aSMauro Carvalho Chehab 	const char              *name;
268b285192aSMauro Carvalho Chehab 	unsigned int            tuner_type;
269b285192aSMauro Carvalho Chehab 	unsigned int		radio_type;
270b285192aSMauro Carvalho Chehab 	unsigned char		tuner_addr;
271b285192aSMauro Carvalho Chehab 	unsigned char		radio_addr;
272b285192aSMauro Carvalho Chehab 	int                     tda9887_conf;
273b285192aSMauro Carvalho Chehab 	struct cx88_input       input[MAX_CX88_INPUT];
274b285192aSMauro Carvalho Chehab 	struct cx88_input       radio;
275b285192aSMauro Carvalho Chehab 	enum cx88_board_type    mpeg;
276facd2366SHans Verkuil 	enum cx88_audio_chip	audio_chip;
277b285192aSMauro Carvalho Chehab 	int			num_frontends;
278b285192aSMauro Carvalho Chehab 
279b285192aSMauro Carvalho Chehab 	/* Used for I2S devices */
280b285192aSMauro Carvalho Chehab 	int			i2sinputcntl;
281b285192aSMauro Carvalho Chehab };
282b285192aSMauro Carvalho Chehab 
283b285192aSMauro Carvalho Chehab struct cx88_subid {
284b285192aSMauro Carvalho Chehab 	u16     subvendor;
285b285192aSMauro Carvalho Chehab 	u16     subdevice;
286b285192aSMauro Carvalho Chehab 	u32     card;
287b285192aSMauro Carvalho Chehab };
288b285192aSMauro Carvalho Chehab 
289b285192aSMauro Carvalho Chehab enum cx88_tvaudio {
290b285192aSMauro Carvalho Chehab 	WW_NONE = 1,
291b285192aSMauro Carvalho Chehab 	WW_BTSC,
292b285192aSMauro Carvalho Chehab 	WW_BG,
293b285192aSMauro Carvalho Chehab 	WW_DK,
294b285192aSMauro Carvalho Chehab 	WW_I,
295b285192aSMauro Carvalho Chehab 	WW_L,
296b285192aSMauro Carvalho Chehab 	WW_EIAJ,
297b285192aSMauro Carvalho Chehab 	WW_I2SPT,
298b285192aSMauro Carvalho Chehab 	WW_FM,
299b285192aSMauro Carvalho Chehab 	WW_I2SADC,
300b285192aSMauro Carvalho Chehab 	WW_M
301b285192aSMauro Carvalho Chehab };
302b285192aSMauro Carvalho Chehab 
303b285192aSMauro Carvalho Chehab #define INPUT(nr) (core->board.input[nr])
304b285192aSMauro Carvalho Chehab 
305b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
306b285192aSMauro Carvalho Chehab /* device / file handle status                                 */
307b285192aSMauro Carvalho Chehab 
308b285192aSMauro Carvalho Chehab #define RESOURCE_OVERLAY       1
309b285192aSMauro Carvalho Chehab #define RESOURCE_VIDEO         2
310b285192aSMauro Carvalho Chehab #define RESOURCE_VBI           4
311b285192aSMauro Carvalho Chehab 
312b285192aSMauro Carvalho Chehab #define BUFFER_TIMEOUT     msecs_to_jiffies(2000)
313b285192aSMauro Carvalho Chehab 
3145e7045e3SHans Verkuil struct cx88_riscmem {
3155e7045e3SHans Verkuil 	unsigned int   size;
3165e7045e3SHans Verkuil 	__le32         *cpu;
3175e7045e3SHans Verkuil 	__le32         *jmp;
3185e7045e3SHans Verkuil 	dma_addr_t     dma;
3195e7045e3SHans Verkuil };
3205e7045e3SHans Verkuil 
321b285192aSMauro Carvalho Chehab /* buffer for one video frame */
322b285192aSMauro Carvalho Chehab struct cx88_buffer {
323b285192aSMauro Carvalho Chehab 	/* common v4l buffer stuff -- must be first */
3242d700715SJunghak Sung 	struct vb2_v4l2_buffer vb;
3250b6b6302SHans Verkuil 	struct list_head       list;
326b285192aSMauro Carvalho Chehab 
327b285192aSMauro Carvalho Chehab 	/* cx88 specific */
328b285192aSMauro Carvalho Chehab 	unsigned int           bpl;
3295e7045e3SHans Verkuil 	struct cx88_riscmem    risc;
330b285192aSMauro Carvalho Chehab };
331b285192aSMauro Carvalho Chehab 
332b285192aSMauro Carvalho Chehab struct cx88_dmaqueue {
333b285192aSMauro Carvalho Chehab 	struct list_head       active;
334b285192aSMauro Carvalho Chehab 	u32                    count;
335b285192aSMauro Carvalho Chehab };
336b285192aSMauro Carvalho Chehab 
337078859a3SHans Verkuil struct cx8800_dev;
338078859a3SHans Verkuil struct cx8802_dev;
339078859a3SHans Verkuil 
340b285192aSMauro Carvalho Chehab struct cx88_core {
341b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
342b285192aSMauro Carvalho Chehab 	atomic_t                   refcount;
343b285192aSMauro Carvalho Chehab 
344b285192aSMauro Carvalho Chehab 	/* board name */
345b285192aSMauro Carvalho Chehab 	int                        nr;
346b285192aSMauro Carvalho Chehab 	char                       name[32];
34748a8a03bSMauro Carvalho Chehab 	u32			   model;
348b285192aSMauro Carvalho Chehab 
349b285192aSMauro Carvalho Chehab 	/* pci stuff */
350b285192aSMauro Carvalho Chehab 	int                        pci_bus;
351b285192aSMauro Carvalho Chehab 	int                        pci_slot;
352b285192aSMauro Carvalho Chehab 	u32                        __iomem *lmmio;
353b285192aSMauro Carvalho Chehab 	u8                         __iomem *bmmio;
354b285192aSMauro Carvalho Chehab 	u32                        shadow[SHADOW_MAX];
355b285192aSMauro Carvalho Chehab 	int                        pci_irqmask;
356b285192aSMauro Carvalho Chehab 
357b285192aSMauro Carvalho Chehab 	/* i2c i/o */
358b285192aSMauro Carvalho Chehab 	struct i2c_adapter         i2c_adap;
359b285192aSMauro Carvalho Chehab 	struct i2c_algo_bit_data   i2c_algo;
360b285192aSMauro Carvalho Chehab 	struct i2c_client          i2c_client;
361b285192aSMauro Carvalho Chehab 	u32                        i2c_state, i2c_rc;
362b285192aSMauro Carvalho Chehab 
363b285192aSMauro Carvalho Chehab 	/* config info -- analog */
364b285192aSMauro Carvalho Chehab 	struct v4l2_device	   v4l2_dev;
365b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   video_hdl;
366b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl	   *chroma_agc;
367b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   audio_hdl;
368b285192aSMauro Carvalho Chehab 	struct v4l2_subdev	   *sd_wm8775;
369b285192aSMauro Carvalho Chehab 	struct i2c_client	   *i2c_rtc;
370b285192aSMauro Carvalho Chehab 	unsigned int               boardnr;
371b285192aSMauro Carvalho Chehab 	struct cx88_board	   board;
372b285192aSMauro Carvalho Chehab 
373b285192aSMauro Carvalho Chehab 	/* Supported V4L _STD_ tuner formats */
374b285192aSMauro Carvalho Chehab 	unsigned int               tuner_formats;
375b285192aSMauro Carvalho Chehab 
376b285192aSMauro Carvalho Chehab 	/* config info -- dvb */
3778268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
3780df289a2SMauro Carvalho Chehab 	int	(*prev_set_voltage)(struct dvb_frontend *fe,
3790df289a2SMauro Carvalho Chehab 				    enum fe_sec_voltage voltage);
380b285192aSMauro Carvalho Chehab #endif
381b285192aSMauro Carvalho Chehab 	void	(*gate_ctrl)(struct cx88_core *core, int open);
382b285192aSMauro Carvalho Chehab 
383b285192aSMauro Carvalho Chehab 	/* state info */
384b285192aSMauro Carvalho Chehab 	struct task_struct         *kthread;
385b285192aSMauro Carvalho Chehab 	v4l2_std_id                tvnorm;
3867b61ba8fSMauro Carvalho Chehab 	unsigned int		   width, height;
3877b61ba8fSMauro Carvalho Chehab 	unsigned int		   field;
388b285192aSMauro Carvalho Chehab 	enum cx88_tvaudio          tvaudio;
389b285192aSMauro Carvalho Chehab 	u32                        audiomode_manual;
390b285192aSMauro Carvalho Chehab 	u32                        audiomode_current;
391b285192aSMauro Carvalho Chehab 	u32                        input;
392b285192aSMauro Carvalho Chehab 	u32                        last_analog_input;
393b285192aSMauro Carvalho Chehab 	u32                        astat;
394b285192aSMauro Carvalho Chehab 	u32			   use_nicam;
395b285192aSMauro Carvalho Chehab 	unsigned long		   last_change;
396b285192aSMauro Carvalho Chehab 
397b285192aSMauro Carvalho Chehab 	/* IR remote control state */
398b285192aSMauro Carvalho Chehab 	struct cx88_IR             *ir;
399b285192aSMauro Carvalho Chehab 
400b285192aSMauro Carvalho Chehab 	/* I2C remote data */
401b285192aSMauro Carvalho Chehab 	struct IR_i2c_init_data    init_data;
402b285192aSMauro Carvalho Chehab 	struct wm8775_platform_data wm8775_data;
403b285192aSMauro Carvalho Chehab 
404b285192aSMauro Carvalho Chehab 	struct mutex               lock;
405b285192aSMauro Carvalho Chehab 	/* various v4l controls */
406b285192aSMauro Carvalho Chehab 	u32                        freq;
407b285192aSMauro Carvalho Chehab 
408078859a3SHans Verkuil 	/*
409078859a3SHans Verkuil 	 * cx88-video needs to access cx8802 for hybrid tuner pll access and
410078859a3SHans Verkuil 	 * for vb2_is_busy() checks.
411078859a3SHans Verkuil 	 */
412b285192aSMauro Carvalho Chehab 	struct cx8802_dev          *dvbdev;
413078859a3SHans Verkuil 	/* cx88-blackbird needs to access cx8800 for vb2_is_busy() checks */
414078859a3SHans Verkuil 	struct cx8800_dev          *v4ldev;
415b285192aSMauro Carvalho Chehab 	enum cx88_board_type       active_type_id;
416b285192aSMauro Carvalho Chehab 	int			   active_ref;
417b285192aSMauro Carvalho Chehab 	int			   active_fe_id;
418b285192aSMauro Carvalho Chehab };
419b285192aSMauro Carvalho Chehab 
420b285192aSMauro Carvalho Chehab static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
421b285192aSMauro Carvalho Chehab {
422b285192aSMauro Carvalho Chehab 	return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
423b285192aSMauro Carvalho Chehab }
424b285192aSMauro Carvalho Chehab 
425b285192aSMauro Carvalho Chehab #define call_hw(core, grpid, o, f, args...) \
426b285192aSMauro Carvalho Chehab 	do {							\
427b285192aSMauro Carvalho Chehab 		if (!core->i2c_rc) {				\
428b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
429b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);	\
430*399426caSMauro Carvalho Chehab 			v4l2_device_call_all(&core->v4l2_dev,	\
431*399426caSMauro Carvalho Chehab 					     grpid, o, f, ##args); \
432b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
433b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);	\
434b285192aSMauro Carvalho Chehab 		}						\
435b285192aSMauro Carvalho Chehab 	} while (0)
436b285192aSMauro Carvalho Chehab 
437b285192aSMauro Carvalho Chehab #define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args)
438b285192aSMauro Carvalho Chehab 
439b285192aSMauro Carvalho Chehab #define WM8775_GID      (1 << 0)
440b285192aSMauro Carvalho Chehab 
441b285192aSMauro Carvalho Chehab #define wm8775_s_ctrl(core, id, val) \
442b285192aSMauro Carvalho Chehab 	do {								\
443b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =				\
444b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
445b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {				\
446b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
447b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);		\
448b285192aSMauro Carvalho Chehab 			v4l2_ctrl_s_ctrl(ctrl_, val);			\
449b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
450b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);		\
451b285192aSMauro Carvalho Chehab 		}							\
452b285192aSMauro Carvalho Chehab 	} while (0)
453b285192aSMauro Carvalho Chehab 
454b285192aSMauro Carvalho Chehab #define wm8775_g_ctrl(core, id) \
455b285192aSMauro Carvalho Chehab 	({								\
456b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =				\
457b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
458b285192aSMauro Carvalho Chehab 		s32 val = 0;						\
459b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {				\
460b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
461b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);		\
462b285192aSMauro Carvalho Chehab 			val = v4l2_ctrl_g_ctrl(ctrl_);			\
463b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
464b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);		\
465b285192aSMauro Carvalho Chehab 		}							\
466b285192aSMauro Carvalho Chehab 		val;							\
467b285192aSMauro Carvalho Chehab 	})
468b285192aSMauro Carvalho Chehab 
469b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
470b285192aSMauro Carvalho Chehab /* function 0: video stuff                                     */
471b285192aSMauro Carvalho Chehab 
472b285192aSMauro Carvalho Chehab struct cx8800_suspend_state {
473b285192aSMauro Carvalho Chehab 	int                        disabled;
474b285192aSMauro Carvalho Chehab };
475b285192aSMauro Carvalho Chehab 
476b285192aSMauro Carvalho Chehab struct cx8800_dev {
477b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
478b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
479b285192aSMauro Carvalho Chehab 
480b285192aSMauro Carvalho Chehab 	/* various device info */
481b285192aSMauro Carvalho Chehab 	unsigned int               resources;
48234080bc2SHans Verkuil 	struct video_device        video_dev;
48334080bc2SHans Verkuil 	struct video_device        vbi_dev;
48434080bc2SHans Verkuil 	struct video_device        radio_dev;
485b285192aSMauro Carvalho Chehab 
486b285192aSMauro Carvalho Chehab 	/* pci i/o */
487b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
488b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev, pci_lat;
489b285192aSMauro Carvalho Chehab 
490b285192aSMauro Carvalho Chehab 	const struct cx8800_fmt    *fmt;
491b285192aSMauro Carvalho Chehab 
492b285192aSMauro Carvalho Chehab 	/* capture queues */
493b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vidq;
4940b6b6302SHans Verkuil 	struct vb2_queue           vb2_vidq;
495b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vbiq;
4960b6b6302SHans Verkuil 	struct vb2_queue           vb2_vbiq;
497b285192aSMauro Carvalho Chehab 
498b285192aSMauro Carvalho Chehab 	/* various v4l controls */
499b285192aSMauro Carvalho Chehab 
500b285192aSMauro Carvalho Chehab 	/* other global state info */
501b285192aSMauro Carvalho Chehab 	struct cx8800_suspend_state state;
502b285192aSMauro Carvalho Chehab };
503b285192aSMauro Carvalho Chehab 
504b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
505b285192aSMauro Carvalho Chehab /* function 1: audio/alsa stuff                                */
506b285192aSMauro Carvalho Chehab /* =============> moved to cx88-alsa.c <====================== */
507b285192aSMauro Carvalho Chehab 
508b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
509b285192aSMauro Carvalho Chehab /* function 2: mpeg stuff                                      */
510b285192aSMauro Carvalho Chehab 
511b285192aSMauro Carvalho Chehab struct cx8802_suspend_state {
512b285192aSMauro Carvalho Chehab 	int                        disabled;
513b285192aSMauro Carvalho Chehab };
514b285192aSMauro Carvalho Chehab 
515b285192aSMauro Carvalho Chehab struct cx8802_driver {
516b285192aSMauro Carvalho Chehab 	struct cx88_core *core;
517b285192aSMauro Carvalho Chehab 
518b285192aSMauro Carvalho Chehab 	/* List of drivers attached to device */
519b285192aSMauro Carvalho Chehab 	struct list_head drvlist;
520b285192aSMauro Carvalho Chehab 
521b285192aSMauro Carvalho Chehab 	/* Type of driver and access required */
522b285192aSMauro Carvalho Chehab 	enum cx88_board_type type_id;
523b285192aSMauro Carvalho Chehab 	enum cx8802_board_access hw_access;
524b285192aSMauro Carvalho Chehab 
525b285192aSMauro Carvalho Chehab 	/* MPEG 8802 internal only */
526b285192aSMauro Carvalho Chehab 	int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
527b285192aSMauro Carvalho Chehab 	int (*resume)(struct pci_dev *pci_dev);
528b285192aSMauro Carvalho Chehab 
529b285192aSMauro Carvalho Chehab 	/* Callers to the following functions must hold core->lock */
530b285192aSMauro Carvalho Chehab 
531b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Driver probe and configuration */
532b285192aSMauro Carvalho Chehab 	int (*probe)(struct cx8802_driver *drv);
533b285192aSMauro Carvalho Chehab 	int (*remove)(struct cx8802_driver *drv);
534b285192aSMauro Carvalho Chehab 
535b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Access for hardware control */
536b285192aSMauro Carvalho Chehab 	int (*advise_acquire)(struct cx8802_driver *drv);
537b285192aSMauro Carvalho Chehab 	int (*advise_release)(struct cx8802_driver *drv);
538b285192aSMauro Carvalho Chehab 
539b285192aSMauro Carvalho Chehab 	/* MPEG 8802 <- mini driver - Access for hardware control */
540b285192aSMauro Carvalho Chehab 	int (*request_acquire)(struct cx8802_driver *drv);
541b285192aSMauro Carvalho Chehab 	int (*request_release)(struct cx8802_driver *drv);
542b285192aSMauro Carvalho Chehab };
543b285192aSMauro Carvalho Chehab 
544b285192aSMauro Carvalho Chehab struct cx8802_dev {
545b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
546b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
547b285192aSMauro Carvalho Chehab 
548b285192aSMauro Carvalho Chehab 	/* pci i/o */
549b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
550b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev, pci_lat;
551b285192aSMauro Carvalho Chehab 
552b285192aSMauro Carvalho Chehab 	/* dma queues */
553b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       mpegq;
5540b6b6302SHans Verkuil 	struct vb2_queue           vb2_mpegq;
555b285192aSMauro Carvalho Chehab 	u32                        ts_packet_size;
556b285192aSMauro Carvalho Chehab 	u32                        ts_packet_count;
557b285192aSMauro Carvalho Chehab 
558b285192aSMauro Carvalho Chehab 	/* other global state info */
559b285192aSMauro Carvalho Chehab 	struct cx8802_suspend_state state;
560b285192aSMauro Carvalho Chehab 
561b285192aSMauro Carvalho Chehab 	/* for blackbird only */
562b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
5638268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_BLACKBIRD)
56434080bc2SHans Verkuil 	struct video_device        mpeg_dev;
565b285192aSMauro Carvalho Chehab 	u32                        mailbox;
566b285192aSMauro Carvalho Chehab 
567b285192aSMauro Carvalho Chehab 	/* mpeg params */
568b285192aSMauro Carvalho Chehab 	struct cx2341x_handler     cxhdl;
569*399426caSMauro Carvalho Chehab 
570b285192aSMauro Carvalho Chehab #endif
571b285192aSMauro Carvalho Chehab 
5728268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
573b285192aSMauro Carvalho Chehab 	/* for dvb only */
5740b6b6302SHans Verkuil 	struct vb2_dvb_frontends frontends;
575b285192aSMauro Carvalho Chehab #endif
576b285192aSMauro Carvalho Chehab 
5778268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
578b285192aSMauro Carvalho Chehab 	/* For VP3045 secondary I2C bus support */
579b285192aSMauro Carvalho Chehab 	struct vp3054_i2c_state	   *vp3054;
580b285192aSMauro Carvalho Chehab #endif
581b285192aSMauro Carvalho Chehab 	/* for switching modulation types */
582b285192aSMauro Carvalho Chehab 	unsigned char              ts_gen_cntrl;
583b285192aSMauro Carvalho Chehab 
584b285192aSMauro Carvalho Chehab 	/* List of attached drivers; must hold core->lock to access */
585b285192aSMauro Carvalho Chehab 	struct list_head	   drvlist;
586b285192aSMauro Carvalho Chehab 
587b285192aSMauro Carvalho Chehab 	struct work_struct	   request_module_wk;
588b285192aSMauro Carvalho Chehab };
589b285192aSMauro Carvalho Chehab 
590b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
591b285192aSMauro Carvalho Chehab 
592b285192aSMauro Carvalho Chehab #define cx_read(reg)             readl(core->lmmio + ((reg) >> 2))
593b285192aSMauro Carvalho Chehab #define cx_write(reg, value)     writel((value), core->lmmio + ((reg) >> 2))
594b285192aSMauro Carvalho Chehab #define cx_writeb(reg, value)    writeb((value), core->bmmio + (reg))
595b285192aSMauro Carvalho Chehab 
596b285192aSMauro Carvalho Chehab #define cx_andor(reg, mask, value) \
597b285192aSMauro Carvalho Chehab 	writel((readl(core->lmmio + ((reg) >> 2)) & ~(mask)) |\
598b285192aSMauro Carvalho Chehab 	((value) & (mask)), core->lmmio + ((reg) >> 2))
599b285192aSMauro Carvalho Chehab #define cx_set(reg, bit)         cx_andor((reg), (bit), (bit))
600b285192aSMauro Carvalho Chehab #define cx_clear(reg, bit)       cx_andor((reg), (bit), 0)
601b285192aSMauro Carvalho Chehab 
602b285192aSMauro Carvalho Chehab #define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
603b285192aSMauro Carvalho Chehab 
604b285192aSMauro Carvalho Chehab /* shadow registers */
605b285192aSMauro Carvalho Chehab #define cx_sread(sreg)		    (core->shadow[sreg])
606b285192aSMauro Carvalho Chehab #define cx_swrite(sreg, reg, value) \
607b285192aSMauro Carvalho Chehab 	(core->shadow[sreg] = value, \
608b285192aSMauro Carvalho Chehab 	writel(core->shadow[sreg], core->lmmio + ((reg) >> 2)))
609b285192aSMauro Carvalho Chehab #define cx_sandor(sreg, reg, mask, value) \
610*399426caSMauro Carvalho Chehab 	(core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | \
611*399426caSMauro Carvalho Chehab 			       ((value) & (mask)), \
612*399426caSMauro Carvalho Chehab 				writel(core->shadow[sreg], \
613*399426caSMauro Carvalho Chehab 				       core->lmmio + ((reg) >> 2)))
614b285192aSMauro Carvalho Chehab 
615b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
616b285192aSMauro Carvalho Chehab /* cx88-core.c                                                 */
617b285192aSMauro Carvalho Chehab 
61802615ed5SMauro Carvalho Chehab extern unsigned int cx88_core_debug;
61902615ed5SMauro Carvalho Chehab 
620*399426caSMauro Carvalho Chehab void cx88_print_irqbits(const char *tag, const char *strings[],
621b285192aSMauro Carvalho Chehab 			int len, u32 bits, u32 mask);
622b285192aSMauro Carvalho Chehab 
623*399426caSMauro Carvalho Chehab int cx88_core_irq(struct cx88_core *core, u32 status);
624*399426caSMauro Carvalho Chehab void cx88_wakeup(struct cx88_core *core,
625b285192aSMauro Carvalho Chehab 		 struct cx88_dmaqueue *q, u32 count);
626*399426caSMauro Carvalho Chehab void cx88_shutdown(struct cx88_core *core);
627*399426caSMauro Carvalho Chehab int cx88_reset(struct cx88_core *core);
628b285192aSMauro Carvalho Chehab 
629b285192aSMauro Carvalho Chehab extern int
6305e7045e3SHans Verkuil cx88_risc_buffer(struct pci_dev *pci, struct cx88_riscmem *risc,
631b285192aSMauro Carvalho Chehab 		 struct scatterlist *sglist,
632b285192aSMauro Carvalho Chehab 		 unsigned int top_offset, unsigned int bottom_offset,
633b285192aSMauro Carvalho Chehab 		 unsigned int bpl, unsigned int padding, unsigned int lines);
634b285192aSMauro Carvalho Chehab extern int
6355e7045e3SHans Verkuil cx88_risc_databuffer(struct pci_dev *pci, struct cx88_riscmem *risc,
636b285192aSMauro Carvalho Chehab 		     struct scatterlist *sglist, unsigned int bpl,
637b285192aSMauro Carvalho Chehab 		     unsigned int lines, unsigned int lpi);
638b285192aSMauro Carvalho Chehab 
639*399426caSMauro Carvalho Chehab void cx88_risc_disasm(struct cx88_core *core,
6405e7045e3SHans Verkuil 		      struct cx88_riscmem *risc);
641*399426caSMauro Carvalho Chehab int cx88_sram_channel_setup(struct cx88_core *core,
642b285192aSMauro Carvalho Chehab 			    const struct sram_channel *ch,
643b285192aSMauro Carvalho Chehab 			    unsigned int bpl, u32 risc);
644*399426caSMauro Carvalho Chehab void cx88_sram_channel_dump(struct cx88_core *core,
645b285192aSMauro Carvalho Chehab 			    const struct sram_channel *ch);
646b285192aSMauro Carvalho Chehab 
647*399426caSMauro Carvalho Chehab int cx88_set_scale(struct cx88_core *core, unsigned int width,
648b285192aSMauro Carvalho Chehab 		   unsigned int height, enum v4l2_field field);
649*399426caSMauro Carvalho Chehab int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
650b285192aSMauro Carvalho Chehab 
651*399426caSMauro Carvalho Chehab void cx88_vdev_init(struct cx88_core *core,
652b285192aSMauro Carvalho Chehab 		    struct pci_dev *pci,
65334080bc2SHans Verkuil 		    struct video_device *vfd,
654b285192aSMauro Carvalho Chehab 		    const struct video_device *template_,
655b285192aSMauro Carvalho Chehab 		    const char *type);
656*399426caSMauro Carvalho Chehab struct cx88_core *cx88_core_get(struct pci_dev *pci);
657*399426caSMauro Carvalho Chehab void cx88_core_put(struct cx88_core *core,
658b285192aSMauro Carvalho Chehab 		   struct pci_dev *pci);
659b285192aSMauro Carvalho Chehab 
660*399426caSMauro Carvalho Chehab int cx88_start_audio_dma(struct cx88_core *core);
661*399426caSMauro Carvalho Chehab int cx88_stop_audio_dma(struct cx88_core *core);
662b285192aSMauro Carvalho Chehab 
663b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
664b285192aSMauro Carvalho Chehab /* cx88-vbi.c                                                  */
665b285192aSMauro Carvalho Chehab 
666b285192aSMauro Carvalho Chehab /* Can be used as g_vbi_fmt, try_vbi_fmt and s_vbi_fmt */
667b285192aSMauro Carvalho Chehab int cx8800_vbi_fmt(struct file *file, void *priv,
668b285192aSMauro Carvalho Chehab 		   struct v4l2_format *f);
669b285192aSMauro Carvalho Chehab 
6700b6b6302SHans Verkuil void cx8800_stop_vbi_dma(struct cx8800_dev *dev);
6710b6b6302SHans Verkuil int cx8800_restart_vbi_queue(struct cx8800_dev *dev, struct cx88_dmaqueue *q);
672b285192aSMauro Carvalho Chehab 
6730b6b6302SHans Verkuil extern const struct vb2_ops cx8800_vbi_qops;
674b285192aSMauro Carvalho Chehab 
675b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
676b285192aSMauro Carvalho Chehab /* cx88-i2c.c                                                  */
677b285192aSMauro Carvalho Chehab 
678*399426caSMauro Carvalho Chehab int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
679b285192aSMauro Carvalho Chehab 
680b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
681b285192aSMauro Carvalho Chehab /* cx88-cards.c                                                */
682b285192aSMauro Carvalho Chehab 
683*399426caSMauro Carvalho Chehab int cx88_tuner_callback(void *dev, int component, int command, int arg);
684*399426caSMauro Carvalho Chehab int cx88_get_resources(const struct cx88_core *core,
685b285192aSMauro Carvalho Chehab 		       struct pci_dev *pci);
686*399426caSMauro Carvalho Chehab struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
687*399426caSMauro Carvalho Chehab void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
688b285192aSMauro Carvalho Chehab 
689b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
690b285192aSMauro Carvalho Chehab /* cx88-tvaudio.c                                              */
691b285192aSMauro Carvalho Chehab 
692b285192aSMauro Carvalho Chehab void cx88_set_tvaudio(struct cx88_core *core);
693b285192aSMauro Carvalho Chehab void cx88_newstation(struct cx88_core *core);
694b285192aSMauro Carvalho Chehab void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
695b285192aSMauro Carvalho Chehab void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
696b285192aSMauro Carvalho Chehab int cx88_audio_thread(void *data);
697b285192aSMauro Carvalho Chehab 
698b285192aSMauro Carvalho Chehab int cx8802_register_driver(struct cx8802_driver *drv);
699b285192aSMauro Carvalho Chehab int cx8802_unregister_driver(struct cx8802_driver *drv);
700b285192aSMauro Carvalho Chehab 
701b285192aSMauro Carvalho Chehab /* Caller must hold core->lock */
7027b61ba8fSMauro Carvalho Chehab struct cx8802_driver *cx8802_get_driver(struct cx8802_dev *dev,
7037b61ba8fSMauro Carvalho Chehab 					enum cx88_board_type btype);
704b285192aSMauro Carvalho Chehab 
705b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
706b285192aSMauro Carvalho Chehab /* cx88-dsp.c                                                  */
707b285192aSMauro Carvalho Chehab 
708b285192aSMauro Carvalho Chehab s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
709b285192aSMauro Carvalho Chehab 
710b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
711b285192aSMauro Carvalho Chehab /* cx88-input.c                                                */
712b285192aSMauro Carvalho Chehab 
713b285192aSMauro Carvalho Chehab int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
714b285192aSMauro Carvalho Chehab int cx88_ir_fini(struct cx88_core *core);
715b285192aSMauro Carvalho Chehab void cx88_ir_irq(struct cx88_core *core);
716b285192aSMauro Carvalho Chehab int cx88_ir_start(struct cx88_core *core);
717b285192aSMauro Carvalho Chehab void cx88_ir_stop(struct cx88_core *core);
718*399426caSMauro Carvalho Chehab void cx88_i2c_init_ir(struct cx88_core *core);
719b285192aSMauro Carvalho Chehab 
720b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
721b285192aSMauro Carvalho Chehab /* cx88-mpeg.c                                                 */
722b285192aSMauro Carvalho Chehab 
7230b6b6302SHans Verkuil int cx8802_buf_prepare(struct vb2_queue *q, struct cx8802_dev *dev,
724ccd6f1d4SHans Verkuil 		       struct cx88_buffer *buf);
725b285192aSMauro Carvalho Chehab void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
726b285192aSMauro Carvalho Chehab void cx8802_cancel_buffers(struct cx8802_dev *dev);
7270b6b6302SHans Verkuil int cx8802_start_dma(struct cx8802_dev    *dev,
7280b6b6302SHans Verkuil 		     struct cx88_dmaqueue *q,
7290b6b6302SHans Verkuil 		     struct cx88_buffer   *buf);
730b285192aSMauro Carvalho Chehab 
731b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
732b285192aSMauro Carvalho Chehab /* cx88-video.c*/
733b285192aSMauro Carvalho Chehab int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i);
734b530a447SHans Verkuil int cx88_set_freq(struct cx88_core  *core, const struct v4l2_frequency *f);
735b285192aSMauro Carvalho Chehab int cx88_video_mux(struct cx88_core *core, unsigned int input);
736b285192aSMauro Carvalho Chehab void cx88_querycap(struct file *file, struct cx88_core *core,
737b285192aSMauro Carvalho Chehab 		   struct v4l2_capability *cap);
73865bc2fe8SMauro Carvalho Chehab 
73965bc2fe8SMauro Carvalho Chehab #endif
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