xref: /linux/drivers/media/pci/cx88/cx88.h (revision 0b6b6302d983236f8b5d6d6602b91a6d1e144896)
1b285192aSMauro Carvalho Chehab /*
2b285192aSMauro Carvalho Chehab  *
3b285192aSMauro Carvalho Chehab  * v4l2 device driver for cx2388x based TV cards
4b285192aSMauro Carvalho Chehab  *
5b285192aSMauro Carvalho Chehab  * (c) 2003,04 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
6b285192aSMauro Carvalho Chehab  *
7b285192aSMauro Carvalho Chehab  *  This program is free software; you can redistribute it and/or modify
8b285192aSMauro Carvalho Chehab  *  it under the terms of the GNU General Public License as published by
9b285192aSMauro Carvalho Chehab  *  the Free Software Foundation; either version 2 of the License, or
10b285192aSMauro Carvalho Chehab  *  (at your option) any later version.
11b285192aSMauro Carvalho Chehab  *
12b285192aSMauro Carvalho Chehab  *  This program is distributed in the hope that it will be useful,
13b285192aSMauro Carvalho Chehab  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
14b285192aSMauro Carvalho Chehab  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15b285192aSMauro Carvalho Chehab  *  GNU General Public License for more details.
16b285192aSMauro Carvalho Chehab  *
17b285192aSMauro Carvalho Chehab  *  You should have received a copy of the GNU General Public License
18b285192aSMauro Carvalho Chehab  *  along with this program; if not, write to the Free Software
19b285192aSMauro Carvalho Chehab  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20b285192aSMauro Carvalho Chehab  */
21b285192aSMauro Carvalho Chehab 
22b285192aSMauro Carvalho Chehab #include <linux/pci.h>
23b285192aSMauro Carvalho Chehab #include <linux/i2c.h>
24b285192aSMauro Carvalho Chehab #include <linux/i2c-algo-bit.h>
25b285192aSMauro Carvalho Chehab #include <linux/videodev2.h>
26b285192aSMauro Carvalho Chehab #include <linux/kdev_t.h>
27b285192aSMauro Carvalho Chehab 
28b285192aSMauro Carvalho Chehab #include <media/v4l2-device.h>
29b285192aSMauro Carvalho Chehab #include <media/v4l2-fh.h>
30b285192aSMauro Carvalho Chehab #include <media/tuner.h>
31b285192aSMauro Carvalho Chehab #include <media/tveeprom.h>
32*0b6b6302SHans Verkuil #include <media/videobuf2-dma-sg.h>
33b285192aSMauro Carvalho Chehab #include <media/cx2341x.h>
34*0b6b6302SHans Verkuil #include <media/videobuf2-dvb.h>
35b285192aSMauro Carvalho Chehab #include <media/ir-kbd-i2c.h>
36b285192aSMauro Carvalho Chehab #include <media/wm8775.h>
37b285192aSMauro Carvalho Chehab 
38b285192aSMauro Carvalho Chehab #include "btcx-risc.h"
39b285192aSMauro Carvalho Chehab #include "cx88-reg.h"
40b285192aSMauro Carvalho Chehab #include "tuner-xc2028.h"
41b285192aSMauro Carvalho Chehab 
42b285192aSMauro Carvalho Chehab #include <linux/mutex.h>
43b285192aSMauro Carvalho Chehab 
44*0b6b6302SHans Verkuil #define CX88_VERSION "1.0.0"
45b285192aSMauro Carvalho Chehab 
46b285192aSMauro Carvalho Chehab #define UNSET (-1U)
47b285192aSMauro Carvalho Chehab 
48b285192aSMauro Carvalho Chehab #define CX88_MAXBOARDS 8
49b285192aSMauro Carvalho Chehab 
50b285192aSMauro Carvalho Chehab /* Max number of inputs by card */
51b285192aSMauro Carvalho Chehab #define MAX_CX88_INPUT 8
52b285192aSMauro Carvalho Chehab 
53b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
54b285192aSMauro Carvalho Chehab /* defines and enums                                           */
55b285192aSMauro Carvalho Chehab 
56b285192aSMauro Carvalho Chehab /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM/LC */
57b285192aSMauro Carvalho Chehab #define CX88_NORMS (V4L2_STD_ALL 		\
58b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_PAL_H		\
59b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_NTSC_M_KR	\
60b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_SECAM_LC)
61b285192aSMauro Carvalho Chehab 
62b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PACKED       0x01
63b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PLANAR       0x02
64b285192aSMauro Carvalho Chehab 
65b285192aSMauro Carvalho Chehab #define VBI_LINE_COUNT              17
66b285192aSMauro Carvalho Chehab #define VBI_LINE_LENGTH           2048
67b285192aSMauro Carvalho Chehab 
68b285192aSMauro Carvalho Chehab #define AUD_RDS_LINES		     4
69b285192aSMauro Carvalho Chehab 
70b285192aSMauro Carvalho Chehab /* need "shadow" registers for some write-only ones ... */
71b285192aSMauro Carvalho Chehab #define SHADOW_AUD_VOL_CTL           1
72b285192aSMauro Carvalho Chehab #define SHADOW_AUD_BAL_CTL           2
73b285192aSMauro Carvalho Chehab #define SHADOW_MAX                   3
74b285192aSMauro Carvalho Chehab 
75b285192aSMauro Carvalho Chehab /* FM Radio deemphasis type */
76b285192aSMauro Carvalho Chehab enum cx88_deemph_type {
77b285192aSMauro Carvalho Chehab 	FM_NO_DEEMPH = 0,
78b285192aSMauro Carvalho Chehab 	FM_DEEMPH_50,
79b285192aSMauro Carvalho Chehab 	FM_DEEMPH_75
80b285192aSMauro Carvalho Chehab };
81b285192aSMauro Carvalho Chehab 
82b285192aSMauro Carvalho Chehab enum cx88_board_type {
83b285192aSMauro Carvalho Chehab 	CX88_BOARD_NONE = 0,
84b285192aSMauro Carvalho Chehab 	CX88_MPEG_DVB,
85b285192aSMauro Carvalho Chehab 	CX88_MPEG_BLACKBIRD
86b285192aSMauro Carvalho Chehab };
87b285192aSMauro Carvalho Chehab 
88b285192aSMauro Carvalho Chehab enum cx8802_board_access {
89b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_SHARED    = 1,
90b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_EXCLUSIVE = 2,
91b285192aSMauro Carvalho Chehab };
92b285192aSMauro Carvalho Chehab 
93b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
94b285192aSMauro Carvalho Chehab /* tv norms                                                    */
95b285192aSMauro Carvalho Chehab 
9634206439SMauro Carvalho Chehab static inline unsigned int norm_maxw(v4l2_std_id norm)
97b285192aSMauro Carvalho Chehab {
98*0b6b6302SHans Verkuil 	return 720;
99b285192aSMauro Carvalho Chehab }
100b285192aSMauro Carvalho Chehab 
101b285192aSMauro Carvalho Chehab 
10234206439SMauro Carvalho Chehab static inline unsigned int norm_maxh(v4l2_std_id norm)
103b285192aSMauro Carvalho Chehab {
104*0b6b6302SHans Verkuil 	return (norm & V4L2_STD_525_60) ? 480 : 576;
105b285192aSMauro Carvalho Chehab }
106b285192aSMauro Carvalho Chehab 
107b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
108b285192aSMauro Carvalho Chehab /* static data                                                 */
109b285192aSMauro Carvalho Chehab 
110b285192aSMauro Carvalho Chehab struct cx8800_fmt {
111b285192aSMauro Carvalho Chehab 	const char  *name;
112b285192aSMauro Carvalho Chehab 	u32   fourcc;          /* v4l2 format id */
113b285192aSMauro Carvalho Chehab 	int   depth;
114b285192aSMauro Carvalho Chehab 	int   flags;
115b285192aSMauro Carvalho Chehab 	u32   cxformat;
116b285192aSMauro Carvalho Chehab };
117b285192aSMauro Carvalho Chehab 
118b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
119b285192aSMauro Carvalho Chehab /* SRAM memory management data (see cx88-core.c)               */
120b285192aSMauro Carvalho Chehab 
121b285192aSMauro Carvalho Chehab #define SRAM_CH21 0   /* video */
122b285192aSMauro Carvalho Chehab #define SRAM_CH22 1
123b285192aSMauro Carvalho Chehab #define SRAM_CH23 2
124b285192aSMauro Carvalho Chehab #define SRAM_CH24 3   /* vbi   */
125b285192aSMauro Carvalho Chehab #define SRAM_CH25 4   /* audio */
126b285192aSMauro Carvalho Chehab #define SRAM_CH26 5
127b285192aSMauro Carvalho Chehab #define SRAM_CH28 6   /* mpeg */
128b285192aSMauro Carvalho Chehab #define SRAM_CH27 7   /* audio rds */
129b285192aSMauro Carvalho Chehab /* more */
130b285192aSMauro Carvalho Chehab 
131b285192aSMauro Carvalho Chehab struct sram_channel {
132b285192aSMauro Carvalho Chehab 	const char *name;
133b285192aSMauro Carvalho Chehab 	u32  cmds_start;
134b285192aSMauro Carvalho Chehab 	u32  ctrl_start;
135b285192aSMauro Carvalho Chehab 	u32  cdt;
136b285192aSMauro Carvalho Chehab 	u32  fifo_start;
137b285192aSMauro Carvalho Chehab 	u32  fifo_size;
138b285192aSMauro Carvalho Chehab 	u32  ptr1_reg;
139b285192aSMauro Carvalho Chehab 	u32  ptr2_reg;
140b285192aSMauro Carvalho Chehab 	u32  cnt1_reg;
141b285192aSMauro Carvalho Chehab 	u32  cnt2_reg;
142b285192aSMauro Carvalho Chehab };
143b285192aSMauro Carvalho Chehab extern const struct sram_channel cx88_sram_channels[];
144b285192aSMauro Carvalho Chehab 
145b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
146b285192aSMauro Carvalho Chehab /* card configuration                                          */
147b285192aSMauro Carvalho Chehab 
148b285192aSMauro Carvalho Chehab #define CX88_BOARD_NOAUTO               UNSET
149b285192aSMauro Carvalho Chehab #define CX88_BOARD_UNKNOWN                  0
150b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE                1
151b285192aSMauro Carvalho Chehab #define CX88_BOARD_GDI                      2
152b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW                3
153b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_WONDER_PRO           4
154b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST2000XP_EXPERT     5
155b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_STUDIO_303        6
156b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE_MASTER    7
157b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DV2000           8
158b285192aSMauro Carvalho Chehab #define CX88_BOARD_LEADTEK_PVR2000          9
159b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVVCP3PCI        10
160b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PLAYTVPVR       11
161b285192aSMauro Carvalho Chehab #define CX88_BOARD_ASUS_PVR_416            12
162b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE          13
163b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T            14
164b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
165b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_LTV883           16
166b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q  17
167b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_DVB_T1        18
168b285192aSMauro Carvalho Chehab #define CX88_BOARD_CONEXANT_DVB_T1         19
169b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROVIDEO_PV259          20
170b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
171b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD3000           22
172b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T         23
173b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_ROSLYN        24
174b285192aSMauro Carvalho Chehab #define CX88_BOARD_DIGITALLOGIC_MEC        25
175b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVBCTV7E         26
176b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
177b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T  28
178b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_DVB_T_PCI          29
179b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1  30
180b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
181b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
182b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
183b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_HDTVWONDER          34
184b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1000         35
185b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_303              36
186b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1  37
187b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASE2_S1    38
188b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVBS_100         39
189b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100       40
190b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100LP     41
191b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO     42
192b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T_CX22702    43
193b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
194b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
195b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
196b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD5500           47
197b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_MCE200_DELUXE    48
198b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_P7000  49
199b285192aSMauro Carvalho Chehab #define CX88_BOARD_NPGTECH_REALTV_TOP10FM  50
200b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H        51
201b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_DVBS          52
202b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR3000       53
203b285192aSMauro Carvalho Chehab #define CX88_BOARD_NORWOOD_MICRO           54
204b285192aSMauro Carvalho Chehab #define CX88_BOARD_TE_DTV_250_OEM_SWANN    55
205b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1300       56
206b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_PTV_390         57
207b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_PCTV_HD_800i   58
208b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
209b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_HYBRID_PCTV    60
210b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
211b285192aSMauro Carvalho Chehab #define CX88_BOARD_POWERCOLOR_REAL_ANGEL   62
212b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_X8000_MT      63
213b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
214b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
215b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_8000GT       66
216b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_ATSC_120         67
217b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000       68
218b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000LITE   69
219b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S460              70
220b285192aSMauro Carvalho Chehab #define CX88_BOARD_OMICOM_SS4_PCI          71
221b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8920                72
222b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S420              73
223b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
224b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7300               75
225b285192aSMauro Carvalho Chehab #define CX88_BOARD_SATTRADE_ST4200         76
226b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8910                77
227b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_6200               78
228b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
229b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_IRONLY        80
230b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H        81
231b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_J      82
232b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7301               83
233b285192aSMauro Carvalho Chehab #define CX88_BOARD_SAMSUNG_SMT_7020        84
234b285192aSMauro Carvalho Chehab #define CX88_BOARD_TWINHAN_VP1027_DVBS     85
235b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S464              86
236b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_PLUS   87
237b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
238b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
239b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
240b285192aSMauro Carvalho Chehab 
241b285192aSMauro Carvalho Chehab enum cx88_itype {
242b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE1 = 1,
243b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE2,
244b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE3,
245b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE4,
246b285192aSMauro Carvalho Chehab 	CX88_VMUX_SVIDEO,
247b285192aSMauro Carvalho Chehab 	CX88_VMUX_TELEVISION,
248b285192aSMauro Carvalho Chehab 	CX88_VMUX_CABLE,
249b285192aSMauro Carvalho Chehab 	CX88_VMUX_DVB,
250b285192aSMauro Carvalho Chehab 	CX88_VMUX_DEBUG,
251b285192aSMauro Carvalho Chehab 	CX88_RADIO,
252b285192aSMauro Carvalho Chehab };
253b285192aSMauro Carvalho Chehab 
254b285192aSMauro Carvalho Chehab struct cx88_input {
255b285192aSMauro Carvalho Chehab 	enum cx88_itype type;
256b285192aSMauro Carvalho Chehab 	u32             gpio0, gpio1, gpio2, gpio3;
257b285192aSMauro Carvalho Chehab 	unsigned int    vmux:2;
258b285192aSMauro Carvalho Chehab 	unsigned int    audioroute:4;
259b285192aSMauro Carvalho Chehab };
260b285192aSMauro Carvalho Chehab 
261facd2366SHans Verkuil enum cx88_audio_chip {
262f66b2a1cSHans Verkuil 	CX88_AUDIO_WM8775 = 1,
263facd2366SHans Verkuil 	CX88_AUDIO_TVAUDIO,
264facd2366SHans Verkuil };
265facd2366SHans Verkuil 
266b285192aSMauro Carvalho Chehab struct cx88_board {
267b285192aSMauro Carvalho Chehab 	const char              *name;
268b285192aSMauro Carvalho Chehab 	unsigned int            tuner_type;
269b285192aSMauro Carvalho Chehab 	unsigned int		radio_type;
270b285192aSMauro Carvalho Chehab 	unsigned char		tuner_addr;
271b285192aSMauro Carvalho Chehab 	unsigned char		radio_addr;
272b285192aSMauro Carvalho Chehab 	int                     tda9887_conf;
273b285192aSMauro Carvalho Chehab 	struct cx88_input       input[MAX_CX88_INPUT];
274b285192aSMauro Carvalho Chehab 	struct cx88_input       radio;
275b285192aSMauro Carvalho Chehab 	enum cx88_board_type    mpeg;
276facd2366SHans Verkuil 	enum cx88_audio_chip	audio_chip;
277b285192aSMauro Carvalho Chehab 	int			num_frontends;
278b285192aSMauro Carvalho Chehab 
279b285192aSMauro Carvalho Chehab 	/* Used for I2S devices */
280b285192aSMauro Carvalho Chehab 	int			i2sinputcntl;
281b285192aSMauro Carvalho Chehab };
282b285192aSMauro Carvalho Chehab 
283b285192aSMauro Carvalho Chehab struct cx88_subid {
284b285192aSMauro Carvalho Chehab 	u16     subvendor;
285b285192aSMauro Carvalho Chehab 	u16     subdevice;
286b285192aSMauro Carvalho Chehab 	u32     card;
287b285192aSMauro Carvalho Chehab };
288b285192aSMauro Carvalho Chehab 
289b285192aSMauro Carvalho Chehab enum cx88_tvaudio {
290b285192aSMauro Carvalho Chehab 	WW_NONE = 1,
291b285192aSMauro Carvalho Chehab 	WW_BTSC,
292b285192aSMauro Carvalho Chehab 	WW_BG,
293b285192aSMauro Carvalho Chehab 	WW_DK,
294b285192aSMauro Carvalho Chehab 	WW_I,
295b285192aSMauro Carvalho Chehab 	WW_L,
296b285192aSMauro Carvalho Chehab 	WW_EIAJ,
297b285192aSMauro Carvalho Chehab 	WW_I2SPT,
298b285192aSMauro Carvalho Chehab 	WW_FM,
299b285192aSMauro Carvalho Chehab 	WW_I2SADC,
300b285192aSMauro Carvalho Chehab 	WW_M
301b285192aSMauro Carvalho Chehab };
302b285192aSMauro Carvalho Chehab 
303b285192aSMauro Carvalho Chehab #define INPUT(nr) (core->board.input[nr])
304b285192aSMauro Carvalho Chehab 
305b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
306b285192aSMauro Carvalho Chehab /* device / file handle status                                 */
307b285192aSMauro Carvalho Chehab 
308b285192aSMauro Carvalho Chehab #define RESOURCE_OVERLAY       1
309b285192aSMauro Carvalho Chehab #define RESOURCE_VIDEO         2
310b285192aSMauro Carvalho Chehab #define RESOURCE_VBI           4
311b285192aSMauro Carvalho Chehab 
312b285192aSMauro Carvalho Chehab #define BUFFER_TIMEOUT     msecs_to_jiffies(2000)
313b285192aSMauro Carvalho Chehab 
314b285192aSMauro Carvalho Chehab /* buffer for one video frame */
315b285192aSMauro Carvalho Chehab struct cx88_buffer {
316b285192aSMauro Carvalho Chehab 	/* common v4l buffer stuff -- must be first */
317*0b6b6302SHans Verkuil 	struct vb2_buffer vb;
318*0b6b6302SHans Verkuil 	struct list_head       list;
319b285192aSMauro Carvalho Chehab 
320b285192aSMauro Carvalho Chehab 	/* cx88 specific */
321b285192aSMauro Carvalho Chehab 	unsigned int           bpl;
322b285192aSMauro Carvalho Chehab 	struct btcx_riscmem    risc;
323b285192aSMauro Carvalho Chehab 	u32                    count;
324b285192aSMauro Carvalho Chehab };
325b285192aSMauro Carvalho Chehab 
326b285192aSMauro Carvalho Chehab struct cx88_dmaqueue {
327b285192aSMauro Carvalho Chehab 	struct list_head       active;
328b285192aSMauro Carvalho Chehab 	u32                    count;
329b285192aSMauro Carvalho Chehab };
330b285192aSMauro Carvalho Chehab 
331b285192aSMauro Carvalho Chehab struct cx88_core {
332b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
333b285192aSMauro Carvalho Chehab 	atomic_t                   refcount;
334b285192aSMauro Carvalho Chehab 
335b285192aSMauro Carvalho Chehab 	/* board name */
336b285192aSMauro Carvalho Chehab 	int                        nr;
337b285192aSMauro Carvalho Chehab 	char                       name[32];
33848a8a03bSMauro Carvalho Chehab 	u32			   model;
339b285192aSMauro Carvalho Chehab 
340b285192aSMauro Carvalho Chehab 	/* pci stuff */
341b285192aSMauro Carvalho Chehab 	int                        pci_bus;
342b285192aSMauro Carvalho Chehab 	int                        pci_slot;
343b285192aSMauro Carvalho Chehab 	u32                        __iomem *lmmio;
344b285192aSMauro Carvalho Chehab 	u8                         __iomem *bmmio;
345b285192aSMauro Carvalho Chehab 	u32                        shadow[SHADOW_MAX];
346b285192aSMauro Carvalho Chehab 	int                        pci_irqmask;
347b285192aSMauro Carvalho Chehab 
348b285192aSMauro Carvalho Chehab 	/* i2c i/o */
349b285192aSMauro Carvalho Chehab 	struct i2c_adapter         i2c_adap;
350b285192aSMauro Carvalho Chehab 	struct i2c_algo_bit_data   i2c_algo;
351b285192aSMauro Carvalho Chehab 	struct i2c_client          i2c_client;
352b285192aSMauro Carvalho Chehab 	u32                        i2c_state, i2c_rc;
353b285192aSMauro Carvalho Chehab 
354b285192aSMauro Carvalho Chehab 	/* config info -- analog */
355b285192aSMauro Carvalho Chehab 	struct v4l2_device 	   v4l2_dev;
356b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   video_hdl;
357b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl	   *chroma_agc;
358b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   audio_hdl;
359b285192aSMauro Carvalho Chehab 	struct v4l2_subdev	   *sd_wm8775;
360b285192aSMauro Carvalho Chehab 	struct i2c_client 	   *i2c_rtc;
361b285192aSMauro Carvalho Chehab 	unsigned int               boardnr;
362b285192aSMauro Carvalho Chehab 	struct cx88_board	   board;
363b285192aSMauro Carvalho Chehab 
364b285192aSMauro Carvalho Chehab 	/* Supported V4L _STD_ tuner formats */
365b285192aSMauro Carvalho Chehab 	unsigned int               tuner_formats;
366b285192aSMauro Carvalho Chehab 
367b285192aSMauro Carvalho Chehab 	/* config info -- dvb */
3688268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
369b285192aSMauro Carvalho Chehab 	int 			   (*prev_set_voltage)(struct dvb_frontend *fe, fe_sec_voltage_t voltage);
370b285192aSMauro Carvalho Chehab #endif
371b285192aSMauro Carvalho Chehab 	void			   (*gate_ctrl)(struct cx88_core  *core, int open);
372b285192aSMauro Carvalho Chehab 
373b285192aSMauro Carvalho Chehab 	/* state info */
374b285192aSMauro Carvalho Chehab 	struct task_struct         *kthread;
375b285192aSMauro Carvalho Chehab 	v4l2_std_id                tvnorm;
376b285192aSMauro Carvalho Chehab 	enum cx88_tvaudio          tvaudio;
377b285192aSMauro Carvalho Chehab 	u32                        audiomode_manual;
378b285192aSMauro Carvalho Chehab 	u32                        audiomode_current;
379b285192aSMauro Carvalho Chehab 	u32                        input;
380b285192aSMauro Carvalho Chehab 	u32                        last_analog_input;
381b285192aSMauro Carvalho Chehab 	u32                        astat;
382b285192aSMauro Carvalho Chehab 	u32			   use_nicam;
383b285192aSMauro Carvalho Chehab 	unsigned long		   last_change;
384b285192aSMauro Carvalho Chehab 
385b285192aSMauro Carvalho Chehab 	/* IR remote control state */
386b285192aSMauro Carvalho Chehab 	struct cx88_IR             *ir;
387b285192aSMauro Carvalho Chehab 
388b285192aSMauro Carvalho Chehab 	/* I2C remote data */
389b285192aSMauro Carvalho Chehab 	struct IR_i2c_init_data    init_data;
390b285192aSMauro Carvalho Chehab 	struct wm8775_platform_data wm8775_data;
391b285192aSMauro Carvalho Chehab 
392b285192aSMauro Carvalho Chehab 	struct mutex               lock;
393b285192aSMauro Carvalho Chehab 	/* various v4l controls */
394b285192aSMauro Carvalho Chehab 	u32                        freq;
395b285192aSMauro Carvalho Chehab 
396b285192aSMauro Carvalho Chehab 	/* cx88-video needs to access cx8802 for hybrid tuner pll access. */
397b285192aSMauro Carvalho Chehab 	struct cx8802_dev          *dvbdev;
398b285192aSMauro Carvalho Chehab 	enum cx88_board_type       active_type_id;
399b285192aSMauro Carvalho Chehab 	int			   active_ref;
400b285192aSMauro Carvalho Chehab 	int			   active_fe_id;
401b285192aSMauro Carvalho Chehab };
402b285192aSMauro Carvalho Chehab 
403b285192aSMauro Carvalho Chehab static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
404b285192aSMauro Carvalho Chehab {
405b285192aSMauro Carvalho Chehab 	return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
406b285192aSMauro Carvalho Chehab }
407b285192aSMauro Carvalho Chehab 
408b285192aSMauro Carvalho Chehab #define call_hw(core, grpid, o, f, args...) \
409b285192aSMauro Carvalho Chehab 	do {							\
410b285192aSMauro Carvalho Chehab 		if (!core->i2c_rc) {				\
411b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
412b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);	\
413b285192aSMauro Carvalho Chehab 			v4l2_device_call_all(&core->v4l2_dev, grpid, o, f, ##args); \
414b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
415b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);	\
416b285192aSMauro Carvalho Chehab 		}						\
417b285192aSMauro Carvalho Chehab 	} while (0)
418b285192aSMauro Carvalho Chehab 
419b285192aSMauro Carvalho Chehab #define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args)
420b285192aSMauro Carvalho Chehab 
421b285192aSMauro Carvalho Chehab #define WM8775_GID      (1 << 0)
422b285192aSMauro Carvalho Chehab 
423b285192aSMauro Carvalho Chehab #define wm8775_s_ctrl(core, id, val) \
424b285192aSMauro Carvalho Chehab 	do {									\
425b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =					\
426b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);	\
427b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {					\
428b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
429b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);			\
430b285192aSMauro Carvalho Chehab 			v4l2_ctrl_s_ctrl(ctrl_, val);				\
431b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
432b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);			\
433b285192aSMauro Carvalho Chehab 		}								\
434b285192aSMauro Carvalho Chehab 	} while (0)
435b285192aSMauro Carvalho Chehab 
436b285192aSMauro Carvalho Chehab #define wm8775_g_ctrl(core, id) \
437b285192aSMauro Carvalho Chehab 	({									\
438b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =					\
439b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);	\
440b285192aSMauro Carvalho Chehab 		s32 val = 0;							\
441b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {					\
442b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
443b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);			\
444b285192aSMauro Carvalho Chehab 			val = v4l2_ctrl_g_ctrl(ctrl_);				\
445b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)					\
446b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);			\
447b285192aSMauro Carvalho Chehab 		}								\
448b285192aSMauro Carvalho Chehab 		val;								\
449b285192aSMauro Carvalho Chehab 	})
450b285192aSMauro Carvalho Chehab 
451b285192aSMauro Carvalho Chehab struct cx8800_dev;
452b285192aSMauro Carvalho Chehab struct cx8802_dev;
453b285192aSMauro Carvalho Chehab 
454b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
455b285192aSMauro Carvalho Chehab /* function 0: video stuff                                     */
456b285192aSMauro Carvalho Chehab 
457b285192aSMauro Carvalho Chehab struct cx8800_suspend_state {
458b285192aSMauro Carvalho Chehab 	int                        disabled;
459b285192aSMauro Carvalho Chehab };
460b285192aSMauro Carvalho Chehab 
461b285192aSMauro Carvalho Chehab struct cx8800_dev {
462b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
463b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
464b285192aSMauro Carvalho Chehab 
465b285192aSMauro Carvalho Chehab 	/* various device info */
466b285192aSMauro Carvalho Chehab 	unsigned int               resources;
467b285192aSMauro Carvalho Chehab 	struct video_device        *video_dev;
468b285192aSMauro Carvalho Chehab 	struct video_device        *vbi_dev;
469b285192aSMauro Carvalho Chehab 	struct video_device        *radio_dev;
470b285192aSMauro Carvalho Chehab 
471b285192aSMauro Carvalho Chehab 	/* pci i/o */
472b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
473b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev,pci_lat;
474b285192aSMauro Carvalho Chehab 
475b285192aSMauro Carvalho Chehab 	const struct cx8800_fmt    *fmt;
476b285192aSMauro Carvalho Chehab 	unsigned int               width, height;
477*0b6b6302SHans Verkuil 	unsigned		   field;
478b285192aSMauro Carvalho Chehab 
479b285192aSMauro Carvalho Chehab 	/* capture queues */
480b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vidq;
481*0b6b6302SHans Verkuil 	struct vb2_queue           vb2_vidq;
482b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vbiq;
483*0b6b6302SHans Verkuil 	struct vb2_queue           vb2_vbiq;
484b285192aSMauro Carvalho Chehab 
485b285192aSMauro Carvalho Chehab 	/* various v4l controls */
486b285192aSMauro Carvalho Chehab 
487b285192aSMauro Carvalho Chehab 	/* other global state info */
488b285192aSMauro Carvalho Chehab 	struct cx8800_suspend_state state;
489b285192aSMauro Carvalho Chehab };
490b285192aSMauro Carvalho Chehab 
491b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
492b285192aSMauro Carvalho Chehab /* function 1: audio/alsa stuff                                */
493b285192aSMauro Carvalho Chehab /* =============> moved to cx88-alsa.c <====================== */
494b285192aSMauro Carvalho Chehab 
495b285192aSMauro Carvalho Chehab 
496b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
497b285192aSMauro Carvalho Chehab /* function 2: mpeg stuff                                      */
498b285192aSMauro Carvalho Chehab 
499b285192aSMauro Carvalho Chehab struct cx8802_suspend_state {
500b285192aSMauro Carvalho Chehab 	int                        disabled;
501b285192aSMauro Carvalho Chehab };
502b285192aSMauro Carvalho Chehab 
503b285192aSMauro Carvalho Chehab struct cx8802_driver {
504b285192aSMauro Carvalho Chehab 	struct cx88_core *core;
505b285192aSMauro Carvalho Chehab 
506b285192aSMauro Carvalho Chehab 	/* List of drivers attached to device */
507b285192aSMauro Carvalho Chehab 	struct list_head drvlist;
508b285192aSMauro Carvalho Chehab 
509b285192aSMauro Carvalho Chehab 	/* Type of driver and access required */
510b285192aSMauro Carvalho Chehab 	enum cx88_board_type type_id;
511b285192aSMauro Carvalho Chehab 	enum cx8802_board_access hw_access;
512b285192aSMauro Carvalho Chehab 
513b285192aSMauro Carvalho Chehab 	/* MPEG 8802 internal only */
514b285192aSMauro Carvalho Chehab 	int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
515b285192aSMauro Carvalho Chehab 	int (*resume)(struct pci_dev *pci_dev);
516b285192aSMauro Carvalho Chehab 
517b285192aSMauro Carvalho Chehab 	/* Callers to the following functions must hold core->lock */
518b285192aSMauro Carvalho Chehab 
519b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Driver probe and configuration */
520b285192aSMauro Carvalho Chehab 	int (*probe)(struct cx8802_driver *drv);
521b285192aSMauro Carvalho Chehab 	int (*remove)(struct cx8802_driver *drv);
522b285192aSMauro Carvalho Chehab 
523b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Access for hardware control */
524b285192aSMauro Carvalho Chehab 	int (*advise_acquire)(struct cx8802_driver *drv);
525b285192aSMauro Carvalho Chehab 	int (*advise_release)(struct cx8802_driver *drv);
526b285192aSMauro Carvalho Chehab 
527b285192aSMauro Carvalho Chehab 	/* MPEG 8802 <- mini driver - Access for hardware control */
528b285192aSMauro Carvalho Chehab 	int (*request_acquire)(struct cx8802_driver *drv);
529b285192aSMauro Carvalho Chehab 	int (*request_release)(struct cx8802_driver *drv);
530b285192aSMauro Carvalho Chehab };
531b285192aSMauro Carvalho Chehab 
532b285192aSMauro Carvalho Chehab struct cx8802_dev {
533b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
534b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
535b285192aSMauro Carvalho Chehab 
536b285192aSMauro Carvalho Chehab 	/* pci i/o */
537b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
538b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev,pci_lat;
539b285192aSMauro Carvalho Chehab 
540b285192aSMauro Carvalho Chehab 	/* dma queues */
541b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       mpegq;
542*0b6b6302SHans Verkuil 	struct vb2_queue           vb2_mpegq;
543b285192aSMauro Carvalho Chehab 	u32                        ts_packet_size;
544b285192aSMauro Carvalho Chehab 	u32                        ts_packet_count;
545b285192aSMauro Carvalho Chehab 
546b285192aSMauro Carvalho Chehab 	/* other global state info */
547b285192aSMauro Carvalho Chehab 	struct cx8802_suspend_state state;
548b285192aSMauro Carvalho Chehab 
549b285192aSMauro Carvalho Chehab 	/* for blackbird only */
550b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
5518268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_BLACKBIRD)
552b285192aSMauro Carvalho Chehab 	struct video_device        *mpeg_dev;
553b285192aSMauro Carvalho Chehab 	u32                        mailbox;
554b285192aSMauro Carvalho Chehab 	int                        width;
555b285192aSMauro Carvalho Chehab 	int                        height;
556*0b6b6302SHans Verkuil 	unsigned                   field;
557b285192aSMauro Carvalho Chehab 	unsigned char              mpeg_active; /* nonzero if mpeg encoder is active */
558b285192aSMauro Carvalho Chehab 
559b285192aSMauro Carvalho Chehab 	/* mpeg params */
560b285192aSMauro Carvalho Chehab 	struct cx2341x_handler     cxhdl;
561b285192aSMauro Carvalho Chehab #endif
562b285192aSMauro Carvalho Chehab 
5638268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
564b285192aSMauro Carvalho Chehab 	/* for dvb only */
565*0b6b6302SHans Verkuil 	struct vb2_dvb_frontends frontends;
566b285192aSMauro Carvalho Chehab #endif
567b285192aSMauro Carvalho Chehab 
5688268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
569b285192aSMauro Carvalho Chehab 	/* For VP3045 secondary I2C bus support */
570b285192aSMauro Carvalho Chehab 	struct vp3054_i2c_state	   *vp3054;
571b285192aSMauro Carvalho Chehab #endif
572b285192aSMauro Carvalho Chehab 	/* for switching modulation types */
573b285192aSMauro Carvalho Chehab 	unsigned char              ts_gen_cntrl;
574b285192aSMauro Carvalho Chehab 
575b285192aSMauro Carvalho Chehab 	/* List of attached drivers; must hold core->lock to access */
576b285192aSMauro Carvalho Chehab 	struct list_head	   drvlist;
577b285192aSMauro Carvalho Chehab 
578b285192aSMauro Carvalho Chehab 	struct work_struct	   request_module_wk;
579b285192aSMauro Carvalho Chehab };
580b285192aSMauro Carvalho Chehab 
581b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
582b285192aSMauro Carvalho Chehab 
583b285192aSMauro Carvalho Chehab #define cx_read(reg)             readl(core->lmmio + ((reg)>>2))
584b285192aSMauro Carvalho Chehab #define cx_write(reg,value)      writel((value), core->lmmio + ((reg)>>2))
585b285192aSMauro Carvalho Chehab #define cx_writeb(reg,value)     writeb((value), core->bmmio + (reg))
586b285192aSMauro Carvalho Chehab 
587b285192aSMauro Carvalho Chehab #define cx_andor(reg,mask,value) \
588b285192aSMauro Carvalho Chehab   writel((readl(core->lmmio+((reg)>>2)) & ~(mask)) |\
589b285192aSMauro Carvalho Chehab   ((value) & (mask)), core->lmmio+((reg)>>2))
590b285192aSMauro Carvalho Chehab #define cx_set(reg,bit)          cx_andor((reg),(bit),(bit))
591b285192aSMauro Carvalho Chehab #define cx_clear(reg,bit)        cx_andor((reg),(bit),0)
592b285192aSMauro Carvalho Chehab 
593b285192aSMauro Carvalho Chehab #define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
594b285192aSMauro Carvalho Chehab 
595b285192aSMauro Carvalho Chehab /* shadow registers */
596b285192aSMauro Carvalho Chehab #define cx_sread(sreg)		    (core->shadow[sreg])
597b285192aSMauro Carvalho Chehab #define cx_swrite(sreg,reg,value) \
598b285192aSMauro Carvalho Chehab   (core->shadow[sreg] = value, \
599b285192aSMauro Carvalho Chehab    writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
600b285192aSMauro Carvalho Chehab #define cx_sandor(sreg,reg,mask,value) \
601b285192aSMauro Carvalho Chehab   (core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | ((value) & (mask)), \
602b285192aSMauro Carvalho Chehab    writel(core->shadow[sreg], core->lmmio + ((reg)>>2)))
603b285192aSMauro Carvalho Chehab 
604b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
605b285192aSMauro Carvalho Chehab /* cx88-core.c                                                 */
606b285192aSMauro Carvalho Chehab 
60702615ed5SMauro Carvalho Chehab extern unsigned int cx88_core_debug;
60802615ed5SMauro Carvalho Chehab 
609b285192aSMauro Carvalho Chehab extern void cx88_print_irqbits(const char *name, const char *tag, const char *strings[],
610b285192aSMauro Carvalho Chehab 			       int len, u32 bits, u32 mask);
611b285192aSMauro Carvalho Chehab 
612b285192aSMauro Carvalho Chehab extern int cx88_core_irq(struct cx88_core *core, u32 status);
613b285192aSMauro Carvalho Chehab extern void cx88_wakeup(struct cx88_core *core,
614b285192aSMauro Carvalho Chehab 			struct cx88_dmaqueue *q, u32 count);
615b285192aSMauro Carvalho Chehab extern void cx88_shutdown(struct cx88_core *core);
616b285192aSMauro Carvalho Chehab extern int cx88_reset(struct cx88_core *core);
617b285192aSMauro Carvalho Chehab 
618b285192aSMauro Carvalho Chehab extern int
619b285192aSMauro Carvalho Chehab cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
620b285192aSMauro Carvalho Chehab 		 struct scatterlist *sglist,
621b285192aSMauro Carvalho Chehab 		 unsigned int top_offset, unsigned int bottom_offset,
622b285192aSMauro Carvalho Chehab 		 unsigned int bpl, unsigned int padding, unsigned int lines);
623b285192aSMauro Carvalho Chehab extern int
624b285192aSMauro Carvalho Chehab cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
625b285192aSMauro Carvalho Chehab 		     struct scatterlist *sglist, unsigned int bpl,
626b285192aSMauro Carvalho Chehab 		     unsigned int lines, unsigned int lpi);
627b285192aSMauro Carvalho Chehab extern void
628*0b6b6302SHans Verkuil cx88_free_buffer(struct vb2_queue *q, struct cx88_buffer *buf);
629b285192aSMauro Carvalho Chehab 
630b285192aSMauro Carvalho Chehab extern void cx88_risc_disasm(struct cx88_core *core,
631b285192aSMauro Carvalho Chehab 			     struct btcx_riscmem *risc);
632b285192aSMauro Carvalho Chehab extern int cx88_sram_channel_setup(struct cx88_core *core,
633b285192aSMauro Carvalho Chehab 				   const struct sram_channel *ch,
634b285192aSMauro Carvalho Chehab 				   unsigned int bpl, u32 risc);
635b285192aSMauro Carvalho Chehab extern void cx88_sram_channel_dump(struct cx88_core *core,
636b285192aSMauro Carvalho Chehab 				   const struct sram_channel *ch);
637b285192aSMauro Carvalho Chehab 
638b285192aSMauro Carvalho Chehab extern int cx88_set_scale(struct cx88_core *core, unsigned int width,
639b285192aSMauro Carvalho Chehab 			  unsigned int height, enum v4l2_field field);
640b285192aSMauro Carvalho Chehab extern int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
641b285192aSMauro Carvalho Chehab 
642b285192aSMauro Carvalho Chehab extern struct video_device *cx88_vdev_init(struct cx88_core *core,
643b285192aSMauro Carvalho Chehab 					   struct pci_dev *pci,
644b285192aSMauro Carvalho Chehab 					   const struct video_device *template_,
645b285192aSMauro Carvalho Chehab 					   const char *type);
646b285192aSMauro Carvalho Chehab extern struct cx88_core *cx88_core_get(struct pci_dev *pci);
647b285192aSMauro Carvalho Chehab extern void cx88_core_put(struct cx88_core *core,
648b285192aSMauro Carvalho Chehab 			  struct pci_dev *pci);
649b285192aSMauro Carvalho Chehab 
650b285192aSMauro Carvalho Chehab extern int cx88_start_audio_dma(struct cx88_core *core);
651b285192aSMauro Carvalho Chehab extern int cx88_stop_audio_dma(struct cx88_core *core);
652b285192aSMauro Carvalho Chehab 
653b285192aSMauro Carvalho Chehab 
654b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
655b285192aSMauro Carvalho Chehab /* cx88-vbi.c                                                  */
656b285192aSMauro Carvalho Chehab 
657b285192aSMauro Carvalho Chehab /* Can be used as g_vbi_fmt, try_vbi_fmt and s_vbi_fmt */
658b285192aSMauro Carvalho Chehab int cx8800_vbi_fmt (struct file *file, void *priv,
659b285192aSMauro Carvalho Chehab 					struct v4l2_format *f);
660b285192aSMauro Carvalho Chehab 
661b285192aSMauro Carvalho Chehab /*
662b285192aSMauro Carvalho Chehab int cx8800_start_vbi_dma(struct cx8800_dev    *dev,
663b285192aSMauro Carvalho Chehab 			 struct cx88_dmaqueue *q,
664b285192aSMauro Carvalho Chehab 			 struct cx88_buffer   *buf);
665b285192aSMauro Carvalho Chehab */
666*0b6b6302SHans Verkuil void cx8800_stop_vbi_dma(struct cx8800_dev *dev);
667*0b6b6302SHans Verkuil int cx8800_restart_vbi_queue(struct cx8800_dev *dev, struct cx88_dmaqueue *q);
668b285192aSMauro Carvalho Chehab 
669*0b6b6302SHans Verkuil extern const struct vb2_ops cx8800_vbi_qops;
670b285192aSMauro Carvalho Chehab 
671b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
672b285192aSMauro Carvalho Chehab /* cx88-i2c.c                                                  */
673b285192aSMauro Carvalho Chehab 
674b285192aSMauro Carvalho Chehab extern int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
675b285192aSMauro Carvalho Chehab 
676b285192aSMauro Carvalho Chehab 
677b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
678b285192aSMauro Carvalho Chehab /* cx88-cards.c                                                */
679b285192aSMauro Carvalho Chehab 
680b285192aSMauro Carvalho Chehab extern int cx88_tuner_callback(void *dev, int component, int command, int arg);
681b285192aSMauro Carvalho Chehab extern int cx88_get_resources(const struct cx88_core *core,
682b285192aSMauro Carvalho Chehab 			      struct pci_dev *pci);
683b285192aSMauro Carvalho Chehab extern struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
684b285192aSMauro Carvalho Chehab extern void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
685b285192aSMauro Carvalho Chehab 
686b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
687b285192aSMauro Carvalho Chehab /* cx88-tvaudio.c                                              */
688b285192aSMauro Carvalho Chehab 
689b285192aSMauro Carvalho Chehab void cx88_set_tvaudio(struct cx88_core *core);
690b285192aSMauro Carvalho Chehab void cx88_newstation(struct cx88_core *core);
691b285192aSMauro Carvalho Chehab void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
692b285192aSMauro Carvalho Chehab void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
693b285192aSMauro Carvalho Chehab int cx88_audio_thread(void *data);
694b285192aSMauro Carvalho Chehab 
695b285192aSMauro Carvalho Chehab int cx8802_register_driver(struct cx8802_driver *drv);
696b285192aSMauro Carvalho Chehab int cx8802_unregister_driver(struct cx8802_driver *drv);
697b285192aSMauro Carvalho Chehab 
698b285192aSMauro Carvalho Chehab /* Caller must hold core->lock */
699b285192aSMauro Carvalho Chehab struct cx8802_driver * cx8802_get_driver(struct cx8802_dev *dev, enum cx88_board_type btype);
700b285192aSMauro Carvalho Chehab 
701b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
702b285192aSMauro Carvalho Chehab /* cx88-dsp.c                                                  */
703b285192aSMauro Carvalho Chehab 
704b285192aSMauro Carvalho Chehab s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
705b285192aSMauro Carvalho Chehab 
706b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
707b285192aSMauro Carvalho Chehab /* cx88-input.c                                                */
708b285192aSMauro Carvalho Chehab 
709b285192aSMauro Carvalho Chehab int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
710b285192aSMauro Carvalho Chehab int cx88_ir_fini(struct cx88_core *core);
711b285192aSMauro Carvalho Chehab void cx88_ir_irq(struct cx88_core *core);
712b285192aSMauro Carvalho Chehab int cx88_ir_start(struct cx88_core *core);
713b285192aSMauro Carvalho Chehab void cx88_ir_stop(struct cx88_core *core);
714b285192aSMauro Carvalho Chehab extern void cx88_i2c_init_ir(struct cx88_core *core);
715b285192aSMauro Carvalho Chehab 
716b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
717b285192aSMauro Carvalho Chehab /* cx88-mpeg.c                                                 */
718b285192aSMauro Carvalho Chehab 
719*0b6b6302SHans Verkuil int cx8802_buf_prepare(struct vb2_queue *q, struct cx8802_dev *dev,
720b285192aSMauro Carvalho Chehab 			struct cx88_buffer *buf, enum v4l2_field field);
721b285192aSMauro Carvalho Chehab void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
722b285192aSMauro Carvalho Chehab void cx8802_cancel_buffers(struct cx8802_dev *dev);
723*0b6b6302SHans Verkuil int cx8802_start_dma(struct cx8802_dev    *dev,
724*0b6b6302SHans Verkuil 			    struct cx88_dmaqueue *q,
725*0b6b6302SHans Verkuil 			    struct cx88_buffer   *buf);
726b285192aSMauro Carvalho Chehab 
727b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
728b285192aSMauro Carvalho Chehab /* cx88-video.c*/
729b285192aSMauro Carvalho Chehab int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i);
730b530a447SHans Verkuil int cx88_set_freq(struct cx88_core  *core, const struct v4l2_frequency *f);
731b285192aSMauro Carvalho Chehab int cx88_video_mux(struct cx88_core *core, unsigned int input);
732b285192aSMauro Carvalho Chehab void cx88_querycap(struct file *file, struct cx88_core *core,
733b285192aSMauro Carvalho Chehab 		struct v4l2_capability *cap);
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