xref: /linux/drivers/media/pci/cx88/cx88.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1c942fddfSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
2b285192aSMauro Carvalho Chehab /*
3b285192aSMauro Carvalho Chehab  * v4l2 device driver for cx2388x based TV cards
4b285192aSMauro Carvalho Chehab  *
5b285192aSMauro Carvalho Chehab  * (c) 2003,04 Gerd Knorr <kraxel@bytesex.org> [SUSE Labs]
6b285192aSMauro Carvalho Chehab  */
7b285192aSMauro Carvalho Chehab 
865bc2fe8SMauro Carvalho Chehab #ifndef CX88_H
965bc2fe8SMauro Carvalho Chehab #define CX88_H
1065bc2fe8SMauro Carvalho Chehab 
1165bc2fe8SMauro Carvalho Chehab #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
1265bc2fe8SMauro Carvalho Chehab 
13b285192aSMauro Carvalho Chehab #include <linux/pci.h>
14b285192aSMauro Carvalho Chehab #include <linux/i2c.h>
15b285192aSMauro Carvalho Chehab #include <linux/i2c-algo-bit.h>
16b285192aSMauro Carvalho Chehab #include <linux/videodev2.h>
17b285192aSMauro Carvalho Chehab #include <linux/kdev_t.h>
18a8d8e38aSElena Reshetova #include <linux/refcount.h>
19b285192aSMauro Carvalho Chehab 
20b285192aSMauro Carvalho Chehab #include <media/v4l2-device.h>
21b285192aSMauro Carvalho Chehab #include <media/v4l2-fh.h>
22b285192aSMauro Carvalho Chehab #include <media/tuner.h>
23b285192aSMauro Carvalho Chehab #include <media/tveeprom.h>
240b6b6302SHans Verkuil #include <media/videobuf2-dma-sg.h>
25d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx2341x.h>
260b6b6302SHans Verkuil #include <media/videobuf2-dvb.h>
27b5dcee22SMauro Carvalho Chehab #include <media/i2c/ir-kbd-i2c.h>
28b5dcee22SMauro Carvalho Chehab #include <media/i2c/wm8775.h>
29b285192aSMauro Carvalho Chehab 
30b285192aSMauro Carvalho Chehab #include "cx88-reg.h"
31*d76231e4SMauro Carvalho Chehab #include "xc2028.h"
32b285192aSMauro Carvalho Chehab 
33b285192aSMauro Carvalho Chehab #include <linux/mutex.h>
34b285192aSMauro Carvalho Chehab 
350b6b6302SHans Verkuil #define CX88_VERSION "1.0.0"
36b285192aSMauro Carvalho Chehab 
37b285192aSMauro Carvalho Chehab #define UNSET (-1U)
38b285192aSMauro Carvalho Chehab 
39b285192aSMauro Carvalho Chehab #define CX88_MAXBOARDS 8
40b285192aSMauro Carvalho Chehab 
41b285192aSMauro Carvalho Chehab /* Max number of inputs by card */
42b285192aSMauro Carvalho Chehab #define MAX_CX88_INPUT 8
43b285192aSMauro Carvalho Chehab 
44b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
45b285192aSMauro Carvalho Chehab /* defines and enums                                           */
46b285192aSMauro Carvalho Chehab 
47b285192aSMauro Carvalho Chehab /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM/LC */
48b285192aSMauro Carvalho Chehab #define CX88_NORMS (V4L2_STD_ALL		\
49b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_PAL_H		\
50b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_NTSC_M_KR	\
51b285192aSMauro Carvalho Chehab 		    & ~V4L2_STD_SECAM_LC)
52b285192aSMauro Carvalho Chehab 
53b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PACKED       0x01
54b285192aSMauro Carvalho Chehab #define FORMAT_FLAGS_PLANAR       0x02
55b285192aSMauro Carvalho Chehab 
56c0d5b5fbSHans Verkuil #define VBI_LINE_PAL_COUNT              18
57c0d5b5fbSHans Verkuil #define VBI_LINE_NTSC_COUNT             12
58b285192aSMauro Carvalho Chehab #define VBI_LINE_LENGTH           2048
59b285192aSMauro Carvalho Chehab 
60b285192aSMauro Carvalho Chehab #define AUD_RDS_LINES		     4
61b285192aSMauro Carvalho Chehab 
62b285192aSMauro Carvalho Chehab /* need "shadow" registers for some write-only ones ... */
63b285192aSMauro Carvalho Chehab #define SHADOW_AUD_VOL_CTL           1
64b285192aSMauro Carvalho Chehab #define SHADOW_AUD_BAL_CTL           2
65b285192aSMauro Carvalho Chehab #define SHADOW_MAX                   3
66b285192aSMauro Carvalho Chehab 
67b285192aSMauro Carvalho Chehab /* FM Radio deemphasis type */
68b285192aSMauro Carvalho Chehab enum cx88_deemph_type {
69b285192aSMauro Carvalho Chehab 	FM_NO_DEEMPH = 0,
70b285192aSMauro Carvalho Chehab 	FM_DEEMPH_50,
71b285192aSMauro Carvalho Chehab 	FM_DEEMPH_75
72b285192aSMauro Carvalho Chehab };
73b285192aSMauro Carvalho Chehab 
74b285192aSMauro Carvalho Chehab enum cx88_board_type {
75b285192aSMauro Carvalho Chehab 	CX88_BOARD_NONE = 0,
76b285192aSMauro Carvalho Chehab 	CX88_MPEG_DVB,
77b285192aSMauro Carvalho Chehab 	CX88_MPEG_BLACKBIRD
78b285192aSMauro Carvalho Chehab };
79b285192aSMauro Carvalho Chehab 
80b285192aSMauro Carvalho Chehab enum cx8802_board_access {
81b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_SHARED    = 1,
82b285192aSMauro Carvalho Chehab 	CX8802_DRVCTL_EXCLUSIVE = 2,
83b285192aSMauro Carvalho Chehab };
84b285192aSMauro Carvalho Chehab 
85b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
86b285192aSMauro Carvalho Chehab /* tv norms                                                    */
87b285192aSMauro Carvalho Chehab 
norm_maxw(v4l2_std_id norm)8834206439SMauro Carvalho Chehab static inline unsigned int norm_maxw(v4l2_std_id norm)
89b285192aSMauro Carvalho Chehab {
900b6b6302SHans Verkuil 	return 720;
91b285192aSMauro Carvalho Chehab }
92b285192aSMauro Carvalho Chehab 
norm_maxh(v4l2_std_id norm)9334206439SMauro Carvalho Chehab static inline unsigned int norm_maxh(v4l2_std_id norm)
94b285192aSMauro Carvalho Chehab {
950b6b6302SHans Verkuil 	return (norm & V4L2_STD_525_60) ? 480 : 576;
96b285192aSMauro Carvalho Chehab }
97b285192aSMauro Carvalho Chehab 
98b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
99b285192aSMauro Carvalho Chehab /* static data                                                 */
100b285192aSMauro Carvalho Chehab 
101b285192aSMauro Carvalho Chehab struct cx8800_fmt {
102b285192aSMauro Carvalho Chehab 	u32   fourcc;          /* v4l2 format id */
103b285192aSMauro Carvalho Chehab 	int   depth;
104b285192aSMauro Carvalho Chehab 	int   flags;
105b285192aSMauro Carvalho Chehab 	u32   cxformat;
106b285192aSMauro Carvalho Chehab };
107b285192aSMauro Carvalho Chehab 
108b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
109b285192aSMauro Carvalho Chehab /* SRAM memory management data (see cx88-core.c)               */
110b285192aSMauro Carvalho Chehab 
111b285192aSMauro Carvalho Chehab #define SRAM_CH21 0   /* video */
112b285192aSMauro Carvalho Chehab #define SRAM_CH22 1
113b285192aSMauro Carvalho Chehab #define SRAM_CH23 2
114b285192aSMauro Carvalho Chehab #define SRAM_CH24 3   /* vbi   */
115b285192aSMauro Carvalho Chehab #define SRAM_CH25 4   /* audio */
116b285192aSMauro Carvalho Chehab #define SRAM_CH26 5
117b285192aSMauro Carvalho Chehab #define SRAM_CH28 6   /* mpeg */
118b285192aSMauro Carvalho Chehab #define SRAM_CH27 7   /* audio rds */
119b285192aSMauro Carvalho Chehab /* more */
120b285192aSMauro Carvalho Chehab 
121b285192aSMauro Carvalho Chehab struct sram_channel {
122b285192aSMauro Carvalho Chehab 	const char *name;
123b285192aSMauro Carvalho Chehab 	u32  cmds_start;
124b285192aSMauro Carvalho Chehab 	u32  ctrl_start;
125b285192aSMauro Carvalho Chehab 	u32  cdt;
126b285192aSMauro Carvalho Chehab 	u32  fifo_start;
127b285192aSMauro Carvalho Chehab 	u32  fifo_size;
128b285192aSMauro Carvalho Chehab 	u32  ptr1_reg;
129b285192aSMauro Carvalho Chehab 	u32  ptr2_reg;
130b285192aSMauro Carvalho Chehab 	u32  cnt1_reg;
131b285192aSMauro Carvalho Chehab 	u32  cnt2_reg;
132b285192aSMauro Carvalho Chehab };
133399426caSMauro Carvalho Chehab 
134b285192aSMauro Carvalho Chehab extern const struct sram_channel cx88_sram_channels[];
135b285192aSMauro Carvalho Chehab 
136b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
137b285192aSMauro Carvalho Chehab /* card configuration                                          */
138b285192aSMauro Carvalho Chehab 
139b285192aSMauro Carvalho Chehab #define CX88_BOARD_NOAUTO               UNSET
140b285192aSMauro Carvalho Chehab #define CX88_BOARD_UNKNOWN                  0
141b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE                1
142b285192aSMauro Carvalho Chehab #define CX88_BOARD_GDI                      2
143b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW                3
144b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_WONDER_PRO           4
145b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST2000XP_EXPERT     5
146b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_STUDIO_303        6
147b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE_MASTER    7
148b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DV2000           8
149b285192aSMauro Carvalho Chehab #define CX88_BOARD_LEADTEK_PVR2000          9
150b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVVCP3PCI        10
151b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PLAYTVPVR       11
152b285192aSMauro Carvalho Chehab #define CX88_BOARD_ASUS_PVR_416            12
153b285192aSMauro Carvalho Chehab #define CX88_BOARD_MSI_TVANYWHERE          13
154b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T            14
155b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1 15
156b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_LTV883           16
157b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q  17
158b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_DVB_T1        18
159b285192aSMauro Carvalho Chehab #define CX88_BOARD_CONEXANT_DVB_T1         19
160b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROVIDEO_PV259          20
161b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS 21
162b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD3000           22
163b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T         23
164b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_ROSLYN        24
165b285192aSMauro Carvalho Chehab #define CX88_BOARD_DIGITALLOGIC_MEC        25
166b285192aSMauro Carvalho Chehab #define CX88_BOARD_IODATA_GVBCTV7E         26
167b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO 27
168b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T  28
169b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_DVB_T_PCI          29
170b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1  30
171b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD 31
172b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERMEDIA_ULTRATV_MC_550 32
173b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_VSTREAM_EXPERT_DVD 33
174b285192aSMauro Carvalho Chehab #define CX88_BOARD_ATI_HDTVWONDER          34
175b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1000         35
176b285192aSMauro Carvalho Chehab #define CX88_BOARD_AVERTV_303              36
177b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1  37
178b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_NOVASE2_S1    38
179b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVBS_100         39
180b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100       40
181b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1100LP     41
182b285192aSMauro Carvalho Chehab #define CX88_BOARD_DNTV_LIVE_DVB_T_PRO     42
183b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_DVB_T_CX22702    43
184b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL 44
185b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT 45
186b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID 46
187b285192aSMauro Carvalho Chehab #define CX88_BOARD_PCHDTV_HD5500           47
188b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_MCE200_DELUXE    48
189b285192aSMauro Carvalho Chehab #define CX88_BOARD_PIXELVIEW_PLAYTV_P7000  49
190b285192aSMauro Carvalho Chehab #define CX88_BOARD_NPGTECH_REALTV_TOP10FM  50
191b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H        51
192b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_DVBS          52
193b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR3000       53
194b285192aSMauro Carvalho Chehab #define CX88_BOARD_NORWOOD_MICRO           54
195b285192aSMauro Carvalho Chehab #define CX88_BOARD_TE_DTV_250_OEM_SWANN    55
196b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR1300       56
197b285192aSMauro Carvalho Chehab #define CX88_BOARD_ADSTECH_PTV_390         57
198b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_PCTV_HD_800i   58
199b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
200b285192aSMauro Carvalho Chehab #define CX88_BOARD_PINNACLE_HYBRID_PCTV    60
201b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
202b285192aSMauro Carvalho Chehab #define CX88_BOARD_POWERCOLOR_REAL_ANGEL   62
203b285192aSMauro Carvalho Chehab #define CX88_BOARD_GENIATECH_X8000_MT      63
204b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
205b285192aSMauro Carvalho Chehab #define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
206b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_8000GT       66
207b285192aSMauro Carvalho Chehab #define CX88_BOARD_KWORLD_ATSC_120         67
208b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000       68
209b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_HVR4000LITE   69
210b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S460              70
211b285192aSMauro Carvalho Chehab #define CX88_BOARD_OMICOM_SS4_PCI          71
212b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8920                72
213b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S420              73
214b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROLINK_PV_GLOBAL_XTREME 74
215b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7300               75
216b285192aSMauro Carvalho Chehab #define CX88_BOARD_SATTRADE_ST4200         76
217b285192aSMauro Carvalho Chehab #define CX88_BOARD_TBS_8910                77
218b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_6200               78
219b285192aSMauro Carvalho Chehab #define CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII 79
220b285192aSMauro Carvalho Chehab #define CX88_BOARD_HAUPPAUGE_IRONLY        80
221b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H        81
222b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_J      82
223b285192aSMauro Carvalho Chehab #define CX88_BOARD_PROF_7301               83
224b285192aSMauro Carvalho Chehab #define CX88_BOARD_SAMSUNG_SMT_7020        84
225b285192aSMauro Carvalho Chehab #define CX88_BOARD_TWINHAN_VP1027_DVBS     85
226b285192aSMauro Carvalho Chehab #define CX88_BOARD_TEVII_S464              86
227b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV2000H_PLUS   87
228b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_DTV1800H_XC4000 88
229b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36 89
230b285192aSMauro Carvalho Chehab #define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43 90
231e6f45ea2SDaniel Gonzalez Cabanelas #define CX88_BOARD_NOTONLYTV_LV3H          91
232b285192aSMauro Carvalho Chehab 
233b285192aSMauro Carvalho Chehab enum cx88_itype {
234b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE1 = 1,
235b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE2,
236b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE3,
237b285192aSMauro Carvalho Chehab 	CX88_VMUX_COMPOSITE4,
238b285192aSMauro Carvalho Chehab 	CX88_VMUX_SVIDEO,
239b285192aSMauro Carvalho Chehab 	CX88_VMUX_TELEVISION,
240b285192aSMauro Carvalho Chehab 	CX88_VMUX_CABLE,
241b285192aSMauro Carvalho Chehab 	CX88_VMUX_DVB,
242b285192aSMauro Carvalho Chehab 	CX88_VMUX_DEBUG,
243b285192aSMauro Carvalho Chehab 	CX88_RADIO,
244b285192aSMauro Carvalho Chehab };
245b285192aSMauro Carvalho Chehab 
246b285192aSMauro Carvalho Chehab struct cx88_input {
247b285192aSMauro Carvalho Chehab 	enum cx88_itype type;
248b285192aSMauro Carvalho Chehab 	u32             gpio0, gpio1, gpio2, gpio3;
249b285192aSMauro Carvalho Chehab 	unsigned int    vmux:2;
250b285192aSMauro Carvalho Chehab 	unsigned int    audioroute:4;
251b285192aSMauro Carvalho Chehab };
252b285192aSMauro Carvalho Chehab 
253facd2366SHans Verkuil enum cx88_audio_chip {
254f66b2a1cSHans Verkuil 	CX88_AUDIO_WM8775 = 1,
255facd2366SHans Verkuil 	CX88_AUDIO_TVAUDIO,
256facd2366SHans Verkuil };
257facd2366SHans Verkuil 
258b285192aSMauro Carvalho Chehab struct cx88_board {
259b285192aSMauro Carvalho Chehab 	const char              *name;
260b285192aSMauro Carvalho Chehab 	unsigned int            tuner_type;
261b285192aSMauro Carvalho Chehab 	unsigned int		radio_type;
262b285192aSMauro Carvalho Chehab 	unsigned char		tuner_addr;
263b285192aSMauro Carvalho Chehab 	unsigned char		radio_addr;
264b285192aSMauro Carvalho Chehab 	int                     tda9887_conf;
265b285192aSMauro Carvalho Chehab 	struct cx88_input       input[MAX_CX88_INPUT];
266b285192aSMauro Carvalho Chehab 	struct cx88_input       radio;
267b285192aSMauro Carvalho Chehab 	enum cx88_board_type    mpeg;
268facd2366SHans Verkuil 	enum cx88_audio_chip	audio_chip;
269b285192aSMauro Carvalho Chehab 	int			num_frontends;
270b285192aSMauro Carvalho Chehab 
271b285192aSMauro Carvalho Chehab 	/* Used for I2S devices */
272b285192aSMauro Carvalho Chehab 	int			i2sinputcntl;
273b285192aSMauro Carvalho Chehab };
274b285192aSMauro Carvalho Chehab 
275b285192aSMauro Carvalho Chehab struct cx88_subid {
276b285192aSMauro Carvalho Chehab 	u16     subvendor;
277b285192aSMauro Carvalho Chehab 	u16     subdevice;
278b285192aSMauro Carvalho Chehab 	u32     card;
279b285192aSMauro Carvalho Chehab };
280b285192aSMauro Carvalho Chehab 
281b285192aSMauro Carvalho Chehab enum cx88_tvaudio {
282b285192aSMauro Carvalho Chehab 	WW_NONE = 1,
283b285192aSMauro Carvalho Chehab 	WW_BTSC,
284b285192aSMauro Carvalho Chehab 	WW_BG,
285b285192aSMauro Carvalho Chehab 	WW_DK,
286b285192aSMauro Carvalho Chehab 	WW_I,
287b285192aSMauro Carvalho Chehab 	WW_L,
288b285192aSMauro Carvalho Chehab 	WW_EIAJ,
289b285192aSMauro Carvalho Chehab 	WW_I2SPT,
290b285192aSMauro Carvalho Chehab 	WW_FM,
291b285192aSMauro Carvalho Chehab 	WW_I2SADC,
292b285192aSMauro Carvalho Chehab 	WW_M
293b285192aSMauro Carvalho Chehab };
294b285192aSMauro Carvalho Chehab 
295b285192aSMauro Carvalho Chehab #define INPUT(nr) (core->board.input[nr])
296b285192aSMauro Carvalho Chehab 
297b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
298b285192aSMauro Carvalho Chehab /* device / file handle status                                 */
299b285192aSMauro Carvalho Chehab 
300b285192aSMauro Carvalho Chehab #define RESOURCE_OVERLAY       1
301b285192aSMauro Carvalho Chehab #define RESOURCE_VIDEO         2
302b285192aSMauro Carvalho Chehab #define RESOURCE_VBI           4
303b285192aSMauro Carvalho Chehab 
304b285192aSMauro Carvalho Chehab #define BUFFER_TIMEOUT     msecs_to_jiffies(2000)
305b285192aSMauro Carvalho Chehab 
3065e7045e3SHans Verkuil struct cx88_riscmem {
3075e7045e3SHans Verkuil 	unsigned int   size;
3085e7045e3SHans Verkuil 	__le32         *cpu;
3095e7045e3SHans Verkuil 	__le32         *jmp;
3105e7045e3SHans Verkuil 	dma_addr_t     dma;
3115e7045e3SHans Verkuil };
3125e7045e3SHans Verkuil 
313b285192aSMauro Carvalho Chehab /* buffer for one video frame */
314b285192aSMauro Carvalho Chehab struct cx88_buffer {
315b285192aSMauro Carvalho Chehab 	/* common v4l buffer stuff -- must be first */
3162d700715SJunghak Sung 	struct vb2_v4l2_buffer vb;
3170b6b6302SHans Verkuil 	struct list_head       list;
318b285192aSMauro Carvalho Chehab 
319b285192aSMauro Carvalho Chehab 	/* cx88 specific */
320b285192aSMauro Carvalho Chehab 	unsigned int           bpl;
3215e7045e3SHans Verkuil 	struct cx88_riscmem    risc;
322b285192aSMauro Carvalho Chehab };
323b285192aSMauro Carvalho Chehab 
324b285192aSMauro Carvalho Chehab struct cx88_dmaqueue {
325b285192aSMauro Carvalho Chehab 	struct list_head       active;
326b285192aSMauro Carvalho Chehab 	u32                    count;
327b285192aSMauro Carvalho Chehab };
328b285192aSMauro Carvalho Chehab 
329078859a3SHans Verkuil struct cx8800_dev;
330078859a3SHans Verkuil struct cx8802_dev;
331078859a3SHans Verkuil 
332b285192aSMauro Carvalho Chehab struct cx88_core {
333b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
334a8d8e38aSElena Reshetova 	refcount_t		   refcount;
335b285192aSMauro Carvalho Chehab 
336b285192aSMauro Carvalho Chehab 	/* board name */
337b285192aSMauro Carvalho Chehab 	int                        nr;
338b285192aSMauro Carvalho Chehab 	char                       name[32];
33948a8a03bSMauro Carvalho Chehab 	u32			   model;
340b285192aSMauro Carvalho Chehab 
341b285192aSMauro Carvalho Chehab 	/* pci stuff */
342b285192aSMauro Carvalho Chehab 	int                        pci_bus;
343b285192aSMauro Carvalho Chehab 	int                        pci_slot;
344b285192aSMauro Carvalho Chehab 	u32                        __iomem *lmmio;
345b285192aSMauro Carvalho Chehab 	u8                         __iomem *bmmio;
346b285192aSMauro Carvalho Chehab 	u32                        shadow[SHADOW_MAX];
347b285192aSMauro Carvalho Chehab 	int                        pci_irqmask;
348b285192aSMauro Carvalho Chehab 
349b285192aSMauro Carvalho Chehab 	/* i2c i/o */
350b285192aSMauro Carvalho Chehab 	struct i2c_adapter         i2c_adap;
351b285192aSMauro Carvalho Chehab 	struct i2c_algo_bit_data   i2c_algo;
352b285192aSMauro Carvalho Chehab 	struct i2c_client          i2c_client;
353b285192aSMauro Carvalho Chehab 	u32                        i2c_state, i2c_rc;
354b285192aSMauro Carvalho Chehab 
355b285192aSMauro Carvalho Chehab 	/* config info -- analog */
356b285192aSMauro Carvalho Chehab 	struct v4l2_device	   v4l2_dev;
357b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   video_hdl;
358b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl	   *chroma_agc;
359b285192aSMauro Carvalho Chehab 	struct v4l2_ctrl_handler   audio_hdl;
360b285192aSMauro Carvalho Chehab 	struct v4l2_subdev	   *sd_wm8775;
361b285192aSMauro Carvalho Chehab 	struct i2c_client	   *i2c_rtc;
362b285192aSMauro Carvalho Chehab 	unsigned int               boardnr;
363b285192aSMauro Carvalho Chehab 	struct cx88_board	   board;
364b285192aSMauro Carvalho Chehab 
365b285192aSMauro Carvalho Chehab 	/* Supported V4L _STD_ tuner formats */
366b285192aSMauro Carvalho Chehab 	unsigned int               tuner_formats;
367b285192aSMauro Carvalho Chehab 
368b285192aSMauro Carvalho Chehab 	/* config info -- dvb */
3698268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
3700df289a2SMauro Carvalho Chehab 	int	(*prev_set_voltage)(struct dvb_frontend *fe,
3710df289a2SMauro Carvalho Chehab 				    enum fe_sec_voltage voltage);
372b285192aSMauro Carvalho Chehab #endif
373b285192aSMauro Carvalho Chehab 	void	(*gate_ctrl)(struct cx88_core *core, int open);
374b285192aSMauro Carvalho Chehab 
375b285192aSMauro Carvalho Chehab 	/* state info */
376b285192aSMauro Carvalho Chehab 	struct task_struct         *kthread;
377b285192aSMauro Carvalho Chehab 	v4l2_std_id                tvnorm;
3787b61ba8fSMauro Carvalho Chehab 	unsigned int		   width, height;
3797b61ba8fSMauro Carvalho Chehab 	unsigned int		   field;
380b285192aSMauro Carvalho Chehab 	enum cx88_tvaudio          tvaudio;
381b285192aSMauro Carvalho Chehab 	u32                        audiomode_manual;
382b285192aSMauro Carvalho Chehab 	u32                        audiomode_current;
383b285192aSMauro Carvalho Chehab 	u32                        input;
384b285192aSMauro Carvalho Chehab 	u32                        last_analog_input;
385b285192aSMauro Carvalho Chehab 	u32                        astat;
386b285192aSMauro Carvalho Chehab 	u32			   use_nicam;
387b285192aSMauro Carvalho Chehab 	unsigned long		   last_change;
388b285192aSMauro Carvalho Chehab 
389b285192aSMauro Carvalho Chehab 	/* IR remote control state */
390b285192aSMauro Carvalho Chehab 	struct cx88_IR             *ir;
391b285192aSMauro Carvalho Chehab 
392b285192aSMauro Carvalho Chehab 	/* I2C remote data */
393b285192aSMauro Carvalho Chehab 	struct IR_i2c_init_data    init_data;
394b285192aSMauro Carvalho Chehab 	struct wm8775_platform_data wm8775_data;
395b285192aSMauro Carvalho Chehab 
396b285192aSMauro Carvalho Chehab 	struct mutex               lock;
397b285192aSMauro Carvalho Chehab 	/* various v4l controls */
398b285192aSMauro Carvalho Chehab 	u32                        freq;
399b285192aSMauro Carvalho Chehab 
400078859a3SHans Verkuil 	/*
401078859a3SHans Verkuil 	 * cx88-video needs to access cx8802 for hybrid tuner pll access and
402078859a3SHans Verkuil 	 * for vb2_is_busy() checks.
403078859a3SHans Verkuil 	 */
404b285192aSMauro Carvalho Chehab 	struct cx8802_dev          *dvbdev;
405078859a3SHans Verkuil 	/* cx88-blackbird needs to access cx8800 for vb2_is_busy() checks */
406078859a3SHans Verkuil 	struct cx8800_dev          *v4ldev;
407b285192aSMauro Carvalho Chehab 	enum cx88_board_type       active_type_id;
408b285192aSMauro Carvalho Chehab 	int			   active_ref;
409b285192aSMauro Carvalho Chehab 	int			   active_fe_id;
410b285192aSMauro Carvalho Chehab };
411b285192aSMauro Carvalho Chehab 
to_core(struct v4l2_device * v4l2_dev)412b285192aSMauro Carvalho Chehab static inline struct cx88_core *to_core(struct v4l2_device *v4l2_dev)
413b285192aSMauro Carvalho Chehab {
414b285192aSMauro Carvalho Chehab 	return container_of(v4l2_dev, struct cx88_core, v4l2_dev);
415b285192aSMauro Carvalho Chehab }
416b285192aSMauro Carvalho Chehab 
417b285192aSMauro Carvalho Chehab #define call_hw(core, grpid, o, f, args...) \
418b285192aSMauro Carvalho Chehab 	do {							\
419b285192aSMauro Carvalho Chehab 		if (!core->i2c_rc) {				\
420b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
421b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);	\
422399426caSMauro Carvalho Chehab 			v4l2_device_call_all(&core->v4l2_dev,	\
423399426caSMauro Carvalho Chehab 					     grpid, o, f, ##args); \
424b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)			\
425b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);	\
426b285192aSMauro Carvalho Chehab 		}						\
427b285192aSMauro Carvalho Chehab 	} while (0)
428b285192aSMauro Carvalho Chehab 
429b285192aSMauro Carvalho Chehab #define call_all(core, o, f, args...) call_hw(core, 0, o, f, ##args)
430b285192aSMauro Carvalho Chehab 
431b285192aSMauro Carvalho Chehab #define WM8775_GID      (1 << 0)
432b285192aSMauro Carvalho Chehab 
433b285192aSMauro Carvalho Chehab #define wm8775_s_ctrl(core, id, val) \
434b285192aSMauro Carvalho Chehab 	do {								\
435b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =				\
436b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
437b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {				\
438b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
439b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);		\
440b285192aSMauro Carvalho Chehab 			v4l2_ctrl_s_ctrl(ctrl_, val);			\
441b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
442b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);		\
443b285192aSMauro Carvalho Chehab 		}							\
444b285192aSMauro Carvalho Chehab 	} while (0)
445b285192aSMauro Carvalho Chehab 
446b285192aSMauro Carvalho Chehab #define wm8775_g_ctrl(core, id) \
447b285192aSMauro Carvalho Chehab 	({								\
448b285192aSMauro Carvalho Chehab 		struct v4l2_ctrl *ctrl_ =				\
449b285192aSMauro Carvalho Chehab 			v4l2_ctrl_find(core->sd_wm8775->ctrl_handler, id);\
450b285192aSMauro Carvalho Chehab 		s32 val = 0;						\
451b285192aSMauro Carvalho Chehab 		if (ctrl_ && !core->i2c_rc) {				\
452b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
453b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 1);		\
454b285192aSMauro Carvalho Chehab 			val = v4l2_ctrl_g_ctrl(ctrl_);			\
455b285192aSMauro Carvalho Chehab 			if (core->gate_ctrl)				\
456b285192aSMauro Carvalho Chehab 				core->gate_ctrl(core, 0);		\
457b285192aSMauro Carvalho Chehab 		}							\
458b285192aSMauro Carvalho Chehab 		val;							\
459b285192aSMauro Carvalho Chehab 	})
460b285192aSMauro Carvalho Chehab 
461b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
462b285192aSMauro Carvalho Chehab /* function 0: video stuff                                     */
463b285192aSMauro Carvalho Chehab 
464b285192aSMauro Carvalho Chehab struct cx8800_suspend_state {
465b285192aSMauro Carvalho Chehab 	int                        disabled;
466b285192aSMauro Carvalho Chehab };
467b285192aSMauro Carvalho Chehab 
468b285192aSMauro Carvalho Chehab struct cx8800_dev {
469b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
470b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
471b285192aSMauro Carvalho Chehab 
472b285192aSMauro Carvalho Chehab 	/* various device info */
473b285192aSMauro Carvalho Chehab 	unsigned int               resources;
47434080bc2SHans Verkuil 	struct video_device        video_dev;
47534080bc2SHans Verkuil 	struct video_device        vbi_dev;
47634080bc2SHans Verkuil 	struct video_device        radio_dev;
477b285192aSMauro Carvalho Chehab 
478b285192aSMauro Carvalho Chehab 	/* pci i/o */
479b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
480b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev, pci_lat;
481b285192aSMauro Carvalho Chehab 
482b285192aSMauro Carvalho Chehab 	const struct cx8800_fmt    *fmt;
483b285192aSMauro Carvalho Chehab 
484b285192aSMauro Carvalho Chehab 	/* capture queues */
485b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vidq;
4860b6b6302SHans Verkuil 	struct vb2_queue           vb2_vidq;
487b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       vbiq;
4880b6b6302SHans Verkuil 	struct vb2_queue           vb2_vbiq;
489b285192aSMauro Carvalho Chehab 
490b285192aSMauro Carvalho Chehab 	/* various v4l controls */
491b285192aSMauro Carvalho Chehab 
492b285192aSMauro Carvalho Chehab 	/* other global state info */
493b285192aSMauro Carvalho Chehab 	struct cx8800_suspend_state state;
494b285192aSMauro Carvalho Chehab };
495b285192aSMauro Carvalho Chehab 
496b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
497b285192aSMauro Carvalho Chehab /* function 1: audio/alsa stuff                                */
498b285192aSMauro Carvalho Chehab /* =============> moved to cx88-alsa.c <====================== */
499b285192aSMauro Carvalho Chehab 
500b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
501b285192aSMauro Carvalho Chehab /* function 2: mpeg stuff                                      */
502b285192aSMauro Carvalho Chehab 
503b285192aSMauro Carvalho Chehab struct cx8802_suspend_state {
504b285192aSMauro Carvalho Chehab 	int                        disabled;
505b285192aSMauro Carvalho Chehab };
506b285192aSMauro Carvalho Chehab 
507b285192aSMauro Carvalho Chehab struct cx8802_driver {
508b285192aSMauro Carvalho Chehab 	struct cx88_core *core;
509b285192aSMauro Carvalho Chehab 
510b285192aSMauro Carvalho Chehab 	/* List of drivers attached to device */
511b285192aSMauro Carvalho Chehab 	struct list_head drvlist;
512b285192aSMauro Carvalho Chehab 
513b285192aSMauro Carvalho Chehab 	/* Type of driver and access required */
514b285192aSMauro Carvalho Chehab 	enum cx88_board_type type_id;
515b285192aSMauro Carvalho Chehab 	enum cx8802_board_access hw_access;
516b285192aSMauro Carvalho Chehab 
517b285192aSMauro Carvalho Chehab 	/* MPEG 8802 internal only */
518b285192aSMauro Carvalho Chehab 	int (*suspend)(struct pci_dev *pci_dev, pm_message_t state);
519b285192aSMauro Carvalho Chehab 	int (*resume)(struct pci_dev *pci_dev);
520b285192aSMauro Carvalho Chehab 
521b285192aSMauro Carvalho Chehab 	/* Callers to the following functions must hold core->lock */
522b285192aSMauro Carvalho Chehab 
523b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Driver probe and configuration */
524b285192aSMauro Carvalho Chehab 	int (*probe)(struct cx8802_driver *drv);
525b285192aSMauro Carvalho Chehab 	int (*remove)(struct cx8802_driver *drv);
526b285192aSMauro Carvalho Chehab 
527b285192aSMauro Carvalho Chehab 	/* MPEG 8802 -> mini driver - Access for hardware control */
528b285192aSMauro Carvalho Chehab 	int (*advise_acquire)(struct cx8802_driver *drv);
529b285192aSMauro Carvalho Chehab 	int (*advise_release)(struct cx8802_driver *drv);
530b285192aSMauro Carvalho Chehab 
531b285192aSMauro Carvalho Chehab 	/* MPEG 8802 <- mini driver - Access for hardware control */
532b285192aSMauro Carvalho Chehab 	int (*request_acquire)(struct cx8802_driver *drv);
533b285192aSMauro Carvalho Chehab 	int (*request_release)(struct cx8802_driver *drv);
534b285192aSMauro Carvalho Chehab };
535b285192aSMauro Carvalho Chehab 
536b285192aSMauro Carvalho Chehab struct cx8802_dev {
537b285192aSMauro Carvalho Chehab 	struct cx88_core           *core;
538b285192aSMauro Carvalho Chehab 	spinlock_t                 slock;
539b285192aSMauro Carvalho Chehab 
540b285192aSMauro Carvalho Chehab 	/* pci i/o */
541b285192aSMauro Carvalho Chehab 	struct pci_dev             *pci;
542b285192aSMauro Carvalho Chehab 	unsigned char              pci_rev, pci_lat;
543b285192aSMauro Carvalho Chehab 
544b285192aSMauro Carvalho Chehab 	/* dma queues */
545b285192aSMauro Carvalho Chehab 	struct cx88_dmaqueue       mpegq;
5460b6b6302SHans Verkuil 	struct vb2_queue           vb2_mpegq;
547b285192aSMauro Carvalho Chehab 	u32                        ts_packet_size;
548b285192aSMauro Carvalho Chehab 	u32                        ts_packet_count;
549b285192aSMauro Carvalho Chehab 
550b285192aSMauro Carvalho Chehab 	/* other global state info */
551b285192aSMauro Carvalho Chehab 	struct cx8802_suspend_state state;
552b285192aSMauro Carvalho Chehab 
553b285192aSMauro Carvalho Chehab 	/* for blackbird only */
554b285192aSMauro Carvalho Chehab 	struct list_head           devlist;
5558268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_BLACKBIRD)
55634080bc2SHans Verkuil 	struct video_device        mpeg_dev;
557b285192aSMauro Carvalho Chehab 	u32                        mailbox;
558b285192aSMauro Carvalho Chehab 
559b285192aSMauro Carvalho Chehab 	/* mpeg params */
560b285192aSMauro Carvalho Chehab 	struct cx2341x_handler     cxhdl;
561399426caSMauro Carvalho Chehab 
562b285192aSMauro Carvalho Chehab #endif
563b285192aSMauro Carvalho Chehab 
5648268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_DVB)
565b285192aSMauro Carvalho Chehab 	/* for dvb only */
5660b6b6302SHans Verkuil 	struct vb2_dvb_frontends frontends;
567b285192aSMauro Carvalho Chehab #endif
568b285192aSMauro Carvalho Chehab 
5698268979aSPeter Senna Tschudin #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
570b285192aSMauro Carvalho Chehab 	/* For VP3045 secondary I2C bus support */
571b285192aSMauro Carvalho Chehab 	struct vp3054_i2c_state	   *vp3054;
572b285192aSMauro Carvalho Chehab #endif
573b285192aSMauro Carvalho Chehab 	/* for switching modulation types */
574b285192aSMauro Carvalho Chehab 	unsigned char              ts_gen_cntrl;
575b285192aSMauro Carvalho Chehab 
576b285192aSMauro Carvalho Chehab 	/* List of attached drivers; must hold core->lock to access */
577b285192aSMauro Carvalho Chehab 	struct list_head	   drvlist;
578b285192aSMauro Carvalho Chehab 
579b285192aSMauro Carvalho Chehab 	struct work_struct	   request_module_wk;
580b285192aSMauro Carvalho Chehab };
581b285192aSMauro Carvalho Chehab 
582b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
583b285192aSMauro Carvalho Chehab 
584b285192aSMauro Carvalho Chehab #define cx_read(reg)             readl(core->lmmio + ((reg) >> 2))
585b285192aSMauro Carvalho Chehab #define cx_write(reg, value)     writel((value), core->lmmio + ((reg) >> 2))
586b285192aSMauro Carvalho Chehab #define cx_writeb(reg, value)    writeb((value), core->bmmio + (reg))
587b285192aSMauro Carvalho Chehab 
588b285192aSMauro Carvalho Chehab #define cx_andor(reg, mask, value) \
589b285192aSMauro Carvalho Chehab 	writel((readl(core->lmmio + ((reg) >> 2)) & ~(mask)) |\
590b285192aSMauro Carvalho Chehab 	((value) & (mask)), core->lmmio + ((reg) >> 2))
591b285192aSMauro Carvalho Chehab #define cx_set(reg, bit)         cx_andor((reg), (bit), (bit))
592b285192aSMauro Carvalho Chehab #define cx_clear(reg, bit)       cx_andor((reg), (bit), 0)
593b285192aSMauro Carvalho Chehab 
594b285192aSMauro Carvalho Chehab #define cx_wait(d) { if (need_resched()) schedule(); else udelay(d); }
595b285192aSMauro Carvalho Chehab 
596b285192aSMauro Carvalho Chehab /* shadow registers */
597b285192aSMauro Carvalho Chehab #define cx_sread(sreg)		    (core->shadow[sreg])
598b285192aSMauro Carvalho Chehab #define cx_swrite(sreg, reg, value) \
599b285192aSMauro Carvalho Chehab 	(core->shadow[sreg] = value, \
600b285192aSMauro Carvalho Chehab 	writel(core->shadow[sreg], core->lmmio + ((reg) >> 2)))
601b285192aSMauro Carvalho Chehab #define cx_sandor(sreg, reg, mask, value) \
602399426caSMauro Carvalho Chehab 	(core->shadow[sreg] = (core->shadow[sreg] & ~(mask)) | \
603399426caSMauro Carvalho Chehab 			       ((value) & (mask)), \
604399426caSMauro Carvalho Chehab 				writel(core->shadow[sreg], \
605399426caSMauro Carvalho Chehab 				       core->lmmio + ((reg) >> 2)))
606b285192aSMauro Carvalho Chehab 
607b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
608b285192aSMauro Carvalho Chehab /* cx88-core.c                                                 */
609b285192aSMauro Carvalho Chehab 
61002615ed5SMauro Carvalho Chehab extern unsigned int cx88_core_debug;
61102615ed5SMauro Carvalho Chehab 
612399426caSMauro Carvalho Chehab void cx88_print_irqbits(const char *tag, const char *strings[],
613b285192aSMauro Carvalho Chehab 			int len, u32 bits, u32 mask);
614b285192aSMauro Carvalho Chehab 
615399426caSMauro Carvalho Chehab int cx88_core_irq(struct cx88_core *core, u32 status);
616399426caSMauro Carvalho Chehab void cx88_wakeup(struct cx88_core *core,
617b285192aSMauro Carvalho Chehab 		 struct cx88_dmaqueue *q, u32 count);
618399426caSMauro Carvalho Chehab void cx88_shutdown(struct cx88_core *core);
619399426caSMauro Carvalho Chehab int cx88_reset(struct cx88_core *core);
620b285192aSMauro Carvalho Chehab 
621b285192aSMauro Carvalho Chehab extern int
6225e7045e3SHans Verkuil cx88_risc_buffer(struct pci_dev *pci, struct cx88_riscmem *risc,
623b285192aSMauro Carvalho Chehab 		 struct scatterlist *sglist,
624b285192aSMauro Carvalho Chehab 		 unsigned int top_offset, unsigned int bottom_offset,
625b285192aSMauro Carvalho Chehab 		 unsigned int bpl, unsigned int padding, unsigned int lines);
626b285192aSMauro Carvalho Chehab extern int
6275e7045e3SHans Verkuil cx88_risc_databuffer(struct pci_dev *pci, struct cx88_riscmem *risc,
628b285192aSMauro Carvalho Chehab 		     struct scatterlist *sglist, unsigned int bpl,
629b285192aSMauro Carvalho Chehab 		     unsigned int lines, unsigned int lpi);
630b285192aSMauro Carvalho Chehab 
631399426caSMauro Carvalho Chehab void cx88_risc_disasm(struct cx88_core *core,
6325e7045e3SHans Verkuil 		      struct cx88_riscmem *risc);
633399426caSMauro Carvalho Chehab int cx88_sram_channel_setup(struct cx88_core *core,
634b285192aSMauro Carvalho Chehab 			    const struct sram_channel *ch,
635b285192aSMauro Carvalho Chehab 			    unsigned int bpl, u32 risc);
636399426caSMauro Carvalho Chehab void cx88_sram_channel_dump(struct cx88_core *core,
637b285192aSMauro Carvalho Chehab 			    const struct sram_channel *ch);
638b285192aSMauro Carvalho Chehab 
639399426caSMauro Carvalho Chehab int cx88_set_scale(struct cx88_core *core, unsigned int width,
640b285192aSMauro Carvalho Chehab 		   unsigned int height, enum v4l2_field field);
641399426caSMauro Carvalho Chehab int cx88_set_tvnorm(struct cx88_core *core, v4l2_std_id norm);
642b285192aSMauro Carvalho Chehab 
643399426caSMauro Carvalho Chehab void cx88_vdev_init(struct cx88_core *core,
644b285192aSMauro Carvalho Chehab 		    struct pci_dev *pci,
64534080bc2SHans Verkuil 		    struct video_device *vfd,
646b285192aSMauro Carvalho Chehab 		    const struct video_device *template_,
647b285192aSMauro Carvalho Chehab 		    const char *type);
648399426caSMauro Carvalho Chehab struct cx88_core *cx88_core_get(struct pci_dev *pci);
649399426caSMauro Carvalho Chehab void cx88_core_put(struct cx88_core *core,
650b285192aSMauro Carvalho Chehab 		   struct pci_dev *pci);
651b285192aSMauro Carvalho Chehab 
652399426caSMauro Carvalho Chehab int cx88_start_audio_dma(struct cx88_core *core);
653399426caSMauro Carvalho Chehab int cx88_stop_audio_dma(struct cx88_core *core);
654b285192aSMauro Carvalho Chehab 
655b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
656b285192aSMauro Carvalho Chehab /* cx88-vbi.c                                                  */
657b285192aSMauro Carvalho Chehab 
658b285192aSMauro Carvalho Chehab /* Can be used as g_vbi_fmt, try_vbi_fmt and s_vbi_fmt */
659b285192aSMauro Carvalho Chehab int cx8800_vbi_fmt(struct file *file, void *priv,
660b285192aSMauro Carvalho Chehab 		   struct v4l2_format *f);
661b285192aSMauro Carvalho Chehab 
6620b6b6302SHans Verkuil void cx8800_stop_vbi_dma(struct cx8800_dev *dev);
6630b6b6302SHans Verkuil int cx8800_restart_vbi_queue(struct cx8800_dev *dev, struct cx88_dmaqueue *q);
664b285192aSMauro Carvalho Chehab 
6650b6b6302SHans Verkuil extern const struct vb2_ops cx8800_vbi_qops;
666b285192aSMauro Carvalho Chehab 
667b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
668b285192aSMauro Carvalho Chehab /* cx88-i2c.c                                                  */
669b285192aSMauro Carvalho Chehab 
670399426caSMauro Carvalho Chehab int cx88_i2c_init(struct cx88_core *core, struct pci_dev *pci);
671b285192aSMauro Carvalho Chehab 
672b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
673b285192aSMauro Carvalho Chehab /* cx88-cards.c                                                */
674b285192aSMauro Carvalho Chehab 
675399426caSMauro Carvalho Chehab int cx88_tuner_callback(void *dev, int component, int command, int arg);
676399426caSMauro Carvalho Chehab int cx88_get_resources(const struct cx88_core *core,
677b285192aSMauro Carvalho Chehab 		       struct pci_dev *pci);
678399426caSMauro Carvalho Chehab struct cx88_core *cx88_core_create(struct pci_dev *pci, int nr);
679399426caSMauro Carvalho Chehab void cx88_setup_xc3028(struct cx88_core *core, struct xc2028_ctrl *ctl);
680b285192aSMauro Carvalho Chehab 
681b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
682b285192aSMauro Carvalho Chehab /* cx88-tvaudio.c                                              */
683b285192aSMauro Carvalho Chehab 
684b285192aSMauro Carvalho Chehab void cx88_set_tvaudio(struct cx88_core *core);
685b285192aSMauro Carvalho Chehab void cx88_newstation(struct cx88_core *core);
686b285192aSMauro Carvalho Chehab void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t);
687b285192aSMauro Carvalho Chehab void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual);
688b285192aSMauro Carvalho Chehab int cx88_audio_thread(void *data);
689b285192aSMauro Carvalho Chehab 
690b285192aSMauro Carvalho Chehab int cx8802_register_driver(struct cx8802_driver *drv);
691b285192aSMauro Carvalho Chehab int cx8802_unregister_driver(struct cx8802_driver *drv);
692b285192aSMauro Carvalho Chehab 
693b285192aSMauro Carvalho Chehab /* Caller must hold core->lock */
6947b61ba8fSMauro Carvalho Chehab struct cx8802_driver *cx8802_get_driver(struct cx8802_dev *dev,
6957b61ba8fSMauro Carvalho Chehab 					enum cx88_board_type btype);
696b285192aSMauro Carvalho Chehab 
697b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
698b285192aSMauro Carvalho Chehab /* cx88-dsp.c                                                  */
699b285192aSMauro Carvalho Chehab 
700b285192aSMauro Carvalho Chehab s32 cx88_dsp_detect_stereo_sap(struct cx88_core *core);
701b285192aSMauro Carvalho Chehab 
702b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
703b285192aSMauro Carvalho Chehab /* cx88-input.c                                                */
704b285192aSMauro Carvalho Chehab 
705b285192aSMauro Carvalho Chehab int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci);
706b285192aSMauro Carvalho Chehab int cx88_ir_fini(struct cx88_core *core);
707b285192aSMauro Carvalho Chehab void cx88_ir_irq(struct cx88_core *core);
708b285192aSMauro Carvalho Chehab int cx88_ir_start(struct cx88_core *core);
709b285192aSMauro Carvalho Chehab void cx88_ir_stop(struct cx88_core *core);
710399426caSMauro Carvalho Chehab void cx88_i2c_init_ir(struct cx88_core *core);
711b285192aSMauro Carvalho Chehab 
712b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
713b285192aSMauro Carvalho Chehab /* cx88-mpeg.c                                                 */
714b285192aSMauro Carvalho Chehab 
7150b6b6302SHans Verkuil int cx8802_buf_prepare(struct vb2_queue *q, struct cx8802_dev *dev,
716ccd6f1d4SHans Verkuil 		       struct cx88_buffer *buf);
717b285192aSMauro Carvalho Chehab void cx8802_buf_queue(struct cx8802_dev *dev, struct cx88_buffer *buf);
718b285192aSMauro Carvalho Chehab void cx8802_cancel_buffers(struct cx8802_dev *dev);
7190b6b6302SHans Verkuil int cx8802_start_dma(struct cx8802_dev    *dev,
7200b6b6302SHans Verkuil 		     struct cx88_dmaqueue *q,
7210b6b6302SHans Verkuil 		     struct cx88_buffer   *buf);
722b285192aSMauro Carvalho Chehab 
723b285192aSMauro Carvalho Chehab /* ----------------------------------------------------------- */
724b285192aSMauro Carvalho Chehab /* cx88-video.c*/
725b285192aSMauro Carvalho Chehab int cx88_enum_input(struct cx88_core *core, struct v4l2_input *i);
726b530a447SHans Verkuil int cx88_set_freq(struct cx88_core  *core, const struct v4l2_frequency *f);
727b285192aSMauro Carvalho Chehab int cx88_video_mux(struct cx88_core *core, unsigned int input);
7284839c58fSMauro Carvalho Chehab int cx88_querycap(struct file *file, struct cx88_core *core,
729b285192aSMauro Carvalho Chehab 		  struct v4l2_capability *cap);
73065bc2fe8SMauro Carvalho Chehab 
73165bc2fe8SMauro Carvalho Chehab #endif
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