1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * device driver for Conexant 2388x based TV cards 4 * MPEG Transport Stream (DVB) routines 5 * 6 * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au> 7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] 8 */ 9 10 #include "cx88.h" 11 #include "dvb-pll.h" 12 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/device.h> 16 #include <linux/fs.h> 17 #include <linux/kthread.h> 18 #include <linux/file.h> 19 #include <linux/suspend.h> 20 21 #include <media/v4l2-common.h> 22 23 #include "mt352.h" 24 #include "mt352_priv.h" 25 #include "cx88-vp3054-i2c.h" 26 #include "zl10353.h" 27 #include "cx22702.h" 28 #include "or51132.h" 29 #include "lgdt330x.h" 30 #include "s5h1409.h" 31 #include "xc4000.h" 32 #include "xc5000.h" 33 #include "nxt200x.h" 34 #include "cx24123.h" 35 #include "isl6421.h" 36 #include "tuner-simple.h" 37 #include "tda9887.h" 38 #include "s5h1411.h" 39 #include "stv0299.h" 40 #include "z0194a.h" 41 #include "stv0288.h" 42 #include "stb6000.h" 43 #include "cx24116.h" 44 #include "stv0900.h" 45 #include "stb6100.h" 46 #include "stb6100_proc.h" 47 #include "mb86a16.h" 48 #include "ts2020.h" 49 #include "ds3000.h" 50 51 MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); 52 MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); 53 MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); 54 MODULE_LICENSE("GPL"); 55 MODULE_VERSION(CX88_VERSION); 56 57 static unsigned int debug; 58 module_param(debug, int, 0644); 59 MODULE_PARM_DESC(debug, "enable debug messages [dvb]"); 60 61 static unsigned int dvb_buf_tscnt = 32; 62 module_param(dvb_buf_tscnt, int, 0644); 63 MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]"); 64 65 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 66 67 #define dprintk(level, fmt, arg...) do { \ 68 if (debug >= level) \ 69 printk(KERN_DEBUG pr_fmt("%s: dvb:" fmt), \ 70 __func__, ##arg); \ 71 } while (0) 72 73 /* ------------------------------------------------------------------ */ 74 75 static int queue_setup(struct vb2_queue *q, 76 unsigned int *num_buffers, unsigned int *num_planes, 77 unsigned int sizes[], struct device *alloc_devs[]) 78 { 79 struct cx8802_dev *dev = q->drv_priv; 80 81 *num_planes = 1; 82 dev->ts_packet_size = 188 * 4; 83 dev->ts_packet_count = dvb_buf_tscnt; 84 sizes[0] = dev->ts_packet_size * dev->ts_packet_count; 85 *num_buffers = dvb_buf_tscnt; 86 return 0; 87 } 88 89 static int buffer_prepare(struct vb2_buffer *vb) 90 { 91 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 92 struct cx8802_dev *dev = vb->vb2_queue->drv_priv; 93 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 94 95 return cx8802_buf_prepare(vb->vb2_queue, dev, buf); 96 } 97 98 static void buffer_finish(struct vb2_buffer *vb) 99 { 100 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 101 struct cx8802_dev *dev = vb->vb2_queue->drv_priv; 102 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 103 struct cx88_riscmem *risc = &buf->risc; 104 105 if (risc->cpu) 106 dma_free_coherent(&dev->pci->dev, risc->size, risc->cpu, 107 risc->dma); 108 memset(risc, 0, sizeof(*risc)); 109 } 110 111 static void buffer_queue(struct vb2_buffer *vb) 112 { 113 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); 114 struct cx8802_dev *dev = vb->vb2_queue->drv_priv; 115 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb); 116 117 cx8802_buf_queue(dev, buf); 118 } 119 120 static int start_streaming(struct vb2_queue *q, unsigned int count) 121 { 122 struct cx8802_dev *dev = q->drv_priv; 123 struct cx88_dmaqueue *dmaq = &dev->mpegq; 124 struct cx88_buffer *buf; 125 126 buf = list_entry(dmaq->active.next, struct cx88_buffer, list); 127 cx8802_start_dma(dev, dmaq, buf); 128 return 0; 129 } 130 131 static void stop_streaming(struct vb2_queue *q) 132 { 133 struct cx8802_dev *dev = q->drv_priv; 134 struct cx88_dmaqueue *dmaq = &dev->mpegq; 135 unsigned long flags; 136 137 cx8802_cancel_buffers(dev); 138 139 spin_lock_irqsave(&dev->slock, flags); 140 while (!list_empty(&dmaq->active)) { 141 struct cx88_buffer *buf = list_entry(dmaq->active.next, 142 struct cx88_buffer, list); 143 144 list_del(&buf->list); 145 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); 146 } 147 spin_unlock_irqrestore(&dev->slock, flags); 148 } 149 150 static const struct vb2_ops dvb_qops = { 151 .queue_setup = queue_setup, 152 .buf_prepare = buffer_prepare, 153 .buf_finish = buffer_finish, 154 .buf_queue = buffer_queue, 155 .start_streaming = start_streaming, 156 .stop_streaming = stop_streaming, 157 }; 158 159 /* ------------------------------------------------------------------ */ 160 161 static int cx88_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire) 162 { 163 struct cx8802_dev *dev = fe->dvb->priv; 164 struct cx8802_driver *drv = NULL; 165 int ret = 0; 166 int fe_id; 167 168 fe_id = vb2_dvb_find_frontend(&dev->frontends, fe); 169 if (!fe_id) { 170 pr_err("%s() No frontend found\n", __func__); 171 return -EINVAL; 172 } 173 174 mutex_lock(&dev->core->lock); 175 drv = cx8802_get_driver(dev, CX88_MPEG_DVB); 176 if (drv) { 177 if (acquire) { 178 dev->frontends.active_fe_id = fe_id; 179 ret = drv->request_acquire(drv); 180 } else { 181 ret = drv->request_release(drv); 182 dev->frontends.active_fe_id = 0; 183 } 184 } 185 mutex_unlock(&dev->core->lock); 186 187 return ret; 188 } 189 190 static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open) 191 { 192 struct vb2_dvb_frontends *f; 193 struct vb2_dvb_frontend *fe; 194 195 if (!core->dvbdev) 196 return; 197 198 f = &core->dvbdev->frontends; 199 200 if (!f) 201 return; 202 203 if (f->gate <= 1) /* undefined or fe0 */ 204 fe = vb2_dvb_get_frontend(f, 1); 205 else 206 fe = vb2_dvb_get_frontend(f, f->gate); 207 208 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) 209 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); 210 } 211 212 /* ------------------------------------------------------------------ */ 213 214 static int dvico_fusionhdtv_demod_init(struct dvb_frontend *fe) 215 { 216 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 }; 217 static const u8 reset[] = { RESET, 0x80 }; 218 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; 219 static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 }; 220 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 }; 221 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; 222 223 mt352_write(fe, clock_config, sizeof(clock_config)); 224 udelay(200); 225 mt352_write(fe, reset, sizeof(reset)); 226 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 227 228 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 229 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); 230 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 231 return 0; 232 } 233 234 static int dvico_dual_demod_init(struct dvb_frontend *fe) 235 { 236 static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 }; 237 static const u8 reset[] = { RESET, 0x80 }; 238 static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 }; 239 static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 }; 240 static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 }; 241 static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; 242 243 mt352_write(fe, clock_config, sizeof(clock_config)); 244 udelay(200); 245 mt352_write(fe, reset, sizeof(reset)); 246 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 247 248 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 249 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); 250 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 251 252 return 0; 253 } 254 255 static int dntv_live_dvbt_demod_init(struct dvb_frontend *fe) 256 { 257 static const u8 clock_config[] = { 0x89, 0x38, 0x39 }; 258 static const u8 reset[] = { 0x50, 0x80 }; 259 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 }; 260 static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, 261 0x00, 0xFF, 0x00, 0x40, 0x40 }; 262 static const u8 dntv_extra[] = { 0xB5, 0x7A }; 263 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; 264 265 mt352_write(fe, clock_config, sizeof(clock_config)); 266 udelay(2000); 267 mt352_write(fe, reset, sizeof(reset)); 268 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 269 270 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 271 udelay(2000); 272 mt352_write(fe, dntv_extra, sizeof(dntv_extra)); 273 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 274 275 return 0; 276 } 277 278 static const struct mt352_config dvico_fusionhdtv = { 279 .demod_address = 0x0f, 280 .demod_init = dvico_fusionhdtv_demod_init, 281 }; 282 283 static const struct mt352_config dntv_live_dvbt_config = { 284 .demod_address = 0x0f, 285 .demod_init = dntv_live_dvbt_demod_init, 286 }; 287 288 static const struct mt352_config dvico_fusionhdtv_dual = { 289 .demod_address = 0x0f, 290 .demod_init = dvico_dual_demod_init, 291 }; 292 293 static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = { 294 .demod_address = (0x1e >> 1), 295 .no_tuner = 1, 296 .if2 = 45600, 297 }; 298 299 static const struct mb86a16_config twinhan_vp1027 = { 300 .demod_address = 0x08, 301 }; 302 303 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054) 304 static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend *fe) 305 { 306 static const u8 clock_config[] = { 0x89, 0x38, 0x38 }; 307 static const u8 reset[] = { 0x50, 0x80 }; 308 static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 }; 309 static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF, 310 0x00, 0xFF, 0x00, 0x40, 0x40 }; 311 static const u8 dntv_extra[] = { 0xB5, 0x7A }; 312 static const u8 capt_range_cfg[] = { 0x75, 0x32 }; 313 314 mt352_write(fe, clock_config, sizeof(clock_config)); 315 udelay(2000); 316 mt352_write(fe, reset, sizeof(reset)); 317 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); 318 319 mt352_write(fe, agc_cfg, sizeof(agc_cfg)); 320 udelay(2000); 321 mt352_write(fe, dntv_extra, sizeof(dntv_extra)); 322 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); 323 324 return 0; 325 } 326 327 static const struct mt352_config dntv_live_dvbt_pro_config = { 328 .demod_address = 0x0f, 329 .no_tuner = 1, 330 .demod_init = dntv_live_dvbt_pro_demod_init, 331 }; 332 #endif 333 334 static const struct zl10353_config dvico_fusionhdtv_hybrid = { 335 .demod_address = 0x0f, 336 .no_tuner = 1, 337 }; 338 339 static const struct zl10353_config dvico_fusionhdtv_xc3028 = { 340 .demod_address = 0x0f, 341 .if2 = 45600, 342 .no_tuner = 1, 343 }; 344 345 static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = { 346 .demod_address = 0x0f, 347 .if2 = 4560, 348 .no_tuner = 1, 349 .demod_init = dvico_fusionhdtv_demod_init, 350 }; 351 352 static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = { 353 .demod_address = 0x0f, 354 }; 355 356 static const struct cx22702_config connexant_refboard_config = { 357 .demod_address = 0x43, 358 .output_mode = CX22702_SERIAL_OUTPUT, 359 }; 360 361 static const struct cx22702_config hauppauge_hvr_config = { 362 .demod_address = 0x63, 363 .output_mode = CX22702_SERIAL_OUTPUT, 364 }; 365 366 static int or51132_set_ts_param(struct dvb_frontend *fe, int is_punctured) 367 { 368 struct cx8802_dev *dev = fe->dvb->priv; 369 370 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; 371 return 0; 372 } 373 374 static const struct or51132_config pchdtv_hd3000 = { 375 .demod_address = 0x15, 376 .set_ts_params = or51132_set_ts_param, 377 }; 378 379 static int lgdt330x_pll_rf_set(struct dvb_frontend *fe, int index) 380 { 381 struct cx8802_dev *dev = fe->dvb->priv; 382 struct cx88_core *core = dev->core; 383 384 dprintk(1, "%s: index = %d\n", __func__, index); 385 if (index == 0) 386 cx_clear(MO_GP0_IO, 8); 387 else 388 cx_set(MO_GP0_IO, 8); 389 return 0; 390 } 391 392 static int lgdt330x_set_ts_param(struct dvb_frontend *fe, int is_punctured) 393 { 394 struct cx8802_dev *dev = fe->dvb->priv; 395 396 if (is_punctured) 397 dev->ts_gen_cntrl |= 0x04; 398 else 399 dev->ts_gen_cntrl &= ~0x04; 400 return 0; 401 } 402 403 static struct lgdt330x_config fusionhdtv_3_gold = { 404 .demod_chip = LGDT3302, 405 .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */ 406 .set_ts_params = lgdt330x_set_ts_param, 407 }; 408 409 static const struct lgdt330x_config fusionhdtv_5_gold = { 410 .demod_chip = LGDT3303, 411 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ 412 .set_ts_params = lgdt330x_set_ts_param, 413 }; 414 415 static const struct lgdt330x_config pchdtv_hd5500 = { 416 .demod_chip = LGDT3303, 417 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ 418 .set_ts_params = lgdt330x_set_ts_param, 419 }; 420 421 static int nxt200x_set_ts_param(struct dvb_frontend *fe, int is_punctured) 422 { 423 struct cx8802_dev *dev = fe->dvb->priv; 424 425 dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; 426 return 0; 427 } 428 429 static const struct nxt200x_config ati_hdtvwonder = { 430 .demod_address = 0x0a, 431 .set_ts_params = nxt200x_set_ts_param, 432 }; 433 434 static int cx24123_set_ts_param(struct dvb_frontend *fe, 435 int is_punctured) 436 { 437 struct cx8802_dev *dev = fe->dvb->priv; 438 439 dev->ts_gen_cntrl = 0x02; 440 return 0; 441 } 442 443 static int kworld_dvbs_100_set_voltage(struct dvb_frontend *fe, 444 enum fe_sec_voltage voltage) 445 { 446 struct cx8802_dev *dev = fe->dvb->priv; 447 struct cx88_core *core = dev->core; 448 449 if (voltage == SEC_VOLTAGE_OFF) 450 cx_write(MO_GP0_IO, 0x000006fb); 451 else 452 cx_write(MO_GP0_IO, 0x000006f9); 453 454 if (core->prev_set_voltage) 455 return core->prev_set_voltage(fe, voltage); 456 return 0; 457 } 458 459 static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe, 460 enum fe_sec_voltage voltage) 461 { 462 struct cx8802_dev *dev = fe->dvb->priv; 463 struct cx88_core *core = dev->core; 464 465 if (voltage == SEC_VOLTAGE_OFF) { 466 dprintk(1, "LNB Voltage OFF\n"); 467 cx_write(MO_GP0_IO, 0x0000efff); 468 } 469 470 if (core->prev_set_voltage) 471 return core->prev_set_voltage(fe, voltage); 472 return 0; 473 } 474 475 static int tevii_dvbs_set_voltage(struct dvb_frontend *fe, 476 enum fe_sec_voltage voltage) 477 { 478 struct cx8802_dev *dev = fe->dvb->priv; 479 struct cx88_core *core = dev->core; 480 481 cx_set(MO_GP0_IO, 0x6040); 482 switch (voltage) { 483 case SEC_VOLTAGE_13: 484 cx_clear(MO_GP0_IO, 0x20); 485 break; 486 case SEC_VOLTAGE_18: 487 cx_set(MO_GP0_IO, 0x20); 488 break; 489 case SEC_VOLTAGE_OFF: 490 cx_clear(MO_GP0_IO, 0x20); 491 break; 492 } 493 494 if (core->prev_set_voltage) 495 return core->prev_set_voltage(fe, voltage); 496 return 0; 497 } 498 499 static int vp1027_set_voltage(struct dvb_frontend *fe, 500 enum fe_sec_voltage voltage) 501 { 502 struct cx8802_dev *dev = fe->dvb->priv; 503 struct cx88_core *core = dev->core; 504 505 switch (voltage) { 506 case SEC_VOLTAGE_13: 507 dprintk(1, "LNB SEC Voltage=13\n"); 508 cx_write(MO_GP0_IO, 0x00001220); 509 break; 510 case SEC_VOLTAGE_18: 511 dprintk(1, "LNB SEC Voltage=18\n"); 512 cx_write(MO_GP0_IO, 0x00001222); 513 break; 514 case SEC_VOLTAGE_OFF: 515 dprintk(1, "LNB Voltage OFF\n"); 516 cx_write(MO_GP0_IO, 0x00001230); 517 break; 518 } 519 520 if (core->prev_set_voltage) 521 return core->prev_set_voltage(fe, voltage); 522 return 0; 523 } 524 525 static const struct cx24123_config geniatech_dvbs_config = { 526 .demod_address = 0x55, 527 .set_ts_params = cx24123_set_ts_param, 528 }; 529 530 static const struct cx24123_config hauppauge_novas_config = { 531 .demod_address = 0x55, 532 .set_ts_params = cx24123_set_ts_param, 533 }; 534 535 static const struct cx24123_config kworld_dvbs_100_config = { 536 .demod_address = 0x15, 537 .set_ts_params = cx24123_set_ts_param, 538 .lnb_polarity = 1, 539 }; 540 541 static const struct s5h1409_config pinnacle_pctv_hd_800i_config = { 542 .demod_address = 0x32 >> 1, 543 .output_mode = S5H1409_PARALLEL_OUTPUT, 544 .gpio = S5H1409_GPIO_ON, 545 .qam_if = 44000, 546 .inversion = S5H1409_INVERSION_OFF, 547 .status_mode = S5H1409_DEMODLOCKING, 548 .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK, 549 }; 550 551 static const struct s5h1409_config dvico_hdtv5_pci_nano_config = { 552 .demod_address = 0x32 >> 1, 553 .output_mode = S5H1409_SERIAL_OUTPUT, 554 .gpio = S5H1409_GPIO_OFF, 555 .inversion = S5H1409_INVERSION_OFF, 556 .status_mode = S5H1409_DEMODLOCKING, 557 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 558 }; 559 560 static const struct s5h1409_config kworld_atsc_120_config = { 561 .demod_address = 0x32 >> 1, 562 .output_mode = S5H1409_SERIAL_OUTPUT, 563 .gpio = S5H1409_GPIO_OFF, 564 .inversion = S5H1409_INVERSION_OFF, 565 .status_mode = S5H1409_DEMODLOCKING, 566 .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 567 }; 568 569 static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = { 570 .i2c_address = 0x64, 571 .if_khz = 5380, 572 }; 573 574 static const struct zl10353_config cx88_pinnacle_hybrid_pctv = { 575 .demod_address = (0x1e >> 1), 576 .no_tuner = 1, 577 .if2 = 45600, 578 }; 579 580 static const struct zl10353_config cx88_geniatech_x8000_mt = { 581 .demod_address = (0x1e >> 1), 582 .no_tuner = 1, 583 .disable_i2c_gate_ctrl = 1, 584 }; 585 586 static const struct s5h1411_config dvico_fusionhdtv7_config = { 587 .output_mode = S5H1411_SERIAL_OUTPUT, 588 .gpio = S5H1411_GPIO_ON, 589 .mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 590 .qam_if = S5H1411_IF_44000, 591 .vsb_if = S5H1411_IF_44000, 592 .inversion = S5H1411_INVERSION_OFF, 593 .status_mode = S5H1411_DEMODLOCKING 594 }; 595 596 static const struct xc5000_config dvico_fusionhdtv7_tuner_config = { 597 .i2c_address = 0xc2 >> 1, 598 .if_khz = 5380, 599 }; 600 601 static int attach_xc3028(u8 addr, struct cx8802_dev *dev) 602 { 603 struct dvb_frontend *fe; 604 struct vb2_dvb_frontend *fe0 = NULL; 605 struct xc2028_ctrl ctl; 606 struct xc2028_config cfg = { 607 .i2c_adap = &dev->core->i2c_adap, 608 .i2c_addr = addr, 609 .ctrl = &ctl, 610 }; 611 612 /* Get the first frontend */ 613 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); 614 if (!fe0) 615 return -EINVAL; 616 617 if (!fe0->dvb.frontend) { 618 pr_err("dvb frontend not attached. Can't attach xc3028\n"); 619 return -EINVAL; 620 } 621 622 /* 623 * Some xc3028 devices may be hidden by an I2C gate. This is known 624 * to happen with some s5h1409-based devices. 625 * Now that I2C gate is open, sets up xc3028 configuration 626 */ 627 cx88_setup_xc3028(dev->core, &ctl); 628 629 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); 630 if (!fe) { 631 pr_err("xc3028 attach failed\n"); 632 dvb_frontend_detach(fe0->dvb.frontend); 633 dvb_unregister_frontend(fe0->dvb.frontend); 634 fe0->dvb.frontend = NULL; 635 return -EINVAL; 636 } 637 638 pr_info("xc3028 attached\n"); 639 640 return 0; 641 } 642 643 static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg) 644 { 645 struct dvb_frontend *fe; 646 struct vb2_dvb_frontend *fe0 = NULL; 647 648 /* Get the first frontend */ 649 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); 650 if (!fe0) 651 return -EINVAL; 652 653 if (!fe0->dvb.frontend) { 654 pr_err("dvb frontend not attached. Can't attach xc4000\n"); 655 return -EINVAL; 656 } 657 658 fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap, 659 cfg); 660 if (!fe) { 661 pr_err("xc4000 attach failed\n"); 662 dvb_frontend_detach(fe0->dvb.frontend); 663 dvb_unregister_frontend(fe0->dvb.frontend); 664 fe0->dvb.frontend = NULL; 665 return -EINVAL; 666 } 667 668 pr_info("xc4000 attached\n"); 669 670 return 0; 671 } 672 673 static int cx24116_set_ts_param(struct dvb_frontend *fe, 674 int is_punctured) 675 { 676 struct cx8802_dev *dev = fe->dvb->priv; 677 678 dev->ts_gen_cntrl = 0x2; 679 680 return 0; 681 } 682 683 static int stv0900_set_ts_param(struct dvb_frontend *fe, 684 int is_punctured) 685 { 686 struct cx8802_dev *dev = fe->dvb->priv; 687 688 dev->ts_gen_cntrl = 0; 689 690 return 0; 691 } 692 693 static int cx24116_reset_device(struct dvb_frontend *fe) 694 { 695 struct cx8802_dev *dev = fe->dvb->priv; 696 struct cx88_core *core = dev->core; 697 698 /* Reset the part */ 699 /* Put the cx24116 into reset */ 700 cx_write(MO_SRST_IO, 0); 701 usleep_range(10000, 20000); 702 /* Take the cx24116 out of reset */ 703 cx_write(MO_SRST_IO, 1); 704 usleep_range(10000, 20000); 705 706 return 0; 707 } 708 709 static const struct cx24116_config hauppauge_hvr4000_config = { 710 .demod_address = 0x05, 711 .set_ts_params = cx24116_set_ts_param, 712 .reset_device = cx24116_reset_device, 713 }; 714 715 static const struct cx24116_config tevii_s460_config = { 716 .demod_address = 0x55, 717 .set_ts_params = cx24116_set_ts_param, 718 .reset_device = cx24116_reset_device, 719 }; 720 721 static int ds3000_set_ts_param(struct dvb_frontend *fe, 722 int is_punctured) 723 { 724 struct cx8802_dev *dev = fe->dvb->priv; 725 726 dev->ts_gen_cntrl = 4; 727 728 return 0; 729 } 730 731 static struct ds3000_config tevii_ds3000_config = { 732 .demod_address = 0x68, 733 .set_ts_params = ds3000_set_ts_param, 734 }; 735 736 static struct ts2020_config tevii_ts2020_config = { 737 .tuner_address = 0x60, 738 .clk_out_div = 1, 739 }; 740 741 static const struct stv0900_config prof_7301_stv0900_config = { 742 .demod_address = 0x6a, 743 /* demod_mode = 0,*/ 744 .xtal = 27000000, 745 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */ 746 .diseqc_mode = 2,/* 2/3 PWM */ 747 .tun1_maddress = 0,/* 0x60 */ 748 .tun1_adc = 0,/* 2 Vpp */ 749 .path1_mode = 3, 750 .set_ts_params = stv0900_set_ts_param, 751 }; 752 753 static const struct stb6100_config prof_7301_stb6100_config = { 754 .tuner_address = 0x60, 755 .refclock = 27000000, 756 }; 757 758 static const struct stv0299_config tevii_tuner_sharp_config = { 759 .demod_address = 0x68, 760 .inittab = sharp_z0194a_inittab, 761 .mclk = 88000000UL, 762 .invert = 1, 763 .skip_reinit = 0, 764 .lock_output = 1, 765 .volt13_op0_op1 = STV0299_VOLT13_OP1, 766 .min_delay_ms = 100, 767 .set_symbol_rate = sharp_z0194a_set_symbol_rate, 768 .set_ts_params = cx24116_set_ts_param, 769 }; 770 771 static const struct stv0288_config tevii_tuner_earda_config = { 772 .demod_address = 0x68, 773 .min_delay_ms = 100, 774 .set_ts_params = cx24116_set_ts_param, 775 }; 776 777 static int cx8802_alloc_frontends(struct cx8802_dev *dev) 778 { 779 struct cx88_core *core = dev->core; 780 struct vb2_dvb_frontend *fe = NULL; 781 int i; 782 783 mutex_init(&dev->frontends.lock); 784 INIT_LIST_HEAD(&dev->frontends.felist); 785 786 if (!core->board.num_frontends) 787 return -ENODEV; 788 789 pr_info("%s: allocating %d frontend(s)\n", __func__, 790 core->board.num_frontends); 791 for (i = 1; i <= core->board.num_frontends; i++) { 792 fe = vb2_dvb_alloc_frontend(&dev->frontends, i); 793 if (!fe) { 794 pr_err("%s() failed to alloc\n", __func__); 795 vb2_dvb_dealloc_frontends(&dev->frontends); 796 return -ENOMEM; 797 } 798 } 799 return 0; 800 } 801 802 static const u8 samsung_smt_7020_inittab[] = { 803 0x01, 0x15, 804 0x02, 0x00, 805 0x03, 0x00, 806 0x04, 0x7D, 807 0x05, 0x0F, 808 0x06, 0x02, 809 0x07, 0x00, 810 0x08, 0x60, 811 812 0x0A, 0xC2, 813 0x0B, 0x00, 814 0x0C, 0x01, 815 0x0D, 0x81, 816 0x0E, 0x44, 817 0x0F, 0x09, 818 0x10, 0x3C, 819 0x11, 0x84, 820 0x12, 0xDA, 821 0x13, 0x99, 822 0x14, 0x8D, 823 0x15, 0xCE, 824 0x16, 0xE8, 825 0x17, 0x43, 826 0x18, 0x1C, 827 0x19, 0x1B, 828 0x1A, 0x1D, 829 830 0x1C, 0x12, 831 0x1D, 0x00, 832 0x1E, 0x00, 833 0x1F, 0x00, 834 0x20, 0x00, 835 0x21, 0x00, 836 0x22, 0x00, 837 0x23, 0x00, 838 839 0x28, 0x02, 840 0x29, 0x28, 841 0x2A, 0x14, 842 0x2B, 0x0F, 843 0x2C, 0x09, 844 0x2D, 0x05, 845 846 0x31, 0x1F, 847 0x32, 0x19, 848 0x33, 0xFC, 849 0x34, 0x13, 850 0xff, 0xff, 851 }; 852 853 static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe) 854 { 855 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 856 struct cx8802_dev *dev = fe->dvb->priv; 857 u8 buf[4]; 858 u32 div; 859 struct i2c_msg msg = { 860 .addr = 0x61, 861 .flags = 0, 862 .buf = buf, 863 .len = sizeof(buf) }; 864 865 div = c->frequency / 125; 866 867 buf[0] = (div >> 8) & 0x7f; 868 buf[1] = div & 0xff; 869 buf[2] = 0x84; /* 0xC4 */ 870 buf[3] = 0x00; 871 872 if (c->frequency < 1500000) 873 buf[3] |= 0x10; 874 875 if (fe->ops.i2c_gate_ctrl) 876 fe->ops.i2c_gate_ctrl(fe, 1); 877 878 if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1) 879 return -EIO; 880 881 return 0; 882 } 883 884 static int samsung_smt_7020_set_tone(struct dvb_frontend *fe, 885 enum fe_sec_tone_mode tone) 886 { 887 struct cx8802_dev *dev = fe->dvb->priv; 888 struct cx88_core *core = dev->core; 889 890 cx_set(MO_GP0_IO, 0x0800); 891 892 switch (tone) { 893 case SEC_TONE_ON: 894 cx_set(MO_GP0_IO, 0x08); 895 break; 896 case SEC_TONE_OFF: 897 cx_clear(MO_GP0_IO, 0x08); 898 break; 899 default: 900 return -EINVAL; 901 } 902 903 return 0; 904 } 905 906 static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe, 907 enum fe_sec_voltage voltage) 908 { 909 struct cx8802_dev *dev = fe->dvb->priv; 910 struct cx88_core *core = dev->core; 911 912 u8 data; 913 struct i2c_msg msg = { 914 .addr = 8, 915 .flags = 0, 916 .buf = &data, 917 .len = sizeof(data) }; 918 919 cx_set(MO_GP0_IO, 0x8000); 920 921 switch (voltage) { 922 case SEC_VOLTAGE_OFF: 923 break; 924 case SEC_VOLTAGE_13: 925 data = ISL6421_EN1 | ISL6421_LLC1; 926 cx_clear(MO_GP0_IO, 0x80); 927 break; 928 case SEC_VOLTAGE_18: 929 data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1; 930 cx_clear(MO_GP0_IO, 0x80); 931 break; 932 default: 933 return -EINVAL; 934 } 935 936 return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO; 937 } 938 939 static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe, 940 u32 srate, u32 ratio) 941 { 942 u8 aclk = 0; 943 u8 bclk = 0; 944 945 if (srate < 1500000) { 946 aclk = 0xb7; 947 bclk = 0x47; 948 } else if (srate < 3000000) { 949 aclk = 0xb7; 950 bclk = 0x4b; 951 } else if (srate < 7000000) { 952 aclk = 0xb7; 953 bclk = 0x4f; 954 } else if (srate < 14000000) { 955 aclk = 0xb7; 956 bclk = 0x53; 957 } else if (srate < 30000000) { 958 aclk = 0xb6; 959 bclk = 0x53; 960 } else if (srate < 45000000) { 961 aclk = 0xb4; 962 bclk = 0x51; 963 } 964 965 stv0299_writereg(fe, 0x13, aclk); 966 stv0299_writereg(fe, 0x14, bclk); 967 stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); 968 stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); 969 stv0299_writereg(fe, 0x21, ratio & 0xf0); 970 971 return 0; 972 } 973 974 static const struct stv0299_config samsung_stv0299_config = { 975 .demod_address = 0x68, 976 .inittab = samsung_smt_7020_inittab, 977 .mclk = 88000000UL, 978 .invert = 0, 979 .skip_reinit = 0, 980 .lock_output = STV0299_LOCKOUTPUT_LK, 981 .volt13_op0_op1 = STV0299_VOLT13_OP1, 982 .min_delay_ms = 100, 983 .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate, 984 }; 985 986 static int dvb_register(struct cx8802_dev *dev) 987 { 988 struct cx88_core *core = dev->core; 989 struct vb2_dvb_frontend *fe0, *fe1 = NULL; 990 int mfe_shared = 0; /* bus not shared by default */ 991 int res = -EINVAL; 992 993 if (core->i2c_rc != 0) { 994 pr_err("no i2c-bus available, cannot attach dvb drivers\n"); 995 goto frontend_detach; 996 } 997 998 /* Get the first frontend */ 999 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1); 1000 if (!fe0) 1001 goto frontend_detach; 1002 1003 /* multi-frontend gate control is undefined or defaults to fe0 */ 1004 dev->frontends.gate = 0; 1005 1006 /* Sets the gate control callback to be used by i2c command calls */ 1007 core->gate_ctrl = cx88_dvb_gate_ctrl; 1008 1009 /* init frontend(s) */ 1010 switch (core->boardnr) { 1011 case CX88_BOARD_HAUPPAUGE_DVB_T1: 1012 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1013 &connexant_refboard_config, 1014 &core->i2c_adap); 1015 if (fe0->dvb.frontend) { 1016 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1017 0x61, &core->i2c_adap, 1018 DVB_PLL_THOMSON_DTT759X)) 1019 goto frontend_detach; 1020 } 1021 break; 1022 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: 1023 case CX88_BOARD_CONEXANT_DVB_T1: 1024 case CX88_BOARD_KWORLD_DVB_T_CX22702: 1025 case CX88_BOARD_WINFAST_DTV1000: 1026 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1027 &connexant_refboard_config, 1028 &core->i2c_adap); 1029 if (fe0->dvb.frontend) { 1030 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1031 0x60, &core->i2c_adap, 1032 DVB_PLL_THOMSON_DTT7579)) 1033 goto frontend_detach; 1034 } 1035 break; 1036 case CX88_BOARD_WINFAST_DTV2000H: 1037 case CX88_BOARD_HAUPPAUGE_HVR1100: 1038 case CX88_BOARD_HAUPPAUGE_HVR1100LP: 1039 case CX88_BOARD_HAUPPAUGE_HVR1300: 1040 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1041 &hauppauge_hvr_config, 1042 &core->i2c_adap); 1043 if (fe0->dvb.frontend) { 1044 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1045 &core->i2c_adap, 0x61, 1046 TUNER_PHILIPS_FMD1216ME_MK3)) 1047 goto frontend_detach; 1048 } 1049 break; 1050 case CX88_BOARD_WINFAST_DTV2000H_J: 1051 fe0->dvb.frontend = dvb_attach(cx22702_attach, 1052 &hauppauge_hvr_config, 1053 &core->i2c_adap); 1054 if (fe0->dvb.frontend) { 1055 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1056 &core->i2c_adap, 0x61, 1057 TUNER_PHILIPS_FMD1216MEX_MK3)) 1058 goto frontend_detach; 1059 } 1060 break; 1061 case CX88_BOARD_HAUPPAUGE_HVR3000: 1062 /* MFE frontend 1 */ 1063 mfe_shared = 1; 1064 dev->frontends.gate = 2; 1065 /* DVB-S init */ 1066 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1067 &hauppauge_novas_config, 1068 &dev->core->i2c_adap); 1069 if (fe0->dvb.frontend) { 1070 if (!dvb_attach(isl6421_attach, 1071 fe0->dvb.frontend, 1072 &dev->core->i2c_adap, 1073 0x08, ISL6421_DCL, 0x00, false)) 1074 goto frontend_detach; 1075 } 1076 /* MFE frontend 2 */ 1077 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2); 1078 if (!fe1) 1079 goto frontend_detach; 1080 /* DVB-T init */ 1081 fe1->dvb.frontend = dvb_attach(cx22702_attach, 1082 &hauppauge_hvr_config, 1083 &dev->core->i2c_adap); 1084 if (fe1->dvb.frontend) { 1085 fe1->dvb.frontend->id = 1; 1086 if (!dvb_attach(simple_tuner_attach, 1087 fe1->dvb.frontend, 1088 &dev->core->i2c_adap, 1089 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) 1090 goto frontend_detach; 1091 } 1092 break; 1093 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS: 1094 fe0->dvb.frontend = dvb_attach(mt352_attach, 1095 &dvico_fusionhdtv, 1096 &core->i2c_adap); 1097 if (fe0->dvb.frontend) { 1098 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1099 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) 1100 goto frontend_detach; 1101 break; 1102 } 1103 /* ZL10353 replaces MT352 on later cards */ 1104 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1105 &dvico_fusionhdtv_plus_v1_1, 1106 &core->i2c_adap); 1107 if (fe0->dvb.frontend) { 1108 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1109 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) 1110 goto frontend_detach; 1111 } 1112 break; 1113 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL: 1114 /* 1115 * The tin box says DEE1601, but it seems to be DTT7579 1116 * compatible, with a slightly different MT352 AGC gain. 1117 */ 1118 fe0->dvb.frontend = dvb_attach(mt352_attach, 1119 &dvico_fusionhdtv_dual, 1120 &core->i2c_adap); 1121 if (fe0->dvb.frontend) { 1122 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1123 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) 1124 goto frontend_detach; 1125 break; 1126 } 1127 /* ZL10353 replaces MT352 on later cards */ 1128 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1129 &dvico_fusionhdtv_plus_v1_1, 1130 &core->i2c_adap); 1131 if (fe0->dvb.frontend) { 1132 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1133 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) 1134 goto frontend_detach; 1135 } 1136 break; 1137 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1: 1138 fe0->dvb.frontend = dvb_attach(mt352_attach, 1139 &dvico_fusionhdtv, 1140 &core->i2c_adap); 1141 if (fe0->dvb.frontend) { 1142 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1143 0x61, NULL, DVB_PLL_LG_Z201)) 1144 goto frontend_detach; 1145 } 1146 break; 1147 case CX88_BOARD_KWORLD_DVB_T: 1148 case CX88_BOARD_DNTV_LIVE_DVB_T: 1149 case CX88_BOARD_ADSTECH_DVB_T_PCI: 1150 fe0->dvb.frontend = dvb_attach(mt352_attach, 1151 &dntv_live_dvbt_config, 1152 &core->i2c_adap); 1153 if (fe0->dvb.frontend) { 1154 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 1155 0x61, NULL, DVB_PLL_UNKNOWN_1)) 1156 goto frontend_detach; 1157 } 1158 break; 1159 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: 1160 #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054) 1161 /* MT352 is on a secondary I2C bus made from some GPIO lines */ 1162 fe0->dvb.frontend = dvb_attach(mt352_attach, 1163 &dntv_live_dvbt_pro_config, 1164 &dev->vp3054->adap); 1165 if (fe0->dvb.frontend) { 1166 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1167 &core->i2c_adap, 0x61, 1168 TUNER_PHILIPS_FMD1216ME_MK3)) 1169 goto frontend_detach; 1170 } 1171 #else 1172 pr_err("built without vp3054 support\n"); 1173 #endif 1174 break; 1175 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID: 1176 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1177 &dvico_fusionhdtv_hybrid, 1178 &core->i2c_adap); 1179 if (fe0->dvb.frontend) { 1180 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1181 &core->i2c_adap, 0x61, 1182 TUNER_THOMSON_FE6600)) 1183 goto frontend_detach; 1184 } 1185 break; 1186 case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO: 1187 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1188 &dvico_fusionhdtv_xc3028, 1189 &core->i2c_adap); 1190 if (!fe0->dvb.frontend) 1191 fe0->dvb.frontend = dvb_attach(mt352_attach, 1192 &dvico_fusionhdtv_mt352_xc3028, 1193 &core->i2c_adap); 1194 /* 1195 * On this board, the demod provides the I2C bus pullup. 1196 * We must not permit gate_ctrl to be performed, or 1197 * the xc3028 cannot communicate on the bus. 1198 */ 1199 if (fe0->dvb.frontend) 1200 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1201 if (attach_xc3028(0x61, dev) < 0) 1202 goto frontend_detach; 1203 break; 1204 case CX88_BOARD_PCHDTV_HD3000: 1205 fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000, 1206 &core->i2c_adap); 1207 if (fe0->dvb.frontend) { 1208 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1209 &core->i2c_adap, 0x61, 1210 TUNER_THOMSON_DTT761X)) 1211 goto frontend_detach; 1212 } 1213 break; 1214 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: 1215 dev->ts_gen_cntrl = 0x08; 1216 1217 /* Do a hardware reset of chip before using it. */ 1218 cx_clear(MO_GP0_IO, 1); 1219 msleep(100); 1220 cx_set(MO_GP0_IO, 1); 1221 msleep(200); 1222 1223 /* Select RF connector callback */ 1224 fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set; 1225 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1226 &fusionhdtv_3_gold, 1227 0x0e, 1228 &core->i2c_adap); 1229 if (fe0->dvb.frontend) { 1230 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1231 &core->i2c_adap, 0x61, 1232 TUNER_MICROTUNE_4042FI5)) 1233 goto frontend_detach; 1234 } 1235 break; 1236 case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: 1237 dev->ts_gen_cntrl = 0x08; 1238 1239 /* Do a hardware reset of chip before using it. */ 1240 cx_clear(MO_GP0_IO, 1); 1241 msleep(100); 1242 cx_set(MO_GP0_IO, 9); 1243 msleep(200); 1244 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1245 &fusionhdtv_3_gold, 1246 0x0e, 1247 &core->i2c_adap); 1248 if (fe0->dvb.frontend) { 1249 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1250 &core->i2c_adap, 0x61, 1251 TUNER_THOMSON_DTT761X)) 1252 goto frontend_detach; 1253 } 1254 break; 1255 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: 1256 dev->ts_gen_cntrl = 0x08; 1257 1258 /* Do a hardware reset of chip before using it. */ 1259 cx_clear(MO_GP0_IO, 1); 1260 msleep(100); 1261 cx_set(MO_GP0_IO, 1); 1262 msleep(200); 1263 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1264 &fusionhdtv_5_gold, 1265 0x0e, 1266 &core->i2c_adap); 1267 if (fe0->dvb.frontend) { 1268 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1269 &core->i2c_adap, 0x61, 1270 TUNER_LG_TDVS_H06XF)) 1271 goto frontend_detach; 1272 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend, 1273 &core->i2c_adap, 0x43)) 1274 goto frontend_detach; 1275 } 1276 break; 1277 case CX88_BOARD_PCHDTV_HD5500: 1278 dev->ts_gen_cntrl = 0x08; 1279 1280 /* Do a hardware reset of chip before using it. */ 1281 cx_clear(MO_GP0_IO, 1); 1282 msleep(100); 1283 cx_set(MO_GP0_IO, 1); 1284 msleep(200); 1285 fe0->dvb.frontend = dvb_attach(lgdt330x_attach, 1286 &pchdtv_hd5500, 1287 0x59, 1288 &core->i2c_adap); 1289 if (fe0->dvb.frontend) { 1290 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1291 &core->i2c_adap, 0x61, 1292 TUNER_LG_TDVS_H06XF)) 1293 goto frontend_detach; 1294 if (!dvb_attach(tda9887_attach, fe0->dvb.frontend, 1295 &core->i2c_adap, 0x43)) 1296 goto frontend_detach; 1297 } 1298 break; 1299 case CX88_BOARD_ATI_HDTVWONDER: 1300 fe0->dvb.frontend = dvb_attach(nxt200x_attach, 1301 &ati_hdtvwonder, 1302 &core->i2c_adap); 1303 if (fe0->dvb.frontend) { 1304 if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, 1305 &core->i2c_adap, 0x61, 1306 TUNER_PHILIPS_TUV1236D)) 1307 goto frontend_detach; 1308 } 1309 break; 1310 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: 1311 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: 1312 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1313 &hauppauge_novas_config, 1314 &core->i2c_adap); 1315 if (fe0->dvb.frontend) { 1316 bool override_tone; 1317 1318 if (core->model == 92001) 1319 override_tone = true; 1320 else 1321 override_tone = false; 1322 1323 if (!dvb_attach(isl6421_attach, fe0->dvb.frontend, 1324 &core->i2c_adap, 0x08, ISL6421_DCL, 1325 0x00, override_tone)) 1326 goto frontend_detach; 1327 } 1328 break; 1329 case CX88_BOARD_KWORLD_DVBS_100: 1330 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1331 &kworld_dvbs_100_config, 1332 &core->i2c_adap); 1333 if (fe0->dvb.frontend) { 1334 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1335 fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage; 1336 } 1337 break; 1338 case CX88_BOARD_GENIATECH_DVBS: 1339 fe0->dvb.frontend = dvb_attach(cx24123_attach, 1340 &geniatech_dvbs_config, 1341 &core->i2c_adap); 1342 if (fe0->dvb.frontend) { 1343 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1344 fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage; 1345 } 1346 break; 1347 case CX88_BOARD_PINNACLE_PCTV_HD_800i: 1348 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1349 &pinnacle_pctv_hd_800i_config, 1350 &core->i2c_adap); 1351 if (fe0->dvb.frontend) { 1352 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend, 1353 &core->i2c_adap, 1354 &pinnacle_pctv_hd_800i_tuner_config)) 1355 goto frontend_detach; 1356 } 1357 break; 1358 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: 1359 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1360 &dvico_hdtv5_pci_nano_config, 1361 &core->i2c_adap); 1362 if (fe0->dvb.frontend) { 1363 struct dvb_frontend *fe; 1364 struct xc2028_config cfg = { 1365 .i2c_adap = &core->i2c_adap, 1366 .i2c_addr = 0x61, 1367 }; 1368 static struct xc2028_ctrl ctl = { 1369 .fname = XC2028_DEFAULT_FIRMWARE, 1370 .max_len = 64, 1371 .scode_table = XC3028_FE_OREN538, 1372 }; 1373 1374 fe = dvb_attach(xc2028_attach, 1375 fe0->dvb.frontend, &cfg); 1376 if (fe && fe->ops.tuner_ops.set_config) 1377 fe->ops.tuner_ops.set_config(fe, &ctl); 1378 } 1379 break; 1380 case CX88_BOARD_NOTONLYTV_LV3H: 1381 case CX88_BOARD_PINNACLE_HYBRID_PCTV: 1382 case CX88_BOARD_WINFAST_DTV1800H: 1383 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1384 &cx88_pinnacle_hybrid_pctv, 1385 &core->i2c_adap); 1386 if (fe0->dvb.frontend) { 1387 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1388 if (attach_xc3028(0x61, dev) < 0) 1389 goto frontend_detach; 1390 } 1391 break; 1392 case CX88_BOARD_WINFAST_DTV1800H_XC4000: 1393 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 1394 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1395 &cx88_pinnacle_hybrid_pctv, 1396 &core->i2c_adap); 1397 if (fe0->dvb.frontend) { 1398 struct xc4000_config cfg = { 1399 .i2c_address = 0x61, 1400 .default_pm = 0, 1401 .dvb_amplitude = 134, 1402 .set_smoothedcvbs = 1, 1403 .if_khz = 4560 1404 }; 1405 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1406 if (attach_xc4000(dev, &cfg) < 0) 1407 goto frontend_detach; 1408 } 1409 break; 1410 case CX88_BOARD_GENIATECH_X8000_MT: 1411 dev->ts_gen_cntrl = 0x00; 1412 1413 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1414 &cx88_geniatech_x8000_mt, 1415 &core->i2c_adap); 1416 if (attach_xc3028(0x61, dev) < 0) 1417 goto frontend_detach; 1418 break; 1419 case CX88_BOARD_KWORLD_ATSC_120: 1420 fe0->dvb.frontend = dvb_attach(s5h1409_attach, 1421 &kworld_atsc_120_config, 1422 &core->i2c_adap); 1423 if (attach_xc3028(0x61, dev) < 0) 1424 goto frontend_detach; 1425 break; 1426 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: 1427 fe0->dvb.frontend = dvb_attach(s5h1411_attach, 1428 &dvico_fusionhdtv7_config, 1429 &core->i2c_adap); 1430 if (fe0->dvb.frontend) { 1431 if (!dvb_attach(xc5000_attach, fe0->dvb.frontend, 1432 &core->i2c_adap, 1433 &dvico_fusionhdtv7_tuner_config)) 1434 goto frontend_detach; 1435 } 1436 break; 1437 case CX88_BOARD_HAUPPAUGE_HVR4000: 1438 /* MFE frontend 1 */ 1439 mfe_shared = 1; 1440 dev->frontends.gate = 2; 1441 /* DVB-S/S2 Init */ 1442 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1443 &hauppauge_hvr4000_config, 1444 &dev->core->i2c_adap); 1445 if (fe0->dvb.frontend) { 1446 if (!dvb_attach(isl6421_attach, 1447 fe0->dvb.frontend, 1448 &dev->core->i2c_adap, 1449 0x08, ISL6421_DCL, 0x00, false)) 1450 goto frontend_detach; 1451 } 1452 /* MFE frontend 2 */ 1453 fe1 = vb2_dvb_get_frontend(&dev->frontends, 2); 1454 if (!fe1) 1455 goto frontend_detach; 1456 /* DVB-T Init */ 1457 fe1->dvb.frontend = dvb_attach(cx22702_attach, 1458 &hauppauge_hvr_config, 1459 &dev->core->i2c_adap); 1460 if (fe1->dvb.frontend) { 1461 fe1->dvb.frontend->id = 1; 1462 if (!dvb_attach(simple_tuner_attach, 1463 fe1->dvb.frontend, 1464 &dev->core->i2c_adap, 1465 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) 1466 goto frontend_detach; 1467 } 1468 break; 1469 case CX88_BOARD_HAUPPAUGE_HVR4000LITE: 1470 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1471 &hauppauge_hvr4000_config, 1472 &dev->core->i2c_adap); 1473 if (fe0->dvb.frontend) { 1474 if (!dvb_attach(isl6421_attach, 1475 fe0->dvb.frontend, 1476 &dev->core->i2c_adap, 1477 0x08, ISL6421_DCL, 0x00, false)) 1478 goto frontend_detach; 1479 } 1480 break; 1481 case CX88_BOARD_PROF_6200: 1482 case CX88_BOARD_TBS_8910: 1483 case CX88_BOARD_TEVII_S420: 1484 fe0->dvb.frontend = dvb_attach(stv0299_attach, 1485 &tevii_tuner_sharp_config, 1486 &core->i2c_adap); 1487 if (fe0->dvb.frontend) { 1488 if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, 1489 &core->i2c_adap, DVB_PLL_OPERA1)) 1490 goto frontend_detach; 1491 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1492 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1493 1494 } else { 1495 fe0->dvb.frontend = dvb_attach(stv0288_attach, 1496 &tevii_tuner_earda_config, 1497 &core->i2c_adap); 1498 if (fe0->dvb.frontend) { 1499 if (!dvb_attach(stb6000_attach, 1500 fe0->dvb.frontend, 0x61, 1501 &core->i2c_adap)) 1502 goto frontend_detach; 1503 core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; 1504 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1505 } 1506 } 1507 break; 1508 case CX88_BOARD_TEVII_S460: 1509 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1510 &tevii_s460_config, 1511 &core->i2c_adap); 1512 if (fe0->dvb.frontend) 1513 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1514 break; 1515 case CX88_BOARD_TEVII_S464: 1516 fe0->dvb.frontend = dvb_attach(ds3000_attach, 1517 &tevii_ds3000_config, 1518 &core->i2c_adap); 1519 if (fe0->dvb.frontend) { 1520 dvb_attach(ts2020_attach, fe0->dvb.frontend, 1521 &tevii_ts2020_config, &core->i2c_adap); 1522 fe0->dvb.frontend->ops.set_voltage = 1523 tevii_dvbs_set_voltage; 1524 } 1525 break; 1526 case CX88_BOARD_OMICOM_SS4_PCI: 1527 case CX88_BOARD_TBS_8920: 1528 case CX88_BOARD_PROF_7300: 1529 case CX88_BOARD_SATTRADE_ST4200: 1530 fe0->dvb.frontend = dvb_attach(cx24116_attach, 1531 &hauppauge_hvr4000_config, 1532 &core->i2c_adap); 1533 if (fe0->dvb.frontend) 1534 fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; 1535 break; 1536 case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII: 1537 fe0->dvb.frontend = dvb_attach(zl10353_attach, 1538 &cx88_terratec_cinergy_ht_pci_mkii_config, 1539 &core->i2c_adap); 1540 if (fe0->dvb.frontend) { 1541 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; 1542 if (attach_xc3028(0x61, dev) < 0) 1543 goto frontend_detach; 1544 } 1545 break; 1546 case CX88_BOARD_PROF_7301:{ 1547 struct dvb_tuner_ops *tuner_ops = NULL; 1548 1549 fe0->dvb.frontend = dvb_attach(stv0900_attach, 1550 &prof_7301_stv0900_config, 1551 &core->i2c_adap, 0); 1552 if (fe0->dvb.frontend) { 1553 if (!dvb_attach(stb6100_attach, fe0->dvb.frontend, 1554 &prof_7301_stb6100_config, 1555 &core->i2c_adap)) 1556 goto frontend_detach; 1557 1558 tuner_ops = &fe0->dvb.frontend->ops.tuner_ops; 1559 tuner_ops->set_frequency = stb6100_set_freq; 1560 tuner_ops->get_frequency = stb6100_get_freq; 1561 tuner_ops->set_bandwidth = stb6100_set_bandw; 1562 tuner_ops->get_bandwidth = stb6100_get_bandw; 1563 1564 core->prev_set_voltage = 1565 fe0->dvb.frontend->ops.set_voltage; 1566 fe0->dvb.frontend->ops.set_voltage = 1567 tevii_dvbs_set_voltage; 1568 } 1569 break; 1570 } 1571 case CX88_BOARD_SAMSUNG_SMT_7020: 1572 dev->ts_gen_cntrl = 0x08; 1573 1574 cx_set(MO_GP0_IO, 0x0101); 1575 1576 cx_clear(MO_GP0_IO, 0x01); 1577 msleep(100); 1578 cx_set(MO_GP0_IO, 0x01); 1579 msleep(200); 1580 1581 fe0->dvb.frontend = dvb_attach(stv0299_attach, 1582 &samsung_stv0299_config, 1583 &dev->core->i2c_adap); 1584 if (fe0->dvb.frontend) { 1585 fe0->dvb.frontend->ops.tuner_ops.set_params = 1586 samsung_smt_7020_tuner_set_params; 1587 fe0->dvb.frontend->tuner_priv = 1588 &dev->core->i2c_adap; 1589 fe0->dvb.frontend->ops.set_voltage = 1590 samsung_smt_7020_set_voltage; 1591 fe0->dvb.frontend->ops.set_tone = 1592 samsung_smt_7020_set_tone; 1593 } 1594 1595 break; 1596 case CX88_BOARD_TWINHAN_VP1027_DVBS: 1597 dev->ts_gen_cntrl = 0x00; 1598 fe0->dvb.frontend = dvb_attach(mb86a16_attach, 1599 &twinhan_vp1027, 1600 &core->i2c_adap); 1601 if (fe0->dvb.frontend) { 1602 core->prev_set_voltage = 1603 fe0->dvb.frontend->ops.set_voltage; 1604 fe0->dvb.frontend->ops.set_voltage = 1605 vp1027_set_voltage; 1606 } 1607 break; 1608 1609 default: 1610 pr_err("The frontend of your DVB/ATSC card isn't supported yet\n"); 1611 break; 1612 } 1613 1614 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) { 1615 pr_err("frontend initialization failed\n"); 1616 goto frontend_detach; 1617 } 1618 /* define general-purpose callback pointer */ 1619 fe0->dvb.frontend->callback = cx88_tuner_callback; 1620 1621 /* Ensure all frontends negotiate bus access */ 1622 fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; 1623 if (fe1) 1624 fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; 1625 1626 /* Put the tuner in standby to keep it quiet */ 1627 call_all(core, tuner, standby); 1628 1629 /* register everything */ 1630 res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, 1631 &dev->pci->dev, NULL, adapter_nr, 1632 mfe_shared); 1633 if (res) 1634 goto frontend_detach; 1635 return res; 1636 1637 frontend_detach: 1638 core->gate_ctrl = NULL; 1639 vb2_dvb_dealloc_frontends(&dev->frontends); 1640 return res; 1641 } 1642 1643 /* ----------------------------------------------------------- */ 1644 1645 /* CX8802 MPEG -> mini driver - We have been given the hardware */ 1646 static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv) 1647 { 1648 struct cx88_core *core = drv->core; 1649 int err = 0; 1650 1651 dprintk(1, "%s\n", __func__); 1652 1653 switch (core->boardnr) { 1654 case CX88_BOARD_HAUPPAUGE_HVR1300: 1655 /* We arrive here with either the cx23416 or the cx22702 1656 * on the bus. Take the bus from the cx23416 and enable the 1657 * cx22702 demod 1658 */ 1659 /* Toggle reset on cx22702 leaving i2c active */ 1660 cx_set(MO_GP0_IO, 0x00000080); 1661 udelay(1000); 1662 cx_clear(MO_GP0_IO, 0x00000080); 1663 udelay(50); 1664 cx_set(MO_GP0_IO, 0x00000080); 1665 udelay(1000); 1666 /* enable the cx22702 pins */ 1667 cx_clear(MO_GP0_IO, 0x00000004); 1668 udelay(1000); 1669 break; 1670 1671 case CX88_BOARD_HAUPPAUGE_HVR3000: 1672 case CX88_BOARD_HAUPPAUGE_HVR4000: 1673 /* Toggle reset on cx22702 leaving i2c active */ 1674 cx_set(MO_GP0_IO, 0x00000080); 1675 udelay(1000); 1676 cx_clear(MO_GP0_IO, 0x00000080); 1677 udelay(50); 1678 cx_set(MO_GP0_IO, 0x00000080); 1679 udelay(1000); 1680 switch (core->dvbdev->frontends.active_fe_id) { 1681 case 1: /* DVB-S/S2 Enabled */ 1682 /* tri-state the cx22702 pins */ 1683 cx_set(MO_GP0_IO, 0x00000004); 1684 /* Take the cx24116/cx24123 out of reset */ 1685 cx_write(MO_SRST_IO, 1); 1686 core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */ 1687 break; 1688 case 2: /* DVB-T Enabled */ 1689 /* Put the cx24116/cx24123 into reset */ 1690 cx_write(MO_SRST_IO, 0); 1691 /* enable the cx22702 pins */ 1692 cx_clear(MO_GP0_IO, 0x00000004); 1693 core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */ 1694 break; 1695 } 1696 udelay(1000); 1697 break; 1698 1699 case CX88_BOARD_WINFAST_DTV2000H_PLUS: 1700 /* set RF input to AIR for DVB-T (GPIO 16) */ 1701 cx_write(MO_GP2_IO, 0x0101); 1702 break; 1703 1704 default: 1705 err = -ENODEV; 1706 } 1707 return err; 1708 } 1709 1710 /* CX8802 MPEG -> mini driver - We no longer have the hardware */ 1711 static int cx8802_dvb_advise_release(struct cx8802_driver *drv) 1712 { 1713 struct cx88_core *core = drv->core; 1714 int err = 0; 1715 1716 dprintk(1, "%s\n", __func__); 1717 1718 switch (core->boardnr) { 1719 case CX88_BOARD_HAUPPAUGE_HVR1300: 1720 /* Do Nothing, leave the cx22702 on the bus. */ 1721 break; 1722 case CX88_BOARD_HAUPPAUGE_HVR3000: 1723 case CX88_BOARD_HAUPPAUGE_HVR4000: 1724 break; 1725 default: 1726 err = -ENODEV; 1727 } 1728 return err; 1729 } 1730 1731 static int cx8802_dvb_probe(struct cx8802_driver *drv) 1732 { 1733 struct cx88_core *core = drv->core; 1734 struct cx8802_dev *dev = drv->core->dvbdev; 1735 int err; 1736 struct vb2_dvb_frontend *fe; 1737 int i; 1738 1739 dprintk(1, "%s\n", __func__); 1740 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", 1741 core->boardnr, 1742 core->name, 1743 core->pci_bus, 1744 core->pci_slot); 1745 1746 err = -ENODEV; 1747 if (!(core->board.mpeg & CX88_MPEG_DVB)) 1748 goto fail_core; 1749 1750 /* If vp3054 isn't enabled, a stub will just return 0 */ 1751 err = vp3054_i2c_probe(dev); 1752 if (err != 0) 1753 goto fail_core; 1754 1755 /* dvb stuff */ 1756 pr_info("cx2388x based DVB/ATSC card\n"); 1757 dev->ts_gen_cntrl = 0x0c; 1758 1759 err = cx8802_alloc_frontends(dev); 1760 if (err) 1761 goto fail_core; 1762 1763 for (i = 1; i <= core->board.num_frontends; i++) { 1764 struct vb2_queue *q; 1765 1766 fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i); 1767 if (!fe) { 1768 pr_err("%s() failed to get frontend(%d)\n", 1769 __func__, i); 1770 err = -ENODEV; 1771 goto fail_probe; 1772 } 1773 q = &fe->dvb.dvbq; 1774 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1775 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; 1776 q->gfp_flags = GFP_DMA32; 1777 q->min_queued_buffers = 2; 1778 q->drv_priv = dev; 1779 q->buf_struct_size = sizeof(struct cx88_buffer); 1780 q->ops = &dvb_qops; 1781 q->mem_ops = &vb2_dma_sg_memops; 1782 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; 1783 q->lock = &core->lock; 1784 q->dev = &dev->pci->dev; 1785 1786 err = vb2_queue_init(q); 1787 if (err < 0) 1788 goto fail_probe; 1789 1790 /* init struct vb2_dvb */ 1791 fe->dvb.name = dev->core->name; 1792 } 1793 1794 err = dvb_register(dev); 1795 if (err) 1796 /* frontends/adapter de-allocated in dvb_register */ 1797 pr_err("dvb_register failed (err = %d)\n", err); 1798 return err; 1799 fail_probe: 1800 vb2_dvb_dealloc_frontends(&core->dvbdev->frontends); 1801 fail_core: 1802 return err; 1803 } 1804 1805 static int cx8802_dvb_remove(struct cx8802_driver *drv) 1806 { 1807 struct cx88_core *core = drv->core; 1808 struct cx8802_dev *dev = drv->core->dvbdev; 1809 1810 dprintk(1, "%s\n", __func__); 1811 1812 vb2_dvb_unregister_bus(&dev->frontends); 1813 1814 vp3054_i2c_remove(dev); 1815 1816 core->gate_ctrl = NULL; 1817 1818 return 0; 1819 } 1820 1821 static struct cx8802_driver cx8802_dvb_driver = { 1822 .type_id = CX88_MPEG_DVB, 1823 .hw_access = CX8802_DRVCTL_SHARED, 1824 .probe = cx8802_dvb_probe, 1825 .remove = cx8802_dvb_remove, 1826 .advise_acquire = cx8802_dvb_advise_acquire, 1827 .advise_release = cx8802_dvb_advise_release, 1828 }; 1829 1830 static int __init dvb_init(void) 1831 { 1832 pr_info("cx2388x dvb driver version %s loaded\n", CX88_VERSION); 1833 return cx8802_register_driver(&cx8802_dvb_driver); 1834 } 1835 1836 static void __exit dvb_fini(void) 1837 { 1838 cx8802_unregister_driver(&cx8802_dvb_driver); 1839 } 1840 1841 module_init(dvb_init); 1842 module_exit(dvb_fini); 1843