1 /* 2 * cx18 header containing common defines. 3 * 4 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 */ 16 17 #ifndef CX23418_H 18 #define CX23418_H 19 20 #include <media/drv-intf/cx2341x.h> 21 22 #define MGR_CMD_MASK 0x40000000 23 /* The MSB of the command code indicates that this is the completion of a 24 command */ 25 #define MGR_CMD_MASK_ACK (MGR_CMD_MASK | 0x80000000) 26 27 /* Description: This command creates a new instance of a certain task 28 IN[0] - Task ID. This is one of the XPU_CMD_MASK_YYY where XPU is 29 the processor on which the task YYY will be created 30 OUT[0] - Task handle. This handle is passed along with commands to 31 dispatch to the right instance of the task 32 ReturnCode - One of the ERR_SYS_... */ 33 #define CX18_CREATE_TASK (MGR_CMD_MASK | 0x0001) 34 35 /* Description: This command destroys an instance of a task 36 IN[0] - Task handle. Hanlde of the task to destroy 37 ReturnCode - One of the ERR_SYS_... */ 38 #define CX18_DESTROY_TASK (MGR_CMD_MASK | 0x0002) 39 40 /* All commands for CPU have the following mask set */ 41 #define CPU_CMD_MASK 0x20000000 42 #define CPU_CMD_MASK_DEBUG (CPU_CMD_MASK | 0x00000000) 43 #define CPU_CMD_MASK_ACK (CPU_CMD_MASK | 0x80000000) 44 #define CPU_CMD_MASK_CAPTURE (CPU_CMD_MASK | 0x00020000) 45 #define CPU_CMD_MASK_TS (CPU_CMD_MASK | 0x00040000) 46 47 #define EPU_CMD_MASK 0x02000000 48 #define EPU_CMD_MASK_DEBUG (EPU_CMD_MASK | 0x000000) 49 #define EPU_CMD_MASK_DE (EPU_CMD_MASK | 0x040000) 50 51 #define APU_CMD_MASK 0x10000000 52 #define APU_CMD_MASK_ACK (APU_CMD_MASK | 0x80000000) 53 54 #define CX18_APU_ENCODING_METHOD_MPEG (0 << 28) 55 #define CX18_APU_ENCODING_METHOD_AC3 (1 << 28) 56 57 /* Description: Command APU to start audio 58 IN[0] - audio parameters (same as CX18_CPU_SET_AUDIO_PARAMETERS?) 59 IN[1] - caller buffer address, or 0 60 ReturnCode - ??? */ 61 #define CX18_APU_START (APU_CMD_MASK | 0x01) 62 63 /* Description: Command APU to stop audio 64 IN[0] - encoding method to stop 65 ReturnCode - ??? */ 66 #define CX18_APU_STOP (APU_CMD_MASK | 0x02) 67 68 /* Description: Command APU to reset the AI 69 ReturnCode - ??? */ 70 #define CX18_APU_RESETAI (APU_CMD_MASK | 0x05) 71 72 /* Description: This command indicates that a Memory Descriptor List has been 73 filled with the requested channel type 74 IN[0] - Task handle. Handle of the task 75 IN[1] - Offset of the MDL_ACK from the beginning of the local DDR. 76 IN[2] - Number of CNXT_MDL_ACK structures in the array pointed to by IN[1] 77 ReturnCode - One of the ERR_DE_... */ 78 #define CX18_EPU_DMA_DONE (EPU_CMD_MASK_DE | 0x0001) 79 80 /* Something interesting happened 81 IN[0] - A value to log 82 IN[1] - An offset of a string in the MiniMe memory; 83 0/zero/NULL means "I have nothing to say" */ 84 #define CX18_EPU_DEBUG (EPU_CMD_MASK_DEBUG | 0x0003) 85 86 /* Reads memory/registers (32-bit) 87 IN[0] - Address 88 OUT[1] - Value */ 89 #define CX18_CPU_DEBUG_PEEK32 (CPU_CMD_MASK_DEBUG | 0x0003) 90 91 /* Description: This command starts streaming with the set channel type 92 IN[0] - Task handle. Handle of the task to start 93 ReturnCode - One of the ERR_CAPTURE_... */ 94 #define CX18_CPU_CAPTURE_START (CPU_CMD_MASK_CAPTURE | 0x0002) 95 96 /* Description: This command stops streaming with the set channel type 97 IN[0] - Task handle. Handle of the task to stop 98 IN[1] - 0 = stop at end of GOP, 1 = stop at end of frame (MPEG only) 99 ReturnCode - One of the ERR_CAPTURE_... */ 100 #define CX18_CPU_CAPTURE_STOP (CPU_CMD_MASK_CAPTURE | 0x0003) 101 102 /* Description: This command pauses streaming with the set channel type 103 IN[0] - Task handle. Handle of the task to pause 104 ReturnCode - One of the ERR_CAPTURE_... */ 105 #define CX18_CPU_CAPTURE_PAUSE (CPU_CMD_MASK_CAPTURE | 0x0007) 106 107 /* Description: This command resumes streaming with the set channel type 108 IN[0] - Task handle. Handle of the task to resume 109 ReturnCode - One of the ERR_CAPTURE_... */ 110 #define CX18_CPU_CAPTURE_RESUME (CPU_CMD_MASK_CAPTURE | 0x0008) 111 112 #define CAPTURE_CHANNEL_TYPE_NONE 0 113 #define CAPTURE_CHANNEL_TYPE_MPEG 1 114 #define CAPTURE_CHANNEL_TYPE_INDEX 2 115 #define CAPTURE_CHANNEL_TYPE_YUV 3 116 #define CAPTURE_CHANNEL_TYPE_PCM 4 117 #define CAPTURE_CHANNEL_TYPE_VBI 5 118 #define CAPTURE_CHANNEL_TYPE_SLICED_VBI 6 119 #define CAPTURE_CHANNEL_TYPE_TS 7 120 #define CAPTURE_CHANNEL_TYPE_MAX 15 121 122 /* Description: This command sets the channel type. This can only be done 123 when stopped. 124 IN[0] - Task handle. Handle of the task to start 125 IN[1] - Channel Type. See Below. 126 ReturnCode - One of the ERR_CAPTURE_... */ 127 #define CX18_CPU_SET_CHANNEL_TYPE (CPU_CMD_MASK_CAPTURE + 1) 128 129 /* Description: Set stream output type 130 IN[0] - task handle. Handle of the task to start 131 IN[1] - type 132 ReturnCode - One of the ERR_CAPTURE_... */ 133 #define CX18_CPU_SET_STREAM_OUTPUT_TYPE (CPU_CMD_MASK_CAPTURE | 0x0012) 134 135 /* Description: Set video input resolution and frame rate 136 IN[0] - task handle 137 IN[1] - reserved 138 IN[2] - reserved 139 IN[3] - reserved 140 IN[4] - reserved 141 IN[5] - frame rate, 0 - 29.97f/s, 1 - 25f/s 142 ReturnCode - One of the ERR_CAPTURE_... */ 143 #define CX18_CPU_SET_VIDEO_IN (CPU_CMD_MASK_CAPTURE | 0x0004) 144 145 /* Description: Set video frame rate 146 IN[0] - task handle. Handle of the task to start 147 IN[1] - video bit rate mode 148 IN[2] - video average rate 149 IN[3] - video peak rate 150 IN[4] - system mux rate 151 ReturnCode - One of the ERR_CAPTURE_... */ 152 #define CX18_CPU_SET_VIDEO_RATE (CPU_CMD_MASK_CAPTURE | 0x0005) 153 154 /* Description: Set video output resolution 155 IN[0] - task handle 156 IN[1] - horizontal size 157 IN[2] - vertical size 158 ReturnCode - One of the ERR_CAPTURE_... */ 159 #define CX18_CPU_SET_VIDEO_RESOLUTION (CPU_CMD_MASK_CAPTURE | 0x0006) 160 161 /* Description: This command set filter parameters 162 IN[0] - Task handle. Handle of the task 163 IN[1] - type, 0 - temporal, 1 - spatial, 2 - median 164 IN[2] - mode, temporal/spatial: 0 - disable, 1 - static, 2 - dynamic 165 median: 0 = disable, 1 = horizontal, 2 = vertical, 166 3 = horizontal/vertical, 4 = diagonal 167 IN[3] - strength, temporal 0 - 31, spatial 0 - 15 168 ReturnCode - One of the ERR_CAPTURE_... */ 169 #define CX18_CPU_SET_FILTER_PARAM (CPU_CMD_MASK_CAPTURE | 0x0009) 170 171 /* Description: This command set spatial filter type 172 IN[0] - Task handle. 173 IN[1] - luma type: 0 = disable, 1 = 1D horizontal only, 2 = 1D vertical only, 174 3 = 2D H/V separable, 4 = 2D symmetric non-separable 175 IN[2] - chroma type: 0 - disable, 1 = 1D horizontal 176 ReturnCode - One of the ERR_CAPTURE_... */ 177 #define CX18_CPU_SET_SPATIAL_FILTER_TYPE (CPU_CMD_MASK_CAPTURE | 0x000C) 178 179 /* Description: This command set coring levels for median filter 180 IN[0] - Task handle. 181 IN[1] - luma_high 182 IN[2] - luma_low 183 IN[3] - chroma_high 184 IN[4] - chroma_low 185 ReturnCode - One of the ERR_CAPTURE_... */ 186 #define CX18_CPU_SET_MEDIAN_CORING (CPU_CMD_MASK_CAPTURE | 0x000E) 187 188 /* Description: This command set the picture type mask for index file 189 IN[0] - Task handle (ignored by firmware) 190 IN[1] - 0 = disable index file output 191 1 = output I picture 192 2 = P picture 193 4 = B picture 194 other = illegal */ 195 #define CX18_CPU_SET_INDEXTABLE (CPU_CMD_MASK_CAPTURE | 0x0010) 196 197 /* Description: Set audio parameters 198 IN[0] - task handle. Handle of the task to start 199 IN[1] - audio parameter 200 ReturnCode - One of the ERR_CAPTURE_... */ 201 #define CX18_CPU_SET_AUDIO_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0011) 202 203 /* Description: Set video mute 204 IN[0] - task handle. Handle of the task to start 205 IN[1] - bit31-24: muteYvalue 206 bit23-16: muteUvalue 207 bit15-8: muteVvalue 208 bit0: 1:mute, 0: unmute 209 ReturnCode - One of the ERR_CAPTURE_... */ 210 #define CX18_CPU_SET_VIDEO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0013) 211 212 /* Description: Set audio mute 213 IN[0] - task handle. Handle of the task to start 214 IN[1] - mute/unmute 215 ReturnCode - One of the ERR_CAPTURE_... */ 216 #define CX18_CPU_SET_AUDIO_MUTE (CPU_CMD_MASK_CAPTURE | 0x0014) 217 218 /* Description: Set stream output type 219 IN[0] - task handle. Handle of the task to start 220 IN[1] - subType 221 SET_INITIAL_SCR 1 222 SET_QUALITY_MODE 2 223 SET_VIM_PROTECT_MODE 3 224 SET_PTS_CORRECTION 4 225 SET_USB_FLUSH_MODE 5 226 SET_MERAQPAR_ENABLE 6 227 SET_NAV_PACK_INSERTION 7 228 SET_SCENE_CHANGE_ENABLE 8 229 IN[2] - parameter 1 230 IN[3] - parameter 2 231 ReturnCode - One of the ERR_CAPTURE_... */ 232 #define CX18_CPU_SET_MISC_PARAMETERS (CPU_CMD_MASK_CAPTURE | 0x0015) 233 234 /* Description: Set raw VBI parameters 235 IN[0] - Task handle 236 IN[1] - No. of input lines per field: 237 bit[15:0]: field 1, 238 bit[31:16]: field 2 239 IN[2] - No. of input bytes per line 240 IN[3] - No. of output frames per transfer 241 IN[4] - start code 242 IN[5] - stop code 243 ReturnCode */ 244 #define CX18_CPU_SET_RAW_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0016) 245 246 /* Description: Set capture line No. 247 IN[0] - task handle. Handle of the task to start 248 IN[1] - height1 249 IN[2] - height2 250 ReturnCode - One of the ERR_CAPTURE_... */ 251 #define CX18_CPU_SET_CAPTURE_LINE_NO (CPU_CMD_MASK_CAPTURE | 0x0017) 252 253 /* Description: Set copyright 254 IN[0] - task handle. Handle of the task to start 255 IN[1] - copyright 256 ReturnCode - One of the ERR_CAPTURE_... */ 257 #define CX18_CPU_SET_COPYRIGHT (CPU_CMD_MASK_CAPTURE | 0x0018) 258 259 /* Description: Set audio PID 260 IN[0] - task handle. Handle of the task to start 261 IN[1] - PID 262 ReturnCode - One of the ERR_CAPTURE_... */ 263 #define CX18_CPU_SET_AUDIO_PID (CPU_CMD_MASK_CAPTURE | 0x0019) 264 265 /* Description: Set video PID 266 IN[0] - task handle. Handle of the task to start 267 IN[1] - PID 268 ReturnCode - One of the ERR_CAPTURE_... */ 269 #define CX18_CPU_SET_VIDEO_PID (CPU_CMD_MASK_CAPTURE | 0x001A) 270 271 /* Description: Set Vertical Crop Line 272 IN[0] - task handle. Handle of the task to start 273 IN[1] - Line 274 ReturnCode - One of the ERR_CAPTURE_... */ 275 #define CX18_CPU_SET_VER_CROP_LINE (CPU_CMD_MASK_CAPTURE | 0x001B) 276 277 /* Description: Set COP structure 278 IN[0] - task handle. Handle of the task to start 279 IN[1] - M 280 IN[2] - N 281 ReturnCode - One of the ERR_CAPTURE_... */ 282 #define CX18_CPU_SET_GOP_STRUCTURE (CPU_CMD_MASK_CAPTURE | 0x001C) 283 284 /* Description: Set Scene Change Detection 285 IN[0] - task handle. Handle of the task to start 286 IN[1] - scene change 287 ReturnCode - One of the ERR_CAPTURE_... */ 288 #define CX18_CPU_SET_SCENE_CHANGE_DETECTION (CPU_CMD_MASK_CAPTURE | 0x001D) 289 290 /* Description: Set Aspect Ratio 291 IN[0] - task handle. Handle of the task to start 292 IN[1] - AspectRatio 293 ReturnCode - One of the ERR_CAPTURE_... */ 294 #define CX18_CPU_SET_ASPECT_RATIO (CPU_CMD_MASK_CAPTURE | 0x001E) 295 296 /* Description: Set Skip Input Frame 297 IN[0] - task handle. Handle of the task to start 298 IN[1] - skip input frames 299 ReturnCode - One of the ERR_CAPTURE_... */ 300 #define CX18_CPU_SET_SKIP_INPUT_FRAME (CPU_CMD_MASK_CAPTURE | 0x001F) 301 302 /* Description: Set sliced VBI parameters - 303 Note This API will only apply to MPEG and Sliced VBI Channels 304 IN[0] - Task handle 305 IN[1] - output type, 0 - CC, 1 - Moji, 2 - Teletext 306 IN[2] - start / stop line 307 bit[15:0] start line number 308 bit[31:16] stop line number 309 IN[3] - number of output frames per interrupt 310 IN[4] - VBI insertion mode 311 bit 0: output user data, 1 - enable 312 bit 1: output private stream, 1 - enable 313 bit 2: mux option, 0 - in GOP, 1 - in picture 314 bit[7:0] private stream ID 315 IN[5] - insertion period while mux option is in picture 316 ReturnCode - VBI data offset */ 317 #define CX18_CPU_SET_SLICED_VBI_PARAM (CPU_CMD_MASK_CAPTURE | 0x0020) 318 319 /* Description: Set the user data place holder 320 IN[0] - type of data (0 for user) 321 IN[1] - Stuffing period 322 IN[2] - ID data size in word (less than 10) 323 IN[3] - Pointer to ID buffer */ 324 #define CX18_CPU_SET_USERDATA_PLACE_HOLDER (CPU_CMD_MASK_CAPTURE | 0x0021) 325 326 327 /* Description: 328 In[0] Task Handle 329 return parameter: 330 Out[0] Reserved 331 Out[1] Video PTS bit[32:2] of last output video frame. 332 Out[2] Video PTS bit[ 1:0] of last output video frame. 333 Out[3] Hardware Video PTS counter bit[31:0], 334 these bits get incremented on every 90kHz clock tick. 335 Out[4] Hardware Video PTS counter bit32, 336 these bits get incremented on every 90kHz clock tick. 337 ReturnCode */ 338 #define CX18_CPU_GET_ENC_PTS (CPU_CMD_MASK_CAPTURE | 0x0022) 339 340 /* Description: Set VFC parameters 341 IN[0] - task handle 342 IN[1] - VFC enable flag, 1 - enable, 0 - disable 343 */ 344 #define CX18_CPU_SET_VFC_PARAM (CPU_CMD_MASK_CAPTURE | 0x0023) 345 346 /* Below is the list of commands related to the data exchange */ 347 #define CPU_CMD_MASK_DE (CPU_CMD_MASK | 0x040000) 348 349 /* Description: This command provides the physical base address of the local 350 DDR as viewed by EPU 351 IN[0] - Physical offset where EPU has the local DDR mapped 352 ReturnCode - One of the ERR_DE_... */ 353 #define CPU_CMD_DE_SetBase (CPU_CMD_MASK_DE | 0x0001) 354 355 /* Description: This command provides the offsets in the device memory where 356 the 2 cx18_mdl_ack blocks reside 357 IN[0] - Task handle. Handle of the task to start 358 IN[1] - Offset of the first cx18_mdl_ack from the beginning of the 359 local DDR. 360 IN[2] - Offset of the second cx18_mdl_ack from the beginning of the 361 local DDR. 362 ReturnCode - One of the ERR_DE_... */ 363 #define CX18_CPU_DE_SET_MDL_ACK (CPU_CMD_MASK_DE | 0x0002) 364 365 /* Description: This command provides the offset to a Memory Descriptor List 366 IN[0] - Task handle. Handle of the task to start 367 IN[1] - Offset of the MDL from the beginning of the local DDR. 368 IN[2] - Number of cx18_mdl_ent structures in the array pointed to by IN[1] 369 IN[3] - Buffer ID 370 IN[4] - Total buffer length 371 ReturnCode - One of the ERR_DE_... */ 372 #define CX18_CPU_DE_SET_MDL (CPU_CMD_MASK_DE | 0x0005) 373 374 /* Description: This command requests return of all current Memory 375 Descriptor Lists to the driver 376 IN[0] - Task handle. Handle of the task to start 377 ReturnCode - One of the ERR_DE_... */ 378 #define CX18_CPU_DE_RELEASE_MDL (CPU_CMD_MASK_DE | 0x0006) 379 380 /* Description: This command signals the cpu that the dat buffer has been 381 consumed and ready for re-use. 382 IN[0] - Task handle. Handle of the task 383 IN[1] - Offset of the data block from the beginning of the local DDR. 384 IN[2] - Number of bytes in the data block 385 ReturnCode - One of the ERR_DE_... */ 386 /* #define CX18_CPU_DE_RELEASE_BUFFER (CPU_CMD_MASK_DE | 0x0007) */ 387 388 /* No Error / Success */ 389 #define CNXT_OK 0x000000 390 391 /* Received unknown command */ 392 #define CXERR_UNK_CMD 0x000001 393 394 /* First parameter in the command is invalid */ 395 #define CXERR_INVALID_PARAM1 0x000002 396 397 /* Second parameter in the command is invalid */ 398 #define CXERR_INVALID_PARAM2 0x000003 399 400 /* Device interface is not open/found */ 401 #define CXERR_DEV_NOT_FOUND 0x000004 402 403 /* Requested function is not implemented/available */ 404 #define CXERR_NOTSUPPORTED 0x000005 405 406 /* Invalid pointer is provided */ 407 #define CXERR_BADPTR 0x000006 408 409 /* Unable to allocate memory */ 410 #define CXERR_NOMEM 0x000007 411 412 /* Object/Link not found */ 413 #define CXERR_LINK 0x000008 414 415 /* Device busy, command cannot be executed */ 416 #define CXERR_BUSY 0x000009 417 418 /* File/device/handle is not open. */ 419 #define CXERR_NOT_OPEN 0x00000A 420 421 /* Value is out of range */ 422 #define CXERR_OUTOFRANGE 0x00000B 423 424 /* Buffer overflow */ 425 #define CXERR_OVERFLOW 0x00000C 426 427 /* Version mismatch */ 428 #define CXERR_BADVER 0x00000D 429 430 /* Operation timed out */ 431 #define CXERR_TIMEOUT 0x00000E 432 433 /* Operation aborted */ 434 #define CXERR_ABORT 0x00000F 435 436 /* Specified I2C device not found for read/write */ 437 #define CXERR_I2CDEV_NOTFOUND 0x000010 438 439 /* Error in I2C data xfer (but I2C device is present) */ 440 #define CXERR_I2CDEV_XFERERR 0x000011 441 442 /* Chanel changing component not ready */ 443 #define CXERR_CHANNELNOTREADY 0x000012 444 445 /* PPU (Presensation/Decoder) mail box is corrupted */ 446 #define CXERR_PPU_MB_CORRUPT 0x000013 447 448 /* CPU (Capture/Encoder) mail box is corrupted */ 449 #define CXERR_CPU_MB_CORRUPT 0x000014 450 451 /* APU (Audio) mail box is corrupted */ 452 #define CXERR_APU_MB_CORRUPT 0x000015 453 454 /* Unable to open file for reading */ 455 #define CXERR_FILE_OPEN_READ 0x000016 456 457 /* Unable to open file for writing */ 458 #define CXERR_FILE_OPEN_WRITE 0x000017 459 460 /* Unable to find the I2C section specified */ 461 #define CXERR_I2C_BADSECTION 0x000018 462 463 /* Error in I2C data xfer (but I2C device is present) */ 464 #define CXERR_I2CDEV_DATALOW 0x000019 465 466 /* Error in I2C data xfer (but I2C device is present) */ 467 #define CXERR_I2CDEV_CLOCKLOW 0x00001A 468 469 /* No Interrupt received from HW (for I2C access) */ 470 #define CXERR_NO_HW_I2C_INTR 0x00001B 471 472 /* RPU is not ready to accept commands! */ 473 #define CXERR_RPU_NOT_READY 0x00001C 474 475 /* RPU is not ready to accept commands! */ 476 #define CXERR_RPU_NO_ACK 0x00001D 477 478 /* The are no buffers ready. Try again soon! */ 479 #define CXERR_NODATA_AGAIN 0x00001E 480 481 /* The stream is stopping. Function not allowed now! */ 482 #define CXERR_STOPPING_STATUS 0x00001F 483 484 /* Trying to access hardware when the power is turned OFF */ 485 #define CXERR_DEVPOWER_OFF 0x000020 486 487 #endif /* CX23418_H */ 488