1 /* 2 * cx18 init/start/stop/exit stream functions 3 * 4 * Derived from ivtv-streams.c 5 * 6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 22 * 02111-1307 USA 23 */ 24 25 #include "cx18-driver.h" 26 #include "cx18-io.h" 27 #include "cx18-fileops.h" 28 #include "cx18-mailbox.h" 29 #include "cx18-i2c.h" 30 #include "cx18-queue.h" 31 #include "cx18-ioctl.h" 32 #include "cx18-streams.h" 33 #include "cx18-cards.h" 34 #include "cx18-scb.h" 35 #include "cx18-dvb.h" 36 37 #define CX18_DSP0_INTERRUPT_MASK 0xd0004C 38 39 static struct v4l2_file_operations cx18_v4l2_enc_fops = { 40 .owner = THIS_MODULE, 41 .read = cx18_v4l2_read, 42 .open = cx18_v4l2_open, 43 .unlocked_ioctl = video_ioctl2, 44 .release = cx18_v4l2_close, 45 .poll = cx18_v4l2_enc_poll, 46 .mmap = cx18_v4l2_mmap, 47 }; 48 49 /* offset from 0 to register ts v4l2 minors on */ 50 #define CX18_V4L2_ENC_TS_OFFSET 16 51 /* offset from 0 to register pcm v4l2 minors on */ 52 #define CX18_V4L2_ENC_PCM_OFFSET 24 53 /* offset from 0 to register yuv v4l2 minors on */ 54 #define CX18_V4L2_ENC_YUV_OFFSET 32 55 56 static struct { 57 const char *name; 58 int vfl_type; 59 int num_offset; 60 int dma; 61 u32 caps; 62 } cx18_stream_info[] = { 63 { /* CX18_ENC_STREAM_TYPE_MPG */ 64 "encoder MPEG", 65 VFL_TYPE_GRABBER, 0, 66 PCI_DMA_FROMDEVICE, 67 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | 68 V4L2_CAP_AUDIO | V4L2_CAP_TUNER 69 }, 70 { /* CX18_ENC_STREAM_TYPE_TS */ 71 "TS", 72 VFL_TYPE_GRABBER, -1, 73 PCI_DMA_FROMDEVICE, 74 }, 75 { /* CX18_ENC_STREAM_TYPE_YUV */ 76 "encoder YUV", 77 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET, 78 PCI_DMA_FROMDEVICE, 79 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE | 80 V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER 81 }, 82 { /* CX18_ENC_STREAM_TYPE_VBI */ 83 "encoder VBI", 84 VFL_TYPE_VBI, 0, 85 PCI_DMA_FROMDEVICE, 86 V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE | 87 V4L2_CAP_READWRITE | V4L2_CAP_TUNER 88 }, 89 { /* CX18_ENC_STREAM_TYPE_PCM */ 90 "encoder PCM audio", 91 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET, 92 PCI_DMA_FROMDEVICE, 93 }, 94 { /* CX18_ENC_STREAM_TYPE_IDX */ 95 "encoder IDX", 96 VFL_TYPE_GRABBER, -1, 97 PCI_DMA_FROMDEVICE, 98 }, 99 { /* CX18_ENC_STREAM_TYPE_RAD */ 100 "encoder radio", 101 VFL_TYPE_RADIO, 0, 102 PCI_DMA_NONE, 103 V4L2_CAP_RADIO | V4L2_CAP_TUNER 104 }, 105 }; 106 107 108 static void cx18_dma_free(struct videobuf_queue *q, 109 struct cx18_stream *s, struct cx18_videobuf_buffer *buf) 110 { 111 videobuf_waiton(q, &buf->vb, 0, 0); 112 videobuf_vmalloc_free(&buf->vb); 113 buf->vb.state = VIDEOBUF_NEEDS_INIT; 114 } 115 116 static int cx18_prepare_buffer(struct videobuf_queue *q, 117 struct cx18_stream *s, 118 struct cx18_videobuf_buffer *buf, 119 u32 pixelformat, 120 unsigned int width, unsigned int height, 121 enum v4l2_field field) 122 { 123 struct cx18 *cx = s->cx; 124 int rc = 0; 125 126 /* check settings */ 127 buf->bytes_used = 0; 128 129 if ((width < 48) || (height < 32)) 130 return -EINVAL; 131 132 buf->vb.size = (width * height * 2); 133 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size)) 134 return -EINVAL; 135 136 /* alloc + fill struct (if changed) */ 137 if (buf->vb.width != width || buf->vb.height != height || 138 buf->vb.field != field || s->pixelformat != pixelformat || 139 buf->tvnorm != cx->std) { 140 141 buf->vb.width = width; 142 buf->vb.height = height; 143 buf->vb.field = field; 144 buf->tvnorm = cx->std; 145 s->pixelformat = pixelformat; 146 147 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2))) 148 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */ 149 if (s->pixelformat == V4L2_PIX_FMT_HM12) 150 s->vb_bytes_per_frame = height * 720 * 3 / 2; 151 else 152 s->vb_bytes_per_frame = height * 720 * 2; 153 cx18_dma_free(q, s, buf); 154 } 155 156 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size)) 157 return -EINVAL; 158 159 if (buf->vb.field == 0) 160 buf->vb.field = V4L2_FIELD_INTERLACED; 161 162 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { 163 buf->vb.width = width; 164 buf->vb.height = height; 165 buf->vb.field = field; 166 buf->tvnorm = cx->std; 167 s->pixelformat = pixelformat; 168 169 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2))) 170 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */ 171 if (s->pixelformat == V4L2_PIX_FMT_HM12) 172 s->vb_bytes_per_frame = height * 720 * 3 / 2; 173 else 174 s->vb_bytes_per_frame = height * 720 * 2; 175 rc = videobuf_iolock(q, &buf->vb, NULL); 176 if (rc != 0) 177 goto fail; 178 } 179 buf->vb.state = VIDEOBUF_PREPARED; 180 return 0; 181 182 fail: 183 cx18_dma_free(q, s, buf); 184 return rc; 185 186 } 187 188 /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576) 189 1440 is a single line of 4:2:2 YUV at 720 luma samples wide 190 */ 191 #define VB_MIN_BUFFERS 32 192 #define VB_MIN_BUFSIZE 4147200 193 194 static int buffer_setup(struct videobuf_queue *q, 195 unsigned int *count, unsigned int *size) 196 { 197 struct cx18_stream *s = q->priv_data; 198 struct cx18 *cx = s->cx; 199 200 *size = 2 * cx->cxhdl.width * cx->cxhdl.height; 201 if (*count == 0) 202 *count = VB_MIN_BUFFERS; 203 204 while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE) 205 (*count)--; 206 207 q->field = V4L2_FIELD_INTERLACED; 208 q->last = V4L2_FIELD_INTERLACED; 209 210 return 0; 211 } 212 213 static int buffer_prepare(struct videobuf_queue *q, 214 struct videobuf_buffer *vb, 215 enum v4l2_field field) 216 { 217 struct cx18_videobuf_buffer *buf = 218 container_of(vb, struct cx18_videobuf_buffer, vb); 219 struct cx18_stream *s = q->priv_data; 220 struct cx18 *cx = s->cx; 221 222 return cx18_prepare_buffer(q, s, buf, s->pixelformat, 223 cx->cxhdl.width, cx->cxhdl.height, field); 224 } 225 226 static void buffer_release(struct videobuf_queue *q, 227 struct videobuf_buffer *vb) 228 { 229 struct cx18_videobuf_buffer *buf = 230 container_of(vb, struct cx18_videobuf_buffer, vb); 231 struct cx18_stream *s = q->priv_data; 232 233 cx18_dma_free(q, s, buf); 234 } 235 236 static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) 237 { 238 struct cx18_videobuf_buffer *buf = 239 container_of(vb, struct cx18_videobuf_buffer, vb); 240 struct cx18_stream *s = q->priv_data; 241 242 buf->vb.state = VIDEOBUF_QUEUED; 243 244 list_add_tail(&buf->vb.queue, &s->vb_capture); 245 } 246 247 static struct videobuf_queue_ops cx18_videobuf_qops = { 248 .buf_setup = buffer_setup, 249 .buf_prepare = buffer_prepare, 250 .buf_queue = buffer_queue, 251 .buf_release = buffer_release, 252 }; 253 254 static void cx18_stream_init(struct cx18 *cx, int type) 255 { 256 struct cx18_stream *s = &cx->streams[type]; 257 struct video_device *video_dev = s->video_dev; 258 259 /* we need to keep video_dev, so restore it afterwards */ 260 memset(s, 0, sizeof(*s)); 261 s->video_dev = video_dev; 262 263 /* initialize cx18_stream fields */ 264 s->dvb = NULL; 265 s->cx = cx; 266 s->type = type; 267 s->name = cx18_stream_info[type].name; 268 s->handle = CX18_INVALID_TASK_HANDLE; 269 270 s->dma = cx18_stream_info[type].dma; 271 s->v4l2_dev_caps = cx18_stream_info[type].caps; 272 s->buffers = cx->stream_buffers[type]; 273 s->buf_size = cx->stream_buf_size[type]; 274 INIT_LIST_HEAD(&s->buf_pool); 275 s->bufs_per_mdl = 1; 276 s->mdl_size = s->buf_size * s->bufs_per_mdl; 277 278 init_waitqueue_head(&s->waitq); 279 s->id = -1; 280 spin_lock_init(&s->q_free.lock); 281 cx18_queue_init(&s->q_free); 282 spin_lock_init(&s->q_busy.lock); 283 cx18_queue_init(&s->q_busy); 284 spin_lock_init(&s->q_full.lock); 285 cx18_queue_init(&s->q_full); 286 spin_lock_init(&s->q_idle.lock); 287 cx18_queue_init(&s->q_idle); 288 289 INIT_WORK(&s->out_work_order, cx18_out_work_handler); 290 291 INIT_LIST_HEAD(&s->vb_capture); 292 s->vb_timeout.function = cx18_vb_timeout; 293 s->vb_timeout.data = (unsigned long)s; 294 init_timer(&s->vb_timeout); 295 spin_lock_init(&s->vb_lock); 296 if (type == CX18_ENC_STREAM_TYPE_YUV) { 297 spin_lock_init(&s->vbuf_q_lock); 298 299 s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 300 videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops, 301 &cx->pci_dev->dev, &s->vbuf_q_lock, 302 V4L2_BUF_TYPE_VIDEO_CAPTURE, 303 V4L2_FIELD_INTERLACED, 304 sizeof(struct cx18_videobuf_buffer), 305 s, &cx->serialize_lock); 306 307 /* Assume the previous pixel default */ 308 s->pixelformat = V4L2_PIX_FMT_HM12; 309 s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2; 310 } 311 } 312 313 static int cx18_prep_dev(struct cx18 *cx, int type) 314 { 315 struct cx18_stream *s = &cx->streams[type]; 316 u32 cap = cx->v4l2_cap; 317 int num_offset = cx18_stream_info[type].num_offset; 318 int num = cx->instance + cx18_first_minor + num_offset; 319 320 /* 321 * These five fields are always initialized. 322 * For analog capture related streams, if video_dev == NULL then the 323 * stream is not in use. 324 * For the TS stream, if dvb == NULL then the stream is not in use. 325 * In those cases no other fields but these four can be used. 326 */ 327 s->video_dev = NULL; 328 s->dvb = NULL; 329 s->cx = cx; 330 s->type = type; 331 s->name = cx18_stream_info[type].name; 332 333 /* Check whether the radio is supported */ 334 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO)) 335 return 0; 336 337 /* Check whether VBI is supported */ 338 if (type == CX18_ENC_STREAM_TYPE_VBI && 339 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE))) 340 return 0; 341 342 /* User explicitly selected 0 buffers for these streams, so don't 343 create them. */ 344 if (cx18_stream_info[type].dma != PCI_DMA_NONE && 345 cx->stream_buffers[type] == 0) { 346 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name); 347 return 0; 348 } 349 350 cx18_stream_init(cx, type); 351 352 /* Allocate the cx18_dvb struct only for the TS on cards with DTV */ 353 if (type == CX18_ENC_STREAM_TYPE_TS) { 354 if (cx->card->hw_all & CX18_HW_DVB) { 355 s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL); 356 if (s->dvb == NULL) { 357 CX18_ERR("Couldn't allocate cx18_dvb structure" 358 " for %s\n", s->name); 359 return -ENOMEM; 360 } 361 } else { 362 /* Don't need buffers for the TS, if there is no DVB */ 363 s->buffers = 0; 364 } 365 } 366 367 if (num_offset == -1) 368 return 0; 369 370 /* allocate and initialize the v4l2 video device structure */ 371 s->video_dev = video_device_alloc(); 372 if (s->video_dev == NULL) { 373 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n", 374 s->name); 375 return -ENOMEM; 376 } 377 378 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s", 379 cx->v4l2_dev.name, s->name); 380 381 s->video_dev->num = num; 382 s->video_dev->v4l2_dev = &cx->v4l2_dev; 383 s->video_dev->fops = &cx18_v4l2_enc_fops; 384 s->video_dev->release = video_device_release; 385 s->video_dev->tvnorms = V4L2_STD_ALL; 386 s->video_dev->lock = &cx->serialize_lock; 387 cx18_set_funcs(s->video_dev); 388 return 0; 389 } 390 391 /* Initialize v4l2 variables and register v4l2 devices */ 392 int cx18_streams_setup(struct cx18 *cx) 393 { 394 int type, ret; 395 396 /* Setup V4L2 Devices */ 397 for (type = 0; type < CX18_MAX_STREAMS; type++) { 398 /* Prepare device */ 399 ret = cx18_prep_dev(cx, type); 400 if (ret < 0) 401 break; 402 403 /* Allocate Stream */ 404 ret = cx18_stream_alloc(&cx->streams[type]); 405 if (ret < 0) 406 break; 407 } 408 if (type == CX18_MAX_STREAMS) 409 return 0; 410 411 /* One or more streams could not be initialized. Clean 'em all up. */ 412 cx18_streams_cleanup(cx, 0); 413 return ret; 414 } 415 416 static int cx18_reg_dev(struct cx18 *cx, int type) 417 { 418 struct cx18_stream *s = &cx->streams[type]; 419 int vfl_type = cx18_stream_info[type].vfl_type; 420 const char *name; 421 int num, ret; 422 423 if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) { 424 ret = cx18_dvb_register(s); 425 if (ret < 0) { 426 CX18_ERR("DVB failed to register\n"); 427 return ret; 428 } 429 } 430 431 if (s->video_dev == NULL) 432 return 0; 433 434 num = s->video_dev->num; 435 /* card number + user defined offset + device offset */ 436 if (type != CX18_ENC_STREAM_TYPE_MPG) { 437 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; 438 439 if (s_mpg->video_dev) 440 num = s_mpg->video_dev->num 441 + cx18_stream_info[type].num_offset; 442 } 443 video_set_drvdata(s->video_dev, s); 444 445 /* Register device. First try the desired minor, then any free one. */ 446 ret = video_register_device_no_warn(s->video_dev, vfl_type, num); 447 if (ret < 0) { 448 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n", 449 s->name, num); 450 video_device_release(s->video_dev); 451 s->video_dev = NULL; 452 return ret; 453 } 454 455 name = video_device_node_name(s->video_dev); 456 457 switch (vfl_type) { 458 case VFL_TYPE_GRABBER: 459 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n", 460 name, s->name, cx->stream_buffers[type], 461 cx->stream_buf_size[type] / 1024, 462 (cx->stream_buf_size[type] * 100 / 1024) % 100); 463 break; 464 465 case VFL_TYPE_RADIO: 466 CX18_INFO("Registered device %s for %s\n", name, s->name); 467 break; 468 469 case VFL_TYPE_VBI: 470 if (cx->stream_buffers[type]) 471 CX18_INFO("Registered device %s for %s " 472 "(%d x %d bytes)\n", 473 name, s->name, cx->stream_buffers[type], 474 cx->stream_buf_size[type]); 475 else 476 CX18_INFO("Registered device %s for %s\n", 477 name, s->name); 478 break; 479 } 480 481 return 0; 482 } 483 484 /* Register v4l2 devices */ 485 int cx18_streams_register(struct cx18 *cx) 486 { 487 int type; 488 int err; 489 int ret = 0; 490 491 /* Register V4L2 devices */ 492 for (type = 0; type < CX18_MAX_STREAMS; type++) { 493 err = cx18_reg_dev(cx, type); 494 if (err && ret == 0) 495 ret = err; 496 } 497 498 if (ret == 0) 499 return 0; 500 501 /* One or more streams could not be initialized. Clean 'em all up. */ 502 cx18_streams_cleanup(cx, 1); 503 return ret; 504 } 505 506 /* Unregister v4l2 devices */ 507 void cx18_streams_cleanup(struct cx18 *cx, int unregister) 508 { 509 struct video_device *vdev; 510 int type; 511 512 /* Teardown all streams */ 513 for (type = 0; type < CX18_MAX_STREAMS; type++) { 514 515 /* The TS has a cx18_dvb structure, not a video_device */ 516 if (type == CX18_ENC_STREAM_TYPE_TS) { 517 if (cx->streams[type].dvb != NULL) { 518 if (unregister) 519 cx18_dvb_unregister(&cx->streams[type]); 520 kfree(cx->streams[type].dvb); 521 cx->streams[type].dvb = NULL; 522 cx18_stream_free(&cx->streams[type]); 523 } 524 continue; 525 } 526 527 /* No struct video_device, but can have buffers allocated */ 528 if (type == CX18_ENC_STREAM_TYPE_IDX) { 529 /* If the module params didn't inhibit IDX ... */ 530 if (cx->stream_buffers[type] != 0) { 531 cx->stream_buffers[type] = 0; 532 /* 533 * Before calling cx18_stream_free(), 534 * check if the IDX stream was actually set up. 535 * Needed, since the cx18_probe() error path 536 * exits through here as well as normal clean up 537 */ 538 if (cx->streams[type].buffers != 0) 539 cx18_stream_free(&cx->streams[type]); 540 } 541 continue; 542 } 543 544 /* If struct video_device exists, can have buffers allocated */ 545 vdev = cx->streams[type].video_dev; 546 547 cx->streams[type].video_dev = NULL; 548 if (vdev == NULL) 549 continue; 550 551 if (type == CX18_ENC_STREAM_TYPE_YUV) 552 videobuf_mmap_free(&cx->streams[type].vbuf_q); 553 554 cx18_stream_free(&cx->streams[type]); 555 556 /* Unregister or release device */ 557 if (unregister) 558 video_unregister_device(vdev); 559 else 560 video_device_release(vdev); 561 } 562 } 563 564 static void cx18_vbi_setup(struct cx18_stream *s) 565 { 566 struct cx18 *cx = s->cx; 567 int raw = cx18_raw_vbi(cx); 568 u32 data[CX2341X_MBOX_MAX_DATA]; 569 int lines; 570 571 if (cx->is_60hz) { 572 cx->vbi.count = 12; 573 cx->vbi.start[0] = 10; 574 cx->vbi.start[1] = 273; 575 } else { /* PAL/SECAM */ 576 cx->vbi.count = 18; 577 cx->vbi.start[0] = 6; 578 cx->vbi.start[1] = 318; 579 } 580 581 /* setup VBI registers */ 582 if (raw) 583 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi); 584 else 585 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced); 586 587 /* 588 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw 589 * VBI when the first analog capture channel starts, as once it starts 590 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup 591 * (i.e. for the VBI capture channels). We also send it for each 592 * analog capture channel anyway just to make sure we get the proper 593 * behavior 594 */ 595 if (raw) { 596 lines = cx->vbi.count * 2; 597 } else { 598 /* 599 * For 525/60 systems, according to the VIP 2 & BT.656 std: 600 * The EAV RP code's Field bit toggles on line 4, a few lines 601 * after the Vertcal Blank bit has already toggled. 602 * Tell the encoder to capture 21-4+1=18 lines per field, 603 * since we want lines 10 through 21. 604 * 605 * For 625/50 systems, according to the VIP 2 & BT.656 std: 606 * The EAV RP code's Field bit toggles on line 1, a few lines 607 * after the Vertcal Blank bit has already toggled. 608 * (We've actually set the digitizer so that the Field bit 609 * toggles on line 2.) Tell the encoder to capture 23-2+1=22 610 * lines per field, since we want lines 6 through 23. 611 */ 612 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2; 613 } 614 615 data[0] = s->handle; 616 /* Lines per field */ 617 data[1] = (lines / 2) | ((lines / 2) << 16); 618 /* bytes per line */ 619 data[2] = (raw ? vbi_active_samples 620 : (cx->is_60hz ? vbi_hblank_samples_60Hz 621 : vbi_hblank_samples_50Hz)); 622 /* Every X number of frames a VBI interrupt arrives 623 (frames as in 25 or 30 fps) */ 624 data[3] = 1; 625 /* 626 * Set the SAV/EAV RP codes to look for as start/stop points 627 * when in VIP-1.1 mode 628 */ 629 if (raw) { 630 /* 631 * Start codes for beginning of "active" line in vertical blank 632 * 0x20 ( VerticalBlank ) 633 * 0x60 ( EvenField VerticalBlank ) 634 */ 635 data[4] = 0x20602060; 636 /* 637 * End codes for end of "active" raw lines and regular lines 638 * 0x30 ( VerticalBlank HorizontalBlank) 639 * 0x70 ( EvenField VerticalBlank HorizontalBlank) 640 * 0x90 (Task HorizontalBlank) 641 * 0xd0 (Task EvenField HorizontalBlank) 642 */ 643 data[5] = 0x307090d0; 644 } else { 645 /* 646 * End codes for active video, we want data in the hblank region 647 * 0xb0 (Task 0 VerticalBlank HorizontalBlank) 648 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank) 649 * 650 * Since the V bit is only allowed to toggle in the EAV RP code, 651 * just before the first active region line, these two 652 * are problematic: 653 * 0x90 (Task HorizontalBlank) 654 * 0xd0 (Task EvenField HorizontalBlank) 655 * 656 * We have set the digitzer such that we don't have to worry 657 * about these problem codes. 658 */ 659 data[4] = 0xB0F0B0F0; 660 /* 661 * Start codes for beginning of active line in vertical blank 662 * 0xa0 (Task VerticalBlank ) 663 * 0xe0 (Task EvenField VerticalBlank ) 664 */ 665 data[5] = 0xA0E0A0E0; 666 } 667 668 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n", 669 data[0], data[1], data[2], data[3], data[4], data[5]); 670 671 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data); 672 } 673 674 void cx18_stream_rotate_idx_mdls(struct cx18 *cx) 675 { 676 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; 677 struct cx18_mdl *mdl; 678 679 if (!cx18_stream_enabled(s)) 680 return; 681 682 /* Return if the firmware is not running low on MDLs */ 683 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >= 684 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN) 685 return; 686 687 /* Return if there are no MDLs to rotate back to the firmware */ 688 if (atomic_read(&s->q_full.depth) < 2) 689 return; 690 691 /* 692 * Take the oldest IDX MDL still holding data, and discard its index 693 * entries by scheduling the MDL to go back to the firmware 694 */ 695 mdl = cx18_dequeue(s, &s->q_full); 696 if (mdl != NULL) 697 cx18_enqueue(s, mdl, &s->q_free); 698 } 699 700 static 701 struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s, 702 struct cx18_mdl *mdl) 703 { 704 struct cx18 *cx = s->cx; 705 struct cx18_queue *q; 706 707 /* Don't give it to the firmware, if we're not running a capture */ 708 if (s->handle == CX18_INVALID_TASK_HANDLE || 709 test_bit(CX18_F_S_STOPPING, &s->s_flags) || 710 !test_bit(CX18_F_S_STREAMING, &s->s_flags)) 711 return cx18_enqueue(s, mdl, &s->q_free); 712 713 q = cx18_enqueue(s, mdl, &s->q_busy); 714 if (q != &s->q_busy) 715 return q; /* The firmware has the max MDLs it can handle */ 716 717 cx18_mdl_sync_for_device(s, mdl); 718 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle, 719 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem, 720 s->bufs_per_mdl, mdl->id, s->mdl_size); 721 return q; 722 } 723 724 static 725 void _cx18_stream_load_fw_queue(struct cx18_stream *s) 726 { 727 struct cx18_queue *q; 728 struct cx18_mdl *mdl; 729 730 if (atomic_read(&s->q_free.depth) == 0 || 731 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM) 732 return; 733 734 /* Move from q_free to q_busy notifying the firmware, until the limit */ 735 do { 736 mdl = cx18_dequeue(s, &s->q_free); 737 if (mdl == NULL) 738 break; 739 q = _cx18_stream_put_mdl_fw(s, mdl); 740 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM 741 && q == &s->q_busy); 742 } 743 744 void cx18_out_work_handler(struct work_struct *work) 745 { 746 struct cx18_stream *s = 747 container_of(work, struct cx18_stream, out_work_order); 748 749 _cx18_stream_load_fw_queue(s); 750 } 751 752 static void cx18_stream_configure_mdls(struct cx18_stream *s) 753 { 754 cx18_unload_queues(s); 755 756 switch (s->type) { 757 case CX18_ENC_STREAM_TYPE_YUV: 758 /* 759 * Height should be a multiple of 32 lines. 760 * Set the MDL size to the exact size needed for one frame. 761 * Use enough buffers per MDL to cover the MDL size 762 */ 763 if (s->pixelformat == V4L2_PIX_FMT_HM12) 764 s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2; 765 else 766 s->mdl_size = 720 * s->cx->cxhdl.height * 2; 767 s->bufs_per_mdl = s->mdl_size / s->buf_size; 768 if (s->mdl_size % s->buf_size) 769 s->bufs_per_mdl++; 770 break; 771 case CX18_ENC_STREAM_TYPE_VBI: 772 s->bufs_per_mdl = 1; 773 if (cx18_raw_vbi(s->cx)) { 774 s->mdl_size = (s->cx->is_60hz ? 12 : 18) 775 * 2 * vbi_active_samples; 776 } else { 777 /* 778 * See comment in cx18_vbi_setup() below about the 779 * extra lines we capture in sliced VBI mode due to 780 * the lines on which EAV RP codes toggle. 781 */ 782 s->mdl_size = s->cx->is_60hz 783 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz 784 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz; 785 } 786 break; 787 default: 788 s->bufs_per_mdl = 1; 789 s->mdl_size = s->buf_size * s->bufs_per_mdl; 790 break; 791 } 792 793 cx18_load_queues(s); 794 } 795 796 int cx18_start_v4l2_encode_stream(struct cx18_stream *s) 797 { 798 u32 data[MAX_MB_ARGUMENTS]; 799 struct cx18 *cx = s->cx; 800 int captype = 0; 801 struct cx18_stream *s_idx; 802 803 if (!cx18_stream_enabled(s)) 804 return -EINVAL; 805 806 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name); 807 808 switch (s->type) { 809 case CX18_ENC_STREAM_TYPE_MPG: 810 captype = CAPTURE_CHANNEL_TYPE_MPEG; 811 cx->mpg_data_received = cx->vbi_data_inserted = 0; 812 cx->dualwatch_jiffies = jiffies; 813 cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode); 814 cx->search_pack_header = 0; 815 break; 816 817 case CX18_ENC_STREAM_TYPE_IDX: 818 captype = CAPTURE_CHANNEL_TYPE_INDEX; 819 break; 820 case CX18_ENC_STREAM_TYPE_TS: 821 captype = CAPTURE_CHANNEL_TYPE_TS; 822 break; 823 case CX18_ENC_STREAM_TYPE_YUV: 824 captype = CAPTURE_CHANNEL_TYPE_YUV; 825 break; 826 case CX18_ENC_STREAM_TYPE_PCM: 827 captype = CAPTURE_CHANNEL_TYPE_PCM; 828 break; 829 case CX18_ENC_STREAM_TYPE_VBI: 830 #ifdef CX18_ENCODER_PARSES_SLICED 831 captype = cx18_raw_vbi(cx) ? 832 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI; 833 #else 834 /* 835 * Currently we set things up so that Sliced VBI from the 836 * digitizer is handled as Raw VBI by the encoder 837 */ 838 captype = CAPTURE_CHANNEL_TYPE_VBI; 839 #endif 840 cx->vbi.frame = 0; 841 cx->vbi.inserted_frame = 0; 842 memset(cx->vbi.sliced_mpeg_size, 843 0, sizeof(cx->vbi.sliced_mpeg_size)); 844 break; 845 default: 846 return -EINVAL; 847 } 848 849 /* Clear Streamoff flags in case left from last capture */ 850 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags); 851 852 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE); 853 s->handle = data[0]; 854 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype); 855 856 /* 857 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and 858 * set up all the parameters, as it is not obvious which parameters the 859 * firmware shares across capture channel types and which it does not. 860 * 861 * Some of the cx18_vapi() calls below apply to only certain capture 862 * channel types. We're hoping there's no harm in calling most of them 863 * anyway, as long as the values are all consistent. Setting some 864 * shared parameters will have no effect once an analog capture channel 865 * has started streaming. 866 */ 867 if (captype != CAPTURE_CHANNEL_TYPE_TS) { 868 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0); 869 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1); 870 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0); 871 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1); 872 873 /* 874 * Audio related reset according to 875 * Documentation/video4linux/cx2341x/fw-encoder-api.txt 876 */ 877 if (atomic_read(&cx->ana_capturing) == 0) 878 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, 879 s->handle, 12); 880 881 /* 882 * Number of lines for Field 1 & Field 2 according to 883 * Documentation/video4linux/cx2341x/fw-encoder-api.txt 884 * Field 1 is 312 for 625 line systems in BT.656 885 * Field 2 is 313 for 625 line systems in BT.656 886 */ 887 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3, 888 s->handle, 312, 313); 889 890 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE) 891 cx18_vbi_setup(s); 892 893 /* 894 * Select to receive I, P, and B frame index entries, if the 895 * index stream is enabled. Otherwise disable index entry 896 * generation. 897 */ 898 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; 899 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2, 900 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0); 901 902 /* Call out to the common CX2341x API setup for user controls */ 903 cx->cxhdl.priv = s; 904 cx2341x_handler_setup(&cx->cxhdl); 905 906 /* 907 * When starting a capture and we're set for radio, 908 * ensure the video is muted, despite the user control. 909 */ 910 if (!cx->cxhdl.video_mute && 911 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) 912 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle, 913 (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1); 914 915 /* Enable the Video Format Converter for UYVY 4:2:2 support, 916 * rather than the default HM12 Macroblovk 4:2:0 support. 917 */ 918 if (captype == CAPTURE_CHANNEL_TYPE_YUV) { 919 if (s->pixelformat == V4L2_PIX_FMT_UYVY) 920 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2, 921 s->handle, 1); 922 else 923 /* If in doubt, default to HM12 */ 924 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2, 925 s->handle, 0); 926 } 927 } 928 929 if (atomic_read(&cx->tot_capturing) == 0) { 930 cx2341x_handler_set_busy(&cx->cxhdl, 1); 931 clear_bit(CX18_F_I_EOS, &cx->i_flags); 932 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK); 933 } 934 935 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle, 936 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem, 937 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem); 938 939 /* Init all the cpu_mdls for this stream */ 940 cx18_stream_configure_mdls(s); 941 _cx18_stream_load_fw_queue(s); 942 943 /* begin_capture */ 944 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) { 945 CX18_DEBUG_WARN("Error starting capture!\n"); 946 /* Ensure we're really not capturing before releasing MDLs */ 947 set_bit(CX18_F_S_STOPPING, &s->s_flags); 948 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 949 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1); 950 else 951 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); 952 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 953 /* FIXME - CX18_F_S_STREAMOFF as well? */ 954 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); 955 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); 956 s->handle = CX18_INVALID_TASK_HANDLE; 957 clear_bit(CX18_F_S_STOPPING, &s->s_flags); 958 if (atomic_read(&cx->tot_capturing) == 0) { 959 set_bit(CX18_F_I_EOS, &cx->i_flags); 960 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); 961 } 962 return -EINVAL; 963 } 964 965 /* you're live! sit back and await interrupts :) */ 966 if (captype != CAPTURE_CHANNEL_TYPE_TS) 967 atomic_inc(&cx->ana_capturing); 968 atomic_inc(&cx->tot_capturing); 969 return 0; 970 } 971 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream); 972 973 void cx18_stop_all_captures(struct cx18 *cx) 974 { 975 int i; 976 977 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { 978 struct cx18_stream *s = &cx->streams[i]; 979 980 if (!cx18_stream_enabled(s)) 981 continue; 982 if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) 983 cx18_stop_v4l2_encode_stream(s, 0); 984 } 985 } 986 987 int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end) 988 { 989 struct cx18 *cx = s->cx; 990 991 if (!cx18_stream_enabled(s)) 992 return -EINVAL; 993 994 /* This function assumes that you are allowed to stop the capture 995 and that we are actually capturing */ 996 997 CX18_DEBUG_INFO("Stop Capture\n"); 998 999 if (atomic_read(&cx->tot_capturing) == 0) 1000 return 0; 1001 1002 set_bit(CX18_F_S_STOPPING, &s->s_flags); 1003 if (s->type == CX18_ENC_STREAM_TYPE_MPG) 1004 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end); 1005 else 1006 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); 1007 1008 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) { 1009 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n"); 1010 } 1011 1012 if (s->type != CX18_ENC_STREAM_TYPE_TS) 1013 atomic_dec(&cx->ana_capturing); 1014 atomic_dec(&cx->tot_capturing); 1015 1016 /* Clear capture and no-read bits */ 1017 clear_bit(CX18_F_S_STREAMING, &s->s_flags); 1018 1019 /* Tell the CX23418 it can't use our buffers anymore */ 1020 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); 1021 1022 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); 1023 s->handle = CX18_INVALID_TASK_HANDLE; 1024 clear_bit(CX18_F_S_STOPPING, &s->s_flags); 1025 1026 if (atomic_read(&cx->tot_capturing) > 0) 1027 return 0; 1028 1029 cx2341x_handler_set_busy(&cx->cxhdl, 0); 1030 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); 1031 wake_up(&s->waitq); 1032 1033 return 0; 1034 } 1035 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream); 1036 1037 u32 cx18_find_handle(struct cx18 *cx) 1038 { 1039 int i; 1040 1041 /* find first available handle to be used for global settings */ 1042 for (i = 0; i < CX18_MAX_STREAMS; i++) { 1043 struct cx18_stream *s = &cx->streams[i]; 1044 1045 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE)) 1046 return s->handle; 1047 } 1048 return CX18_INVALID_TASK_HANDLE; 1049 } 1050 1051 struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle) 1052 { 1053 int i; 1054 struct cx18_stream *s; 1055 1056 if (handle == CX18_INVALID_TASK_HANDLE) 1057 return NULL; 1058 1059 for (i = 0; i < CX18_MAX_STREAMS; i++) { 1060 s = &cx->streams[i]; 1061 if (s->handle != handle) 1062 continue; 1063 if (cx18_stream_enabled(s)) 1064 return s; 1065 } 1066 return NULL; 1067 } 1068