1 /* 2 * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates. 3 * All rights reserved. 4 * 5 * This program is free software; you may redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 16 * SOFTWARE. 17 */ 18 19 #ifndef M00389_CVI_MEMMAP_PACKAGE_H 20 #define M00389_CVI_MEMMAP_PACKAGE_H 21 22 /******************************************************************* 23 * Register Block 24 * M00389_CVI_MEMMAP_PACKAGE_VHD_REGMAP 25 *******************************************************************/ 26 struct m00389_cvi_regmap { 27 uint32_t control; /* Reg 0x0000, Default=0x0 */ 28 uint32_t frame_width; /* Reg 0x0004, Default=0x10 */ 29 uint32_t frame_height; /* Reg 0x0008, Default=0xc */ 30 uint32_t freewheel_period; /* Reg 0x000c, Default=0x0 */ 31 uint32_t error_color; /* Reg 0x0010, Default=0x0 */ 32 uint32_t status; /* Reg 0x0014 */ 33 }; 34 35 #define M00389_CVI_REG_CONTROL_OFST 0 36 #define M00389_CVI_REG_FRAME_WIDTH_OFST 4 37 #define M00389_CVI_REG_FRAME_HEIGHT_OFST 8 38 #define M00389_CVI_REG_FREEWHEEL_PERIOD_OFST 12 39 #define M00389_CVI_REG_ERROR_COLOR_OFST 16 40 #define M00389_CVI_REG_STATUS_OFST 20 41 42 /******************************************************************* 43 * Bit Mask for register 44 * M00389_CVI_MEMMAP_PACKAGE_VHD_BITMAP 45 *******************************************************************/ 46 /* control [2:0] */ 47 #define M00389_CONTROL_BITMAP_ENABLE_OFST (0) 48 #define M00389_CONTROL_BITMAP_ENABLE_MSK (0x1 << M00389_CONTROL_BITMAP_ENABLE_OFST) 49 #define M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST (1) 50 #define M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_MSK (0x1 << M00389_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST) 51 #define M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST (2) 52 #define M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_MSK (0x1 << M00389_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST) 53 /* status [1:0] */ 54 #define M00389_STATUS_BITMAP_LOCK_OFST (0) 55 #define M00389_STATUS_BITMAP_LOCK_MSK (0x1 << M00389_STATUS_BITMAP_LOCK_OFST) 56 #define M00389_STATUS_BITMAP_ERROR_OFST (1) 57 #define M00389_STATUS_BITMAP_ERROR_MSK (0x1 << M00389_STATUS_BITMAP_ERROR_OFST) 58 59 #endif /*M00389_CVI_MEMMAP_PACKAGE_H*/ 60