1d30bb512STodor Tomov // SPDX-License-Identifier: GPL-2.0 2d30bb512STodor Tomov /* 3d30bb512STodor Tomov * Driver for the OV7251 camera sensor. 4d30bb512STodor Tomov * 5d30bb512STodor Tomov * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. 6d30bb512STodor Tomov * Copyright (c) 2017-2018, Linaro Ltd. 7d30bb512STodor Tomov */ 8d30bb512STodor Tomov 9d30bb512STodor Tomov #include <linux/bitops.h> 10d30bb512STodor Tomov #include <linux/clk.h> 11d30bb512STodor Tomov #include <linux/delay.h> 12d30bb512STodor Tomov #include <linux/device.h> 13d30bb512STodor Tomov #include <linux/gpio/consumer.h> 14d30bb512STodor Tomov #include <linux/i2c.h> 15d30bb512STodor Tomov #include <linux/init.h> 16d30bb512STodor Tomov #include <linux/module.h> 176766cff6SDaniel Scally #include <linux/mod_devicetable.h> 18d30bb512STodor Tomov #include <linux/regulator/consumer.h> 19d30bb512STodor Tomov #include <linux/slab.h> 20d30bb512STodor Tomov #include <linux/types.h> 21d30bb512STodor Tomov #include <media/v4l2-ctrls.h> 22d30bb512STodor Tomov #include <media/v4l2-fwnode.h> 23d30bb512STodor Tomov #include <media/v4l2-subdev.h> 24d30bb512STodor Tomov 25d30bb512STodor Tomov #define OV7251_SC_MODE_SELECT 0x0100 26d30bb512STodor Tomov #define OV7251_SC_MODE_SELECT_SW_STANDBY 0x0 27d30bb512STodor Tomov #define OV7251_SC_MODE_SELECT_STREAMING 0x1 28d30bb512STodor Tomov 29d30bb512STodor Tomov #define OV7251_CHIP_ID_HIGH 0x300a 30d30bb512STodor Tomov #define OV7251_CHIP_ID_HIGH_BYTE 0x77 31d30bb512STodor Tomov #define OV7251_CHIP_ID_LOW 0x300b 32d30bb512STodor Tomov #define OV7251_CHIP_ID_LOW_BYTE 0x50 33d30bb512STodor Tomov #define OV7251_SC_GP_IO_IN1 0x3029 34d30bb512STodor Tomov #define OV7251_AEC_EXPO_0 0x3500 35d30bb512STodor Tomov #define OV7251_AEC_EXPO_1 0x3501 36d30bb512STodor Tomov #define OV7251_AEC_EXPO_2 0x3502 37d30bb512STodor Tomov #define OV7251_AEC_AGC_ADJ_0 0x350a 38d30bb512STodor Tomov #define OV7251_AEC_AGC_ADJ_1 0x350b 39d30bb512STodor Tomov #define OV7251_TIMING_FORMAT1 0x3820 40d30bb512STodor Tomov #define OV7251_TIMING_FORMAT1_VFLIP BIT(2) 41d30bb512STodor Tomov #define OV7251_TIMING_FORMAT2 0x3821 42d30bb512STodor Tomov #define OV7251_TIMING_FORMAT2_MIRROR BIT(2) 43d30bb512STodor Tomov #define OV7251_PRE_ISP_00 0x5e00 44d30bb512STodor Tomov #define OV7251_PRE_ISP_00_TEST_PATTERN BIT(7) 45d30bb512STodor Tomov 46d30bb512STodor Tomov struct reg_value { 47d30bb512STodor Tomov u16 reg; 48d30bb512STodor Tomov u8 val; 49d30bb512STodor Tomov }; 50d30bb512STodor Tomov 51d30bb512STodor Tomov struct ov7251_mode_info { 52d30bb512STodor Tomov u32 width; 53d30bb512STodor Tomov u32 height; 54d30bb512STodor Tomov const struct reg_value *data; 55d30bb512STodor Tomov u32 data_size; 56d30bb512STodor Tomov u32 pixel_clock; 57d30bb512STodor Tomov u32 link_freq; 58d30bb512STodor Tomov u16 exposure_max; 59d30bb512STodor Tomov u16 exposure_def; 60d30bb512STodor Tomov struct v4l2_fract timeperframe; 61d30bb512STodor Tomov }; 62d30bb512STodor Tomov 63*cc125aaaSDaniel Scally enum supported_link_freqs { 64*cc125aaaSDaniel Scally OV7251_LINK_FREQ_240_MHZ, 65*cc125aaaSDaniel Scally OV7251_NUM_SUPPORTED_LINK_FREQS 66*cc125aaaSDaniel Scally }; 67*cc125aaaSDaniel Scally 68d30bb512STodor Tomov struct ov7251 { 69d30bb512STodor Tomov struct i2c_client *i2c_client; 70d30bb512STodor Tomov struct device *dev; 71d30bb512STodor Tomov struct v4l2_subdev sd; 72d30bb512STodor Tomov struct media_pad pad; 73d30bb512STodor Tomov struct v4l2_fwnode_endpoint ep; 74d30bb512STodor Tomov struct v4l2_mbus_framefmt fmt; 75d30bb512STodor Tomov struct v4l2_rect crop; 76d30bb512STodor Tomov struct clk *xclk; 77d30bb512STodor Tomov u32 xclk_freq; 78d30bb512STodor Tomov 79d30bb512STodor Tomov struct regulator *io_regulator; 80d30bb512STodor Tomov struct regulator *core_regulator; 81d30bb512STodor Tomov struct regulator *analog_regulator; 82d30bb512STodor Tomov 83*cc125aaaSDaniel Scally enum supported_link_freqs link_freq_idx; 84d30bb512STodor Tomov const struct ov7251_mode_info *current_mode; 85d30bb512STodor Tomov 86d30bb512STodor Tomov struct v4l2_ctrl_handler ctrls; 87d30bb512STodor Tomov struct v4l2_ctrl *pixel_clock; 88d30bb512STodor Tomov struct v4l2_ctrl *link_freq; 89d30bb512STodor Tomov struct v4l2_ctrl *exposure; 90d30bb512STodor Tomov struct v4l2_ctrl *gain; 91d30bb512STodor Tomov 92d30bb512STodor Tomov /* Cached register values */ 93d30bb512STodor Tomov u8 aec_pk_manual; 94d30bb512STodor Tomov u8 pre_isp_00; 95d30bb512STodor Tomov u8 timing_format1; 96d30bb512STodor Tomov u8 timing_format2; 97d30bb512STodor Tomov 98d30bb512STodor Tomov struct mutex lock; /* lock to protect power state, ctrls and mode */ 99d30bb512STodor Tomov bool power_on; 100d30bb512STodor Tomov 101d30bb512STodor Tomov struct gpio_desc *enable_gpio; 102d30bb512STodor Tomov }; 103d30bb512STodor Tomov 104d30bb512STodor Tomov static inline struct ov7251 *to_ov7251(struct v4l2_subdev *sd) 105d30bb512STodor Tomov { 106d30bb512STodor Tomov return container_of(sd, struct ov7251, sd); 107d30bb512STodor Tomov } 108d30bb512STodor Tomov 109d30bb512STodor Tomov static const struct reg_value ov7251_global_init_setting[] = { 110d30bb512STodor Tomov { 0x0103, 0x01 }, 111d30bb512STodor Tomov { 0x303b, 0x02 }, 112d30bb512STodor Tomov }; 113d30bb512STodor Tomov 114d30bb512STodor Tomov static const struct reg_value ov7251_setting_vga_30fps[] = { 115d30bb512STodor Tomov { 0x3005, 0x00 }, 116d30bb512STodor Tomov { 0x3012, 0xc0 }, 117d30bb512STodor Tomov { 0x3013, 0xd2 }, 118d30bb512STodor Tomov { 0x3014, 0x04 }, 119d30bb512STodor Tomov { 0x3016, 0xf0 }, 120d30bb512STodor Tomov { 0x3017, 0xf0 }, 121d30bb512STodor Tomov { 0x3018, 0xf0 }, 122d30bb512STodor Tomov { 0x301a, 0xf0 }, 123d30bb512STodor Tomov { 0x301b, 0xf0 }, 124d30bb512STodor Tomov { 0x301c, 0xf0 }, 125d30bb512STodor Tomov { 0x3023, 0x05 }, 126d30bb512STodor Tomov { 0x3037, 0xf0 }, 127d30bb512STodor Tomov { 0x3098, 0x04 }, /* pll2 pre divider */ 128d30bb512STodor Tomov { 0x3099, 0x28 }, /* pll2 multiplier */ 129d30bb512STodor Tomov { 0x309a, 0x05 }, /* pll2 sys divider */ 130d30bb512STodor Tomov { 0x309b, 0x04 }, /* pll2 adc divider */ 131d30bb512STodor Tomov { 0x309d, 0x00 }, /* pll2 divider */ 132d30bb512STodor Tomov { 0x30b0, 0x0a }, /* pll1 pix divider */ 133d30bb512STodor Tomov { 0x30b1, 0x01 }, /* pll1 divider */ 134d30bb512STodor Tomov { 0x30b3, 0x64 }, /* pll1 multiplier */ 135d30bb512STodor Tomov { 0x30b4, 0x03 }, /* pll1 pre divider */ 136d30bb512STodor Tomov { 0x30b5, 0x05 }, /* pll1 mipi divider */ 137d30bb512STodor Tomov { 0x3106, 0xda }, 138d30bb512STodor Tomov { 0x3503, 0x07 }, 139d30bb512STodor Tomov { 0x3509, 0x10 }, 140d30bb512STodor Tomov { 0x3600, 0x1c }, 141d30bb512STodor Tomov { 0x3602, 0x62 }, 142d30bb512STodor Tomov { 0x3620, 0xb7 }, 143d30bb512STodor Tomov { 0x3622, 0x04 }, 144d30bb512STodor Tomov { 0x3626, 0x21 }, 145d30bb512STodor Tomov { 0x3627, 0x30 }, 146d30bb512STodor Tomov { 0x3630, 0x44 }, 147d30bb512STodor Tomov { 0x3631, 0x35 }, 148d30bb512STodor Tomov { 0x3634, 0x60 }, 149d30bb512STodor Tomov { 0x3636, 0x00 }, 150d30bb512STodor Tomov { 0x3662, 0x01 }, 151d30bb512STodor Tomov { 0x3663, 0x70 }, 152d30bb512STodor Tomov { 0x3664, 0x50 }, 153d30bb512STodor Tomov { 0x3666, 0x0a }, 154d30bb512STodor Tomov { 0x3669, 0x1a }, 155d30bb512STodor Tomov { 0x366a, 0x00 }, 156d30bb512STodor Tomov { 0x366b, 0x50 }, 157d30bb512STodor Tomov { 0x3673, 0x01 }, 158d30bb512STodor Tomov { 0x3674, 0xff }, 159d30bb512STodor Tomov { 0x3675, 0x03 }, 160d30bb512STodor Tomov { 0x3705, 0xc1 }, 161d30bb512STodor Tomov { 0x3709, 0x40 }, 162d30bb512STodor Tomov { 0x373c, 0x08 }, 163d30bb512STodor Tomov { 0x3742, 0x00 }, 164d30bb512STodor Tomov { 0x3757, 0xb3 }, 165d30bb512STodor Tomov { 0x3788, 0x00 }, 166d30bb512STodor Tomov { 0x37a8, 0x01 }, 167d30bb512STodor Tomov { 0x37a9, 0xc0 }, 168d30bb512STodor Tomov { 0x3800, 0x00 }, 169d30bb512STodor Tomov { 0x3801, 0x04 }, 170d30bb512STodor Tomov { 0x3802, 0x00 }, 171d30bb512STodor Tomov { 0x3803, 0x04 }, 172d30bb512STodor Tomov { 0x3804, 0x02 }, 173d30bb512STodor Tomov { 0x3805, 0x8b }, 174d30bb512STodor Tomov { 0x3806, 0x01 }, 175d30bb512STodor Tomov { 0x3807, 0xeb }, 176d30bb512STodor Tomov { 0x3808, 0x02 }, /* width high */ 177d30bb512STodor Tomov { 0x3809, 0x80 }, /* width low */ 178d30bb512STodor Tomov { 0x380a, 0x01 }, /* height high */ 179d30bb512STodor Tomov { 0x380b, 0xe0 }, /* height low */ 180d30bb512STodor Tomov { 0x380c, 0x03 }, /* total horiz timing high */ 181d30bb512STodor Tomov { 0x380d, 0xa0 }, /* total horiz timing low */ 182d30bb512STodor Tomov { 0x380e, 0x06 }, /* total vertical timing high */ 183d30bb512STodor Tomov { 0x380f, 0xbc }, /* total vertical timing low */ 184d30bb512STodor Tomov { 0x3810, 0x00 }, 185d30bb512STodor Tomov { 0x3811, 0x04 }, 186d30bb512STodor Tomov { 0x3812, 0x00 }, 187d30bb512STodor Tomov { 0x3813, 0x05 }, 188d30bb512STodor Tomov { 0x3814, 0x11 }, 189d30bb512STodor Tomov { 0x3815, 0x11 }, 190d30bb512STodor Tomov { 0x3820, 0x40 }, 191d30bb512STodor Tomov { 0x3821, 0x00 }, 192d30bb512STodor Tomov { 0x382f, 0x0e }, 193d30bb512STodor Tomov { 0x3832, 0x00 }, 194d30bb512STodor Tomov { 0x3833, 0x05 }, 195d30bb512STodor Tomov { 0x3834, 0x00 }, 196d30bb512STodor Tomov { 0x3835, 0x0c }, 197d30bb512STodor Tomov { 0x3837, 0x00 }, 198d30bb512STodor Tomov { 0x3b80, 0x00 }, 199d30bb512STodor Tomov { 0x3b81, 0xa5 }, 200d30bb512STodor Tomov { 0x3b82, 0x10 }, 201d30bb512STodor Tomov { 0x3b83, 0x00 }, 202d30bb512STodor Tomov { 0x3b84, 0x08 }, 203d30bb512STodor Tomov { 0x3b85, 0x00 }, 204d30bb512STodor Tomov { 0x3b86, 0x01 }, 205d30bb512STodor Tomov { 0x3b87, 0x00 }, 206d30bb512STodor Tomov { 0x3b88, 0x00 }, 207d30bb512STodor Tomov { 0x3b89, 0x00 }, 208d30bb512STodor Tomov { 0x3b8a, 0x00 }, 209d30bb512STodor Tomov { 0x3b8b, 0x05 }, 210d30bb512STodor Tomov { 0x3b8c, 0x00 }, 211d30bb512STodor Tomov { 0x3b8d, 0x00 }, 212d30bb512STodor Tomov { 0x3b8e, 0x00 }, 213d30bb512STodor Tomov { 0x3b8f, 0x1a }, 214d30bb512STodor Tomov { 0x3b94, 0x05 }, 215d30bb512STodor Tomov { 0x3b95, 0xf2 }, 216d30bb512STodor Tomov { 0x3b96, 0x40 }, 217d30bb512STodor Tomov { 0x3c00, 0x89 }, 218d30bb512STodor Tomov { 0x3c01, 0x63 }, 219d30bb512STodor Tomov { 0x3c02, 0x01 }, 220d30bb512STodor Tomov { 0x3c03, 0x00 }, 221d30bb512STodor Tomov { 0x3c04, 0x00 }, 222d30bb512STodor Tomov { 0x3c05, 0x03 }, 223d30bb512STodor Tomov { 0x3c06, 0x00 }, 224d30bb512STodor Tomov { 0x3c07, 0x06 }, 225d30bb512STodor Tomov { 0x3c0c, 0x01 }, 226d30bb512STodor Tomov { 0x3c0d, 0xd0 }, 227d30bb512STodor Tomov { 0x3c0e, 0x02 }, 228d30bb512STodor Tomov { 0x3c0f, 0x0a }, 229d30bb512STodor Tomov { 0x4001, 0x42 }, 230d30bb512STodor Tomov { 0x4004, 0x04 }, 231d30bb512STodor Tomov { 0x4005, 0x00 }, 232d30bb512STodor Tomov { 0x404e, 0x01 }, 233d30bb512STodor Tomov { 0x4300, 0xff }, 234d30bb512STodor Tomov { 0x4301, 0x00 }, 235d30bb512STodor Tomov { 0x4315, 0x00 }, 236d30bb512STodor Tomov { 0x4501, 0x48 }, 237d30bb512STodor Tomov { 0x4600, 0x00 }, 238d30bb512STodor Tomov { 0x4601, 0x4e }, 239d30bb512STodor Tomov { 0x4801, 0x0f }, 240d30bb512STodor Tomov { 0x4806, 0x0f }, 241d30bb512STodor Tomov { 0x4819, 0xaa }, 242d30bb512STodor Tomov { 0x4823, 0x3e }, 243d30bb512STodor Tomov { 0x4837, 0x19 }, 244d30bb512STodor Tomov { 0x4a0d, 0x00 }, 245d30bb512STodor Tomov { 0x4a47, 0x7f }, 246d30bb512STodor Tomov { 0x4a49, 0xf0 }, 247d30bb512STodor Tomov { 0x4a4b, 0x30 }, 248d30bb512STodor Tomov { 0x5000, 0x85 }, 249d30bb512STodor Tomov { 0x5001, 0x80 }, 250d30bb512STodor Tomov }; 251d30bb512STodor Tomov 252d30bb512STodor Tomov static const struct reg_value ov7251_setting_vga_60fps[] = { 253d30bb512STodor Tomov { 0x3005, 0x00 }, 254d30bb512STodor Tomov { 0x3012, 0xc0 }, 255d30bb512STodor Tomov { 0x3013, 0xd2 }, 256d30bb512STodor Tomov { 0x3014, 0x04 }, 257d30bb512STodor Tomov { 0x3016, 0x10 }, 258d30bb512STodor Tomov { 0x3017, 0x00 }, 259d30bb512STodor Tomov { 0x3018, 0x00 }, 260d30bb512STodor Tomov { 0x301a, 0x00 }, 261d30bb512STodor Tomov { 0x301b, 0x00 }, 262d30bb512STodor Tomov { 0x301c, 0x00 }, 263d30bb512STodor Tomov { 0x3023, 0x05 }, 264d30bb512STodor Tomov { 0x3037, 0xf0 }, 265d30bb512STodor Tomov { 0x3098, 0x04 }, /* pll2 pre divider */ 266d30bb512STodor Tomov { 0x3099, 0x28 }, /* pll2 multiplier */ 267d30bb512STodor Tomov { 0x309a, 0x05 }, /* pll2 sys divider */ 268d30bb512STodor Tomov { 0x309b, 0x04 }, /* pll2 adc divider */ 269d30bb512STodor Tomov { 0x309d, 0x00 }, /* pll2 divider */ 270d30bb512STodor Tomov { 0x30b0, 0x0a }, /* pll1 pix divider */ 271d30bb512STodor Tomov { 0x30b1, 0x01 }, /* pll1 divider */ 272d30bb512STodor Tomov { 0x30b3, 0x64 }, /* pll1 multiplier */ 273d30bb512STodor Tomov { 0x30b4, 0x03 }, /* pll1 pre divider */ 274d30bb512STodor Tomov { 0x30b5, 0x05 }, /* pll1 mipi divider */ 275d30bb512STodor Tomov { 0x3106, 0xda }, 276d30bb512STodor Tomov { 0x3503, 0x07 }, 277d30bb512STodor Tomov { 0x3509, 0x10 }, 278d30bb512STodor Tomov { 0x3600, 0x1c }, 279d30bb512STodor Tomov { 0x3602, 0x62 }, 280d30bb512STodor Tomov { 0x3620, 0xb7 }, 281d30bb512STodor Tomov { 0x3622, 0x04 }, 282d30bb512STodor Tomov { 0x3626, 0x21 }, 283d30bb512STodor Tomov { 0x3627, 0x30 }, 284d30bb512STodor Tomov { 0x3630, 0x44 }, 285d30bb512STodor Tomov { 0x3631, 0x35 }, 286d30bb512STodor Tomov { 0x3634, 0x60 }, 287d30bb512STodor Tomov { 0x3636, 0x00 }, 288d30bb512STodor Tomov { 0x3662, 0x01 }, 289d30bb512STodor Tomov { 0x3663, 0x70 }, 290d30bb512STodor Tomov { 0x3664, 0x50 }, 291d30bb512STodor Tomov { 0x3666, 0x0a }, 292d30bb512STodor Tomov { 0x3669, 0x1a }, 293d30bb512STodor Tomov { 0x366a, 0x00 }, 294d30bb512STodor Tomov { 0x366b, 0x50 }, 295d30bb512STodor Tomov { 0x3673, 0x01 }, 296d30bb512STodor Tomov { 0x3674, 0xff }, 297d30bb512STodor Tomov { 0x3675, 0x03 }, 298d30bb512STodor Tomov { 0x3705, 0xc1 }, 299d30bb512STodor Tomov { 0x3709, 0x40 }, 300d30bb512STodor Tomov { 0x373c, 0x08 }, 301d30bb512STodor Tomov { 0x3742, 0x00 }, 302d30bb512STodor Tomov { 0x3757, 0xb3 }, 303d30bb512STodor Tomov { 0x3788, 0x00 }, 304d30bb512STodor Tomov { 0x37a8, 0x01 }, 305d30bb512STodor Tomov { 0x37a9, 0xc0 }, 306d30bb512STodor Tomov { 0x3800, 0x00 }, 307d30bb512STodor Tomov { 0x3801, 0x04 }, 308d30bb512STodor Tomov { 0x3802, 0x00 }, 309d30bb512STodor Tomov { 0x3803, 0x04 }, 310d30bb512STodor Tomov { 0x3804, 0x02 }, 311d30bb512STodor Tomov { 0x3805, 0x8b }, 312d30bb512STodor Tomov { 0x3806, 0x01 }, 313d30bb512STodor Tomov { 0x3807, 0xeb }, 314d30bb512STodor Tomov { 0x3808, 0x02 }, /* width high */ 315d30bb512STodor Tomov { 0x3809, 0x80 }, /* width low */ 316d30bb512STodor Tomov { 0x380a, 0x01 }, /* height high */ 317d30bb512STodor Tomov { 0x380b, 0xe0 }, /* height low */ 318d30bb512STodor Tomov { 0x380c, 0x03 }, /* total horiz timing high */ 319d30bb512STodor Tomov { 0x380d, 0xa0 }, /* total horiz timing low */ 320d30bb512STodor Tomov { 0x380e, 0x03 }, /* total vertical timing high */ 321d30bb512STodor Tomov { 0x380f, 0x5c }, /* total vertical timing low */ 322d30bb512STodor Tomov { 0x3810, 0x00 }, 323d30bb512STodor Tomov { 0x3811, 0x04 }, 324d30bb512STodor Tomov { 0x3812, 0x00 }, 325d30bb512STodor Tomov { 0x3813, 0x05 }, 326d30bb512STodor Tomov { 0x3814, 0x11 }, 327d30bb512STodor Tomov { 0x3815, 0x11 }, 328d30bb512STodor Tomov { 0x3820, 0x40 }, 329d30bb512STodor Tomov { 0x3821, 0x00 }, 330d30bb512STodor Tomov { 0x382f, 0x0e }, 331d30bb512STodor Tomov { 0x3832, 0x00 }, 332d30bb512STodor Tomov { 0x3833, 0x05 }, 333d30bb512STodor Tomov { 0x3834, 0x00 }, 334d30bb512STodor Tomov { 0x3835, 0x0c }, 335d30bb512STodor Tomov { 0x3837, 0x00 }, 336d30bb512STodor Tomov { 0x3b80, 0x00 }, 337d30bb512STodor Tomov { 0x3b81, 0xa5 }, 338d30bb512STodor Tomov { 0x3b82, 0x10 }, 339d30bb512STodor Tomov { 0x3b83, 0x00 }, 340d30bb512STodor Tomov { 0x3b84, 0x08 }, 341d30bb512STodor Tomov { 0x3b85, 0x00 }, 342d30bb512STodor Tomov { 0x3b86, 0x01 }, 343d30bb512STodor Tomov { 0x3b87, 0x00 }, 344d30bb512STodor Tomov { 0x3b88, 0x00 }, 345d30bb512STodor Tomov { 0x3b89, 0x00 }, 346d30bb512STodor Tomov { 0x3b8a, 0x00 }, 347d30bb512STodor Tomov { 0x3b8b, 0x05 }, 348d30bb512STodor Tomov { 0x3b8c, 0x00 }, 349d30bb512STodor Tomov { 0x3b8d, 0x00 }, 350d30bb512STodor Tomov { 0x3b8e, 0x00 }, 351d30bb512STodor Tomov { 0x3b8f, 0x1a }, 352d30bb512STodor Tomov { 0x3b94, 0x05 }, 353d30bb512STodor Tomov { 0x3b95, 0xf2 }, 354d30bb512STodor Tomov { 0x3b96, 0x40 }, 355d30bb512STodor Tomov { 0x3c00, 0x89 }, 356d30bb512STodor Tomov { 0x3c01, 0x63 }, 357d30bb512STodor Tomov { 0x3c02, 0x01 }, 358d30bb512STodor Tomov { 0x3c03, 0x00 }, 359d30bb512STodor Tomov { 0x3c04, 0x00 }, 360d30bb512STodor Tomov { 0x3c05, 0x03 }, 361d30bb512STodor Tomov { 0x3c06, 0x00 }, 362d30bb512STodor Tomov { 0x3c07, 0x06 }, 363d30bb512STodor Tomov { 0x3c0c, 0x01 }, 364d30bb512STodor Tomov { 0x3c0d, 0xd0 }, 365d30bb512STodor Tomov { 0x3c0e, 0x02 }, 366d30bb512STodor Tomov { 0x3c0f, 0x0a }, 367d30bb512STodor Tomov { 0x4001, 0x42 }, 368d30bb512STodor Tomov { 0x4004, 0x04 }, 369d30bb512STodor Tomov { 0x4005, 0x00 }, 370d30bb512STodor Tomov { 0x404e, 0x01 }, 371d30bb512STodor Tomov { 0x4300, 0xff }, 372d30bb512STodor Tomov { 0x4301, 0x00 }, 373d30bb512STodor Tomov { 0x4315, 0x00 }, 374d30bb512STodor Tomov { 0x4501, 0x48 }, 375d30bb512STodor Tomov { 0x4600, 0x00 }, 376d30bb512STodor Tomov { 0x4601, 0x4e }, 377d30bb512STodor Tomov { 0x4801, 0x0f }, 378d30bb512STodor Tomov { 0x4806, 0x0f }, 379d30bb512STodor Tomov { 0x4819, 0xaa }, 380d30bb512STodor Tomov { 0x4823, 0x3e }, 381d30bb512STodor Tomov { 0x4837, 0x19 }, 382d30bb512STodor Tomov { 0x4a0d, 0x00 }, 383d30bb512STodor Tomov { 0x4a47, 0x7f }, 384d30bb512STodor Tomov { 0x4a49, 0xf0 }, 385d30bb512STodor Tomov { 0x4a4b, 0x30 }, 386d30bb512STodor Tomov { 0x5000, 0x85 }, 387d30bb512STodor Tomov { 0x5001, 0x80 }, 388d30bb512STodor Tomov }; 389d30bb512STodor Tomov 390d30bb512STodor Tomov static const struct reg_value ov7251_setting_vga_90fps[] = { 391d30bb512STodor Tomov { 0x3005, 0x00 }, 392d30bb512STodor Tomov { 0x3012, 0xc0 }, 393d30bb512STodor Tomov { 0x3013, 0xd2 }, 394d30bb512STodor Tomov { 0x3014, 0x04 }, 395d30bb512STodor Tomov { 0x3016, 0x10 }, 396d30bb512STodor Tomov { 0x3017, 0x00 }, 397d30bb512STodor Tomov { 0x3018, 0x00 }, 398d30bb512STodor Tomov { 0x301a, 0x00 }, 399d30bb512STodor Tomov { 0x301b, 0x00 }, 400d30bb512STodor Tomov { 0x301c, 0x00 }, 401d30bb512STodor Tomov { 0x3023, 0x05 }, 402d30bb512STodor Tomov { 0x3037, 0xf0 }, 403d30bb512STodor Tomov { 0x3098, 0x04 }, /* pll2 pre divider */ 404d30bb512STodor Tomov { 0x3099, 0x28 }, /* pll2 multiplier */ 405d30bb512STodor Tomov { 0x309a, 0x05 }, /* pll2 sys divider */ 406d30bb512STodor Tomov { 0x309b, 0x04 }, /* pll2 adc divider */ 407d30bb512STodor Tomov { 0x309d, 0x00 }, /* pll2 divider */ 408d30bb512STodor Tomov { 0x30b0, 0x0a }, /* pll1 pix divider */ 409d30bb512STodor Tomov { 0x30b1, 0x01 }, /* pll1 divider */ 410d30bb512STodor Tomov { 0x30b3, 0x64 }, /* pll1 multiplier */ 411d30bb512STodor Tomov { 0x30b4, 0x03 }, /* pll1 pre divider */ 412d30bb512STodor Tomov { 0x30b5, 0x05 }, /* pll1 mipi divider */ 413d30bb512STodor Tomov { 0x3106, 0xda }, 414d30bb512STodor Tomov { 0x3503, 0x07 }, 415d30bb512STodor Tomov { 0x3509, 0x10 }, 416d30bb512STodor Tomov { 0x3600, 0x1c }, 417d30bb512STodor Tomov { 0x3602, 0x62 }, 418d30bb512STodor Tomov { 0x3620, 0xb7 }, 419d30bb512STodor Tomov { 0x3622, 0x04 }, 420d30bb512STodor Tomov { 0x3626, 0x21 }, 421d30bb512STodor Tomov { 0x3627, 0x30 }, 422d30bb512STodor Tomov { 0x3630, 0x44 }, 423d30bb512STodor Tomov { 0x3631, 0x35 }, 424d30bb512STodor Tomov { 0x3634, 0x60 }, 425d30bb512STodor Tomov { 0x3636, 0x00 }, 426d30bb512STodor Tomov { 0x3662, 0x01 }, 427d30bb512STodor Tomov { 0x3663, 0x70 }, 428d30bb512STodor Tomov { 0x3664, 0x50 }, 429d30bb512STodor Tomov { 0x3666, 0x0a }, 430d30bb512STodor Tomov { 0x3669, 0x1a }, 431d30bb512STodor Tomov { 0x366a, 0x00 }, 432d30bb512STodor Tomov { 0x366b, 0x50 }, 433d30bb512STodor Tomov { 0x3673, 0x01 }, 434d30bb512STodor Tomov { 0x3674, 0xff }, 435d30bb512STodor Tomov { 0x3675, 0x03 }, 436d30bb512STodor Tomov { 0x3705, 0xc1 }, 437d30bb512STodor Tomov { 0x3709, 0x40 }, 438d30bb512STodor Tomov { 0x373c, 0x08 }, 439d30bb512STodor Tomov { 0x3742, 0x00 }, 440d30bb512STodor Tomov { 0x3757, 0xb3 }, 441d30bb512STodor Tomov { 0x3788, 0x00 }, 442d30bb512STodor Tomov { 0x37a8, 0x01 }, 443d30bb512STodor Tomov { 0x37a9, 0xc0 }, 444d30bb512STodor Tomov { 0x3800, 0x00 }, 445d30bb512STodor Tomov { 0x3801, 0x04 }, 446d30bb512STodor Tomov { 0x3802, 0x00 }, 447d30bb512STodor Tomov { 0x3803, 0x04 }, 448d30bb512STodor Tomov { 0x3804, 0x02 }, 449d30bb512STodor Tomov { 0x3805, 0x8b }, 450d30bb512STodor Tomov { 0x3806, 0x01 }, 451d30bb512STodor Tomov { 0x3807, 0xeb }, 452d30bb512STodor Tomov { 0x3808, 0x02 }, /* width high */ 453d30bb512STodor Tomov { 0x3809, 0x80 }, /* width low */ 454d30bb512STodor Tomov { 0x380a, 0x01 }, /* height high */ 455d30bb512STodor Tomov { 0x380b, 0xe0 }, /* height low */ 456d30bb512STodor Tomov { 0x380c, 0x03 }, /* total horiz timing high */ 457d30bb512STodor Tomov { 0x380d, 0xa0 }, /* total horiz timing low */ 458d30bb512STodor Tomov { 0x380e, 0x02 }, /* total vertical timing high */ 459d30bb512STodor Tomov { 0x380f, 0x3c }, /* total vertical timing low */ 460d30bb512STodor Tomov { 0x3810, 0x00 }, 461d30bb512STodor Tomov { 0x3811, 0x04 }, 462d30bb512STodor Tomov { 0x3812, 0x00 }, 463d30bb512STodor Tomov { 0x3813, 0x05 }, 464d30bb512STodor Tomov { 0x3814, 0x11 }, 465d30bb512STodor Tomov { 0x3815, 0x11 }, 466d30bb512STodor Tomov { 0x3820, 0x40 }, 467d30bb512STodor Tomov { 0x3821, 0x00 }, 468d30bb512STodor Tomov { 0x382f, 0x0e }, 469d30bb512STodor Tomov { 0x3832, 0x00 }, 470d30bb512STodor Tomov { 0x3833, 0x05 }, 471d30bb512STodor Tomov { 0x3834, 0x00 }, 472d30bb512STodor Tomov { 0x3835, 0x0c }, 473d30bb512STodor Tomov { 0x3837, 0x00 }, 474d30bb512STodor Tomov { 0x3b80, 0x00 }, 475d30bb512STodor Tomov { 0x3b81, 0xa5 }, 476d30bb512STodor Tomov { 0x3b82, 0x10 }, 477d30bb512STodor Tomov { 0x3b83, 0x00 }, 478d30bb512STodor Tomov { 0x3b84, 0x08 }, 479d30bb512STodor Tomov { 0x3b85, 0x00 }, 480d30bb512STodor Tomov { 0x3b86, 0x01 }, 481d30bb512STodor Tomov { 0x3b87, 0x00 }, 482d30bb512STodor Tomov { 0x3b88, 0x00 }, 483d30bb512STodor Tomov { 0x3b89, 0x00 }, 484d30bb512STodor Tomov { 0x3b8a, 0x00 }, 485d30bb512STodor Tomov { 0x3b8b, 0x05 }, 486d30bb512STodor Tomov { 0x3b8c, 0x00 }, 487d30bb512STodor Tomov { 0x3b8d, 0x00 }, 488d30bb512STodor Tomov { 0x3b8e, 0x00 }, 489d30bb512STodor Tomov { 0x3b8f, 0x1a }, 490d30bb512STodor Tomov { 0x3b94, 0x05 }, 491d30bb512STodor Tomov { 0x3b95, 0xf2 }, 492d30bb512STodor Tomov { 0x3b96, 0x40 }, 493d30bb512STodor Tomov { 0x3c00, 0x89 }, 494d30bb512STodor Tomov { 0x3c01, 0x63 }, 495d30bb512STodor Tomov { 0x3c02, 0x01 }, 496d30bb512STodor Tomov { 0x3c03, 0x00 }, 497d30bb512STodor Tomov { 0x3c04, 0x00 }, 498d30bb512STodor Tomov { 0x3c05, 0x03 }, 499d30bb512STodor Tomov { 0x3c06, 0x00 }, 500d30bb512STodor Tomov { 0x3c07, 0x06 }, 501d30bb512STodor Tomov { 0x3c0c, 0x01 }, 502d30bb512STodor Tomov { 0x3c0d, 0xd0 }, 503d30bb512STodor Tomov { 0x3c0e, 0x02 }, 504d30bb512STodor Tomov { 0x3c0f, 0x0a }, 505d30bb512STodor Tomov { 0x4001, 0x42 }, 506d30bb512STodor Tomov { 0x4004, 0x04 }, 507d30bb512STodor Tomov { 0x4005, 0x00 }, 508d30bb512STodor Tomov { 0x404e, 0x01 }, 509d30bb512STodor Tomov { 0x4300, 0xff }, 510d30bb512STodor Tomov { 0x4301, 0x00 }, 511d30bb512STodor Tomov { 0x4315, 0x00 }, 512d30bb512STodor Tomov { 0x4501, 0x48 }, 513d30bb512STodor Tomov { 0x4600, 0x00 }, 514d30bb512STodor Tomov { 0x4601, 0x4e }, 515d30bb512STodor Tomov { 0x4801, 0x0f }, 516d30bb512STodor Tomov { 0x4806, 0x0f }, 517d30bb512STodor Tomov { 0x4819, 0xaa }, 518d30bb512STodor Tomov { 0x4823, 0x3e }, 519d30bb512STodor Tomov { 0x4837, 0x19 }, 520d30bb512STodor Tomov { 0x4a0d, 0x00 }, 521d30bb512STodor Tomov { 0x4a47, 0x7f }, 522d30bb512STodor Tomov { 0x4a49, 0xf0 }, 523d30bb512STodor Tomov { 0x4a4b, 0x30 }, 524d30bb512STodor Tomov { 0x5000, 0x85 }, 525d30bb512STodor Tomov { 0x5001, 0x80 }, 526d30bb512STodor Tomov }; 527d30bb512STodor Tomov 528d30bb512STodor Tomov static const s64 link_freq[] = { 529d30bb512STodor Tomov 240000000, 530d30bb512STodor Tomov }; 531d30bb512STodor Tomov 532d30bb512STodor Tomov static const struct ov7251_mode_info ov7251_mode_info_data[] = { 533d30bb512STodor Tomov { 534d30bb512STodor Tomov .width = 640, 535d30bb512STodor Tomov .height = 480, 536d30bb512STodor Tomov .data = ov7251_setting_vga_30fps, 537d30bb512STodor Tomov .data_size = ARRAY_SIZE(ov7251_setting_vga_30fps), 538d30bb512STodor Tomov .pixel_clock = 48000000, 539d30bb512STodor Tomov .link_freq = 0, /* an index in link_freq[] */ 540d30bb512STodor Tomov .exposure_max = 1704, 541d30bb512STodor Tomov .exposure_def = 504, 542d30bb512STodor Tomov .timeperframe = { 543d30bb512STodor Tomov .numerator = 100, 544d30bb512STodor Tomov .denominator = 3000 545d30bb512STodor Tomov } 546d30bb512STodor Tomov }, 547d30bb512STodor Tomov { 548d30bb512STodor Tomov .width = 640, 549d30bb512STodor Tomov .height = 480, 550d30bb512STodor Tomov .data = ov7251_setting_vga_60fps, 551d30bb512STodor Tomov .data_size = ARRAY_SIZE(ov7251_setting_vga_60fps), 552d30bb512STodor Tomov .pixel_clock = 48000000, 553d30bb512STodor Tomov .link_freq = 0, /* an index in link_freq[] */ 554d30bb512STodor Tomov .exposure_max = 840, 555d30bb512STodor Tomov .exposure_def = 504, 556d30bb512STodor Tomov .timeperframe = { 557d30bb512STodor Tomov .numerator = 100, 558d30bb512STodor Tomov .denominator = 6014 559d30bb512STodor Tomov } 560d30bb512STodor Tomov }, 561d30bb512STodor Tomov { 562d30bb512STodor Tomov .width = 640, 563d30bb512STodor Tomov .height = 480, 564d30bb512STodor Tomov .data = ov7251_setting_vga_90fps, 565d30bb512STodor Tomov .data_size = ARRAY_SIZE(ov7251_setting_vga_90fps), 566d30bb512STodor Tomov .pixel_clock = 48000000, 567d30bb512STodor Tomov .link_freq = 0, /* an index in link_freq[] */ 568d30bb512STodor Tomov .exposure_max = 552, 569d30bb512STodor Tomov .exposure_def = 504, 570d30bb512STodor Tomov .timeperframe = { 571d30bb512STodor Tomov .numerator = 100, 572d30bb512STodor Tomov .denominator = 9043 573d30bb512STodor Tomov } 574d30bb512STodor Tomov }, 575d30bb512STodor Tomov }; 576d30bb512STodor Tomov 577d30bb512STodor Tomov static int ov7251_regulators_enable(struct ov7251 *ov7251) 578d30bb512STodor Tomov { 579d30bb512STodor Tomov int ret; 580d30bb512STodor Tomov 581d30bb512STodor Tomov /* OV7251 power up sequence requires core regulator 582d30bb512STodor Tomov * to be enabled not earlier than io regulator 583d30bb512STodor Tomov */ 584d30bb512STodor Tomov 585d30bb512STodor Tomov ret = regulator_enable(ov7251->io_regulator); 586d30bb512STodor Tomov if (ret < 0) { 587d30bb512STodor Tomov dev_err(ov7251->dev, "set io voltage failed\n"); 588d30bb512STodor Tomov return ret; 589d30bb512STodor Tomov } 590d30bb512STodor Tomov 591d30bb512STodor Tomov ret = regulator_enable(ov7251->analog_regulator); 592d30bb512STodor Tomov if (ret) { 593d30bb512STodor Tomov dev_err(ov7251->dev, "set analog voltage failed\n"); 594d30bb512STodor Tomov goto err_disable_io; 595d30bb512STodor Tomov } 596d30bb512STodor Tomov 597d30bb512STodor Tomov ret = regulator_enable(ov7251->core_regulator); 598d30bb512STodor Tomov if (ret) { 599d30bb512STodor Tomov dev_err(ov7251->dev, "set core voltage failed\n"); 600d30bb512STodor Tomov goto err_disable_analog; 601d30bb512STodor Tomov } 602d30bb512STodor Tomov 603d30bb512STodor Tomov return 0; 604d30bb512STodor Tomov 605d30bb512STodor Tomov err_disable_analog: 606d30bb512STodor Tomov regulator_disable(ov7251->analog_regulator); 607d30bb512STodor Tomov 608d30bb512STodor Tomov err_disable_io: 609d30bb512STodor Tomov regulator_disable(ov7251->io_regulator); 610d30bb512STodor Tomov 611d30bb512STodor Tomov return ret; 612d30bb512STodor Tomov } 613d30bb512STodor Tomov 614d30bb512STodor Tomov static void ov7251_regulators_disable(struct ov7251 *ov7251) 615d30bb512STodor Tomov { 616d30bb512STodor Tomov int ret; 617d30bb512STodor Tomov 618d30bb512STodor Tomov ret = regulator_disable(ov7251->core_regulator); 619d30bb512STodor Tomov if (ret < 0) 620d30bb512STodor Tomov dev_err(ov7251->dev, "core regulator disable failed\n"); 621d30bb512STodor Tomov 622d30bb512STodor Tomov ret = regulator_disable(ov7251->analog_regulator); 623d30bb512STodor Tomov if (ret < 0) 624d30bb512STodor Tomov dev_err(ov7251->dev, "analog regulator disable failed\n"); 625d30bb512STodor Tomov 626d30bb512STodor Tomov ret = regulator_disable(ov7251->io_regulator); 627d30bb512STodor Tomov if (ret < 0) 628d30bb512STodor Tomov dev_err(ov7251->dev, "io regulator disable failed\n"); 629d30bb512STodor Tomov } 630d30bb512STodor Tomov 631d30bb512STodor Tomov static int ov7251_write_reg(struct ov7251 *ov7251, u16 reg, u8 val) 632d30bb512STodor Tomov { 633d30bb512STodor Tomov u8 regbuf[3]; 634d30bb512STodor Tomov int ret; 635d30bb512STodor Tomov 636d30bb512STodor Tomov regbuf[0] = reg >> 8; 637d30bb512STodor Tomov regbuf[1] = reg & 0xff; 638d30bb512STodor Tomov regbuf[2] = val; 639d30bb512STodor Tomov 640d30bb512STodor Tomov ret = i2c_master_send(ov7251->i2c_client, regbuf, 3); 641d30bb512STodor Tomov if (ret < 0) { 642d30bb512STodor Tomov dev_err(ov7251->dev, "%s: write reg error %d: reg=%x, val=%x\n", 643d30bb512STodor Tomov __func__, ret, reg, val); 644d30bb512STodor Tomov return ret; 645d30bb512STodor Tomov } 646d30bb512STodor Tomov 647d30bb512STodor Tomov return 0; 648d30bb512STodor Tomov } 649d30bb512STodor Tomov 650d30bb512STodor Tomov static int ov7251_write_seq_regs(struct ov7251 *ov7251, u16 reg, u8 *val, 651d30bb512STodor Tomov u8 num) 652d30bb512STodor Tomov { 653d30bb512STodor Tomov u8 regbuf[5]; 654d30bb512STodor Tomov u8 nregbuf = sizeof(reg) + num * sizeof(*val); 655d30bb512STodor Tomov int ret = 0; 656d30bb512STodor Tomov 657d30bb512STodor Tomov if (nregbuf > sizeof(regbuf)) 658d30bb512STodor Tomov return -EINVAL; 659d30bb512STodor Tomov 660d30bb512STodor Tomov regbuf[0] = reg >> 8; 661d30bb512STodor Tomov regbuf[1] = reg & 0xff; 662d30bb512STodor Tomov 663d30bb512STodor Tomov memcpy(regbuf + 2, val, num); 664d30bb512STodor Tomov 665d30bb512STodor Tomov ret = i2c_master_send(ov7251->i2c_client, regbuf, nregbuf); 666d30bb512STodor Tomov if (ret < 0) { 667d30bb512STodor Tomov dev_err(ov7251->dev, 668d30bb512STodor Tomov "%s: write seq regs error %d: first reg=%x\n", 669d30bb512STodor Tomov __func__, ret, reg); 670d30bb512STodor Tomov return ret; 671d30bb512STodor Tomov } 672d30bb512STodor Tomov 673d30bb512STodor Tomov return 0; 674d30bb512STodor Tomov } 675d30bb512STodor Tomov 676d30bb512STodor Tomov static int ov7251_read_reg(struct ov7251 *ov7251, u16 reg, u8 *val) 677d30bb512STodor Tomov { 678d30bb512STodor Tomov u8 regbuf[2]; 679d30bb512STodor Tomov int ret; 680d30bb512STodor Tomov 681d30bb512STodor Tomov regbuf[0] = reg >> 8; 682d30bb512STodor Tomov regbuf[1] = reg & 0xff; 683d30bb512STodor Tomov 684d30bb512STodor Tomov ret = i2c_master_send(ov7251->i2c_client, regbuf, 2); 685d30bb512STodor Tomov if (ret < 0) { 686d30bb512STodor Tomov dev_err(ov7251->dev, "%s: write reg error %d: reg=%x\n", 687d30bb512STodor Tomov __func__, ret, reg); 688d30bb512STodor Tomov return ret; 689d30bb512STodor Tomov } 690d30bb512STodor Tomov 691d30bb512STodor Tomov ret = i2c_master_recv(ov7251->i2c_client, val, 1); 692d30bb512STodor Tomov if (ret < 0) { 693d30bb512STodor Tomov dev_err(ov7251->dev, "%s: read reg error %d: reg=%x\n", 694d30bb512STodor Tomov __func__, ret, reg); 695d30bb512STodor Tomov return ret; 696d30bb512STodor Tomov } 697d30bb512STodor Tomov 698d30bb512STodor Tomov return 0; 699d30bb512STodor Tomov } 700d30bb512STodor Tomov 701d30bb512STodor Tomov static int ov7251_set_exposure(struct ov7251 *ov7251, s32 exposure) 702d30bb512STodor Tomov { 703d30bb512STodor Tomov u16 reg; 704d30bb512STodor Tomov u8 val[3]; 705d30bb512STodor Tomov 706d30bb512STodor Tomov reg = OV7251_AEC_EXPO_0; 707d30bb512STodor Tomov val[0] = (exposure & 0xf000) >> 12; /* goes to OV7251_AEC_EXPO_0 */ 708d30bb512STodor Tomov val[1] = (exposure & 0x0ff0) >> 4; /* goes to OV7251_AEC_EXPO_1 */ 709d30bb512STodor Tomov val[2] = (exposure & 0x000f) << 4; /* goes to OV7251_AEC_EXPO_2 */ 710d30bb512STodor Tomov 711d30bb512STodor Tomov return ov7251_write_seq_regs(ov7251, reg, val, 3); 712d30bb512STodor Tomov } 713d30bb512STodor Tomov 714d30bb512STodor Tomov static int ov7251_set_gain(struct ov7251 *ov7251, s32 gain) 715d30bb512STodor Tomov { 716d30bb512STodor Tomov u16 reg; 717d30bb512STodor Tomov u8 val[2]; 718d30bb512STodor Tomov 719d30bb512STodor Tomov reg = OV7251_AEC_AGC_ADJ_0; 720d30bb512STodor Tomov val[0] = (gain & 0x0300) >> 8; /* goes to OV7251_AEC_AGC_ADJ_0 */ 721d30bb512STodor Tomov val[1] = gain & 0xff; /* goes to OV7251_AEC_AGC_ADJ_1 */ 722d30bb512STodor Tomov 723d30bb512STodor Tomov return ov7251_write_seq_regs(ov7251, reg, val, 2); 724d30bb512STodor Tomov } 725d30bb512STodor Tomov 726d30bb512STodor Tomov static int ov7251_set_register_array(struct ov7251 *ov7251, 727d30bb512STodor Tomov const struct reg_value *settings, 728d30bb512STodor Tomov unsigned int num_settings) 729d30bb512STodor Tomov { 730d30bb512STodor Tomov unsigned int i; 731d30bb512STodor Tomov int ret; 732d30bb512STodor Tomov 733d30bb512STodor Tomov for (i = 0; i < num_settings; ++i, ++settings) { 734d30bb512STodor Tomov ret = ov7251_write_reg(ov7251, settings->reg, settings->val); 735d30bb512STodor Tomov if (ret < 0) 736d30bb512STodor Tomov return ret; 737d30bb512STodor Tomov } 738d30bb512STodor Tomov 739d30bb512STodor Tomov return 0; 740d30bb512STodor Tomov } 741d30bb512STodor Tomov 742d30bb512STodor Tomov static int ov7251_set_power_on(struct ov7251 *ov7251) 743d30bb512STodor Tomov { 744d30bb512STodor Tomov int ret; 745d30bb512STodor Tomov u32 wait_us; 746d30bb512STodor Tomov 747d30bb512STodor Tomov ret = ov7251_regulators_enable(ov7251); 748d30bb512STodor Tomov if (ret < 0) 749d30bb512STodor Tomov return ret; 750d30bb512STodor Tomov 751d30bb512STodor Tomov ret = clk_prepare_enable(ov7251->xclk); 752d30bb512STodor Tomov if (ret < 0) { 753d30bb512STodor Tomov dev_err(ov7251->dev, "clk prepare enable failed\n"); 754d30bb512STodor Tomov ov7251_regulators_disable(ov7251); 755d30bb512STodor Tomov return ret; 756d30bb512STodor Tomov } 757d30bb512STodor Tomov 758d30bb512STodor Tomov gpiod_set_value_cansleep(ov7251->enable_gpio, 1); 759d30bb512STodor Tomov 760d30bb512STodor Tomov /* wait at least 65536 external clock cycles */ 761d30bb512STodor Tomov wait_us = DIV_ROUND_UP(65536 * 1000, 762d30bb512STodor Tomov DIV_ROUND_UP(ov7251->xclk_freq, 1000)); 763d30bb512STodor Tomov usleep_range(wait_us, wait_us + 1000); 764d30bb512STodor Tomov 765d30bb512STodor Tomov return 0; 766d30bb512STodor Tomov } 767d30bb512STodor Tomov 768d30bb512STodor Tomov static void ov7251_set_power_off(struct ov7251 *ov7251) 769d30bb512STodor Tomov { 770d30bb512STodor Tomov clk_disable_unprepare(ov7251->xclk); 771d30bb512STodor Tomov gpiod_set_value_cansleep(ov7251->enable_gpio, 0); 772d30bb512STodor Tomov ov7251_regulators_disable(ov7251); 773d30bb512STodor Tomov } 774d30bb512STodor Tomov 775d30bb512STodor Tomov static int ov7251_s_power(struct v4l2_subdev *sd, int on) 776d30bb512STodor Tomov { 777d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(sd); 778d30bb512STodor Tomov int ret = 0; 779d30bb512STodor Tomov 780d30bb512STodor Tomov mutex_lock(&ov7251->lock); 781d30bb512STodor Tomov 782d30bb512STodor Tomov /* If the power state is not modified - no work to do. */ 783d30bb512STodor Tomov if (ov7251->power_on == !!on) 784d30bb512STodor Tomov goto exit; 785d30bb512STodor Tomov 786d30bb512STodor Tomov if (on) { 787d30bb512STodor Tomov ret = ov7251_set_power_on(ov7251); 788d30bb512STodor Tomov if (ret < 0) 789d30bb512STodor Tomov goto exit; 790d30bb512STodor Tomov 791d30bb512STodor Tomov ret = ov7251_set_register_array(ov7251, 792d30bb512STodor Tomov ov7251_global_init_setting, 793d30bb512STodor Tomov ARRAY_SIZE(ov7251_global_init_setting)); 794d30bb512STodor Tomov if (ret < 0) { 795d30bb512STodor Tomov dev_err(ov7251->dev, "could not set init registers\n"); 796d30bb512STodor Tomov ov7251_set_power_off(ov7251); 797d30bb512STodor Tomov goto exit; 798d30bb512STodor Tomov } 799d30bb512STodor Tomov 800d30bb512STodor Tomov ov7251->power_on = true; 801d30bb512STodor Tomov } else { 802d30bb512STodor Tomov ov7251_set_power_off(ov7251); 803d30bb512STodor Tomov ov7251->power_on = false; 804d30bb512STodor Tomov } 805d30bb512STodor Tomov 806d30bb512STodor Tomov exit: 807d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 808d30bb512STodor Tomov 809d30bb512STodor Tomov return ret; 810d30bb512STodor Tomov } 811d30bb512STodor Tomov 812d30bb512STodor Tomov static int ov7251_set_hflip(struct ov7251 *ov7251, s32 value) 813d30bb512STodor Tomov { 814d30bb512STodor Tomov u8 val = ov7251->timing_format2; 815d30bb512STodor Tomov int ret; 816d30bb512STodor Tomov 817d30bb512STodor Tomov if (value) 818d30bb512STodor Tomov val |= OV7251_TIMING_FORMAT2_MIRROR; 819d30bb512STodor Tomov else 820d30bb512STodor Tomov val &= ~OV7251_TIMING_FORMAT2_MIRROR; 821d30bb512STodor Tomov 822d30bb512STodor Tomov ret = ov7251_write_reg(ov7251, OV7251_TIMING_FORMAT2, val); 823d30bb512STodor Tomov if (!ret) 824d30bb512STodor Tomov ov7251->timing_format2 = val; 825d30bb512STodor Tomov 826d30bb512STodor Tomov return ret; 827d30bb512STodor Tomov } 828d30bb512STodor Tomov 829d30bb512STodor Tomov static int ov7251_set_vflip(struct ov7251 *ov7251, s32 value) 830d30bb512STodor Tomov { 831d30bb512STodor Tomov u8 val = ov7251->timing_format1; 832d30bb512STodor Tomov int ret; 833d30bb512STodor Tomov 834d30bb512STodor Tomov if (value) 835d30bb512STodor Tomov val |= OV7251_TIMING_FORMAT1_VFLIP; 836d30bb512STodor Tomov else 837d30bb512STodor Tomov val &= ~OV7251_TIMING_FORMAT1_VFLIP; 838d30bb512STodor Tomov 839d30bb512STodor Tomov ret = ov7251_write_reg(ov7251, OV7251_TIMING_FORMAT1, val); 840d30bb512STodor Tomov if (!ret) 841d30bb512STodor Tomov ov7251->timing_format1 = val; 842d30bb512STodor Tomov 843d30bb512STodor Tomov return ret; 844d30bb512STodor Tomov } 845d30bb512STodor Tomov 846d30bb512STodor Tomov static int ov7251_set_test_pattern(struct ov7251 *ov7251, s32 value) 847d30bb512STodor Tomov { 848d30bb512STodor Tomov u8 val = ov7251->pre_isp_00; 849d30bb512STodor Tomov int ret; 850d30bb512STodor Tomov 851d30bb512STodor Tomov if (value) 852d30bb512STodor Tomov val |= OV7251_PRE_ISP_00_TEST_PATTERN; 853d30bb512STodor Tomov else 854d30bb512STodor Tomov val &= ~OV7251_PRE_ISP_00_TEST_PATTERN; 855d30bb512STodor Tomov 856d30bb512STodor Tomov ret = ov7251_write_reg(ov7251, OV7251_PRE_ISP_00, val); 857d30bb512STodor Tomov if (!ret) 858d30bb512STodor Tomov ov7251->pre_isp_00 = val; 859d30bb512STodor Tomov 860d30bb512STodor Tomov return ret; 861d30bb512STodor Tomov } 862d30bb512STodor Tomov 863d30bb512STodor Tomov static const char * const ov7251_test_pattern_menu[] = { 864d30bb512STodor Tomov "Disabled", 865d30bb512STodor Tomov "Vertical Pattern Bars", 866d30bb512STodor Tomov }; 867d30bb512STodor Tomov 868d30bb512STodor Tomov static int ov7251_s_ctrl(struct v4l2_ctrl *ctrl) 869d30bb512STodor Tomov { 870d30bb512STodor Tomov struct ov7251 *ov7251 = container_of(ctrl->handler, 871d30bb512STodor Tomov struct ov7251, ctrls); 872d30bb512STodor Tomov int ret; 873d30bb512STodor Tomov 874d30bb512STodor Tomov /* v4l2_ctrl_lock() locks our mutex */ 875d30bb512STodor Tomov 876d30bb512STodor Tomov if (!ov7251->power_on) 877d30bb512STodor Tomov return 0; 878d30bb512STodor Tomov 879d30bb512STodor Tomov switch (ctrl->id) { 880d30bb512STodor Tomov case V4L2_CID_EXPOSURE: 881d30bb512STodor Tomov ret = ov7251_set_exposure(ov7251, ctrl->val); 882d30bb512STodor Tomov break; 883d30bb512STodor Tomov case V4L2_CID_GAIN: 884d30bb512STodor Tomov ret = ov7251_set_gain(ov7251, ctrl->val); 885d30bb512STodor Tomov break; 886d30bb512STodor Tomov case V4L2_CID_TEST_PATTERN: 887d30bb512STodor Tomov ret = ov7251_set_test_pattern(ov7251, ctrl->val); 888d30bb512STodor Tomov break; 889d30bb512STodor Tomov case V4L2_CID_HFLIP: 890d30bb512STodor Tomov ret = ov7251_set_hflip(ov7251, ctrl->val); 891d30bb512STodor Tomov break; 892d30bb512STodor Tomov case V4L2_CID_VFLIP: 893d30bb512STodor Tomov ret = ov7251_set_vflip(ov7251, ctrl->val); 894d30bb512STodor Tomov break; 895d30bb512STodor Tomov default: 896d30bb512STodor Tomov ret = -EINVAL; 897d30bb512STodor Tomov break; 898d30bb512STodor Tomov } 899d30bb512STodor Tomov 900d30bb512STodor Tomov return ret; 901d30bb512STodor Tomov } 902d30bb512STodor Tomov 903d30bb512STodor Tomov static const struct v4l2_ctrl_ops ov7251_ctrl_ops = { 904d30bb512STodor Tomov .s_ctrl = ov7251_s_ctrl, 905d30bb512STodor Tomov }; 906d30bb512STodor Tomov 907d30bb512STodor Tomov static int ov7251_enum_mbus_code(struct v4l2_subdev *sd, 9080d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 909d30bb512STodor Tomov struct v4l2_subdev_mbus_code_enum *code) 910d30bb512STodor Tomov { 911d30bb512STodor Tomov if (code->index > 0) 912d30bb512STodor Tomov return -EINVAL; 913d30bb512STodor Tomov 914d30bb512STodor Tomov code->code = MEDIA_BUS_FMT_Y10_1X10; 915d30bb512STodor Tomov 916d30bb512STodor Tomov return 0; 917d30bb512STodor Tomov } 918d30bb512STodor Tomov 919d30bb512STodor Tomov static int ov7251_enum_frame_size(struct v4l2_subdev *subdev, 9200d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 921d30bb512STodor Tomov struct v4l2_subdev_frame_size_enum *fse) 922d30bb512STodor Tomov { 923d30bb512STodor Tomov if (fse->code != MEDIA_BUS_FMT_Y10_1X10) 924d30bb512STodor Tomov return -EINVAL; 925d30bb512STodor Tomov 926d30bb512STodor Tomov if (fse->index >= ARRAY_SIZE(ov7251_mode_info_data)) 927d30bb512STodor Tomov return -EINVAL; 928d30bb512STodor Tomov 929d30bb512STodor Tomov fse->min_width = ov7251_mode_info_data[fse->index].width; 930d30bb512STodor Tomov fse->max_width = ov7251_mode_info_data[fse->index].width; 931d30bb512STodor Tomov fse->min_height = ov7251_mode_info_data[fse->index].height; 932d30bb512STodor Tomov fse->max_height = ov7251_mode_info_data[fse->index].height; 933d30bb512STodor Tomov 934d30bb512STodor Tomov return 0; 935d30bb512STodor Tomov } 936d30bb512STodor Tomov 937d30bb512STodor Tomov static int ov7251_enum_frame_ival(struct v4l2_subdev *subdev, 9380d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 939d30bb512STodor Tomov struct v4l2_subdev_frame_interval_enum *fie) 940d30bb512STodor Tomov { 941d30bb512STodor Tomov unsigned int index = fie->index; 942d30bb512STodor Tomov unsigned int i; 943d30bb512STodor Tomov 944d30bb512STodor Tomov for (i = 0; i < ARRAY_SIZE(ov7251_mode_info_data); i++) { 945d30bb512STodor Tomov if (fie->width != ov7251_mode_info_data[i].width || 946d30bb512STodor Tomov fie->height != ov7251_mode_info_data[i].height) 947d30bb512STodor Tomov continue; 948d30bb512STodor Tomov 949d30bb512STodor Tomov if (index-- == 0) { 950d30bb512STodor Tomov fie->interval = ov7251_mode_info_data[i].timeperframe; 951d30bb512STodor Tomov return 0; 952d30bb512STodor Tomov } 953d30bb512STodor Tomov } 954d30bb512STodor Tomov 955d30bb512STodor Tomov return -EINVAL; 956d30bb512STodor Tomov } 957d30bb512STodor Tomov 958d30bb512STodor Tomov static struct v4l2_mbus_framefmt * 959d30bb512STodor Tomov __ov7251_get_pad_format(struct ov7251 *ov7251, 9600d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 961d30bb512STodor Tomov unsigned int pad, 962d30bb512STodor Tomov enum v4l2_subdev_format_whence which) 963d30bb512STodor Tomov { 964d30bb512STodor Tomov switch (which) { 965d30bb512STodor Tomov case V4L2_SUBDEV_FORMAT_TRY: 9660d346d2aSTomi Valkeinen return v4l2_subdev_get_try_format(&ov7251->sd, sd_state, pad); 967d30bb512STodor Tomov case V4L2_SUBDEV_FORMAT_ACTIVE: 968d30bb512STodor Tomov return &ov7251->fmt; 969d30bb512STodor Tomov default: 970d30bb512STodor Tomov return NULL; 971d30bb512STodor Tomov } 972d30bb512STodor Tomov } 973d30bb512STodor Tomov 974d30bb512STodor Tomov static int ov7251_get_format(struct v4l2_subdev *sd, 9750d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 976d30bb512STodor Tomov struct v4l2_subdev_format *format) 977d30bb512STodor Tomov { 978d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(sd); 979d30bb512STodor Tomov 980d30bb512STodor Tomov mutex_lock(&ov7251->lock); 9810d346d2aSTomi Valkeinen format->format = *__ov7251_get_pad_format(ov7251, sd_state, 9820d346d2aSTomi Valkeinen format->pad, 983d30bb512STodor Tomov format->which); 984d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 985d30bb512STodor Tomov 986d30bb512STodor Tomov return 0; 987d30bb512STodor Tomov } 988d30bb512STodor Tomov 989d30bb512STodor Tomov static struct v4l2_rect * 9900d346d2aSTomi Valkeinen __ov7251_get_pad_crop(struct ov7251 *ov7251, 9910d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 992d30bb512STodor Tomov unsigned int pad, enum v4l2_subdev_format_whence which) 993d30bb512STodor Tomov { 994d30bb512STodor Tomov switch (which) { 995d30bb512STodor Tomov case V4L2_SUBDEV_FORMAT_TRY: 9960d346d2aSTomi Valkeinen return v4l2_subdev_get_try_crop(&ov7251->sd, sd_state, pad); 997d30bb512STodor Tomov case V4L2_SUBDEV_FORMAT_ACTIVE: 998d30bb512STodor Tomov return &ov7251->crop; 999d30bb512STodor Tomov default: 1000d30bb512STodor Tomov return NULL; 1001d30bb512STodor Tomov } 1002d30bb512STodor Tomov } 1003d30bb512STodor Tomov 1004d30bb512STodor Tomov static inline u32 avg_fps(const struct v4l2_fract *t) 1005d30bb512STodor Tomov { 1006d30bb512STodor Tomov return (t->denominator + (t->numerator >> 1)) / t->numerator; 1007d30bb512STodor Tomov } 1008d30bb512STodor Tomov 1009d30bb512STodor Tomov static const struct ov7251_mode_info * 1010d30bb512STodor Tomov ov7251_find_mode_by_ival(struct ov7251 *ov7251, struct v4l2_fract *timeperframe) 1011d30bb512STodor Tomov { 1012d30bb512STodor Tomov const struct ov7251_mode_info *mode = ov7251->current_mode; 1013d30bb512STodor Tomov unsigned int fps_req = avg_fps(timeperframe); 1014d30bb512STodor Tomov unsigned int max_dist_match = (unsigned int) -1; 1015d30bb512STodor Tomov unsigned int i, n = 0; 1016d30bb512STodor Tomov 1017d30bb512STodor Tomov for (i = 0; i < ARRAY_SIZE(ov7251_mode_info_data); i++) { 1018d30bb512STodor Tomov unsigned int dist; 1019d30bb512STodor Tomov unsigned int fps_tmp; 1020d30bb512STodor Tomov 1021d30bb512STodor Tomov if (mode->width != ov7251_mode_info_data[i].width || 1022d30bb512STodor Tomov mode->height != ov7251_mode_info_data[i].height) 1023d30bb512STodor Tomov continue; 1024d30bb512STodor Tomov 1025d30bb512STodor Tomov fps_tmp = avg_fps(&ov7251_mode_info_data[i].timeperframe); 1026d30bb512STodor Tomov 1027d30bb512STodor Tomov dist = abs(fps_req - fps_tmp); 1028d30bb512STodor Tomov 1029d30bb512STodor Tomov if (dist < max_dist_match) { 1030d30bb512STodor Tomov n = i; 1031d30bb512STodor Tomov max_dist_match = dist; 1032d30bb512STodor Tomov } 1033d30bb512STodor Tomov } 1034d30bb512STodor Tomov 1035d30bb512STodor Tomov return &ov7251_mode_info_data[n]; 1036d30bb512STodor Tomov } 1037d30bb512STodor Tomov 1038d30bb512STodor Tomov static int ov7251_set_format(struct v4l2_subdev *sd, 10390d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 1040d30bb512STodor Tomov struct v4l2_subdev_format *format) 1041d30bb512STodor Tomov { 1042d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(sd); 1043d30bb512STodor Tomov struct v4l2_mbus_framefmt *__format; 1044d30bb512STodor Tomov struct v4l2_rect *__crop; 1045d30bb512STodor Tomov const struct ov7251_mode_info *new_mode; 1046d30bb512STodor Tomov int ret = 0; 1047d30bb512STodor Tomov 1048d30bb512STodor Tomov mutex_lock(&ov7251->lock); 1049d30bb512STodor Tomov 10500d346d2aSTomi Valkeinen __crop = __ov7251_get_pad_crop(ov7251, sd_state, format->pad, 10510d346d2aSTomi Valkeinen format->which); 1052d30bb512STodor Tomov 1053d30bb512STodor Tomov new_mode = v4l2_find_nearest_size(ov7251_mode_info_data, 1054d30bb512STodor Tomov ARRAY_SIZE(ov7251_mode_info_data), 1055d30bb512STodor Tomov width, height, 1056d30bb512STodor Tomov format->format.width, format->format.height); 1057d30bb512STodor Tomov 1058d30bb512STodor Tomov __crop->width = new_mode->width; 1059d30bb512STodor Tomov __crop->height = new_mode->height; 1060d30bb512STodor Tomov 1061d30bb512STodor Tomov if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 1062d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl_int64(ov7251->pixel_clock, 1063d30bb512STodor Tomov new_mode->pixel_clock); 1064d30bb512STodor Tomov if (ret < 0) 1065d30bb512STodor Tomov goto exit; 1066d30bb512STodor Tomov 1067d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl(ov7251->link_freq, 1068d30bb512STodor Tomov new_mode->link_freq); 1069d30bb512STodor Tomov if (ret < 0) 1070d30bb512STodor Tomov goto exit; 1071d30bb512STodor Tomov 1072d30bb512STodor Tomov ret = __v4l2_ctrl_modify_range(ov7251->exposure, 1073d30bb512STodor Tomov 1, new_mode->exposure_max, 1074d30bb512STodor Tomov 1, new_mode->exposure_def); 1075d30bb512STodor Tomov if (ret < 0) 1076d30bb512STodor Tomov goto exit; 1077d30bb512STodor Tomov 1078d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl(ov7251->exposure, 1079d30bb512STodor Tomov new_mode->exposure_def); 1080d30bb512STodor Tomov if (ret < 0) 1081d30bb512STodor Tomov goto exit; 1082d30bb512STodor Tomov 1083d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl(ov7251->gain, 16); 1084d30bb512STodor Tomov if (ret < 0) 1085d30bb512STodor Tomov goto exit; 1086d30bb512STodor Tomov 1087d30bb512STodor Tomov ov7251->current_mode = new_mode; 1088d30bb512STodor Tomov } 1089d30bb512STodor Tomov 10900d346d2aSTomi Valkeinen __format = __ov7251_get_pad_format(ov7251, sd_state, format->pad, 1091d30bb512STodor Tomov format->which); 1092d30bb512STodor Tomov __format->width = __crop->width; 1093d30bb512STodor Tomov __format->height = __crop->height; 1094d30bb512STodor Tomov __format->code = MEDIA_BUS_FMT_Y10_1X10; 1095d30bb512STodor Tomov __format->field = V4L2_FIELD_NONE; 1096d30bb512STodor Tomov __format->colorspace = V4L2_COLORSPACE_SRGB; 1097d30bb512STodor Tomov __format->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(__format->colorspace); 1098d30bb512STodor Tomov __format->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true, 1099d30bb512STodor Tomov __format->colorspace, __format->ycbcr_enc); 1100d30bb512STodor Tomov __format->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(__format->colorspace); 1101d30bb512STodor Tomov 1102d30bb512STodor Tomov format->format = *__format; 1103d30bb512STodor Tomov 1104d30bb512STodor Tomov exit: 1105d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 1106d30bb512STodor Tomov 1107d30bb512STodor Tomov return ret; 1108d30bb512STodor Tomov } 1109d30bb512STodor Tomov 1110d30bb512STodor Tomov static int ov7251_entity_init_cfg(struct v4l2_subdev *subdev, 11110d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state) 1112d30bb512STodor Tomov { 1113d30bb512STodor Tomov struct v4l2_subdev_format fmt = { 11140d346d2aSTomi Valkeinen .which = sd_state ? V4L2_SUBDEV_FORMAT_TRY 1115d30bb512STodor Tomov : V4L2_SUBDEV_FORMAT_ACTIVE, 1116d30bb512STodor Tomov .format = { 1117d30bb512STodor Tomov .width = 640, 1118d30bb512STodor Tomov .height = 480 1119d30bb512STodor Tomov } 1120d30bb512STodor Tomov }; 1121d30bb512STodor Tomov 11220d346d2aSTomi Valkeinen ov7251_set_format(subdev, sd_state, &fmt); 1123d30bb512STodor Tomov 1124d30bb512STodor Tomov return 0; 1125d30bb512STodor Tomov } 1126d30bb512STodor Tomov 1127d30bb512STodor Tomov static int ov7251_get_selection(struct v4l2_subdev *sd, 11280d346d2aSTomi Valkeinen struct v4l2_subdev_state *sd_state, 1129d30bb512STodor Tomov struct v4l2_subdev_selection *sel) 1130d30bb512STodor Tomov { 1131d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(sd); 1132d30bb512STodor Tomov 1133d30bb512STodor Tomov if (sel->target != V4L2_SEL_TGT_CROP) 1134d30bb512STodor Tomov return -EINVAL; 1135d30bb512STodor Tomov 1136d30bb512STodor Tomov mutex_lock(&ov7251->lock); 11370d346d2aSTomi Valkeinen sel->r = *__ov7251_get_pad_crop(ov7251, sd_state, sel->pad, 1138d30bb512STodor Tomov sel->which); 1139d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 1140d30bb512STodor Tomov 1141d30bb512STodor Tomov return 0; 1142d30bb512STodor Tomov } 1143d30bb512STodor Tomov 1144d30bb512STodor Tomov static int ov7251_s_stream(struct v4l2_subdev *subdev, int enable) 1145d30bb512STodor Tomov { 1146d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(subdev); 1147d30bb512STodor Tomov int ret; 1148d30bb512STodor Tomov 1149d30bb512STodor Tomov mutex_lock(&ov7251->lock); 1150d30bb512STodor Tomov 1151d30bb512STodor Tomov if (enable) { 1152d30bb512STodor Tomov ret = ov7251_set_register_array(ov7251, 1153d30bb512STodor Tomov ov7251->current_mode->data, 1154d30bb512STodor Tomov ov7251->current_mode->data_size); 1155d30bb512STodor Tomov if (ret < 0) { 1156d30bb512STodor Tomov dev_err(ov7251->dev, "could not set mode %dx%d\n", 1157d30bb512STodor Tomov ov7251->current_mode->width, 1158d30bb512STodor Tomov ov7251->current_mode->height); 1159d30bb512STodor Tomov goto exit; 1160d30bb512STodor Tomov } 1161d30bb512STodor Tomov ret = __v4l2_ctrl_handler_setup(&ov7251->ctrls); 1162d30bb512STodor Tomov if (ret < 0) { 1163d30bb512STodor Tomov dev_err(ov7251->dev, "could not sync v4l2 controls\n"); 1164d30bb512STodor Tomov goto exit; 1165d30bb512STodor Tomov } 1166d30bb512STodor Tomov ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT, 1167d30bb512STodor Tomov OV7251_SC_MODE_SELECT_STREAMING); 1168d30bb512STodor Tomov } else { 1169d30bb512STodor Tomov ret = ov7251_write_reg(ov7251, OV7251_SC_MODE_SELECT, 1170d30bb512STodor Tomov OV7251_SC_MODE_SELECT_SW_STANDBY); 1171d30bb512STodor Tomov } 1172d30bb512STodor Tomov 1173d30bb512STodor Tomov exit: 1174d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 1175d30bb512STodor Tomov 1176d30bb512STodor Tomov return ret; 1177d30bb512STodor Tomov } 1178d30bb512STodor Tomov 1179d30bb512STodor Tomov static int ov7251_get_frame_interval(struct v4l2_subdev *subdev, 1180d30bb512STodor Tomov struct v4l2_subdev_frame_interval *fi) 1181d30bb512STodor Tomov { 1182d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(subdev); 1183d30bb512STodor Tomov 1184d30bb512STodor Tomov mutex_lock(&ov7251->lock); 1185d30bb512STodor Tomov fi->interval = ov7251->current_mode->timeperframe; 1186d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 1187d30bb512STodor Tomov 1188d30bb512STodor Tomov return 0; 1189d30bb512STodor Tomov } 1190d30bb512STodor Tomov 1191d30bb512STodor Tomov static int ov7251_set_frame_interval(struct v4l2_subdev *subdev, 1192d30bb512STodor Tomov struct v4l2_subdev_frame_interval *fi) 1193d30bb512STodor Tomov { 1194d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(subdev); 1195d30bb512STodor Tomov const struct ov7251_mode_info *new_mode; 1196d30bb512STodor Tomov int ret = 0; 1197d30bb512STodor Tomov 1198d30bb512STodor Tomov mutex_lock(&ov7251->lock); 1199d30bb512STodor Tomov new_mode = ov7251_find_mode_by_ival(ov7251, &fi->interval); 1200d30bb512STodor Tomov 1201d30bb512STodor Tomov if (new_mode != ov7251->current_mode) { 1202d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl_int64(ov7251->pixel_clock, 1203d30bb512STodor Tomov new_mode->pixel_clock); 1204d30bb512STodor Tomov if (ret < 0) 1205d30bb512STodor Tomov goto exit; 1206d30bb512STodor Tomov 1207d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl(ov7251->link_freq, 1208d30bb512STodor Tomov new_mode->link_freq); 1209d30bb512STodor Tomov if (ret < 0) 1210d30bb512STodor Tomov goto exit; 1211d30bb512STodor Tomov 1212d30bb512STodor Tomov ret = __v4l2_ctrl_modify_range(ov7251->exposure, 1213d30bb512STodor Tomov 1, new_mode->exposure_max, 1214d30bb512STodor Tomov 1, new_mode->exposure_def); 1215d30bb512STodor Tomov if (ret < 0) 1216d30bb512STodor Tomov goto exit; 1217d30bb512STodor Tomov 1218d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl(ov7251->exposure, 1219d30bb512STodor Tomov new_mode->exposure_def); 1220d30bb512STodor Tomov if (ret < 0) 1221d30bb512STodor Tomov goto exit; 1222d30bb512STodor Tomov 1223d30bb512STodor Tomov ret = __v4l2_ctrl_s_ctrl(ov7251->gain, 16); 1224d30bb512STodor Tomov if (ret < 0) 1225d30bb512STodor Tomov goto exit; 1226d30bb512STodor Tomov 1227d30bb512STodor Tomov ov7251->current_mode = new_mode; 1228d30bb512STodor Tomov } 1229d30bb512STodor Tomov 1230d30bb512STodor Tomov fi->interval = ov7251->current_mode->timeperframe; 1231d30bb512STodor Tomov 1232d30bb512STodor Tomov exit: 1233d30bb512STodor Tomov mutex_unlock(&ov7251->lock); 1234d30bb512STodor Tomov 1235d30bb512STodor Tomov return ret; 1236d30bb512STodor Tomov } 1237d30bb512STodor Tomov 1238d30bb512STodor Tomov static const struct v4l2_subdev_core_ops ov7251_core_ops = { 1239d30bb512STodor Tomov .s_power = ov7251_s_power, 1240d30bb512STodor Tomov }; 1241d30bb512STodor Tomov 1242d30bb512STodor Tomov static const struct v4l2_subdev_video_ops ov7251_video_ops = { 1243d30bb512STodor Tomov .s_stream = ov7251_s_stream, 1244d30bb512STodor Tomov .g_frame_interval = ov7251_get_frame_interval, 1245d30bb512STodor Tomov .s_frame_interval = ov7251_set_frame_interval, 1246d30bb512STodor Tomov }; 1247d30bb512STodor Tomov 1248d30bb512STodor Tomov static const struct v4l2_subdev_pad_ops ov7251_subdev_pad_ops = { 1249d30bb512STodor Tomov .init_cfg = ov7251_entity_init_cfg, 1250d30bb512STodor Tomov .enum_mbus_code = ov7251_enum_mbus_code, 1251d30bb512STodor Tomov .enum_frame_size = ov7251_enum_frame_size, 1252d30bb512STodor Tomov .enum_frame_interval = ov7251_enum_frame_ival, 1253d30bb512STodor Tomov .get_fmt = ov7251_get_format, 1254d30bb512STodor Tomov .set_fmt = ov7251_set_format, 1255d30bb512STodor Tomov .get_selection = ov7251_get_selection, 1256d30bb512STodor Tomov }; 1257d30bb512STodor Tomov 1258d30bb512STodor Tomov static const struct v4l2_subdev_ops ov7251_subdev_ops = { 1259d30bb512STodor Tomov .core = &ov7251_core_ops, 1260d30bb512STodor Tomov .video = &ov7251_video_ops, 1261d30bb512STodor Tomov .pad = &ov7251_subdev_pad_ops, 1262d30bb512STodor Tomov }; 1263d30bb512STodor Tomov 1264*cc125aaaSDaniel Scally static int ov7251_check_hwcfg(struct ov7251 *ov7251) 1265*cc125aaaSDaniel Scally { 1266*cc125aaaSDaniel Scally struct fwnode_handle *fwnode = dev_fwnode(ov7251->dev); 1267*cc125aaaSDaniel Scally struct v4l2_fwnode_endpoint bus_cfg = { 1268*cc125aaaSDaniel Scally .bus_type = V4L2_MBUS_CSI2_DPHY, 1269*cc125aaaSDaniel Scally }; 1270*cc125aaaSDaniel Scally struct fwnode_handle *endpoint; 1271*cc125aaaSDaniel Scally unsigned int i, j; 1272*cc125aaaSDaniel Scally int ret; 1273*cc125aaaSDaniel Scally 1274*cc125aaaSDaniel Scally endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); 1275*cc125aaaSDaniel Scally if (!endpoint) 1276*cc125aaaSDaniel Scally return -EPROBE_DEFER; /* could be provided by cio2-bridge */ 1277*cc125aaaSDaniel Scally 1278*cc125aaaSDaniel Scally ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg); 1279*cc125aaaSDaniel Scally fwnode_handle_put(endpoint); 1280*cc125aaaSDaniel Scally if (ret) 1281*cc125aaaSDaniel Scally return dev_err_probe(ov7251->dev, ret, 1282*cc125aaaSDaniel Scally "parsing endpoint node failed\n"); 1283*cc125aaaSDaniel Scally 1284*cc125aaaSDaniel Scally if (!bus_cfg.nr_of_link_frequencies) { 1285*cc125aaaSDaniel Scally ret = dev_err_probe(ov7251->dev, -EINVAL, 1286*cc125aaaSDaniel Scally "no link frequencies defined\n"); 1287*cc125aaaSDaniel Scally goto out_free_bus_cfg; 1288*cc125aaaSDaniel Scally } 1289*cc125aaaSDaniel Scally 1290*cc125aaaSDaniel Scally for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) { 1291*cc125aaaSDaniel Scally for (j = 0; j < ARRAY_SIZE(link_freq); j++) 1292*cc125aaaSDaniel Scally if (bus_cfg.link_frequencies[i] == link_freq[j]) 1293*cc125aaaSDaniel Scally break; 1294*cc125aaaSDaniel Scally 1295*cc125aaaSDaniel Scally if (j < ARRAY_SIZE(link_freq)) 1296*cc125aaaSDaniel Scally break; 1297*cc125aaaSDaniel Scally } 1298*cc125aaaSDaniel Scally 1299*cc125aaaSDaniel Scally if (i == bus_cfg.nr_of_link_frequencies) { 1300*cc125aaaSDaniel Scally ret = dev_err_probe(ov7251->dev, -EINVAL, 1301*cc125aaaSDaniel Scally "no supported link freq found\n"); 1302*cc125aaaSDaniel Scally goto out_free_bus_cfg; 1303*cc125aaaSDaniel Scally } 1304*cc125aaaSDaniel Scally 1305*cc125aaaSDaniel Scally ov7251->link_freq_idx = i; 1306*cc125aaaSDaniel Scally 1307*cc125aaaSDaniel Scally out_free_bus_cfg: 1308*cc125aaaSDaniel Scally v4l2_fwnode_endpoint_free(&bus_cfg); 1309*cc125aaaSDaniel Scally 1310*cc125aaaSDaniel Scally return ret; 1311*cc125aaaSDaniel Scally } 1312*cc125aaaSDaniel Scally 1313d30bb512STodor Tomov static int ov7251_probe(struct i2c_client *client) 1314d30bb512STodor Tomov { 1315d30bb512STodor Tomov struct device *dev = &client->dev; 1316d30bb512STodor Tomov struct ov7251 *ov7251; 1317d30bb512STodor Tomov u8 chip_id_high, chip_id_low, chip_rev; 1318d30bb512STodor Tomov int ret; 1319d30bb512STodor Tomov 1320d30bb512STodor Tomov ov7251 = devm_kzalloc(dev, sizeof(struct ov7251), GFP_KERNEL); 1321d30bb512STodor Tomov if (!ov7251) 1322d30bb512STodor Tomov return -ENOMEM; 1323d30bb512STodor Tomov 1324d30bb512STodor Tomov ov7251->i2c_client = client; 1325d30bb512STodor Tomov ov7251->dev = dev; 1326d30bb512STodor Tomov 1327*cc125aaaSDaniel Scally ret = ov7251_check_hwcfg(ov7251); 1328*cc125aaaSDaniel Scally if (ret) 1329d30bb512STodor Tomov return ret; 1330d30bb512STodor Tomov 1331d30bb512STodor Tomov /* get system clock (xclk) */ 1332d30bb512STodor Tomov ov7251->xclk = devm_clk_get(dev, "xclk"); 1333d30bb512STodor Tomov if (IS_ERR(ov7251->xclk)) { 1334d30bb512STodor Tomov dev_err(dev, "could not get xclk"); 1335d30bb512STodor Tomov return PTR_ERR(ov7251->xclk); 1336d30bb512STodor Tomov } 1337d30bb512STodor Tomov 1338d30bb512STodor Tomov ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", 1339d30bb512STodor Tomov &ov7251->xclk_freq); 1340d30bb512STodor Tomov if (ret) { 1341d30bb512STodor Tomov dev_err(dev, "could not get xclk frequency\n"); 1342d30bb512STodor Tomov return ret; 1343d30bb512STodor Tomov } 1344d30bb512STodor Tomov 1345d30bb512STodor Tomov /* external clock must be 24MHz, allow 1% tolerance */ 1346d30bb512STodor Tomov if (ov7251->xclk_freq < 23760000 || ov7251->xclk_freq > 24240000) { 1347d30bb512STodor Tomov dev_err(dev, "external clock frequency %u is not supported\n", 1348d30bb512STodor Tomov ov7251->xclk_freq); 1349d30bb512STodor Tomov return -EINVAL; 1350d30bb512STodor Tomov } 1351d30bb512STodor Tomov 1352d30bb512STodor Tomov ret = clk_set_rate(ov7251->xclk, ov7251->xclk_freq); 1353d30bb512STodor Tomov if (ret) { 1354d30bb512STodor Tomov dev_err(dev, "could not set xclk frequency\n"); 1355d30bb512STodor Tomov return ret; 1356d30bb512STodor Tomov } 1357d30bb512STodor Tomov 1358d30bb512STodor Tomov ov7251->io_regulator = devm_regulator_get(dev, "vdddo"); 1359d30bb512STodor Tomov if (IS_ERR(ov7251->io_regulator)) { 1360d30bb512STodor Tomov dev_err(dev, "cannot get io regulator\n"); 1361d30bb512STodor Tomov return PTR_ERR(ov7251->io_regulator); 1362d30bb512STodor Tomov } 1363d30bb512STodor Tomov 1364d30bb512STodor Tomov ov7251->core_regulator = devm_regulator_get(dev, "vddd"); 1365d30bb512STodor Tomov if (IS_ERR(ov7251->core_regulator)) { 1366d30bb512STodor Tomov dev_err(dev, "cannot get core regulator\n"); 1367d30bb512STodor Tomov return PTR_ERR(ov7251->core_regulator); 1368d30bb512STodor Tomov } 1369d30bb512STodor Tomov 1370d30bb512STodor Tomov ov7251->analog_regulator = devm_regulator_get(dev, "vdda"); 1371d30bb512STodor Tomov if (IS_ERR(ov7251->analog_regulator)) { 1372d30bb512STodor Tomov dev_err(dev, "cannot get analog regulator\n"); 1373d30bb512STodor Tomov return PTR_ERR(ov7251->analog_regulator); 1374d30bb512STodor Tomov } 1375d30bb512STodor Tomov 1376d30bb512STodor Tomov ov7251->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH); 1377d30bb512STodor Tomov if (IS_ERR(ov7251->enable_gpio)) { 1378d30bb512STodor Tomov dev_err(dev, "cannot get enable gpio\n"); 1379d30bb512STodor Tomov return PTR_ERR(ov7251->enable_gpio); 1380d30bb512STodor Tomov } 1381d30bb512STodor Tomov 1382d30bb512STodor Tomov mutex_init(&ov7251->lock); 1383d30bb512STodor Tomov 1384d30bb512STodor Tomov v4l2_ctrl_handler_init(&ov7251->ctrls, 7); 1385d30bb512STodor Tomov ov7251->ctrls.lock = &ov7251->lock; 1386d30bb512STodor Tomov 1387d30bb512STodor Tomov v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops, 1388d30bb512STodor Tomov V4L2_CID_HFLIP, 0, 1, 1, 0); 1389d30bb512STodor Tomov v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops, 1390d30bb512STodor Tomov V4L2_CID_VFLIP, 0, 1, 1, 0); 1391d30bb512STodor Tomov ov7251->exposure = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops, 1392d30bb512STodor Tomov V4L2_CID_EXPOSURE, 1, 32, 1, 32); 1393d30bb512STodor Tomov ov7251->gain = v4l2_ctrl_new_std(&ov7251->ctrls, &ov7251_ctrl_ops, 1394d30bb512STodor Tomov V4L2_CID_GAIN, 16, 1023, 1, 16); 1395d30bb512STodor Tomov v4l2_ctrl_new_std_menu_items(&ov7251->ctrls, &ov7251_ctrl_ops, 1396d30bb512STodor Tomov V4L2_CID_TEST_PATTERN, 1397d30bb512STodor Tomov ARRAY_SIZE(ov7251_test_pattern_menu) - 1, 1398d30bb512STodor Tomov 0, 0, ov7251_test_pattern_menu); 1399d30bb512STodor Tomov ov7251->pixel_clock = v4l2_ctrl_new_std(&ov7251->ctrls, 1400d30bb512STodor Tomov &ov7251_ctrl_ops, 1401d30bb512STodor Tomov V4L2_CID_PIXEL_RATE, 1402d30bb512STodor Tomov 1, INT_MAX, 1, 1); 1403d30bb512STodor Tomov ov7251->link_freq = v4l2_ctrl_new_int_menu(&ov7251->ctrls, 1404d30bb512STodor Tomov &ov7251_ctrl_ops, 1405d30bb512STodor Tomov V4L2_CID_LINK_FREQ, 1406d30bb512STodor Tomov ARRAY_SIZE(link_freq) - 1, 1407d30bb512STodor Tomov 0, link_freq); 1408d30bb512STodor Tomov if (ov7251->link_freq) 1409d30bb512STodor Tomov ov7251->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1410d30bb512STodor Tomov 1411d30bb512STodor Tomov ov7251->sd.ctrl_handler = &ov7251->ctrls; 1412d30bb512STodor Tomov 1413d30bb512STodor Tomov if (ov7251->ctrls.error) { 1414d30bb512STodor Tomov dev_err(dev, "%s: control initialization error %d\n", 1415d30bb512STodor Tomov __func__, ov7251->ctrls.error); 1416d30bb512STodor Tomov ret = ov7251->ctrls.error; 1417d30bb512STodor Tomov goto free_ctrl; 1418d30bb512STodor Tomov } 1419d30bb512STodor Tomov 1420d30bb512STodor Tomov v4l2_i2c_subdev_init(&ov7251->sd, client, &ov7251_subdev_ops); 1421d30bb512STodor Tomov ov7251->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1422d30bb512STodor Tomov ov7251->pad.flags = MEDIA_PAD_FL_SOURCE; 1423d30bb512STodor Tomov ov7251->sd.dev = &client->dev; 1424d30bb512STodor Tomov ov7251->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1425d30bb512STodor Tomov 1426d30bb512STodor Tomov ret = media_entity_pads_init(&ov7251->sd.entity, 1, &ov7251->pad); 1427d30bb512STodor Tomov if (ret < 0) { 1428d30bb512STodor Tomov dev_err(dev, "could not register media entity\n"); 1429d30bb512STodor Tomov goto free_ctrl; 1430d30bb512STodor Tomov } 1431d30bb512STodor Tomov 1432d30bb512STodor Tomov ret = ov7251_s_power(&ov7251->sd, true); 1433d30bb512STodor Tomov if (ret < 0) { 1434d30bb512STodor Tomov dev_err(dev, "could not power up OV7251\n"); 1435d30bb512STodor Tomov goto free_entity; 1436d30bb512STodor Tomov } 1437d30bb512STodor Tomov 1438d30bb512STodor Tomov ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_HIGH, &chip_id_high); 1439d30bb512STodor Tomov if (ret < 0 || chip_id_high != OV7251_CHIP_ID_HIGH_BYTE) { 1440d30bb512STodor Tomov dev_err(dev, "could not read ID high\n"); 1441d30bb512STodor Tomov ret = -ENODEV; 1442d30bb512STodor Tomov goto power_down; 1443d30bb512STodor Tomov } 1444d30bb512STodor Tomov ret = ov7251_read_reg(ov7251, OV7251_CHIP_ID_LOW, &chip_id_low); 1445d30bb512STodor Tomov if (ret < 0 || chip_id_low != OV7251_CHIP_ID_LOW_BYTE) { 1446d30bb512STodor Tomov dev_err(dev, "could not read ID low\n"); 1447d30bb512STodor Tomov ret = -ENODEV; 1448d30bb512STodor Tomov goto power_down; 1449d30bb512STodor Tomov } 1450d30bb512STodor Tomov 1451d30bb512STodor Tomov ret = ov7251_read_reg(ov7251, OV7251_SC_GP_IO_IN1, &chip_rev); 1452d30bb512STodor Tomov if (ret < 0) { 1453d30bb512STodor Tomov dev_err(dev, "could not read revision\n"); 1454d30bb512STodor Tomov ret = -ENODEV; 1455d30bb512STodor Tomov goto power_down; 1456d30bb512STodor Tomov } 1457d30bb512STodor Tomov chip_rev >>= 4; 1458d30bb512STodor Tomov 1459d30bb512STodor Tomov dev_info(dev, "OV7251 revision %x (%s) detected at address 0x%02x\n", 1460d30bb512STodor Tomov chip_rev, 1461d30bb512STodor Tomov chip_rev == 0x4 ? "1A / 1B" : 1462d30bb512STodor Tomov chip_rev == 0x5 ? "1C / 1D" : 1463d30bb512STodor Tomov chip_rev == 0x6 ? "1E" : 1464d30bb512STodor Tomov chip_rev == 0x7 ? "1F" : "unknown", 1465d30bb512STodor Tomov client->addr); 1466d30bb512STodor Tomov 1467d30bb512STodor Tomov ret = ov7251_read_reg(ov7251, OV7251_PRE_ISP_00, 1468d30bb512STodor Tomov &ov7251->pre_isp_00); 1469d30bb512STodor Tomov if (ret < 0) { 1470d30bb512STodor Tomov dev_err(dev, "could not read test pattern value\n"); 1471d30bb512STodor Tomov ret = -ENODEV; 1472d30bb512STodor Tomov goto power_down; 1473d30bb512STodor Tomov } 1474d30bb512STodor Tomov 1475d30bb512STodor Tomov ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT1, 1476d30bb512STodor Tomov &ov7251->timing_format1); 1477d30bb512STodor Tomov if (ret < 0) { 1478d30bb512STodor Tomov dev_err(dev, "could not read vflip value\n"); 1479d30bb512STodor Tomov ret = -ENODEV; 1480d30bb512STodor Tomov goto power_down; 1481d30bb512STodor Tomov } 1482d30bb512STodor Tomov 1483d30bb512STodor Tomov ret = ov7251_read_reg(ov7251, OV7251_TIMING_FORMAT2, 1484d30bb512STodor Tomov &ov7251->timing_format2); 1485d30bb512STodor Tomov if (ret < 0) { 1486d30bb512STodor Tomov dev_err(dev, "could not read hflip value\n"); 1487d30bb512STodor Tomov ret = -ENODEV; 1488d30bb512STodor Tomov goto power_down; 1489d30bb512STodor Tomov } 1490d30bb512STodor Tomov 1491d30bb512STodor Tomov ov7251_s_power(&ov7251->sd, false); 1492d30bb512STodor Tomov 1493d30bb512STodor Tomov ret = v4l2_async_register_subdev(&ov7251->sd); 1494d30bb512STodor Tomov if (ret < 0) { 1495d30bb512STodor Tomov dev_err(dev, "could not register v4l2 device\n"); 1496d30bb512STodor Tomov goto free_entity; 1497d30bb512STodor Tomov } 1498d30bb512STodor Tomov 1499d30bb512STodor Tomov ov7251_entity_init_cfg(&ov7251->sd, NULL); 1500d30bb512STodor Tomov 1501d30bb512STodor Tomov return 0; 1502d30bb512STodor Tomov 1503d30bb512STodor Tomov power_down: 1504d30bb512STodor Tomov ov7251_s_power(&ov7251->sd, false); 1505d30bb512STodor Tomov free_entity: 1506d30bb512STodor Tomov media_entity_cleanup(&ov7251->sd.entity); 1507d30bb512STodor Tomov free_ctrl: 1508d30bb512STodor Tomov v4l2_ctrl_handler_free(&ov7251->ctrls); 1509d30bb512STodor Tomov mutex_destroy(&ov7251->lock); 1510d30bb512STodor Tomov 1511d30bb512STodor Tomov return ret; 1512d30bb512STodor Tomov } 1513d30bb512STodor Tomov 1514d30bb512STodor Tomov static int ov7251_remove(struct i2c_client *client) 1515d30bb512STodor Tomov { 1516d30bb512STodor Tomov struct v4l2_subdev *sd = i2c_get_clientdata(client); 1517d30bb512STodor Tomov struct ov7251 *ov7251 = to_ov7251(sd); 1518d30bb512STodor Tomov 1519d30bb512STodor Tomov v4l2_async_unregister_subdev(&ov7251->sd); 1520d30bb512STodor Tomov media_entity_cleanup(&ov7251->sd.entity); 1521d30bb512STodor Tomov v4l2_ctrl_handler_free(&ov7251->ctrls); 1522d30bb512STodor Tomov mutex_destroy(&ov7251->lock); 1523d30bb512STodor Tomov 1524d30bb512STodor Tomov return 0; 1525d30bb512STodor Tomov } 1526d30bb512STodor Tomov 1527d30bb512STodor Tomov static const struct of_device_id ov7251_of_match[] = { 1528d30bb512STodor Tomov { .compatible = "ovti,ov7251" }, 1529d30bb512STodor Tomov { /* sentinel */ } 1530d30bb512STodor Tomov }; 1531d30bb512STodor Tomov MODULE_DEVICE_TABLE(of, ov7251_of_match); 1532d30bb512STodor Tomov 15336766cff6SDaniel Scally static const struct acpi_device_id ov7251_acpi_match[] = { 15346766cff6SDaniel Scally { "INT347E" }, 15356766cff6SDaniel Scally { } 15366766cff6SDaniel Scally }; 15376766cff6SDaniel Scally MODULE_DEVICE_TABLE(acpi, ov7251_acpi_match); 15386766cff6SDaniel Scally 1539d30bb512STodor Tomov static struct i2c_driver ov7251_i2c_driver = { 1540d30bb512STodor Tomov .driver = { 1541d30bb512STodor Tomov .of_match_table = ov7251_of_match, 15426766cff6SDaniel Scally .acpi_match_table = ov7251_acpi_match, 1543d30bb512STodor Tomov .name = "ov7251", 1544d30bb512STodor Tomov }, 1545d30bb512STodor Tomov .probe_new = ov7251_probe, 1546d30bb512STodor Tomov .remove = ov7251_remove, 1547d30bb512STodor Tomov }; 1548d30bb512STodor Tomov 1549d30bb512STodor Tomov module_i2c_driver(ov7251_i2c_driver); 1550d30bb512STodor Tomov 1551d30bb512STodor Tomov MODULE_DESCRIPTION("Omnivision OV7251 Camera Driver"); 1552d30bb512STodor Tomov MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>"); 1553d30bb512STodor Tomov MODULE_LICENSE("GPL v2"); 1554