xref: /linux/drivers/media/i2c/ov5640.c (revision bd628c1bed7902ec1f24ba0fe70758949146abbe)
1 /*
2  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
3  * Copyright (C) 2014-2017 Mentor Graphics Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  */
10 
11 #include <linux/clk.h>
12 #include <linux/clk-provider.h>
13 #include <linux/clkdev.h>
14 #include <linux/ctype.h>
15 #include <linux/delay.h>
16 #include <linux/device.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/i2c.h>
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24 #include <linux/types.h>
25 #include <media/v4l2-async.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-event.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-subdev.h>
31 
32 /* min/typical/max system clock (xclk) frequencies */
33 #define OV5640_XCLK_MIN  6000000
34 #define OV5640_XCLK_MAX 54000000
35 
36 #define OV5640_DEFAULT_SLAVE_ID 0x3c
37 
38 #define OV5640_REG_SYS_RESET02		0x3002
39 #define OV5640_REG_SYS_CLOCK_ENABLE02	0x3006
40 #define OV5640_REG_SYS_CTRL0		0x3008
41 #define OV5640_REG_CHIP_ID		0x300a
42 #define OV5640_REG_IO_MIPI_CTRL00	0x300e
43 #define OV5640_REG_PAD_OUTPUT_ENABLE01	0x3017
44 #define OV5640_REG_PAD_OUTPUT_ENABLE02	0x3018
45 #define OV5640_REG_PAD_OUTPUT00		0x3019
46 #define OV5640_REG_SYSTEM_CONTROL1	0x302e
47 #define OV5640_REG_SC_PLL_CTRL0		0x3034
48 #define OV5640_REG_SC_PLL_CTRL1		0x3035
49 #define OV5640_REG_SC_PLL_CTRL2		0x3036
50 #define OV5640_REG_SC_PLL_CTRL3		0x3037
51 #define OV5640_REG_SLAVE_ID		0x3100
52 #define OV5640_REG_SCCB_SYS_CTRL1	0x3103
53 #define OV5640_REG_SYS_ROOT_DIVIDER	0x3108
54 #define OV5640_REG_AWB_R_GAIN		0x3400
55 #define OV5640_REG_AWB_G_GAIN		0x3402
56 #define OV5640_REG_AWB_B_GAIN		0x3404
57 #define OV5640_REG_AWB_MANUAL_CTRL	0x3406
58 #define OV5640_REG_AEC_PK_EXPOSURE_HI	0x3500
59 #define OV5640_REG_AEC_PK_EXPOSURE_MED	0x3501
60 #define OV5640_REG_AEC_PK_EXPOSURE_LO	0x3502
61 #define OV5640_REG_AEC_PK_MANUAL	0x3503
62 #define OV5640_REG_AEC_PK_REAL_GAIN	0x350a
63 #define OV5640_REG_AEC_PK_VTS		0x350c
64 #define OV5640_REG_TIMING_DVPHO		0x3808
65 #define OV5640_REG_TIMING_DVPVO		0x380a
66 #define OV5640_REG_TIMING_HTS		0x380c
67 #define OV5640_REG_TIMING_VTS		0x380e
68 #define OV5640_REG_TIMING_TC_REG20	0x3820
69 #define OV5640_REG_TIMING_TC_REG21	0x3821
70 #define OV5640_REG_AEC_CTRL00		0x3a00
71 #define OV5640_REG_AEC_B50_STEP		0x3a08
72 #define OV5640_REG_AEC_B60_STEP		0x3a0a
73 #define OV5640_REG_AEC_CTRL0D		0x3a0d
74 #define OV5640_REG_AEC_CTRL0E		0x3a0e
75 #define OV5640_REG_AEC_CTRL0F		0x3a0f
76 #define OV5640_REG_AEC_CTRL10		0x3a10
77 #define OV5640_REG_AEC_CTRL11		0x3a11
78 #define OV5640_REG_AEC_CTRL1B		0x3a1b
79 #define OV5640_REG_AEC_CTRL1E		0x3a1e
80 #define OV5640_REG_AEC_CTRL1F		0x3a1f
81 #define OV5640_REG_HZ5060_CTRL00	0x3c00
82 #define OV5640_REG_HZ5060_CTRL01	0x3c01
83 #define OV5640_REG_SIGMADELTA_CTRL0C	0x3c0c
84 #define OV5640_REG_FRAME_CTRL01		0x4202
85 #define OV5640_REG_FORMAT_CONTROL00	0x4300
86 #define OV5640_REG_POLARITY_CTRL00	0x4740
87 #define OV5640_REG_MIPI_CTRL00		0x4800
88 #define OV5640_REG_DEBUG_MODE		0x4814
89 #define OV5640_REG_ISP_FORMAT_MUX_CTRL	0x501f
90 #define OV5640_REG_PRE_ISP_TEST_SET1	0x503d
91 #define OV5640_REG_SDE_CTRL0		0x5580
92 #define OV5640_REG_SDE_CTRL1		0x5581
93 #define OV5640_REG_SDE_CTRL3		0x5583
94 #define OV5640_REG_SDE_CTRL4		0x5584
95 #define OV5640_REG_SDE_CTRL5		0x5585
96 #define OV5640_REG_AVG_READOUT		0x56a1
97 
98 enum ov5640_mode_id {
99 	OV5640_MODE_QCIF_176_144 = 0,
100 	OV5640_MODE_QVGA_320_240,
101 	OV5640_MODE_VGA_640_480,
102 	OV5640_MODE_NTSC_720_480,
103 	OV5640_MODE_PAL_720_576,
104 	OV5640_MODE_XGA_1024_768,
105 	OV5640_MODE_720P_1280_720,
106 	OV5640_MODE_1080P_1920_1080,
107 	OV5640_MODE_QSXGA_2592_1944,
108 	OV5640_NUM_MODES,
109 };
110 
111 enum ov5640_frame_rate {
112 	OV5640_15_FPS = 0,
113 	OV5640_30_FPS,
114 	OV5640_60_FPS,
115 	OV5640_NUM_FRAMERATES,
116 };
117 
118 struct ov5640_pixfmt {
119 	u32 code;
120 	u32 colorspace;
121 };
122 
123 static const struct ov5640_pixfmt ov5640_formats[] = {
124 	{ MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
125 	{ MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
126 	{ MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
127 	{ MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
128 	{ MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
129 };
130 
131 /*
132  * FIXME: remove this when a subdev API becomes available
133  * to set the MIPI CSI-2 virtual channel.
134  */
135 static unsigned int virtual_channel;
136 module_param(virtual_channel, uint, 0444);
137 MODULE_PARM_DESC(virtual_channel,
138 		 "MIPI CSI-2 virtual channel (0..3), default 0");
139 
140 static const int ov5640_framerates[] = {
141 	[OV5640_15_FPS] = 15,
142 	[OV5640_30_FPS] = 30,
143 	[OV5640_60_FPS] = 60,
144 };
145 
146 /* regulator supplies */
147 static const char * const ov5640_supply_name[] = {
148 	"DOVDD", /* Digital I/O (1.8V) supply */
149 	"DVDD",  /* Digital Core (1.5V) supply */
150 	"AVDD",  /* Analog (2.8V) supply */
151 };
152 
153 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
154 
155 /*
156  * Image size under 1280 * 960 are SUBSAMPLING
157  * Image size upper 1280 * 960 are SCALING
158  */
159 enum ov5640_downsize_mode {
160 	SUBSAMPLING,
161 	SCALING,
162 };
163 
164 struct reg_value {
165 	u16 reg_addr;
166 	u8 val;
167 	u8 mask;
168 	u32 delay_ms;
169 };
170 
171 struct ov5640_mode_info {
172 	enum ov5640_mode_id id;
173 	enum ov5640_downsize_mode dn_mode;
174 	u32 hact;
175 	u32 htot;
176 	u32 vact;
177 	u32 vtot;
178 	const struct reg_value *reg_data;
179 	u32 reg_data_size;
180 };
181 
182 struct ov5640_ctrls {
183 	struct v4l2_ctrl_handler handler;
184 	struct {
185 		struct v4l2_ctrl *auto_exp;
186 		struct v4l2_ctrl *exposure;
187 	};
188 	struct {
189 		struct v4l2_ctrl *auto_wb;
190 		struct v4l2_ctrl *blue_balance;
191 		struct v4l2_ctrl *red_balance;
192 	};
193 	struct {
194 		struct v4l2_ctrl *auto_gain;
195 		struct v4l2_ctrl *gain;
196 	};
197 	struct v4l2_ctrl *brightness;
198 	struct v4l2_ctrl *light_freq;
199 	struct v4l2_ctrl *saturation;
200 	struct v4l2_ctrl *contrast;
201 	struct v4l2_ctrl *hue;
202 	struct v4l2_ctrl *test_pattern;
203 	struct v4l2_ctrl *hflip;
204 	struct v4l2_ctrl *vflip;
205 };
206 
207 struct ov5640_dev {
208 	struct i2c_client *i2c_client;
209 	struct v4l2_subdev sd;
210 	struct media_pad pad;
211 	struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
212 	struct clk *xclk; /* system clock to OV5640 */
213 	u32 xclk_freq;
214 
215 	struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
216 	struct gpio_desc *reset_gpio;
217 	struct gpio_desc *pwdn_gpio;
218 	bool   upside_down;
219 
220 	/* lock to protect all members below */
221 	struct mutex lock;
222 
223 	int power_count;
224 
225 	struct v4l2_mbus_framefmt fmt;
226 	bool pending_fmt_change;
227 
228 	const struct ov5640_mode_info *current_mode;
229 	const struct ov5640_mode_info *last_mode;
230 	enum ov5640_frame_rate current_fr;
231 	struct v4l2_fract frame_interval;
232 
233 	struct ov5640_ctrls ctrls;
234 
235 	u32 prev_sysclk, prev_hts;
236 	u32 ae_low, ae_high, ae_target;
237 
238 	bool pending_mode_change;
239 	bool streaming;
240 };
241 
242 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
243 {
244 	return container_of(sd, struct ov5640_dev, sd);
245 }
246 
247 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
248 {
249 	return &container_of(ctrl->handler, struct ov5640_dev,
250 			     ctrls.handler)->sd;
251 }
252 
253 /*
254  * FIXME: all of these register tables are likely filled with
255  * entries that set the register to their power-on default values,
256  * and which are otherwise not touched by this driver. Those entries
257  * should be identified and removed to speed register load time
258  * over i2c.
259  */
260 /* YUV422 UYVY VGA@30fps */
261 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
262 	{0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
263 	{0x3103, 0x03, 0, 0}, {0x3017, 0x00, 0, 0}, {0x3018, 0x00, 0, 0},
264 	{0x3630, 0x36, 0, 0},
265 	{0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
266 	{0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
267 	{0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
268 	{0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
269 	{0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
270 	{0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
271 	{0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
272 	{0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
273 	{0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
274 	{0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
275 	{0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
276 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
277 	{0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
278 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
279 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
280 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
281 	{0x3810, 0x00, 0, 0},
282 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
283 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
284 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
285 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
286 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
287 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
288 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
289 	{0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
290 	{0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
291 	{0x501f, 0x00, 0, 0}, {0x4713, 0x03, 0, 0}, {0x4407, 0x04, 0, 0},
292 	{0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
293 	{0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
294 	{0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
295 	{0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
296 	{0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
297 	{0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
298 	{0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
299 	{0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
300 	{0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
301 	{0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
302 	{0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
303 	{0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
304 	{0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
305 	{0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
306 	{0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
307 	{0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
308 	{0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
309 	{0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
310 	{0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
311 	{0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
312 	{0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
313 	{0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
314 	{0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
315 	{0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
316 	{0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
317 	{0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
318 	{0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
319 	{0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
320 	{0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
321 	{0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
322 	{0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
323 	{0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
324 	{0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
325 	{0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
326 	{0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
327 	{0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
328 	{0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
329 	{0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
330 	{0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
331 	{0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
332 	{0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
333 	{0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
334 	{0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
335 	{0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
336 	{0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
337 	{0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
338 	{0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
339 	{0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
340 	{0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
341 	{0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
342 	{0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
343 	{0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
344 };
345 
346 static const struct reg_value ov5640_setting_VGA_640_480[] = {
347 	{0x3c07, 0x08, 0, 0},
348 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
349 	{0x3814, 0x31, 0, 0},
350 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
351 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
352 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
353 	{0x3810, 0x00, 0, 0},
354 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
355 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
356 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
357 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
358 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
359 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
360 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
361 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
362 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
363 };
364 
365 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
366 	{0x3c07, 0x08, 0, 0},
367 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
368 	{0x3814, 0x31, 0, 0},
369 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
370 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
371 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
372 	{0x3810, 0x00, 0, 0},
373 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
374 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
375 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
376 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
377 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
378 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
379 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
380 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
381 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
382 };
383 
384 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
385 	{0x3c07, 0x08, 0, 0},
386 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
387 	{0x3814, 0x31, 0, 0},
388 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
389 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
390 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
391 	{0x3810, 0x00, 0, 0},
392 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
393 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
394 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
395 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
396 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
397 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
398 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
399 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
400 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
401 };
402 
403 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
404 	{0x3c07, 0x08, 0, 0},
405 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
406 	{0x3814, 0x31, 0, 0},
407 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
408 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
409 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
410 	{0x3810, 0x00, 0, 0},
411 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
412 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
413 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
414 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
415 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
416 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
417 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
418 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
419 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
420 };
421 
422 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
423 	{0x3c07, 0x08, 0, 0},
424 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
425 	{0x3814, 0x31, 0, 0},
426 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
427 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
428 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
429 	{0x3810, 0x00, 0, 0},
430 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
431 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
432 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
433 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
434 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
435 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
436 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
437 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
438 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
439 };
440 
441 static const struct reg_value ov5640_setting_PAL_720_576[] = {
442 	{0x3c07, 0x08, 0, 0},
443 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
444 	{0x3814, 0x31, 0, 0},
445 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
446 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
447 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
448 	{0x3810, 0x00, 0, 0},
449 	{0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
450 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
451 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
452 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
453 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
454 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
455 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
456 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
457 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
458 };
459 
460 static const struct reg_value ov5640_setting_720P_1280_720[] = {
461 	{0x3c07, 0x07, 0, 0},
462 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
463 	{0x3814, 0x31, 0, 0},
464 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
465 	{0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
466 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
467 	{0x3810, 0x00, 0, 0},
468 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
469 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
470 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
471 	{0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
472 	{0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
473 	{0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
474 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x4713, 0x03, 0, 0},
475 	{0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
476 	{0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
477 };
478 
479 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
480 	{0x3008, 0x42, 0, 0},
481 	{0x3c07, 0x08, 0, 0},
482 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
483 	{0x3814, 0x11, 0, 0},
484 	{0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
485 	{0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
486 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
487 	{0x3810, 0x00, 0, 0},
488 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
489 	{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
490 	{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
491 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
492 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
493 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
494 	{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0},
495 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
496 	{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
497 	{0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
498 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
499 	{0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
500 	{0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
501 	{0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
502 	{0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
503 	{0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
504 	{0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
505 	{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
506 	{0x3a15, 0x60, 0, 0}, {0x4713, 0x02, 0, 0}, {0x4407, 0x04, 0, 0},
507 	{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
508 	{0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
509 };
510 
511 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
512 	{0x3c07, 0x08, 0, 0},
513 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
514 	{0x3814, 0x11, 0, 0},
515 	{0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
516 	{0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
517 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
518 	{0x3810, 0x00, 0, 0},
519 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
520 	{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
521 	{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
522 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
523 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
524 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
525 	{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0}, {0x4713, 0x03, 0, 0},
526 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
527 	{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
528 };
529 
530 /* power-on sensor init reg table */
531 static const struct ov5640_mode_info ov5640_mode_init_data = {
532 	0, SUBSAMPLING, 640, 1896, 480, 984,
533 	ov5640_init_setting_30fps_VGA,
534 	ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
535 };
536 
537 static const struct ov5640_mode_info
538 ov5640_mode_data[OV5640_NUM_MODES] = {
539 	{OV5640_MODE_QCIF_176_144, SUBSAMPLING,
540 	 176, 1896, 144, 984,
541 	 ov5640_setting_QCIF_176_144,
542 	 ARRAY_SIZE(ov5640_setting_QCIF_176_144)},
543 	{OV5640_MODE_QVGA_320_240, SUBSAMPLING,
544 	 320, 1896, 240, 984,
545 	 ov5640_setting_QVGA_320_240,
546 	 ARRAY_SIZE(ov5640_setting_QVGA_320_240)},
547 	{OV5640_MODE_VGA_640_480, SUBSAMPLING,
548 	 640, 1896, 480, 1080,
549 	 ov5640_setting_VGA_640_480,
550 	 ARRAY_SIZE(ov5640_setting_VGA_640_480)},
551 	{OV5640_MODE_NTSC_720_480, SUBSAMPLING,
552 	 720, 1896, 480, 984,
553 	 ov5640_setting_NTSC_720_480,
554 	 ARRAY_SIZE(ov5640_setting_NTSC_720_480)},
555 	{OV5640_MODE_PAL_720_576, SUBSAMPLING,
556 	 720, 1896, 576, 984,
557 	 ov5640_setting_PAL_720_576,
558 	 ARRAY_SIZE(ov5640_setting_PAL_720_576)},
559 	{OV5640_MODE_XGA_1024_768, SUBSAMPLING,
560 	 1024, 1896, 768, 1080,
561 	 ov5640_setting_XGA_1024_768,
562 	 ARRAY_SIZE(ov5640_setting_XGA_1024_768)},
563 	{OV5640_MODE_720P_1280_720, SUBSAMPLING,
564 	 1280, 1892, 720, 740,
565 	 ov5640_setting_720P_1280_720,
566 	 ARRAY_SIZE(ov5640_setting_720P_1280_720)},
567 	{OV5640_MODE_1080P_1920_1080, SCALING,
568 	 1920, 2500, 1080, 1120,
569 	 ov5640_setting_1080P_1920_1080,
570 	 ARRAY_SIZE(ov5640_setting_1080P_1920_1080)},
571 	{OV5640_MODE_QSXGA_2592_1944, SCALING,
572 	 2592, 2844, 1944, 1968,
573 	 ov5640_setting_QSXGA_2592_1944,
574 	 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944)},
575 };
576 
577 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
578 {
579 	struct i2c_client *client = sensor->i2c_client;
580 	struct i2c_msg msg;
581 	u8 buf[3];
582 	int ret;
583 
584 	if (client->addr == OV5640_DEFAULT_SLAVE_ID)
585 		return 0;
586 
587 	buf[0] = OV5640_REG_SLAVE_ID >> 8;
588 	buf[1] = OV5640_REG_SLAVE_ID & 0xff;
589 	buf[2] = client->addr << 1;
590 
591 	msg.addr = OV5640_DEFAULT_SLAVE_ID;
592 	msg.flags = 0;
593 	msg.buf = buf;
594 	msg.len = sizeof(buf);
595 
596 	ret = i2c_transfer(client->adapter, &msg, 1);
597 	if (ret < 0) {
598 		dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
599 		return ret;
600 	}
601 
602 	return 0;
603 }
604 
605 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
606 {
607 	struct i2c_client *client = sensor->i2c_client;
608 	struct i2c_msg msg;
609 	u8 buf[3];
610 	int ret;
611 
612 	buf[0] = reg >> 8;
613 	buf[1] = reg & 0xff;
614 	buf[2] = val;
615 
616 	msg.addr = client->addr;
617 	msg.flags = client->flags;
618 	msg.buf = buf;
619 	msg.len = sizeof(buf);
620 
621 	ret = i2c_transfer(client->adapter, &msg, 1);
622 	if (ret < 0) {
623 		dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
624 			__func__, reg, val);
625 		return ret;
626 	}
627 
628 	return 0;
629 }
630 
631 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
632 {
633 	struct i2c_client *client = sensor->i2c_client;
634 	struct i2c_msg msg[2];
635 	u8 buf[2];
636 	int ret;
637 
638 	buf[0] = reg >> 8;
639 	buf[1] = reg & 0xff;
640 
641 	msg[0].addr = client->addr;
642 	msg[0].flags = client->flags;
643 	msg[0].buf = buf;
644 	msg[0].len = sizeof(buf);
645 
646 	msg[1].addr = client->addr;
647 	msg[1].flags = client->flags | I2C_M_RD;
648 	msg[1].buf = buf;
649 	msg[1].len = 1;
650 
651 	ret = i2c_transfer(client->adapter, msg, 2);
652 	if (ret < 0) {
653 		dev_err(&client->dev, "%s: error: reg=%x\n",
654 			__func__, reg);
655 		return ret;
656 	}
657 
658 	*val = buf[0];
659 	return 0;
660 }
661 
662 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
663 {
664 	u8 hi, lo;
665 	int ret;
666 
667 	ret = ov5640_read_reg(sensor, reg, &hi);
668 	if (ret)
669 		return ret;
670 	ret = ov5640_read_reg(sensor, reg + 1, &lo);
671 	if (ret)
672 		return ret;
673 
674 	*val = ((u16)hi << 8) | (u16)lo;
675 	return 0;
676 }
677 
678 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
679 {
680 	int ret;
681 
682 	ret = ov5640_write_reg(sensor, reg, val >> 8);
683 	if (ret)
684 		return ret;
685 
686 	return ov5640_write_reg(sensor, reg + 1, val & 0xff);
687 }
688 
689 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
690 			  u8 mask, u8 val)
691 {
692 	u8 readval;
693 	int ret;
694 
695 	ret = ov5640_read_reg(sensor, reg, &readval);
696 	if (ret)
697 		return ret;
698 
699 	readval &= ~mask;
700 	val &= mask;
701 	val |= readval;
702 
703 	return ov5640_write_reg(sensor, reg, val);
704 }
705 
706 /*
707  * After trying the various combinations, reading various
708  * documentations spreaded around the net, and from the various
709  * feedback, the clock tree is probably as follows:
710  *
711  *   +--------------+
712  *   |  Ext. Clock  |
713  *   +-+------------+
714  *     |  +----------+
715  *     +->|   PLL1   | - reg 0x3036, for the multiplier
716  *        +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
717  *          |  +--------------+
718  *          +->| System Clock |  - reg 0x3035, bits 4-7
719  *             +-+------------+
720  *               |  +--------------+
721  *               +->| MIPI Divider | - reg 0x3035, bits 0-3
722  *               |  +-+------------+
723  *               |    +----------------> MIPI SCLK
724  *               |    +  +-----+
725  *               |    +->| / 2 |-------> MIPI BIT CLK
726  *               |       +-----+
727  *               |  +--------------+
728  *               +->| PLL Root Div | - reg 0x3037, bit 4
729  *                  +-+------------+
730  *                    |  +---------+
731  *                    +->| Bit Div | - reg 0x3035, bits 0-3
732  *                       +-+-------+
733  *                         |  +-------------+
734  *                         +->| SCLK Div    | - reg 0x3108, bits 0-1
735  *                         |  +-+-----------+
736  *                         |    +---------------> SCLK
737  *                         |  +-------------+
738  *                         +->| SCLK 2X Div | - reg 0x3108, bits 2-3
739  *                         |  +-+-----------+
740  *                         |    +---------------> SCLK 2X
741  *                         |  +-------------+
742  *                         +->| PCLK Div    | - reg 0x3108, bits 4-5
743  *                            ++------------+
744  *                             +  +-----------+
745  *                             +->|   P_DIV   | - reg 0x3035, bits 0-3
746  *                                +-----+-----+
747  *                                       +------------> PCLK
748  *
749  * This is deviating from the datasheet at least for the register
750  * 0x3108, since it's said here that the PCLK would be clocked from
751  * the PLL.
752  *
753  * There seems to be also (unverified) constraints:
754  *  - the PLL pre-divider output rate should be in the 4-27MHz range
755  *  - the PLL multiplier output rate should be in the 500-1000MHz range
756  *  - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
757  *
758  * In the two latter cases, these constraints are met since our
759  * factors are hardcoded. If we were to change that, we would need to
760  * take this into account. The only varying parts are the PLL
761  * multiplier and the system clock divider, which are shared between
762  * all these clocks so won't cause any issue.
763  */
764 
765 /*
766  * This is supposed to be ranging from 1 to 8, but the value is always
767  * set to 3 in the vendor kernels.
768  */
769 #define OV5640_PLL_PREDIV	3
770 
771 #define OV5640_PLL_MULT_MIN	4
772 #define OV5640_PLL_MULT_MAX	252
773 
774 /*
775  * This is supposed to be ranging from 1 to 16, but the value is
776  * always set to either 1 or 2 in the vendor kernels.
777  */
778 #define OV5640_SYSDIV_MIN	1
779 #define OV5640_SYSDIV_MAX	16
780 
781 /*
782  * Hardcode these values for scaler and non-scaler modes.
783  * FIXME: to be re-calcualted for 1 data lanes setups
784  */
785 #define OV5640_MIPI_DIV_PCLK	2
786 #define OV5640_MIPI_DIV_SCLK	1
787 
788 /*
789  * This is supposed to be ranging from 1 to 2, but the value is always
790  * set to 2 in the vendor kernels.
791  */
792 #define OV5640_PLL_ROOT_DIV			2
793 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2		BIT(4)
794 
795 /*
796  * We only supports 8-bit formats at the moment
797  */
798 #define OV5640_BIT_DIV				2
799 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT		0x08
800 
801 /*
802  * This is supposed to be ranging from 1 to 8, but the value is always
803  * set to 2 in the vendor kernels.
804  */
805 #define OV5640_SCLK_ROOT_DIV	2
806 
807 /*
808  * This is hardcoded so that the consistency is maintained between SCLK and
809  * SCLK 2x.
810  */
811 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
812 
813 /*
814  * This is supposed to be ranging from 1 to 8, but the value is always
815  * set to 1 in the vendor kernels.
816  */
817 #define OV5640_PCLK_ROOT_DIV			1
818 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS	0x00
819 
820 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
821 					    u8 pll_prediv, u8 pll_mult,
822 					    u8 sysdiv)
823 {
824 	unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
825 
826 	/* PLL1 output cannot exceed 1GHz. */
827 	if (sysclk / 1000000 > 1000)
828 		return 0;
829 
830 	return sysclk / sysdiv;
831 }
832 
833 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
834 					 unsigned long rate,
835 					 u8 *pll_prediv, u8 *pll_mult,
836 					 u8 *sysdiv)
837 {
838 	unsigned long best = ~0;
839 	u8 best_sysdiv = 1, best_mult = 1;
840 	u8 _sysdiv, _pll_mult;
841 
842 	for (_sysdiv = OV5640_SYSDIV_MIN;
843 	     _sysdiv <= OV5640_SYSDIV_MAX;
844 	     _sysdiv++) {
845 		for (_pll_mult = OV5640_PLL_MULT_MIN;
846 		     _pll_mult <= OV5640_PLL_MULT_MAX;
847 		     _pll_mult++) {
848 			unsigned long _rate;
849 
850 			/*
851 			 * The PLL multiplier cannot be odd if above
852 			 * 127.
853 			 */
854 			if (_pll_mult > 127 && (_pll_mult % 2))
855 				continue;
856 
857 			_rate = ov5640_compute_sys_clk(sensor,
858 						       OV5640_PLL_PREDIV,
859 						       _pll_mult, _sysdiv);
860 
861 			/*
862 			 * We have reached the maximum allowed PLL1 output,
863 			 * increase sysdiv.
864 			 */
865 			if (!rate)
866 				break;
867 
868 			/*
869 			 * Prefer rates above the expected clock rate than
870 			 * below, even if that means being less precise.
871 			 */
872 			if (_rate < rate)
873 				continue;
874 
875 			if (abs(rate - _rate) < abs(rate - best)) {
876 				best = _rate;
877 				best_sysdiv = _sysdiv;
878 				best_mult = _pll_mult;
879 			}
880 
881 			if (_rate == rate)
882 				goto out;
883 		}
884 	}
885 
886 out:
887 	*sysdiv = best_sysdiv;
888 	*pll_prediv = OV5640_PLL_PREDIV;
889 	*pll_mult = best_mult;
890 
891 	return best;
892 }
893 
894 /*
895  * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
896  *			    for the MIPI CSI-2 output.
897  *
898  * @rate: The requested bandwidth per lane in bytes per second.
899  *	  'Bandwidth Per Lane' is calculated as:
900  *	  bpl = HTOT * VTOT * FPS * bpp / num_lanes;
901  *
902  * This function use the requested bandwidth to calculate:
903  * - sample_rate = bpl / (bpp / num_lanes);
904  *	         = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
905  *
906  * - mipi_sclk   = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
907  *
908  * with these fixed parameters:
909  *	PLL_RDIV	= 2;
910  *	BIT_DIVIDER	= 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
911  *	PCLK_DIV	= 1;
912  *
913  * The MIPI clock generation differs for modes that use the scaler and modes
914  * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
915  * BIT CLk, and thus:
916  *
917  * - mipi_sclk = bpl / MIPI_DIV / 2;
918  *   MIPI_DIV = 1;
919  *
920  * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
921  * from the pixel clock, and thus:
922  *
923  * - sample_rate = bpl / (bpp / num_lanes);
924  *	         = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
925  *		 = bpl / (4 * MIPI_DIV / num_lanes);
926  * - MIPI_DIV	 = bpp / (4 * num_lanes);
927  *
928  * FIXME: this have been tested with 16bpp and 2 lanes setup only.
929  * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
930  * above formula for setups with 1 lane or image formats with different bpp.
931  *
932  * FIXME: this deviates from the sensor manual documentation which is quite
933  * thin on the MIPI clock tree generation part.
934  */
935 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
936 				unsigned long rate)
937 {
938 	const struct ov5640_mode_info *mode = sensor->current_mode;
939 	u8 prediv, mult, sysdiv;
940 	u8 mipi_div;
941 	int ret;
942 
943 	/*
944 	 * 1280x720 is reported to use 'SUBSAMPLING' only,
945 	 * but according to the sensor manual it goes through the
946 	 * scaler before subsampling.
947 	 */
948 	if (mode->dn_mode == SCALING ||
949 	   (mode->id == OV5640_MODE_720P_1280_720))
950 		mipi_div = OV5640_MIPI_DIV_SCLK;
951 	else
952 		mipi_div = OV5640_MIPI_DIV_PCLK;
953 
954 	ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
955 
956 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
957 			     0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
958 
959 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
960 			     0xff, sysdiv << 4 | mipi_div);
961 	if (ret)
962 		return ret;
963 
964 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
965 	if (ret)
966 		return ret;
967 
968 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
969 			     0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
970 	if (ret)
971 		return ret;
972 
973 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
974 			      0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
975 }
976 
977 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
978 				      unsigned long rate,
979 				      u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
980 				      u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
981 {
982 	unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
983 				OV5640_PCLK_ROOT_DIV;
984 
985 	_rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
986 				    sysdiv);
987 	*pll_rdiv = OV5640_PLL_ROOT_DIV;
988 	*bit_div = OV5640_BIT_DIV;
989 	*pclk_div = OV5640_PCLK_ROOT_DIV;
990 
991 	return _rate / *pll_rdiv / *bit_div / *pclk_div;
992 }
993 
994 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
995 {
996 	u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
997 	int ret;
998 
999 	ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1000 			 &bit_div, &pclk_div);
1001 
1002 	if (bit_div == 2)
1003 		bit_div = 8;
1004 
1005 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1006 			     0x0f, bit_div);
1007 	if (ret)
1008 		return ret;
1009 
1010 	/*
1011 	 * We need to set sysdiv according to the clock, and to clear
1012 	 * the MIPI divider.
1013 	 */
1014 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1015 			     0xff, sysdiv << 4);
1016 	if (ret)
1017 		return ret;
1018 
1019 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1020 			     0xff, mult);
1021 	if (ret)
1022 		return ret;
1023 
1024 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1025 			     0x1f, prediv | ((pll_rdiv - 1) << 4));
1026 	if (ret)
1027 		return ret;
1028 
1029 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1030 			      (ilog2(pclk_div) << 4));
1031 }
1032 
1033 /* download ov5640 settings to sensor through i2c */
1034 static int ov5640_set_timings(struct ov5640_dev *sensor,
1035 			      const struct ov5640_mode_info *mode)
1036 {
1037 	int ret;
1038 
1039 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1040 	if (ret < 0)
1041 		return ret;
1042 
1043 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1044 	if (ret < 0)
1045 		return ret;
1046 
1047 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1048 	if (ret < 0)
1049 		return ret;
1050 
1051 	return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1052 }
1053 
1054 static int ov5640_load_regs(struct ov5640_dev *sensor,
1055 			    const struct ov5640_mode_info *mode)
1056 {
1057 	const struct reg_value *regs = mode->reg_data;
1058 	unsigned int i;
1059 	u32 delay_ms;
1060 	u16 reg_addr;
1061 	u8 mask, val;
1062 	int ret = 0;
1063 
1064 	for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1065 		delay_ms = regs->delay_ms;
1066 		reg_addr = regs->reg_addr;
1067 		val = regs->val;
1068 		mask = regs->mask;
1069 
1070 		if (mask)
1071 			ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1072 		else
1073 			ret = ov5640_write_reg(sensor, reg_addr, val);
1074 		if (ret)
1075 			break;
1076 
1077 		if (delay_ms)
1078 			usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1079 	}
1080 
1081 	return ov5640_set_timings(sensor, mode);
1082 }
1083 
1084 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1085 {
1086 	return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1087 			      BIT(0), on ? 0 : BIT(0));
1088 }
1089 
1090 /* read exposure, in number of line periods */
1091 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1092 {
1093 	int exp, ret;
1094 	u8 temp;
1095 
1096 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1097 	if (ret)
1098 		return ret;
1099 	exp = ((int)temp & 0x0f) << 16;
1100 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1101 	if (ret)
1102 		return ret;
1103 	exp |= ((int)temp << 8);
1104 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1105 	if (ret)
1106 		return ret;
1107 	exp |= (int)temp;
1108 
1109 	return exp >> 4;
1110 }
1111 
1112 /* write exposure, given number of line periods */
1113 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1114 {
1115 	int ret;
1116 
1117 	exposure <<= 4;
1118 
1119 	ret = ov5640_write_reg(sensor,
1120 			       OV5640_REG_AEC_PK_EXPOSURE_LO,
1121 			       exposure & 0xff);
1122 	if (ret)
1123 		return ret;
1124 	ret = ov5640_write_reg(sensor,
1125 			       OV5640_REG_AEC_PK_EXPOSURE_MED,
1126 			       (exposure >> 8) & 0xff);
1127 	if (ret)
1128 		return ret;
1129 	return ov5640_write_reg(sensor,
1130 				OV5640_REG_AEC_PK_EXPOSURE_HI,
1131 				(exposure >> 16) & 0x0f);
1132 }
1133 
1134 static int ov5640_get_gain(struct ov5640_dev *sensor)
1135 {
1136 	u16 gain;
1137 	int ret;
1138 
1139 	ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1140 	if (ret)
1141 		return ret;
1142 
1143 	return gain & 0x3ff;
1144 }
1145 
1146 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1147 {
1148 	return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1149 				  (u16)gain & 0x3ff);
1150 }
1151 
1152 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1153 {
1154 	return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1155 			      BIT(1), on ? 0 : BIT(1));
1156 }
1157 
1158 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1159 {
1160 	int ret;
1161 	unsigned int flags = sensor->ep.bus.parallel.flags;
1162 	u8 pclk_pol = 0;
1163 	u8 hsync_pol = 0;
1164 	u8 vsync_pol = 0;
1165 
1166 	/*
1167 	 * Note about parallel port configuration.
1168 	 *
1169 	 * When configured in parallel mode, the OV5640 will
1170 	 * output 10 bits data on DVP data lines [9:0].
1171 	 * If only 8 bits data are wanted, the 8 bits data lines
1172 	 * of the camera interface must be physically connected
1173 	 * on the DVP data lines [9:2].
1174 	 *
1175 	 * Control lines polarity can be configured through
1176 	 * devicetree endpoint control lines properties.
1177 	 * If no endpoint control lines properties are set,
1178 	 * polarity will be as below:
1179 	 * - VSYNC:	active high
1180 	 * - HREF:	active low
1181 	 * - PCLK:	active low
1182 	 */
1183 
1184 	if (on) {
1185 		/*
1186 		 * configure parallel port control lines polarity
1187 		 *
1188 		 * POLARITY CTRL0
1189 		 * - [5]:	PCLK polarity (0: active low, 1: active high)
1190 		 * - [1]:	HREF polarity (0: active low, 1: active high)
1191 		 * - [0]:	VSYNC polarity (mismatch here between
1192 		 *		datasheet and hardware, 0 is active high
1193 		 *		and 1 is active low...)
1194 		 */
1195 		if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1196 			pclk_pol = 1;
1197 		if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1198 			hsync_pol = 1;
1199 		if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1200 			vsync_pol = 1;
1201 
1202 		ret = ov5640_write_reg(sensor,
1203 				       OV5640_REG_POLARITY_CTRL00,
1204 				       (pclk_pol << 5) |
1205 				       (hsync_pol << 1) |
1206 				       vsync_pol);
1207 
1208 		if (ret)
1209 			return ret;
1210 	}
1211 
1212 	/*
1213 	 * powerdown MIPI TX/RX PHY & disable MIPI
1214 	 *
1215 	 * MIPI CONTROL 00
1216 	 * 4:	 PWDN PHY TX
1217 	 * 3:	 PWDN PHY RX
1218 	 * 2:	 MIPI enable
1219 	 */
1220 	ret = ov5640_write_reg(sensor,
1221 			       OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
1222 	if (ret)
1223 		return ret;
1224 
1225 	/*
1226 	 * enable VSYNC/HREF/PCLK DVP control lines
1227 	 * & D[9:6] DVP data lines
1228 	 *
1229 	 * PAD OUTPUT ENABLE 01
1230 	 * - 6:		VSYNC output enable
1231 	 * - 5:		HREF output enable
1232 	 * - 4:		PCLK output enable
1233 	 * - [3:0]:	D[9:6] output enable
1234 	 */
1235 	ret = ov5640_write_reg(sensor,
1236 			       OV5640_REG_PAD_OUTPUT_ENABLE01,
1237 			       on ? 0x7f : 0);
1238 	if (ret)
1239 		return ret;
1240 
1241 	/*
1242 	 * enable D[5:0] DVP data lines
1243 	 *
1244 	 * PAD OUTPUT ENABLE 02
1245 	 * - [7:2]:	D[5:0] output enable
1246 	 */
1247 	return ov5640_write_reg(sensor,
1248 				OV5640_REG_PAD_OUTPUT_ENABLE02,
1249 				on ? 0xfc : 0);
1250 }
1251 
1252 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1253 {
1254 	int ret;
1255 
1256 	/*
1257 	 * Enable/disable the MIPI interface
1258 	 *
1259 	 * 0x300e = on ? 0x45 : 0x40
1260 	 *
1261 	 * FIXME: the sensor manual (version 2.03) reports
1262 	 * [7:5] = 000  : 1 data lane mode
1263 	 * [7:5] = 001  : 2 data lanes mode
1264 	 * But this settings do not work, while the following ones
1265 	 * have been validated for 2 data lanes mode.
1266 	 *
1267 	 * [7:5] = 010	: 2 data lanes mode
1268 	 * [4] = 0	: Power up MIPI HS Tx
1269 	 * [3] = 0	: Power up MIPI LS Rx
1270 	 * [2] = 1/0	: MIPI interface enable/disable
1271 	 * [1:0] = 01/00: FIXME: 'debug'
1272 	 */
1273 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1274 			       on ? 0x45 : 0x40);
1275 	if (ret)
1276 		return ret;
1277 
1278 	return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1279 				on ? 0x00 : 0x0f);
1280 }
1281 
1282 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1283 {
1284 	 /* calculate sysclk */
1285 	u32 xvclk = sensor->xclk_freq / 10000;
1286 	u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1287 	u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1288 	u32 bit_div2x = 1, sclk_rdiv, sysclk;
1289 	u8 temp1, temp2;
1290 	int ret;
1291 
1292 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1293 	if (ret)
1294 		return ret;
1295 	temp2 = temp1 & 0x0f;
1296 	if (temp2 == 8 || temp2 == 10)
1297 		bit_div2x = temp2 / 2;
1298 
1299 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1300 	if (ret)
1301 		return ret;
1302 	sysdiv = temp1 >> 4;
1303 	if (sysdiv == 0)
1304 		sysdiv = 16;
1305 
1306 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1307 	if (ret)
1308 		return ret;
1309 	multiplier = temp1;
1310 
1311 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1312 	if (ret)
1313 		return ret;
1314 	prediv = temp1 & 0x0f;
1315 	pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1316 
1317 	ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1318 	if (ret)
1319 		return ret;
1320 	temp2 = temp1 & 0x03;
1321 	sclk_rdiv = sclk_rdiv_map[temp2];
1322 
1323 	if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1324 		return -EINVAL;
1325 
1326 	VCO = xvclk * multiplier / prediv;
1327 
1328 	sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1329 
1330 	return sysclk;
1331 }
1332 
1333 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1334 {
1335 	 /* read HTS from register settings */
1336 	u8 mode;
1337 	int ret;
1338 
1339 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1340 	if (ret)
1341 		return ret;
1342 	mode &= 0xfb;
1343 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1344 }
1345 
1346 static int ov5640_get_hts(struct ov5640_dev *sensor)
1347 {
1348 	/* read HTS from register settings */
1349 	u16 hts;
1350 	int ret;
1351 
1352 	ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1353 	if (ret)
1354 		return ret;
1355 	return hts;
1356 }
1357 
1358 static int ov5640_get_vts(struct ov5640_dev *sensor)
1359 {
1360 	u16 vts;
1361 	int ret;
1362 
1363 	ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1364 	if (ret)
1365 		return ret;
1366 	return vts;
1367 }
1368 
1369 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1370 {
1371 	return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1372 }
1373 
1374 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1375 {
1376 	/* get banding filter value */
1377 	int ret, light_freq = 0;
1378 	u8 temp, temp1;
1379 
1380 	ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1381 	if (ret)
1382 		return ret;
1383 
1384 	if (temp & 0x80) {
1385 		/* manual */
1386 		ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1387 				      &temp1);
1388 		if (ret)
1389 			return ret;
1390 		if (temp1 & 0x04) {
1391 			/* 50Hz */
1392 			light_freq = 50;
1393 		} else {
1394 			/* 60Hz */
1395 			light_freq = 60;
1396 		}
1397 	} else {
1398 		/* auto */
1399 		ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1400 				      &temp1);
1401 		if (ret)
1402 			return ret;
1403 
1404 		if (temp1 & 0x01) {
1405 			/* 50Hz */
1406 			light_freq = 50;
1407 		} else {
1408 			/* 60Hz */
1409 		}
1410 	}
1411 
1412 	return light_freq;
1413 }
1414 
1415 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1416 {
1417 	u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1418 	int ret;
1419 
1420 	/* read preview PCLK */
1421 	ret = ov5640_get_sysclk(sensor);
1422 	if (ret < 0)
1423 		return ret;
1424 	if (ret == 0)
1425 		return -EINVAL;
1426 	sensor->prev_sysclk = ret;
1427 	/* read preview HTS */
1428 	ret = ov5640_get_hts(sensor);
1429 	if (ret < 0)
1430 		return ret;
1431 	if (ret == 0)
1432 		return -EINVAL;
1433 	sensor->prev_hts = ret;
1434 
1435 	/* read preview VTS */
1436 	ret = ov5640_get_vts(sensor);
1437 	if (ret < 0)
1438 		return ret;
1439 	prev_vts = ret;
1440 
1441 	/* calculate banding filter */
1442 	/* 60Hz */
1443 	band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1444 	ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1445 	if (ret)
1446 		return ret;
1447 	if (!band_step60)
1448 		return -EINVAL;
1449 	max_band60 = (int)((prev_vts - 4) / band_step60);
1450 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1451 	if (ret)
1452 		return ret;
1453 
1454 	/* 50Hz */
1455 	band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1456 	ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1457 	if (ret)
1458 		return ret;
1459 	if (!band_step50)
1460 		return -EINVAL;
1461 	max_band50 = (int)((prev_vts - 4) / band_step50);
1462 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1463 }
1464 
1465 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1466 {
1467 	/* stable in high */
1468 	u32 fast_high, fast_low;
1469 	int ret;
1470 
1471 	sensor->ae_low = target * 23 / 25;	/* 0.92 */
1472 	sensor->ae_high = target * 27 / 25;	/* 1.08 */
1473 
1474 	fast_high = sensor->ae_high << 1;
1475 	if (fast_high > 255)
1476 		fast_high = 255;
1477 
1478 	fast_low = sensor->ae_low >> 1;
1479 
1480 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1481 	if (ret)
1482 		return ret;
1483 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1484 	if (ret)
1485 		return ret;
1486 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1487 	if (ret)
1488 		return ret;
1489 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1490 	if (ret)
1491 		return ret;
1492 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1493 	if (ret)
1494 		return ret;
1495 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1496 }
1497 
1498 static int ov5640_get_binning(struct ov5640_dev *sensor)
1499 {
1500 	u8 temp;
1501 	int ret;
1502 
1503 	ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1504 	if (ret)
1505 		return ret;
1506 
1507 	return temp & BIT(0);
1508 }
1509 
1510 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1511 {
1512 	int ret;
1513 
1514 	/*
1515 	 * TIMING TC REG21:
1516 	 * - [0]:	Horizontal binning enable
1517 	 */
1518 	ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1519 			     BIT(0), enable ? BIT(0) : 0);
1520 	if (ret)
1521 		return ret;
1522 	/*
1523 	 * TIMING TC REG20:
1524 	 * - [0]:	Undocumented, but hardcoded init sequences
1525 	 *		are always setting REG21/REG20 bit 0 to same value...
1526 	 */
1527 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1528 			      BIT(0), enable ? BIT(0) : 0);
1529 }
1530 
1531 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1532 {
1533 	struct i2c_client *client = sensor->i2c_client;
1534 	u8 temp, channel = virtual_channel;
1535 	int ret;
1536 
1537 	if (channel > 3) {
1538 		dev_err(&client->dev,
1539 			"%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1540 			__func__, channel);
1541 		return -EINVAL;
1542 	}
1543 
1544 	ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1545 	if (ret)
1546 		return ret;
1547 	temp &= ~(3 << 6);
1548 	temp |= (channel << 6);
1549 	return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1550 }
1551 
1552 static const struct ov5640_mode_info *
1553 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1554 		 int width, int height, bool nearest)
1555 {
1556 	const struct ov5640_mode_info *mode;
1557 
1558 	mode = v4l2_find_nearest_size(ov5640_mode_data,
1559 				      ARRAY_SIZE(ov5640_mode_data),
1560 				      hact, vact,
1561 				      width, height);
1562 
1563 	if (!mode ||
1564 	    (!nearest && (mode->hact != width || mode->vact != height)))
1565 		return NULL;
1566 
1567 	/* Only 640x480 can operate at 60fps (for now) */
1568 	if (fr == OV5640_60_FPS &&
1569 	    !(mode->hact == 640 && mode->vact == 480))
1570 		return NULL;
1571 
1572 	return mode;
1573 }
1574 
1575 /*
1576  * sensor changes between scaling and subsampling, go through
1577  * exposure calculation
1578  */
1579 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1580 					 const struct ov5640_mode_info *mode)
1581 {
1582 	u32 prev_shutter, prev_gain16;
1583 	u32 cap_shutter, cap_gain16;
1584 	u32 cap_sysclk, cap_hts, cap_vts;
1585 	u32 light_freq, cap_bandfilt, cap_maxband;
1586 	u32 cap_gain16_shutter;
1587 	u8 average;
1588 	int ret;
1589 
1590 	if (!mode->reg_data)
1591 		return -EINVAL;
1592 
1593 	/* read preview shutter */
1594 	ret = ov5640_get_exposure(sensor);
1595 	if (ret < 0)
1596 		return ret;
1597 	prev_shutter = ret;
1598 	ret = ov5640_get_binning(sensor);
1599 	if (ret < 0)
1600 		return ret;
1601 	if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1602 	    mode->id != OV5640_MODE_1080P_1920_1080)
1603 		prev_shutter *= 2;
1604 
1605 	/* read preview gain */
1606 	ret = ov5640_get_gain(sensor);
1607 	if (ret < 0)
1608 		return ret;
1609 	prev_gain16 = ret;
1610 
1611 	/* get average */
1612 	ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1613 	if (ret)
1614 		return ret;
1615 
1616 	/* turn off night mode for capture */
1617 	ret = ov5640_set_night_mode(sensor);
1618 	if (ret < 0)
1619 		return ret;
1620 
1621 	/* Write capture setting */
1622 	ret = ov5640_load_regs(sensor, mode);
1623 	if (ret < 0)
1624 		return ret;
1625 
1626 	/* read capture VTS */
1627 	ret = ov5640_get_vts(sensor);
1628 	if (ret < 0)
1629 		return ret;
1630 	cap_vts = ret;
1631 	ret = ov5640_get_hts(sensor);
1632 	if (ret < 0)
1633 		return ret;
1634 	if (ret == 0)
1635 		return -EINVAL;
1636 	cap_hts = ret;
1637 
1638 	ret = ov5640_get_sysclk(sensor);
1639 	if (ret < 0)
1640 		return ret;
1641 	if (ret == 0)
1642 		return -EINVAL;
1643 	cap_sysclk = ret;
1644 
1645 	/* calculate capture banding filter */
1646 	ret = ov5640_get_light_freq(sensor);
1647 	if (ret < 0)
1648 		return ret;
1649 	light_freq = ret;
1650 
1651 	if (light_freq == 60) {
1652 		/* 60Hz */
1653 		cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1654 	} else {
1655 		/* 50Hz */
1656 		cap_bandfilt = cap_sysclk * 100 / cap_hts;
1657 	}
1658 
1659 	if (!sensor->prev_sysclk) {
1660 		ret = ov5640_get_sysclk(sensor);
1661 		if (ret < 0)
1662 			return ret;
1663 		if (ret == 0)
1664 			return -EINVAL;
1665 		sensor->prev_sysclk = ret;
1666 	}
1667 
1668 	if (!cap_bandfilt)
1669 		return -EINVAL;
1670 
1671 	cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1672 
1673 	/* calculate capture shutter/gain16 */
1674 	if (average > sensor->ae_low && average < sensor->ae_high) {
1675 		/* in stable range */
1676 		cap_gain16_shutter =
1677 			prev_gain16 * prev_shutter *
1678 			cap_sysclk / sensor->prev_sysclk *
1679 			sensor->prev_hts / cap_hts *
1680 			sensor->ae_target / average;
1681 	} else {
1682 		cap_gain16_shutter =
1683 			prev_gain16 * prev_shutter *
1684 			cap_sysclk / sensor->prev_sysclk *
1685 			sensor->prev_hts / cap_hts;
1686 	}
1687 
1688 	/* gain to shutter */
1689 	if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1690 		/* shutter < 1/100 */
1691 		cap_shutter = cap_gain16_shutter / 16;
1692 		if (cap_shutter < 1)
1693 			cap_shutter = 1;
1694 
1695 		cap_gain16 = cap_gain16_shutter / cap_shutter;
1696 		if (cap_gain16 < 16)
1697 			cap_gain16 = 16;
1698 	} else {
1699 		if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1700 			/* exposure reach max */
1701 			cap_shutter = cap_bandfilt * cap_maxband;
1702 			if (!cap_shutter)
1703 				return -EINVAL;
1704 
1705 			cap_gain16 = cap_gain16_shutter / cap_shutter;
1706 		} else {
1707 			/* 1/100 < (cap_shutter = n/100) =< max */
1708 			cap_shutter =
1709 				((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1710 				* cap_bandfilt;
1711 			if (!cap_shutter)
1712 				return -EINVAL;
1713 
1714 			cap_gain16 = cap_gain16_shutter / cap_shutter;
1715 		}
1716 	}
1717 
1718 	/* set capture gain */
1719 	ret = ov5640_set_gain(sensor, cap_gain16);
1720 	if (ret)
1721 		return ret;
1722 
1723 	/* write capture shutter */
1724 	if (cap_shutter > (cap_vts - 4)) {
1725 		cap_vts = cap_shutter + 4;
1726 		ret = ov5640_set_vts(sensor, cap_vts);
1727 		if (ret < 0)
1728 			return ret;
1729 	}
1730 
1731 	/* set exposure */
1732 	return ov5640_set_exposure(sensor, cap_shutter);
1733 }
1734 
1735 /*
1736  * if sensor changes inside scaling or subsampling
1737  * change mode directly
1738  */
1739 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1740 				  const struct ov5640_mode_info *mode)
1741 {
1742 	if (!mode->reg_data)
1743 		return -EINVAL;
1744 
1745 	/* Write capture setting */
1746 	return ov5640_load_regs(sensor, mode);
1747 }
1748 
1749 static int ov5640_set_mode(struct ov5640_dev *sensor)
1750 {
1751 	const struct ov5640_mode_info *mode = sensor->current_mode;
1752 	const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1753 	enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1754 	bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1755 	bool auto_exp =  sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1756 	unsigned long rate;
1757 	int ret;
1758 
1759 	dn_mode = mode->dn_mode;
1760 	orig_dn_mode = orig_mode->dn_mode;
1761 
1762 	/* auto gain and exposure must be turned off when changing modes */
1763 	if (auto_gain) {
1764 		ret = ov5640_set_autogain(sensor, false);
1765 		if (ret)
1766 			return ret;
1767 	}
1768 
1769 	if (auto_exp) {
1770 		ret = ov5640_set_autoexposure(sensor, false);
1771 		if (ret)
1772 			goto restore_auto_gain;
1773 	}
1774 
1775 	/*
1776 	 * All the formats we support have 16 bits per pixel, seems to require
1777 	 * the same rate than YUV, so we can just use 16 bpp all the time.
1778 	 */
1779 	rate = mode->vtot * mode->htot * 16;
1780 	rate *= ov5640_framerates[sensor->current_fr];
1781 	if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1782 		rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1783 		ret = ov5640_set_mipi_pclk(sensor, rate);
1784 	} else {
1785 		rate = rate / sensor->ep.bus.parallel.bus_width;
1786 		ret = ov5640_set_dvp_pclk(sensor, rate);
1787 	}
1788 
1789 	if (ret < 0)
1790 		return 0;
1791 
1792 	if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1793 	    (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1794 		/*
1795 		 * change between subsampling and scaling
1796 		 * go through exposure calculation
1797 		 */
1798 		ret = ov5640_set_mode_exposure_calc(sensor, mode);
1799 	} else {
1800 		/*
1801 		 * change inside subsampling or scaling
1802 		 * download firmware directly
1803 		 */
1804 		ret = ov5640_set_mode_direct(sensor, mode);
1805 	}
1806 	if (ret < 0)
1807 		goto restore_auto_exp_gain;
1808 
1809 	/* restore auto gain and exposure */
1810 	if (auto_gain)
1811 		ov5640_set_autogain(sensor, true);
1812 	if (auto_exp)
1813 		ov5640_set_autoexposure(sensor, true);
1814 
1815 	ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1816 	if (ret < 0)
1817 		return ret;
1818 	ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1819 	if (ret < 0)
1820 		return ret;
1821 	ret = ov5640_get_light_freq(sensor);
1822 	if (ret < 0)
1823 		return ret;
1824 	ret = ov5640_set_bandingfilter(sensor);
1825 	if (ret < 0)
1826 		return ret;
1827 	ret = ov5640_set_virtual_channel(sensor);
1828 	if (ret < 0)
1829 		return ret;
1830 
1831 	sensor->pending_mode_change = false;
1832 	sensor->last_mode = mode;
1833 
1834 	return 0;
1835 
1836 restore_auto_exp_gain:
1837 	if (auto_exp)
1838 		ov5640_set_autoexposure(sensor, true);
1839 restore_auto_gain:
1840 	if (auto_gain)
1841 		ov5640_set_autogain(sensor, true);
1842 
1843 	return ret;
1844 }
1845 
1846 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1847 			       struct v4l2_mbus_framefmt *format);
1848 
1849 /* restore the last set video mode after chip power-on */
1850 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1851 {
1852 	int ret;
1853 
1854 	/* first load the initial register values */
1855 	ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1856 	if (ret < 0)
1857 		return ret;
1858 	sensor->last_mode = &ov5640_mode_init_data;
1859 
1860 	ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1861 			     (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1862 			     ilog2(OV5640_SCLK_ROOT_DIV));
1863 	if (ret)
1864 		return ret;
1865 
1866 	/* now restore the last capture mode */
1867 	ret = ov5640_set_mode(sensor);
1868 	if (ret < 0)
1869 		return ret;
1870 
1871 	return ov5640_set_framefmt(sensor, &sensor->fmt);
1872 }
1873 
1874 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1875 {
1876 	gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1877 }
1878 
1879 static void ov5640_reset(struct ov5640_dev *sensor)
1880 {
1881 	if (!sensor->reset_gpio)
1882 		return;
1883 
1884 	gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1885 
1886 	/* camera power cycle */
1887 	ov5640_power(sensor, false);
1888 	usleep_range(5000, 10000);
1889 	ov5640_power(sensor, true);
1890 	usleep_range(5000, 10000);
1891 
1892 	gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1893 	usleep_range(1000, 2000);
1894 
1895 	gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1896 	usleep_range(5000, 10000);
1897 }
1898 
1899 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1900 {
1901 	struct i2c_client *client = sensor->i2c_client;
1902 	int ret;
1903 
1904 	ret = clk_prepare_enable(sensor->xclk);
1905 	if (ret) {
1906 		dev_err(&client->dev, "%s: failed to enable clock\n",
1907 			__func__);
1908 		return ret;
1909 	}
1910 
1911 	ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1912 				    sensor->supplies);
1913 	if (ret) {
1914 		dev_err(&client->dev, "%s: failed to enable regulators\n",
1915 			__func__);
1916 		goto xclk_off;
1917 	}
1918 
1919 	ov5640_reset(sensor);
1920 	ov5640_power(sensor, true);
1921 
1922 	ret = ov5640_init_slave_id(sensor);
1923 	if (ret)
1924 		goto power_off;
1925 
1926 	return 0;
1927 
1928 power_off:
1929 	ov5640_power(sensor, false);
1930 	regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1931 xclk_off:
1932 	clk_disable_unprepare(sensor->xclk);
1933 	return ret;
1934 }
1935 
1936 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1937 {
1938 	ov5640_power(sensor, false);
1939 	regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1940 	clk_disable_unprepare(sensor->xclk);
1941 }
1942 
1943 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
1944 {
1945 	int ret = 0;
1946 
1947 	if (on) {
1948 		ret = ov5640_set_power_on(sensor);
1949 		if (ret)
1950 			return ret;
1951 
1952 		ret = ov5640_restore_mode(sensor);
1953 		if (ret)
1954 			goto power_off;
1955 
1956 		/* We're done here for DVP bus, while CSI-2 needs setup. */
1957 		if (sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
1958 			return 0;
1959 
1960 		/*
1961 		 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
1962 		 *
1963 		 * 0x300e = 0x40
1964 		 * [7:5] = 010	: 2 data lanes mode (see FIXME note in
1965 		 *		  "ov5640_set_stream_mipi()")
1966 		 * [4] = 0	: Power up MIPI HS Tx
1967 		 * [3] = 0	: Power up MIPI LS Rx
1968 		 * [2] = 0	: MIPI interface disabled
1969 		 */
1970 		ret = ov5640_write_reg(sensor,
1971 				       OV5640_REG_IO_MIPI_CTRL00, 0x40);
1972 		if (ret)
1973 			goto power_off;
1974 
1975 		/*
1976 		 * Gate clock and set LP11 in 'no packets mode' (idle)
1977 		 *
1978 		 * 0x4800 = 0x24
1979 		 * [5] = 1	: Gate clock when 'no packets'
1980 		 * [2] = 1	: MIPI bus in LP11 when 'no packets'
1981 		 */
1982 		ret = ov5640_write_reg(sensor,
1983 				       OV5640_REG_MIPI_CTRL00, 0x24);
1984 		if (ret)
1985 			goto power_off;
1986 
1987 		/*
1988 		 * Set data lanes and clock in LP11 when 'sleeping'
1989 		 *
1990 		 * 0x3019 = 0x70
1991 		 * [6] = 1	: MIPI data lane 2 in LP11 when 'sleeping'
1992 		 * [5] = 1	: MIPI data lane 1 in LP11 when 'sleeping'
1993 		 * [4] = 1	: MIPI clock lane in LP11 when 'sleeping'
1994 		 */
1995 		ret = ov5640_write_reg(sensor,
1996 				       OV5640_REG_PAD_OUTPUT00, 0x70);
1997 		if (ret)
1998 			goto power_off;
1999 
2000 		/* Give lanes some time to coax into LP11 state. */
2001 		usleep_range(500, 1000);
2002 
2003 	} else {
2004 		if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
2005 			/* Reset MIPI bus settings to their default values. */
2006 			ov5640_write_reg(sensor,
2007 					 OV5640_REG_IO_MIPI_CTRL00, 0x58);
2008 			ov5640_write_reg(sensor,
2009 					 OV5640_REG_MIPI_CTRL00, 0x04);
2010 			ov5640_write_reg(sensor,
2011 					 OV5640_REG_PAD_OUTPUT00, 0x00);
2012 		}
2013 
2014 		ov5640_set_power_off(sensor);
2015 	}
2016 
2017 	return 0;
2018 
2019 power_off:
2020 	ov5640_set_power_off(sensor);
2021 	return ret;
2022 }
2023 
2024 /* --------------- Subdev Operations --------------- */
2025 
2026 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2027 {
2028 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2029 	int ret = 0;
2030 
2031 	mutex_lock(&sensor->lock);
2032 
2033 	/*
2034 	 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2035 	 * update the power state.
2036 	 */
2037 	if (sensor->power_count == !on) {
2038 		ret = ov5640_set_power(sensor, !!on);
2039 		if (ret)
2040 			goto out;
2041 	}
2042 
2043 	/* Update the power count. */
2044 	sensor->power_count += on ? 1 : -1;
2045 	WARN_ON(sensor->power_count < 0);
2046 out:
2047 	mutex_unlock(&sensor->lock);
2048 
2049 	if (on && !ret && sensor->power_count == 1) {
2050 		/* restore controls */
2051 		ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2052 	}
2053 
2054 	return ret;
2055 }
2056 
2057 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2058 				     struct v4l2_fract *fi,
2059 				     u32 width, u32 height)
2060 {
2061 	const struct ov5640_mode_info *mode;
2062 	enum ov5640_frame_rate rate = OV5640_30_FPS;
2063 	int minfps, maxfps, best_fps, fps;
2064 	int i;
2065 
2066 	minfps = ov5640_framerates[OV5640_15_FPS];
2067 	maxfps = ov5640_framerates[OV5640_60_FPS];
2068 
2069 	if (fi->numerator == 0) {
2070 		fi->denominator = maxfps;
2071 		fi->numerator = 1;
2072 		rate = OV5640_60_FPS;
2073 		goto find_mode;
2074 	}
2075 
2076 	fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2077 			minfps, maxfps);
2078 
2079 	best_fps = minfps;
2080 	for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2081 		int curr_fps = ov5640_framerates[i];
2082 
2083 		if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2084 			best_fps = curr_fps;
2085 			rate = i;
2086 		}
2087 	}
2088 
2089 	fi->numerator = 1;
2090 	fi->denominator = best_fps;
2091 
2092 find_mode:
2093 	mode = ov5640_find_mode(sensor, rate, width, height, false);
2094 	return mode ? rate : -EINVAL;
2095 }
2096 
2097 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2098 			  struct v4l2_subdev_pad_config *cfg,
2099 			  struct v4l2_subdev_format *format)
2100 {
2101 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2102 	struct v4l2_mbus_framefmt *fmt;
2103 
2104 	if (format->pad != 0)
2105 		return -EINVAL;
2106 
2107 	mutex_lock(&sensor->lock);
2108 
2109 	if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2110 		fmt = v4l2_subdev_get_try_format(&sensor->sd, cfg,
2111 						 format->pad);
2112 	else
2113 		fmt = &sensor->fmt;
2114 
2115 	format->format = *fmt;
2116 
2117 	mutex_unlock(&sensor->lock);
2118 
2119 	return 0;
2120 }
2121 
2122 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2123 				   struct v4l2_mbus_framefmt *fmt,
2124 				   enum ov5640_frame_rate fr,
2125 				   const struct ov5640_mode_info **new_mode)
2126 {
2127 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2128 	const struct ov5640_mode_info *mode;
2129 	int i;
2130 
2131 	mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2132 	if (!mode)
2133 		return -EINVAL;
2134 	fmt->width = mode->hact;
2135 	fmt->height = mode->vact;
2136 
2137 	if (new_mode)
2138 		*new_mode = mode;
2139 
2140 	for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2141 		if (ov5640_formats[i].code == fmt->code)
2142 			break;
2143 	if (i >= ARRAY_SIZE(ov5640_formats))
2144 		i = 0;
2145 
2146 	fmt->code = ov5640_formats[i].code;
2147 	fmt->colorspace = ov5640_formats[i].colorspace;
2148 	fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2149 	fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2150 	fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2151 
2152 	return 0;
2153 }
2154 
2155 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2156 			  struct v4l2_subdev_pad_config *cfg,
2157 			  struct v4l2_subdev_format *format)
2158 {
2159 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2160 	const struct ov5640_mode_info *new_mode;
2161 	struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2162 	struct v4l2_mbus_framefmt *fmt;
2163 	int ret;
2164 
2165 	if (format->pad != 0)
2166 		return -EINVAL;
2167 
2168 	mutex_lock(&sensor->lock);
2169 
2170 	if (sensor->streaming) {
2171 		ret = -EBUSY;
2172 		goto out;
2173 	}
2174 
2175 	ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2176 				      sensor->current_fr, &new_mode);
2177 	if (ret)
2178 		goto out;
2179 
2180 	if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2181 		fmt = v4l2_subdev_get_try_format(sd, cfg, 0);
2182 	else
2183 		fmt = &sensor->fmt;
2184 
2185 	*fmt = *mbus_fmt;
2186 
2187 	if (new_mode != sensor->current_mode) {
2188 		sensor->current_mode = new_mode;
2189 		sensor->pending_mode_change = true;
2190 	}
2191 	if (mbus_fmt->code != sensor->fmt.code)
2192 		sensor->pending_fmt_change = true;
2193 
2194 out:
2195 	mutex_unlock(&sensor->lock);
2196 	return ret;
2197 }
2198 
2199 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2200 			       struct v4l2_mbus_framefmt *format)
2201 {
2202 	int ret = 0;
2203 	bool is_rgb = false;
2204 	bool is_jpeg = false;
2205 	u8 val;
2206 
2207 	switch (format->code) {
2208 	case MEDIA_BUS_FMT_UYVY8_2X8:
2209 		/* YUV422, UYVY */
2210 		val = 0x3f;
2211 		break;
2212 	case MEDIA_BUS_FMT_YUYV8_2X8:
2213 		/* YUV422, YUYV */
2214 		val = 0x30;
2215 		break;
2216 	case MEDIA_BUS_FMT_RGB565_2X8_LE:
2217 		/* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2218 		val = 0x6F;
2219 		is_rgb = true;
2220 		break;
2221 	case MEDIA_BUS_FMT_RGB565_2X8_BE:
2222 		/* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2223 		val = 0x61;
2224 		is_rgb = true;
2225 		break;
2226 	case MEDIA_BUS_FMT_JPEG_1X8:
2227 		/* YUV422, YUYV */
2228 		val = 0x30;
2229 		is_jpeg = true;
2230 		break;
2231 	default:
2232 		return -EINVAL;
2233 	}
2234 
2235 	/* FORMAT CONTROL00: YUV and RGB formatting */
2236 	ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, val);
2237 	if (ret)
2238 		return ret;
2239 
2240 	/* FORMAT MUX CONTROL: ISP YUV or RGB */
2241 	ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL,
2242 			       is_rgb ? 0x01 : 0x00);
2243 	if (ret)
2244 		return ret;
2245 
2246 	/*
2247 	 * TIMING TC REG21:
2248 	 * - [5]:	JPEG enable
2249 	 */
2250 	ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2251 			     BIT(5), is_jpeg ? BIT(5) : 0);
2252 	if (ret)
2253 		return ret;
2254 
2255 	/*
2256 	 * SYSTEM RESET02:
2257 	 * - [4]:	Reset JFIFO
2258 	 * - [3]:	Reset SFIFO
2259 	 * - [2]:	Reset JPEG
2260 	 */
2261 	ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2262 			     BIT(4) | BIT(3) | BIT(2),
2263 			     is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2264 	if (ret)
2265 		return ret;
2266 
2267 	/*
2268 	 * CLOCK ENABLE02:
2269 	 * - [5]:	Enable JPEG 2x clock
2270 	 * - [3]:	Enable JPEG clock
2271 	 */
2272 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2273 			      BIT(5) | BIT(3),
2274 			      is_jpeg ? (BIT(5) | BIT(3)) : 0);
2275 }
2276 
2277 /*
2278  * Sensor Controls.
2279  */
2280 
2281 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2282 {
2283 	int ret;
2284 
2285 	if (value) {
2286 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2287 				     BIT(0), BIT(0));
2288 		if (ret)
2289 			return ret;
2290 		ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2291 	} else {
2292 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2293 	}
2294 
2295 	return ret;
2296 }
2297 
2298 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2299 {
2300 	int ret;
2301 
2302 	if (value) {
2303 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2304 				     BIT(2), BIT(2));
2305 		if (ret)
2306 			return ret;
2307 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2308 				       value & 0xff);
2309 	} else {
2310 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2311 	}
2312 
2313 	return ret;
2314 }
2315 
2316 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2317 {
2318 	int ret;
2319 
2320 	if (value) {
2321 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2322 				     BIT(1), BIT(1));
2323 		if (ret)
2324 			return ret;
2325 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2326 				       value & 0xff);
2327 		if (ret)
2328 			return ret;
2329 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2330 				       value & 0xff);
2331 	} else {
2332 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2333 	}
2334 
2335 	return ret;
2336 }
2337 
2338 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2339 {
2340 	int ret;
2341 
2342 	ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2343 			     BIT(0), awb ? 0 : 1);
2344 	if (ret)
2345 		return ret;
2346 
2347 	if (!awb) {
2348 		u16 red = (u16)sensor->ctrls.red_balance->val;
2349 		u16 blue = (u16)sensor->ctrls.blue_balance->val;
2350 
2351 		ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2352 		if (ret)
2353 			return ret;
2354 		ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2355 	}
2356 
2357 	return ret;
2358 }
2359 
2360 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2361 				    enum v4l2_exposure_auto_type auto_exposure)
2362 {
2363 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2364 	bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2365 	int ret = 0;
2366 
2367 	if (ctrls->auto_exp->is_new) {
2368 		ret = ov5640_set_autoexposure(sensor, auto_exp);
2369 		if (ret)
2370 			return ret;
2371 	}
2372 
2373 	if (!auto_exp && ctrls->exposure->is_new) {
2374 		u16 max_exp;
2375 
2376 		ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2377 					&max_exp);
2378 		if (ret)
2379 			return ret;
2380 		ret = ov5640_get_vts(sensor);
2381 		if (ret < 0)
2382 			return ret;
2383 		max_exp += ret;
2384 		ret = 0;
2385 
2386 		if (ctrls->exposure->val < max_exp)
2387 			ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2388 	}
2389 
2390 	return ret;
2391 }
2392 
2393 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2394 {
2395 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2396 	int ret = 0;
2397 
2398 	if (ctrls->auto_gain->is_new) {
2399 		ret = ov5640_set_autogain(sensor, auto_gain);
2400 		if (ret)
2401 			return ret;
2402 	}
2403 
2404 	if (!auto_gain && ctrls->gain->is_new)
2405 		ret = ov5640_set_gain(sensor, ctrls->gain->val);
2406 
2407 	return ret;
2408 }
2409 
2410 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2411 {
2412 	return ov5640_mod_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2413 			      0xa4, value ? 0xa4 : 0);
2414 }
2415 
2416 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2417 {
2418 	int ret;
2419 
2420 	ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2421 			     (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2422 			     0 : BIT(7));
2423 	if (ret)
2424 		return ret;
2425 
2426 	return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2427 			      (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2428 			      BIT(2) : 0);
2429 }
2430 
2431 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2432 {
2433 	/*
2434 	 * If sensor is mounted upside down, mirror logic is inversed.
2435 	 *
2436 	 * Sensor is a BSI (Back Side Illuminated) one,
2437 	 * so image captured is physically mirrored.
2438 	 * This is why mirror logic is inversed in
2439 	 * order to cancel this mirror effect.
2440 	 */
2441 
2442 	/*
2443 	 * TIMING TC REG21:
2444 	 * - [2]:	ISP mirror
2445 	 * - [1]:	Sensor mirror
2446 	 */
2447 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2448 			      BIT(2) | BIT(1),
2449 			      (!(value ^ sensor->upside_down)) ?
2450 			      (BIT(2) | BIT(1)) : 0);
2451 }
2452 
2453 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2454 {
2455 	/* If sensor is mounted upside down, flip logic is inversed */
2456 
2457 	/*
2458 	 * TIMING TC REG20:
2459 	 * - [2]:	ISP vflip
2460 	 * - [1]:	Sensor vflip
2461 	 */
2462 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2463 			      BIT(2) | BIT(1),
2464 			      (value ^ sensor->upside_down) ?
2465 			      (BIT(2) | BIT(1)) : 0);
2466 }
2467 
2468 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2469 {
2470 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2471 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2472 	int val;
2473 
2474 	/* v4l2_ctrl_lock() locks our own mutex */
2475 
2476 	switch (ctrl->id) {
2477 	case V4L2_CID_AUTOGAIN:
2478 		val = ov5640_get_gain(sensor);
2479 		if (val < 0)
2480 			return val;
2481 		sensor->ctrls.gain->val = val;
2482 		break;
2483 	case V4L2_CID_EXPOSURE_AUTO:
2484 		val = ov5640_get_exposure(sensor);
2485 		if (val < 0)
2486 			return val;
2487 		sensor->ctrls.exposure->val = val;
2488 		break;
2489 	}
2490 
2491 	return 0;
2492 }
2493 
2494 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2495 {
2496 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2497 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2498 	int ret;
2499 
2500 	/* v4l2_ctrl_lock() locks our own mutex */
2501 
2502 	/*
2503 	 * If the device is not powered up by the host driver do
2504 	 * not apply any controls to H/W at this time. Instead
2505 	 * the controls will be restored right after power-up.
2506 	 */
2507 	if (sensor->power_count == 0)
2508 		return 0;
2509 
2510 	switch (ctrl->id) {
2511 	case V4L2_CID_AUTOGAIN:
2512 		ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2513 		break;
2514 	case V4L2_CID_EXPOSURE_AUTO:
2515 		ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2516 		break;
2517 	case V4L2_CID_AUTO_WHITE_BALANCE:
2518 		ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2519 		break;
2520 	case V4L2_CID_HUE:
2521 		ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2522 		break;
2523 	case V4L2_CID_CONTRAST:
2524 		ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2525 		break;
2526 	case V4L2_CID_SATURATION:
2527 		ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2528 		break;
2529 	case V4L2_CID_TEST_PATTERN:
2530 		ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2531 		break;
2532 	case V4L2_CID_POWER_LINE_FREQUENCY:
2533 		ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2534 		break;
2535 	case V4L2_CID_HFLIP:
2536 		ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2537 		break;
2538 	case V4L2_CID_VFLIP:
2539 		ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2540 		break;
2541 	default:
2542 		ret = -EINVAL;
2543 		break;
2544 	}
2545 
2546 	return ret;
2547 }
2548 
2549 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2550 	.g_volatile_ctrl = ov5640_g_volatile_ctrl,
2551 	.s_ctrl = ov5640_s_ctrl,
2552 };
2553 
2554 static const char * const test_pattern_menu[] = {
2555 	"Disabled",
2556 	"Color bars",
2557 };
2558 
2559 static int ov5640_init_controls(struct ov5640_dev *sensor)
2560 {
2561 	const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2562 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2563 	struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2564 	int ret;
2565 
2566 	v4l2_ctrl_handler_init(hdl, 32);
2567 
2568 	/* we can use our own mutex for the ctrl lock */
2569 	hdl->lock = &sensor->lock;
2570 
2571 	/* Auto/manual white balance */
2572 	ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2573 					   V4L2_CID_AUTO_WHITE_BALANCE,
2574 					   0, 1, 1, 1);
2575 	ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2576 						0, 4095, 1, 0);
2577 	ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2578 					       0, 4095, 1, 0);
2579 	/* Auto/manual exposure */
2580 	ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2581 						 V4L2_CID_EXPOSURE_AUTO,
2582 						 V4L2_EXPOSURE_MANUAL, 0,
2583 						 V4L2_EXPOSURE_AUTO);
2584 	ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2585 					    0, 65535, 1, 0);
2586 	/* Auto/manual gain */
2587 	ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2588 					     0, 1, 1, 1);
2589 	ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2590 					0, 1023, 1, 0);
2591 
2592 	ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2593 					      0, 255, 1, 64);
2594 	ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2595 				       0, 359, 1, 0);
2596 	ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2597 					    0, 255, 1, 0);
2598 	ctrls->test_pattern =
2599 		v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2600 					     ARRAY_SIZE(test_pattern_menu) - 1,
2601 					     0, 0, test_pattern_menu);
2602 	ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2603 					 0, 1, 1, 0);
2604 	ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2605 					 0, 1, 1, 0);
2606 
2607 	ctrls->light_freq =
2608 		v4l2_ctrl_new_std_menu(hdl, ops,
2609 				       V4L2_CID_POWER_LINE_FREQUENCY,
2610 				       V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2611 				       V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2612 
2613 	if (hdl->error) {
2614 		ret = hdl->error;
2615 		goto free_ctrls;
2616 	}
2617 
2618 	ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2619 	ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2620 
2621 	v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2622 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2623 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2624 
2625 	sensor->sd.ctrl_handler = hdl;
2626 	return 0;
2627 
2628 free_ctrls:
2629 	v4l2_ctrl_handler_free(hdl);
2630 	return ret;
2631 }
2632 
2633 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2634 				  struct v4l2_subdev_pad_config *cfg,
2635 				  struct v4l2_subdev_frame_size_enum *fse)
2636 {
2637 	if (fse->pad != 0)
2638 		return -EINVAL;
2639 	if (fse->index >= OV5640_NUM_MODES)
2640 		return -EINVAL;
2641 
2642 	fse->min_width =
2643 		ov5640_mode_data[fse->index].hact;
2644 	fse->max_width = fse->min_width;
2645 	fse->min_height =
2646 		ov5640_mode_data[fse->index].vact;
2647 	fse->max_height = fse->min_height;
2648 
2649 	return 0;
2650 }
2651 
2652 static int ov5640_enum_frame_interval(
2653 	struct v4l2_subdev *sd,
2654 	struct v4l2_subdev_pad_config *cfg,
2655 	struct v4l2_subdev_frame_interval_enum *fie)
2656 {
2657 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2658 	struct v4l2_fract tpf;
2659 	int ret;
2660 
2661 	if (fie->pad != 0)
2662 		return -EINVAL;
2663 	if (fie->index >= OV5640_NUM_FRAMERATES)
2664 		return -EINVAL;
2665 
2666 	tpf.numerator = 1;
2667 	tpf.denominator = ov5640_framerates[fie->index];
2668 
2669 	ret = ov5640_try_frame_interval(sensor, &tpf,
2670 					fie->width, fie->height);
2671 	if (ret < 0)
2672 		return -EINVAL;
2673 
2674 	fie->interval = tpf;
2675 	return 0;
2676 }
2677 
2678 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2679 				   struct v4l2_subdev_frame_interval *fi)
2680 {
2681 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2682 
2683 	mutex_lock(&sensor->lock);
2684 	fi->interval = sensor->frame_interval;
2685 	mutex_unlock(&sensor->lock);
2686 
2687 	return 0;
2688 }
2689 
2690 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2691 				   struct v4l2_subdev_frame_interval *fi)
2692 {
2693 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2694 	const struct ov5640_mode_info *mode;
2695 	int frame_rate, ret = 0;
2696 
2697 	if (fi->pad != 0)
2698 		return -EINVAL;
2699 
2700 	mutex_lock(&sensor->lock);
2701 
2702 	if (sensor->streaming) {
2703 		ret = -EBUSY;
2704 		goto out;
2705 	}
2706 
2707 	mode = sensor->current_mode;
2708 
2709 	frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2710 					       mode->hact, mode->vact);
2711 	if (frame_rate < 0) {
2712 		/* Always return a valid frame interval value */
2713 		fi->interval = sensor->frame_interval;
2714 		goto out;
2715 	}
2716 
2717 	mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2718 				mode->vact, true);
2719 	if (!mode) {
2720 		ret = -EINVAL;
2721 		goto out;
2722 	}
2723 
2724 	if (mode != sensor->current_mode ||
2725 	    frame_rate != sensor->current_fr) {
2726 		sensor->current_fr = frame_rate;
2727 		sensor->frame_interval = fi->interval;
2728 		sensor->current_mode = mode;
2729 		sensor->pending_mode_change = true;
2730 	}
2731 out:
2732 	mutex_unlock(&sensor->lock);
2733 	return ret;
2734 }
2735 
2736 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2737 				 struct v4l2_subdev_pad_config *cfg,
2738 				 struct v4l2_subdev_mbus_code_enum *code)
2739 {
2740 	if (code->pad != 0)
2741 		return -EINVAL;
2742 	if (code->index >= ARRAY_SIZE(ov5640_formats))
2743 		return -EINVAL;
2744 
2745 	code->code = ov5640_formats[code->index].code;
2746 	return 0;
2747 }
2748 
2749 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2750 {
2751 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2752 	int ret = 0;
2753 
2754 	mutex_lock(&sensor->lock);
2755 
2756 	if (sensor->streaming == !enable) {
2757 		if (enable && sensor->pending_mode_change) {
2758 			ret = ov5640_set_mode(sensor);
2759 			if (ret)
2760 				goto out;
2761 		}
2762 
2763 		if (enable && sensor->pending_fmt_change) {
2764 			ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2765 			if (ret)
2766 				goto out;
2767 			sensor->pending_fmt_change = false;
2768 		}
2769 
2770 		if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2771 			ret = ov5640_set_stream_mipi(sensor, enable);
2772 		else
2773 			ret = ov5640_set_stream_dvp(sensor, enable);
2774 
2775 		if (!ret)
2776 			sensor->streaming = enable;
2777 	}
2778 out:
2779 	mutex_unlock(&sensor->lock);
2780 	return ret;
2781 }
2782 
2783 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2784 	.s_power = ov5640_s_power,
2785 	.log_status = v4l2_ctrl_subdev_log_status,
2786 	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2787 	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
2788 };
2789 
2790 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2791 	.g_frame_interval = ov5640_g_frame_interval,
2792 	.s_frame_interval = ov5640_s_frame_interval,
2793 	.s_stream = ov5640_s_stream,
2794 };
2795 
2796 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2797 	.enum_mbus_code = ov5640_enum_mbus_code,
2798 	.get_fmt = ov5640_get_fmt,
2799 	.set_fmt = ov5640_set_fmt,
2800 	.enum_frame_size = ov5640_enum_frame_size,
2801 	.enum_frame_interval = ov5640_enum_frame_interval,
2802 };
2803 
2804 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2805 	.core = &ov5640_core_ops,
2806 	.video = &ov5640_video_ops,
2807 	.pad = &ov5640_pad_ops,
2808 };
2809 
2810 static int ov5640_get_regulators(struct ov5640_dev *sensor)
2811 {
2812 	int i;
2813 
2814 	for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
2815 		sensor->supplies[i].supply = ov5640_supply_name[i];
2816 
2817 	return devm_regulator_bulk_get(&sensor->i2c_client->dev,
2818 				       OV5640_NUM_SUPPLIES,
2819 				       sensor->supplies);
2820 }
2821 
2822 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
2823 {
2824 	struct i2c_client *client = sensor->i2c_client;
2825 	int ret = 0;
2826 	u16 chip_id;
2827 
2828 	ret = ov5640_set_power_on(sensor);
2829 	if (ret)
2830 		return ret;
2831 
2832 	ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
2833 	if (ret) {
2834 		dev_err(&client->dev, "%s: failed to read chip identifier\n",
2835 			__func__);
2836 		goto power_off;
2837 	}
2838 
2839 	if (chip_id != 0x5640) {
2840 		dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
2841 			__func__, chip_id);
2842 		ret = -ENXIO;
2843 	}
2844 
2845 power_off:
2846 	ov5640_set_power_off(sensor);
2847 	return ret;
2848 }
2849 
2850 static int ov5640_probe(struct i2c_client *client,
2851 			const struct i2c_device_id *id)
2852 {
2853 	struct device *dev = &client->dev;
2854 	struct fwnode_handle *endpoint;
2855 	struct ov5640_dev *sensor;
2856 	struct v4l2_mbus_framefmt *fmt;
2857 	u32 rotation;
2858 	int ret;
2859 
2860 	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
2861 	if (!sensor)
2862 		return -ENOMEM;
2863 
2864 	sensor->i2c_client = client;
2865 
2866 	/*
2867 	 * default init sequence initialize sensor to
2868 	 * YUV422 UYVY VGA@30fps
2869 	 */
2870 	fmt = &sensor->fmt;
2871 	fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
2872 	fmt->colorspace = V4L2_COLORSPACE_SRGB;
2873 	fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2874 	fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2875 	fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2876 	fmt->width = 640;
2877 	fmt->height = 480;
2878 	fmt->field = V4L2_FIELD_NONE;
2879 	sensor->frame_interval.numerator = 1;
2880 	sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
2881 	sensor->current_fr = OV5640_30_FPS;
2882 	sensor->current_mode =
2883 		&ov5640_mode_data[OV5640_MODE_VGA_640_480];
2884 	sensor->last_mode = sensor->current_mode;
2885 
2886 	sensor->ae_target = 52;
2887 
2888 	/* optional indication of physical rotation of sensor */
2889 	ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
2890 				       &rotation);
2891 	if (!ret) {
2892 		switch (rotation) {
2893 		case 180:
2894 			sensor->upside_down = true;
2895 			/* fall through */
2896 		case 0:
2897 			break;
2898 		default:
2899 			dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
2900 				 rotation);
2901 		}
2902 	}
2903 
2904 	endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
2905 						  NULL);
2906 	if (!endpoint) {
2907 		dev_err(dev, "endpoint node not found\n");
2908 		return -EINVAL;
2909 	}
2910 
2911 	ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
2912 	fwnode_handle_put(endpoint);
2913 	if (ret) {
2914 		dev_err(dev, "Could not parse endpoint\n");
2915 		return ret;
2916 	}
2917 
2918 	/* get system clock (xclk) */
2919 	sensor->xclk = devm_clk_get(dev, "xclk");
2920 	if (IS_ERR(sensor->xclk)) {
2921 		dev_err(dev, "failed to get xclk\n");
2922 		return PTR_ERR(sensor->xclk);
2923 	}
2924 
2925 	sensor->xclk_freq = clk_get_rate(sensor->xclk);
2926 	if (sensor->xclk_freq < OV5640_XCLK_MIN ||
2927 	    sensor->xclk_freq > OV5640_XCLK_MAX) {
2928 		dev_err(dev, "xclk frequency out of range: %d Hz\n",
2929 			sensor->xclk_freq);
2930 		return -EINVAL;
2931 	}
2932 
2933 	/* request optional power down pin */
2934 	sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
2935 						    GPIOD_OUT_HIGH);
2936 	/* request optional reset pin */
2937 	sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
2938 						     GPIOD_OUT_HIGH);
2939 
2940 	v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
2941 
2942 	sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
2943 			    V4L2_SUBDEV_FL_HAS_EVENTS;
2944 	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
2945 	sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
2946 	ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
2947 	if (ret)
2948 		return ret;
2949 
2950 	ret = ov5640_get_regulators(sensor);
2951 	if (ret)
2952 		return ret;
2953 
2954 	mutex_init(&sensor->lock);
2955 
2956 	ret = ov5640_check_chip_id(sensor);
2957 	if (ret)
2958 		goto entity_cleanup;
2959 
2960 	ret = ov5640_init_controls(sensor);
2961 	if (ret)
2962 		goto entity_cleanup;
2963 
2964 	ret = v4l2_async_register_subdev(&sensor->sd);
2965 	if (ret)
2966 		goto free_ctrls;
2967 
2968 	return 0;
2969 
2970 free_ctrls:
2971 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
2972 entity_cleanup:
2973 	mutex_destroy(&sensor->lock);
2974 	media_entity_cleanup(&sensor->sd.entity);
2975 	return ret;
2976 }
2977 
2978 static int ov5640_remove(struct i2c_client *client)
2979 {
2980 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
2981 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2982 
2983 	v4l2_async_unregister_subdev(&sensor->sd);
2984 	mutex_destroy(&sensor->lock);
2985 	media_entity_cleanup(&sensor->sd.entity);
2986 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
2987 
2988 	return 0;
2989 }
2990 
2991 static const struct i2c_device_id ov5640_id[] = {
2992 	{"ov5640", 0},
2993 	{},
2994 };
2995 MODULE_DEVICE_TABLE(i2c, ov5640_id);
2996 
2997 static const struct of_device_id ov5640_dt_ids[] = {
2998 	{ .compatible = "ovti,ov5640" },
2999 	{ /* sentinel */ }
3000 };
3001 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3002 
3003 static struct i2c_driver ov5640_i2c_driver = {
3004 	.driver = {
3005 		.name  = "ov5640",
3006 		.of_match_table	= ov5640_dt_ids,
3007 	},
3008 	.id_table = ov5640_id,
3009 	.probe    = ov5640_probe,
3010 	.remove   = ov5640_remove,
3011 };
3012 
3013 module_i2c_driver(ov5640_i2c_driver);
3014 
3015 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3016 MODULE_LICENSE("GPL");
3017