xref: /linux/drivers/media/i2c/ov5640.c (revision bb5b94f5bbe75470912b70fb08880fc5273aa62d)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
4  * Copyright (C) 2014-2017 Mentor Graphics Inc.
5  */
6 
7 #include <linux/clk.h>
8 #include <linux/clk-provider.h>
9 #include <linux/clkdev.h>
10 #include <linux/ctype.h>
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/i2c.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <media/v4l2-async.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-fwnode.h>
26 #include <media/v4l2-subdev.h>
27 
28 /* min/typical/max system clock (xclk) frequencies */
29 #define OV5640_XCLK_MIN  6000000
30 #define OV5640_XCLK_MAX 54000000
31 
32 #define OV5640_DEFAULT_SLAVE_ID 0x3c
33 
34 #define OV5640_REG_SYS_RESET02		0x3002
35 #define OV5640_REG_SYS_CLOCK_ENABLE02	0x3006
36 #define OV5640_REG_SYS_CTRL0		0x3008
37 #define OV5640_REG_SYS_CTRL0_SW_PWDN	0x42
38 #define OV5640_REG_SYS_CTRL0_SW_PWUP	0x02
39 #define OV5640_REG_CHIP_ID		0x300a
40 #define OV5640_REG_IO_MIPI_CTRL00	0x300e
41 #define OV5640_REG_PAD_OUTPUT_ENABLE01	0x3017
42 #define OV5640_REG_PAD_OUTPUT_ENABLE02	0x3018
43 #define OV5640_REG_PAD_OUTPUT00		0x3019
44 #define OV5640_REG_SYSTEM_CONTROL1	0x302e
45 #define OV5640_REG_SC_PLL_CTRL0		0x3034
46 #define OV5640_REG_SC_PLL_CTRL1		0x3035
47 #define OV5640_REG_SC_PLL_CTRL2		0x3036
48 #define OV5640_REG_SC_PLL_CTRL3		0x3037
49 #define OV5640_REG_SLAVE_ID		0x3100
50 #define OV5640_REG_SCCB_SYS_CTRL1	0x3103
51 #define OV5640_REG_SYS_ROOT_DIVIDER	0x3108
52 #define OV5640_REG_AWB_R_GAIN		0x3400
53 #define OV5640_REG_AWB_G_GAIN		0x3402
54 #define OV5640_REG_AWB_B_GAIN		0x3404
55 #define OV5640_REG_AWB_MANUAL_CTRL	0x3406
56 #define OV5640_REG_AEC_PK_EXPOSURE_HI	0x3500
57 #define OV5640_REG_AEC_PK_EXPOSURE_MED	0x3501
58 #define OV5640_REG_AEC_PK_EXPOSURE_LO	0x3502
59 #define OV5640_REG_AEC_PK_MANUAL	0x3503
60 #define OV5640_REG_AEC_PK_REAL_GAIN	0x350a
61 #define OV5640_REG_AEC_PK_VTS		0x350c
62 #define OV5640_REG_TIMING_DVPHO		0x3808
63 #define OV5640_REG_TIMING_DVPVO		0x380a
64 #define OV5640_REG_TIMING_HTS		0x380c
65 #define OV5640_REG_TIMING_VTS		0x380e
66 #define OV5640_REG_TIMING_TC_REG20	0x3820
67 #define OV5640_REG_TIMING_TC_REG21	0x3821
68 #define OV5640_REG_AEC_CTRL00		0x3a00
69 #define OV5640_REG_AEC_B50_STEP		0x3a08
70 #define OV5640_REG_AEC_B60_STEP		0x3a0a
71 #define OV5640_REG_AEC_CTRL0D		0x3a0d
72 #define OV5640_REG_AEC_CTRL0E		0x3a0e
73 #define OV5640_REG_AEC_CTRL0F		0x3a0f
74 #define OV5640_REG_AEC_CTRL10		0x3a10
75 #define OV5640_REG_AEC_CTRL11		0x3a11
76 #define OV5640_REG_AEC_CTRL1B		0x3a1b
77 #define OV5640_REG_AEC_CTRL1E		0x3a1e
78 #define OV5640_REG_AEC_CTRL1F		0x3a1f
79 #define OV5640_REG_HZ5060_CTRL00	0x3c00
80 #define OV5640_REG_HZ5060_CTRL01	0x3c01
81 #define OV5640_REG_SIGMADELTA_CTRL0C	0x3c0c
82 #define OV5640_REG_FRAME_CTRL01		0x4202
83 #define OV5640_REG_FORMAT_CONTROL00	0x4300
84 #define OV5640_REG_VFIFO_HSIZE		0x4602
85 #define OV5640_REG_VFIFO_VSIZE		0x4604
86 #define OV5640_REG_JPG_MODE_SELECT	0x4713
87 #define OV5640_REG_CCIR656_CTRL00	0x4730
88 #define OV5640_REG_POLARITY_CTRL00	0x4740
89 #define OV5640_REG_MIPI_CTRL00		0x4800
90 #define OV5640_REG_DEBUG_MODE		0x4814
91 #define OV5640_REG_ISP_FORMAT_MUX_CTRL	0x501f
92 #define OV5640_REG_PRE_ISP_TEST_SET1	0x503d
93 #define OV5640_REG_SDE_CTRL0		0x5580
94 #define OV5640_REG_SDE_CTRL1		0x5581
95 #define OV5640_REG_SDE_CTRL3		0x5583
96 #define OV5640_REG_SDE_CTRL4		0x5584
97 #define OV5640_REG_SDE_CTRL5		0x5585
98 #define OV5640_REG_AVG_READOUT		0x56a1
99 
100 enum ov5640_mode_id {
101 	OV5640_MODE_QQVGA_160_120 = 0,
102 	OV5640_MODE_QCIF_176_144,
103 	OV5640_MODE_QVGA_320_240,
104 	OV5640_MODE_VGA_640_480,
105 	OV5640_MODE_NTSC_720_480,
106 	OV5640_MODE_PAL_720_576,
107 	OV5640_MODE_XGA_1024_768,
108 	OV5640_MODE_720P_1280_720,
109 	OV5640_MODE_1080P_1920_1080,
110 	OV5640_MODE_QSXGA_2592_1944,
111 	OV5640_NUM_MODES,
112 };
113 
114 enum ov5640_frame_rate {
115 	OV5640_15_FPS = 0,
116 	OV5640_30_FPS,
117 	OV5640_60_FPS,
118 	OV5640_NUM_FRAMERATES,
119 };
120 
121 enum ov5640_format_mux {
122 	OV5640_FMT_MUX_YUV422 = 0,
123 	OV5640_FMT_MUX_RGB,
124 	OV5640_FMT_MUX_DITHER,
125 	OV5640_FMT_MUX_RAW_DPC,
126 	OV5640_FMT_MUX_SNR_RAW,
127 	OV5640_FMT_MUX_RAW_CIP,
128 };
129 
130 struct ov5640_pixfmt {
131 	u32 code;
132 	u32 colorspace;
133 };
134 
135 static const struct ov5640_pixfmt ov5640_formats[] = {
136 	{ MEDIA_BUS_FMT_JPEG_1X8, V4L2_COLORSPACE_JPEG, },
137 	{ MEDIA_BUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_SRGB, },
138 	{ MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_SRGB, },
139 	{ MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB, },
140 	{ MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB, },
141 	{ MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB, },
142 	{ MEDIA_BUS_FMT_SGBRG8_1X8, V4L2_COLORSPACE_SRGB, },
143 	{ MEDIA_BUS_FMT_SGRBG8_1X8, V4L2_COLORSPACE_SRGB, },
144 	{ MEDIA_BUS_FMT_SRGGB8_1X8, V4L2_COLORSPACE_SRGB, },
145 };
146 
147 /*
148  * FIXME: remove this when a subdev API becomes available
149  * to set the MIPI CSI-2 virtual channel.
150  */
151 static unsigned int virtual_channel;
152 module_param(virtual_channel, uint, 0444);
153 MODULE_PARM_DESC(virtual_channel,
154 		 "MIPI CSI-2 virtual channel (0..3), default 0");
155 
156 static const int ov5640_framerates[] = {
157 	[OV5640_15_FPS] = 15,
158 	[OV5640_30_FPS] = 30,
159 	[OV5640_60_FPS] = 60,
160 };
161 
162 /* regulator supplies */
163 static const char * const ov5640_supply_name[] = {
164 	"DOVDD", /* Digital I/O (1.8V) supply */
165 	"AVDD",  /* Analog (2.8V) supply */
166 	"DVDD",  /* Digital Core (1.5V) supply */
167 };
168 
169 #define OV5640_NUM_SUPPLIES ARRAY_SIZE(ov5640_supply_name)
170 
171 /*
172  * Image size under 1280 * 960 are SUBSAMPLING
173  * Image size upper 1280 * 960 are SCALING
174  */
175 enum ov5640_downsize_mode {
176 	SUBSAMPLING,
177 	SCALING,
178 };
179 
180 struct reg_value {
181 	u16 reg_addr;
182 	u8 val;
183 	u8 mask;
184 	u32 delay_ms;
185 };
186 
187 struct ov5640_mode_info {
188 	enum ov5640_mode_id id;
189 	enum ov5640_downsize_mode dn_mode;
190 	u32 hact;
191 	u32 htot;
192 	u32 vact;
193 	u32 vtot;
194 	const struct reg_value *reg_data;
195 	u32 reg_data_size;
196 	u32 max_fps;
197 };
198 
199 struct ov5640_ctrls {
200 	struct v4l2_ctrl_handler handler;
201 	struct v4l2_ctrl *pixel_rate;
202 	struct {
203 		struct v4l2_ctrl *auto_exp;
204 		struct v4l2_ctrl *exposure;
205 	};
206 	struct {
207 		struct v4l2_ctrl *auto_wb;
208 		struct v4l2_ctrl *blue_balance;
209 		struct v4l2_ctrl *red_balance;
210 	};
211 	struct {
212 		struct v4l2_ctrl *auto_gain;
213 		struct v4l2_ctrl *gain;
214 	};
215 	struct v4l2_ctrl *brightness;
216 	struct v4l2_ctrl *light_freq;
217 	struct v4l2_ctrl *saturation;
218 	struct v4l2_ctrl *contrast;
219 	struct v4l2_ctrl *hue;
220 	struct v4l2_ctrl *test_pattern;
221 	struct v4l2_ctrl *hflip;
222 	struct v4l2_ctrl *vflip;
223 };
224 
225 struct ov5640_dev {
226 	struct i2c_client *i2c_client;
227 	struct v4l2_subdev sd;
228 	struct media_pad pad;
229 	struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
230 	struct clk *xclk; /* system clock to OV5640 */
231 	u32 xclk_freq;
232 
233 	struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
234 	struct gpio_desc *reset_gpio;
235 	struct gpio_desc *pwdn_gpio;
236 	bool   upside_down;
237 
238 	/* lock to protect all members below */
239 	struct mutex lock;
240 
241 	int power_count;
242 
243 	struct v4l2_mbus_framefmt fmt;
244 	bool pending_fmt_change;
245 
246 	const struct ov5640_mode_info *current_mode;
247 	const struct ov5640_mode_info *last_mode;
248 	enum ov5640_frame_rate current_fr;
249 	struct v4l2_fract frame_interval;
250 
251 	struct ov5640_ctrls ctrls;
252 
253 	u32 prev_sysclk, prev_hts;
254 	u32 ae_low, ae_high, ae_target;
255 
256 	bool pending_mode_change;
257 	bool streaming;
258 };
259 
260 static inline struct ov5640_dev *to_ov5640_dev(struct v4l2_subdev *sd)
261 {
262 	return container_of(sd, struct ov5640_dev, sd);
263 }
264 
265 static inline struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
266 {
267 	return &container_of(ctrl->handler, struct ov5640_dev,
268 			     ctrls.handler)->sd;
269 }
270 
271 /*
272  * FIXME: all of these register tables are likely filled with
273  * entries that set the register to their power-on default values,
274  * and which are otherwise not touched by this driver. Those entries
275  * should be identified and removed to speed register load time
276  * over i2c.
277  */
278 /* YUV422 UYVY VGA@30fps */
279 static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
280 	{0x3103, 0x11, 0, 0}, {0x3008, 0x82, 0, 5}, {0x3008, 0x42, 0, 0},
281 	{0x3103, 0x03, 0, 0}, {0x3630, 0x36, 0, 0},
282 	{0x3631, 0x0e, 0, 0}, {0x3632, 0xe2, 0, 0}, {0x3633, 0x12, 0, 0},
283 	{0x3621, 0xe0, 0, 0}, {0x3704, 0xa0, 0, 0}, {0x3703, 0x5a, 0, 0},
284 	{0x3715, 0x78, 0, 0}, {0x3717, 0x01, 0, 0}, {0x370b, 0x60, 0, 0},
285 	{0x3705, 0x1a, 0, 0}, {0x3905, 0x02, 0, 0}, {0x3906, 0x10, 0, 0},
286 	{0x3901, 0x0a, 0, 0}, {0x3731, 0x12, 0, 0}, {0x3600, 0x08, 0, 0},
287 	{0x3601, 0x33, 0, 0}, {0x302d, 0x60, 0, 0}, {0x3620, 0x52, 0, 0},
288 	{0x371b, 0x20, 0, 0}, {0x471c, 0x50, 0, 0}, {0x3a13, 0x43, 0, 0},
289 	{0x3a18, 0x00, 0, 0}, {0x3a19, 0xf8, 0, 0}, {0x3635, 0x13, 0, 0},
290 	{0x3636, 0x03, 0, 0}, {0x3634, 0x40, 0, 0}, {0x3622, 0x01, 0, 0},
291 	{0x3c01, 0xa4, 0, 0}, {0x3c04, 0x28, 0, 0}, {0x3c05, 0x98, 0, 0},
292 	{0x3c06, 0x00, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c08, 0x00, 0, 0},
293 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
294 	{0x3820, 0x41, 0, 0}, {0x3821, 0x07, 0, 0}, {0x3814, 0x31, 0, 0},
295 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
296 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
297 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
298 	{0x3810, 0x00, 0, 0},
299 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
300 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
301 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
302 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
303 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
304 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
305 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0}, {0x3000, 0x00, 0, 0},
306 	{0x3002, 0x1c, 0, 0}, {0x3004, 0xff, 0, 0}, {0x3006, 0xc3, 0, 0},
307 	{0x302e, 0x08, 0, 0}, {0x4300, 0x3f, 0, 0},
308 	{0x501f, 0x00, 0, 0}, {0x4407, 0x04, 0, 0},
309 	{0x440e, 0x00, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
310 	{0x4837, 0x0a, 0, 0}, {0x3824, 0x02, 0, 0},
311 	{0x5000, 0xa7, 0, 0}, {0x5001, 0xa3, 0, 0}, {0x5180, 0xff, 0, 0},
312 	{0x5181, 0xf2, 0, 0}, {0x5182, 0x00, 0, 0}, {0x5183, 0x14, 0, 0},
313 	{0x5184, 0x25, 0, 0}, {0x5185, 0x24, 0, 0}, {0x5186, 0x09, 0, 0},
314 	{0x5187, 0x09, 0, 0}, {0x5188, 0x09, 0, 0}, {0x5189, 0x88, 0, 0},
315 	{0x518a, 0x54, 0, 0}, {0x518b, 0xee, 0, 0}, {0x518c, 0xb2, 0, 0},
316 	{0x518d, 0x50, 0, 0}, {0x518e, 0x34, 0, 0}, {0x518f, 0x6b, 0, 0},
317 	{0x5190, 0x46, 0, 0}, {0x5191, 0xf8, 0, 0}, {0x5192, 0x04, 0, 0},
318 	{0x5193, 0x70, 0, 0}, {0x5194, 0xf0, 0, 0}, {0x5195, 0xf0, 0, 0},
319 	{0x5196, 0x03, 0, 0}, {0x5197, 0x01, 0, 0}, {0x5198, 0x04, 0, 0},
320 	{0x5199, 0x6c, 0, 0}, {0x519a, 0x04, 0, 0}, {0x519b, 0x00, 0, 0},
321 	{0x519c, 0x09, 0, 0}, {0x519d, 0x2b, 0, 0}, {0x519e, 0x38, 0, 0},
322 	{0x5381, 0x1e, 0, 0}, {0x5382, 0x5b, 0, 0}, {0x5383, 0x08, 0, 0},
323 	{0x5384, 0x0a, 0, 0}, {0x5385, 0x7e, 0, 0}, {0x5386, 0x88, 0, 0},
324 	{0x5387, 0x7c, 0, 0}, {0x5388, 0x6c, 0, 0}, {0x5389, 0x10, 0, 0},
325 	{0x538a, 0x01, 0, 0}, {0x538b, 0x98, 0, 0}, {0x5300, 0x08, 0, 0},
326 	{0x5301, 0x30, 0, 0}, {0x5302, 0x10, 0, 0}, {0x5303, 0x00, 0, 0},
327 	{0x5304, 0x08, 0, 0}, {0x5305, 0x30, 0, 0}, {0x5306, 0x08, 0, 0},
328 	{0x5307, 0x16, 0, 0}, {0x5309, 0x08, 0, 0}, {0x530a, 0x30, 0, 0},
329 	{0x530b, 0x04, 0, 0}, {0x530c, 0x06, 0, 0}, {0x5480, 0x01, 0, 0},
330 	{0x5481, 0x08, 0, 0}, {0x5482, 0x14, 0, 0}, {0x5483, 0x28, 0, 0},
331 	{0x5484, 0x51, 0, 0}, {0x5485, 0x65, 0, 0}, {0x5486, 0x71, 0, 0},
332 	{0x5487, 0x7d, 0, 0}, {0x5488, 0x87, 0, 0}, {0x5489, 0x91, 0, 0},
333 	{0x548a, 0x9a, 0, 0}, {0x548b, 0xaa, 0, 0}, {0x548c, 0xb8, 0, 0},
334 	{0x548d, 0xcd, 0, 0}, {0x548e, 0xdd, 0, 0}, {0x548f, 0xea, 0, 0},
335 	{0x5490, 0x1d, 0, 0}, {0x5580, 0x02, 0, 0}, {0x5583, 0x40, 0, 0},
336 	{0x5584, 0x10, 0, 0}, {0x5589, 0x10, 0, 0}, {0x558a, 0x00, 0, 0},
337 	{0x558b, 0xf8, 0, 0}, {0x5800, 0x23, 0, 0}, {0x5801, 0x14, 0, 0},
338 	{0x5802, 0x0f, 0, 0}, {0x5803, 0x0f, 0, 0}, {0x5804, 0x12, 0, 0},
339 	{0x5805, 0x26, 0, 0}, {0x5806, 0x0c, 0, 0}, {0x5807, 0x08, 0, 0},
340 	{0x5808, 0x05, 0, 0}, {0x5809, 0x05, 0, 0}, {0x580a, 0x08, 0, 0},
341 	{0x580b, 0x0d, 0, 0}, {0x580c, 0x08, 0, 0}, {0x580d, 0x03, 0, 0},
342 	{0x580e, 0x00, 0, 0}, {0x580f, 0x00, 0, 0}, {0x5810, 0x03, 0, 0},
343 	{0x5811, 0x09, 0, 0}, {0x5812, 0x07, 0, 0}, {0x5813, 0x03, 0, 0},
344 	{0x5814, 0x00, 0, 0}, {0x5815, 0x01, 0, 0}, {0x5816, 0x03, 0, 0},
345 	{0x5817, 0x08, 0, 0}, {0x5818, 0x0d, 0, 0}, {0x5819, 0x08, 0, 0},
346 	{0x581a, 0x05, 0, 0}, {0x581b, 0x06, 0, 0}, {0x581c, 0x08, 0, 0},
347 	{0x581d, 0x0e, 0, 0}, {0x581e, 0x29, 0, 0}, {0x581f, 0x17, 0, 0},
348 	{0x5820, 0x11, 0, 0}, {0x5821, 0x11, 0, 0}, {0x5822, 0x15, 0, 0},
349 	{0x5823, 0x28, 0, 0}, {0x5824, 0x46, 0, 0}, {0x5825, 0x26, 0, 0},
350 	{0x5826, 0x08, 0, 0}, {0x5827, 0x26, 0, 0}, {0x5828, 0x64, 0, 0},
351 	{0x5829, 0x26, 0, 0}, {0x582a, 0x24, 0, 0}, {0x582b, 0x22, 0, 0},
352 	{0x582c, 0x24, 0, 0}, {0x582d, 0x24, 0, 0}, {0x582e, 0x06, 0, 0},
353 	{0x582f, 0x22, 0, 0}, {0x5830, 0x40, 0, 0}, {0x5831, 0x42, 0, 0},
354 	{0x5832, 0x24, 0, 0}, {0x5833, 0x26, 0, 0}, {0x5834, 0x24, 0, 0},
355 	{0x5835, 0x22, 0, 0}, {0x5836, 0x22, 0, 0}, {0x5837, 0x26, 0, 0},
356 	{0x5838, 0x44, 0, 0}, {0x5839, 0x24, 0, 0}, {0x583a, 0x26, 0, 0},
357 	{0x583b, 0x28, 0, 0}, {0x583c, 0x42, 0, 0}, {0x583d, 0xce, 0, 0},
358 	{0x5025, 0x00, 0, 0}, {0x3a0f, 0x30, 0, 0}, {0x3a10, 0x28, 0, 0},
359 	{0x3a1b, 0x30, 0, 0}, {0x3a1e, 0x26, 0, 0}, {0x3a11, 0x60, 0, 0},
360 	{0x3a1f, 0x14, 0, 0}, {0x3008, 0x02, 0, 0}, {0x3c00, 0x04, 0, 300},
361 };
362 
363 static const struct reg_value ov5640_setting_VGA_640_480[] = {
364 	{0x3c07, 0x08, 0, 0},
365 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
366 	{0x3814, 0x31, 0, 0},
367 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
368 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
369 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
370 	{0x3810, 0x00, 0, 0},
371 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
372 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
373 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
374 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
375 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
376 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
377 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
378 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
379 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
380 };
381 
382 static const struct reg_value ov5640_setting_XGA_1024_768[] = {
383 	{0x3c07, 0x08, 0, 0},
384 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
385 	{0x3814, 0x31, 0, 0},
386 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
387 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
388 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
389 	{0x3810, 0x00, 0, 0},
390 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
391 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
392 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
393 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
394 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
395 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
396 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
397 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
398 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
399 };
400 
401 static const struct reg_value ov5640_setting_QVGA_320_240[] = {
402 	{0x3c07, 0x08, 0, 0},
403 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
404 	{0x3814, 0x31, 0, 0},
405 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
406 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
407 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
408 	{0x3810, 0x00, 0, 0},
409 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
410 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
411 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
412 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
413 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
414 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
415 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
416 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
417 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
418 };
419 
420 static const struct reg_value ov5640_setting_QQVGA_160_120[] = {
421 	{0x3c07, 0x08, 0, 0},
422 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
423 	{0x3814, 0x31, 0, 0},
424 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
425 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
426 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
427 	{0x3810, 0x00, 0, 0},
428 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
429 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
430 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
431 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
432 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
433 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
434 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
435 	{0x4407, 0x04, 0, 0}, {0x5001, 0xa3, 0, 0},
436 };
437 
438 static const struct reg_value ov5640_setting_QCIF_176_144[] = {
439 	{0x3c07, 0x08, 0, 0},
440 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
441 	{0x3814, 0x31, 0, 0},
442 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
443 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
444 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
445 	{0x3810, 0x00, 0, 0},
446 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
447 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
448 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
449 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
450 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
451 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
452 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
453 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
454 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
455 };
456 
457 static const struct reg_value ov5640_setting_NTSC_720_480[] = {
458 	{0x3c07, 0x08, 0, 0},
459 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
460 	{0x3814, 0x31, 0, 0},
461 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
462 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
463 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
464 	{0x3810, 0x00, 0, 0},
465 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x3c, 0, 0},
466 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
467 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
468 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
469 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
470 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
471 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
472 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
473 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
474 };
475 
476 static const struct reg_value ov5640_setting_PAL_720_576[] = {
477 	{0x3c07, 0x08, 0, 0},
478 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
479 	{0x3814, 0x31, 0, 0},
480 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
481 	{0x3802, 0x00, 0, 0}, {0x3803, 0x04, 0, 0}, {0x3804, 0x0a, 0, 0},
482 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9b, 0, 0},
483 	{0x3810, 0x00, 0, 0},
484 	{0x3811, 0x38, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x06, 0, 0},
485 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
486 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x03, 0, 0},
487 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
488 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
489 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
490 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
491 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
492 	{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
493 };
494 
495 static const struct reg_value ov5640_setting_720P_1280_720[] = {
496 	{0x3c07, 0x07, 0, 0},
497 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
498 	{0x3814, 0x31, 0, 0},
499 	{0x3815, 0x31, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
500 	{0x3802, 0x00, 0, 0}, {0x3803, 0xfa, 0, 0}, {0x3804, 0x0a, 0, 0},
501 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x06, 0, 0}, {0x3807, 0xa9, 0, 0},
502 	{0x3810, 0x00, 0, 0},
503 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
504 	{0x3618, 0x00, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x64, 0, 0},
505 	{0x3709, 0x52, 0, 0}, {0x370c, 0x03, 0, 0}, {0x3a02, 0x02, 0, 0},
506 	{0x3a03, 0xe4, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0xbc, 0, 0},
507 	{0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x72, 0, 0}, {0x3a0e, 0x01, 0, 0},
508 	{0x3a0d, 0x02, 0, 0}, {0x3a14, 0x02, 0, 0}, {0x3a15, 0xe4, 0, 0},
509 	{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
510 	{0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0},
511 	{0x3824, 0x04, 0, 0}, {0x5001, 0x83, 0, 0},
512 };
513 
514 static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
515 	{0x3c07, 0x08, 0, 0},
516 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
517 	{0x3814, 0x11, 0, 0},
518 	{0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
519 	{0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
520 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
521 	{0x3810, 0x00, 0, 0},
522 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
523 	{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
524 	{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
525 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
526 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
527 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
528 	{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
529 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
530 	{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 0},
531 	{0x3c07, 0x07, 0, 0}, {0x3c08, 0x00, 0, 0},
532 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
533 	{0x3800, 0x01, 0, 0}, {0x3801, 0x50, 0, 0}, {0x3802, 0x01, 0, 0},
534 	{0x3803, 0xb2, 0, 0}, {0x3804, 0x08, 0, 0}, {0x3805, 0xef, 0, 0},
535 	{0x3806, 0x05, 0, 0}, {0x3807, 0xf1, 0, 0},
536 	{0x3612, 0x2b, 0, 0}, {0x3708, 0x64, 0, 0},
537 	{0x3a02, 0x04, 0, 0}, {0x3a03, 0x60, 0, 0}, {0x3a08, 0x01, 0, 0},
538 	{0x3a09, 0x50, 0, 0}, {0x3a0a, 0x01, 0, 0}, {0x3a0b, 0x18, 0, 0},
539 	{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
540 	{0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
541 	{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
542 	{0x4005, 0x1a, 0, 0},
543 };
544 
545 static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
546 	{0x3c07, 0x08, 0, 0},
547 	{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
548 	{0x3814, 0x11, 0, 0},
549 	{0x3815, 0x11, 0, 0}, {0x3800, 0x00, 0, 0}, {0x3801, 0x00, 0, 0},
550 	{0x3802, 0x00, 0, 0}, {0x3803, 0x00, 0, 0}, {0x3804, 0x0a, 0, 0},
551 	{0x3805, 0x3f, 0, 0}, {0x3806, 0x07, 0, 0}, {0x3807, 0x9f, 0, 0},
552 	{0x3810, 0x00, 0, 0},
553 	{0x3811, 0x10, 0, 0}, {0x3812, 0x00, 0, 0}, {0x3813, 0x04, 0, 0},
554 	{0x3618, 0x04, 0, 0}, {0x3612, 0x29, 0, 0}, {0x3708, 0x21, 0, 0},
555 	{0x3709, 0x12, 0, 0}, {0x370c, 0x00, 0, 0}, {0x3a02, 0x03, 0, 0},
556 	{0x3a03, 0xd8, 0, 0}, {0x3a08, 0x01, 0, 0}, {0x3a09, 0x27, 0, 0},
557 	{0x3a0a, 0x00, 0, 0}, {0x3a0b, 0xf6, 0, 0}, {0x3a0e, 0x03, 0, 0},
558 	{0x3a0d, 0x04, 0, 0}, {0x3a14, 0x03, 0, 0}, {0x3a15, 0xd8, 0, 0},
559 	{0x4001, 0x02, 0, 0}, {0x4004, 0x06, 0, 0},
560 	{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
561 	{0x3824, 0x02, 0, 0}, {0x5001, 0x83, 0, 70},
562 };
563 
564 /* power-on sensor init reg table */
565 static const struct ov5640_mode_info ov5640_mode_init_data = {
566 	0, SUBSAMPLING, 640, 1896, 480, 984,
567 	ov5640_init_setting_30fps_VGA,
568 	ARRAY_SIZE(ov5640_init_setting_30fps_VGA),
569 	OV5640_30_FPS,
570 };
571 
572 static const struct ov5640_mode_info
573 ov5640_mode_data[OV5640_NUM_MODES] = {
574 	{OV5640_MODE_QQVGA_160_120, SUBSAMPLING,
575 	 160, 1896, 120, 984,
576 	 ov5640_setting_QQVGA_160_120,
577 	 ARRAY_SIZE(ov5640_setting_QQVGA_160_120),
578 	 OV5640_30_FPS},
579 	{OV5640_MODE_QCIF_176_144, SUBSAMPLING,
580 	 176, 1896, 144, 984,
581 	 ov5640_setting_QCIF_176_144,
582 	 ARRAY_SIZE(ov5640_setting_QCIF_176_144),
583 	 OV5640_30_FPS},
584 	{OV5640_MODE_QVGA_320_240, SUBSAMPLING,
585 	 320, 1896, 240, 984,
586 	 ov5640_setting_QVGA_320_240,
587 	 ARRAY_SIZE(ov5640_setting_QVGA_320_240),
588 	 OV5640_30_FPS},
589 	{OV5640_MODE_VGA_640_480, SUBSAMPLING,
590 	 640, 1896, 480, 1080,
591 	 ov5640_setting_VGA_640_480,
592 	 ARRAY_SIZE(ov5640_setting_VGA_640_480),
593 	 OV5640_60_FPS},
594 	{OV5640_MODE_NTSC_720_480, SUBSAMPLING,
595 	 720, 1896, 480, 984,
596 	 ov5640_setting_NTSC_720_480,
597 	 ARRAY_SIZE(ov5640_setting_NTSC_720_480),
598 	OV5640_30_FPS},
599 	{OV5640_MODE_PAL_720_576, SUBSAMPLING,
600 	 720, 1896, 576, 984,
601 	 ov5640_setting_PAL_720_576,
602 	 ARRAY_SIZE(ov5640_setting_PAL_720_576),
603 	 OV5640_30_FPS},
604 	{OV5640_MODE_XGA_1024_768, SUBSAMPLING,
605 	 1024, 1896, 768, 1080,
606 	 ov5640_setting_XGA_1024_768,
607 	 ARRAY_SIZE(ov5640_setting_XGA_1024_768),
608 	 OV5640_30_FPS},
609 	{OV5640_MODE_720P_1280_720, SUBSAMPLING,
610 	 1280, 1892, 720, 740,
611 	 ov5640_setting_720P_1280_720,
612 	 ARRAY_SIZE(ov5640_setting_720P_1280_720),
613 	 OV5640_30_FPS},
614 	{OV5640_MODE_1080P_1920_1080, SCALING,
615 	 1920, 2500, 1080, 1120,
616 	 ov5640_setting_1080P_1920_1080,
617 	 ARRAY_SIZE(ov5640_setting_1080P_1920_1080),
618 	 OV5640_30_FPS},
619 	{OV5640_MODE_QSXGA_2592_1944, SCALING,
620 	 2592, 2844, 1944, 1968,
621 	 ov5640_setting_QSXGA_2592_1944,
622 	 ARRAY_SIZE(ov5640_setting_QSXGA_2592_1944),
623 	 OV5640_15_FPS},
624 };
625 
626 static int ov5640_init_slave_id(struct ov5640_dev *sensor)
627 {
628 	struct i2c_client *client = sensor->i2c_client;
629 	struct i2c_msg msg;
630 	u8 buf[3];
631 	int ret;
632 
633 	if (client->addr == OV5640_DEFAULT_SLAVE_ID)
634 		return 0;
635 
636 	buf[0] = OV5640_REG_SLAVE_ID >> 8;
637 	buf[1] = OV5640_REG_SLAVE_ID & 0xff;
638 	buf[2] = client->addr << 1;
639 
640 	msg.addr = OV5640_DEFAULT_SLAVE_ID;
641 	msg.flags = 0;
642 	msg.buf = buf;
643 	msg.len = sizeof(buf);
644 
645 	ret = i2c_transfer(client->adapter, &msg, 1);
646 	if (ret < 0) {
647 		dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
648 		return ret;
649 	}
650 
651 	return 0;
652 }
653 
654 static int ov5640_write_reg(struct ov5640_dev *sensor, u16 reg, u8 val)
655 {
656 	struct i2c_client *client = sensor->i2c_client;
657 	struct i2c_msg msg;
658 	u8 buf[3];
659 	int ret;
660 
661 	buf[0] = reg >> 8;
662 	buf[1] = reg & 0xff;
663 	buf[2] = val;
664 
665 	msg.addr = client->addr;
666 	msg.flags = client->flags;
667 	msg.buf = buf;
668 	msg.len = sizeof(buf);
669 
670 	ret = i2c_transfer(client->adapter, &msg, 1);
671 	if (ret < 0) {
672 		dev_err(&client->dev, "%s: error: reg=%x, val=%x\n",
673 			__func__, reg, val);
674 		return ret;
675 	}
676 
677 	return 0;
678 }
679 
680 static int ov5640_read_reg(struct ov5640_dev *sensor, u16 reg, u8 *val)
681 {
682 	struct i2c_client *client = sensor->i2c_client;
683 	struct i2c_msg msg[2];
684 	u8 buf[2];
685 	int ret;
686 
687 	buf[0] = reg >> 8;
688 	buf[1] = reg & 0xff;
689 
690 	msg[0].addr = client->addr;
691 	msg[0].flags = client->flags;
692 	msg[0].buf = buf;
693 	msg[0].len = sizeof(buf);
694 
695 	msg[1].addr = client->addr;
696 	msg[1].flags = client->flags | I2C_M_RD;
697 	msg[1].buf = buf;
698 	msg[1].len = 1;
699 
700 	ret = i2c_transfer(client->adapter, msg, 2);
701 	if (ret < 0) {
702 		dev_err(&client->dev, "%s: error: reg=%x\n",
703 			__func__, reg);
704 		return ret;
705 	}
706 
707 	*val = buf[0];
708 	return 0;
709 }
710 
711 static int ov5640_read_reg16(struct ov5640_dev *sensor, u16 reg, u16 *val)
712 {
713 	u8 hi, lo;
714 	int ret;
715 
716 	ret = ov5640_read_reg(sensor, reg, &hi);
717 	if (ret)
718 		return ret;
719 	ret = ov5640_read_reg(sensor, reg + 1, &lo);
720 	if (ret)
721 		return ret;
722 
723 	*val = ((u16)hi << 8) | (u16)lo;
724 	return 0;
725 }
726 
727 static int ov5640_write_reg16(struct ov5640_dev *sensor, u16 reg, u16 val)
728 {
729 	int ret;
730 
731 	ret = ov5640_write_reg(sensor, reg, val >> 8);
732 	if (ret)
733 		return ret;
734 
735 	return ov5640_write_reg(sensor, reg + 1, val & 0xff);
736 }
737 
738 static int ov5640_mod_reg(struct ov5640_dev *sensor, u16 reg,
739 			  u8 mask, u8 val)
740 {
741 	u8 readval;
742 	int ret;
743 
744 	ret = ov5640_read_reg(sensor, reg, &readval);
745 	if (ret)
746 		return ret;
747 
748 	readval &= ~mask;
749 	val &= mask;
750 	val |= readval;
751 
752 	return ov5640_write_reg(sensor, reg, val);
753 }
754 
755 /*
756  * After trying the various combinations, reading various
757  * documentations spread around the net, and from the various
758  * feedback, the clock tree is probably as follows:
759  *
760  *   +--------------+
761  *   |  Ext. Clock  |
762  *   +-+------------+
763  *     |  +----------+
764  *     +->|   PLL1   | - reg 0x3036, for the multiplier
765  *        +-+--------+ - reg 0x3037, bits 0-3 for the pre-divider
766  *          |  +--------------+
767  *          +->| System Clock |  - reg 0x3035, bits 4-7
768  *             +-+------------+
769  *               |  +--------------+
770  *               +->| MIPI Divider | - reg 0x3035, bits 0-3
771  *               |  +-+------------+
772  *               |    +----------------> MIPI SCLK
773  *               |    +  +-----+
774  *               |    +->| / 2 |-------> MIPI BIT CLK
775  *               |       +-----+
776  *               |  +--------------+
777  *               +->| PLL Root Div | - reg 0x3037, bit 4
778  *                  +-+------------+
779  *                    |  +---------+
780  *                    +->| Bit Div | - reg 0x3034, bits 0-3
781  *                       +-+-------+
782  *                         |  +-------------+
783  *                         +->| SCLK Div    | - reg 0x3108, bits 0-1
784  *                         |  +-+-----------+
785  *                         |    +---------------> SCLK
786  *                         |  +-------------+
787  *                         +->| SCLK 2X Div | - reg 0x3108, bits 2-3
788  *                         |  +-+-----------+
789  *                         |    +---------------> SCLK 2X
790  *                         |  +-------------+
791  *                         +->| PCLK Div    | - reg 0x3108, bits 4-5
792  *                            ++------------+
793  *                             +  +-----------+
794  *                             +->|   P_DIV   | - reg 0x3035, bits 0-3
795  *                                +-----+-----+
796  *                                       +------------> PCLK
797  *
798  * This is deviating from the datasheet at least for the register
799  * 0x3108, since it's said here that the PCLK would be clocked from
800  * the PLL.
801  *
802  * There seems to be also (unverified) constraints:
803  *  - the PLL pre-divider output rate should be in the 4-27MHz range
804  *  - the PLL multiplier output rate should be in the 500-1000MHz range
805  *  - PCLK >= SCLK * 2 in YUV, >= SCLK in Raw or JPEG
806  *
807  * In the two latter cases, these constraints are met since our
808  * factors are hardcoded. If we were to change that, we would need to
809  * take this into account. The only varying parts are the PLL
810  * multiplier and the system clock divider, which are shared between
811  * all these clocks so won't cause any issue.
812  */
813 
814 /*
815  * This is supposed to be ranging from 1 to 8, but the value is always
816  * set to 3 in the vendor kernels.
817  */
818 #define OV5640_PLL_PREDIV	3
819 
820 #define OV5640_PLL_MULT_MIN	4
821 #define OV5640_PLL_MULT_MAX	252
822 
823 /*
824  * This is supposed to be ranging from 1 to 16, but the value is
825  * always set to either 1 or 2 in the vendor kernels.
826  */
827 #define OV5640_SYSDIV_MIN	1
828 #define OV5640_SYSDIV_MAX	16
829 
830 /*
831  * Hardcode these values for scaler and non-scaler modes.
832  * FIXME: to be re-calcualted for 1 data lanes setups
833  */
834 #define OV5640_MIPI_DIV_PCLK	2
835 #define OV5640_MIPI_DIV_SCLK	1
836 
837 /*
838  * This is supposed to be ranging from 1 to 2, but the value is always
839  * set to 2 in the vendor kernels.
840  */
841 #define OV5640_PLL_ROOT_DIV			2
842 #define OV5640_PLL_CTRL3_PLL_ROOT_DIV_2		BIT(4)
843 
844 /*
845  * We only supports 8-bit formats at the moment
846  */
847 #define OV5640_BIT_DIV				2
848 #define OV5640_PLL_CTRL0_MIPI_MODE_8BIT		0x08
849 
850 /*
851  * This is supposed to be ranging from 1 to 8, but the value is always
852  * set to 2 in the vendor kernels.
853  */
854 #define OV5640_SCLK_ROOT_DIV	2
855 
856 /*
857  * This is hardcoded so that the consistency is maintained between SCLK and
858  * SCLK 2x.
859  */
860 #define OV5640_SCLK2X_ROOT_DIV (OV5640_SCLK_ROOT_DIV / 2)
861 
862 /*
863  * This is supposed to be ranging from 1 to 8, but the value is always
864  * set to 1 in the vendor kernels.
865  */
866 #define OV5640_PCLK_ROOT_DIV			1
867 #define OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS	0x00
868 
869 static unsigned long ov5640_compute_sys_clk(struct ov5640_dev *sensor,
870 					    u8 pll_prediv, u8 pll_mult,
871 					    u8 sysdiv)
872 {
873 	unsigned long sysclk = sensor->xclk_freq / pll_prediv * pll_mult;
874 
875 	/* PLL1 output cannot exceed 1GHz. */
876 	if (sysclk / 1000000 > 1000)
877 		return 0;
878 
879 	return sysclk / sysdiv;
880 }
881 
882 static unsigned long ov5640_calc_sys_clk(struct ov5640_dev *sensor,
883 					 unsigned long rate,
884 					 u8 *pll_prediv, u8 *pll_mult,
885 					 u8 *sysdiv)
886 {
887 	unsigned long best = ~0;
888 	u8 best_sysdiv = 1, best_mult = 1;
889 	u8 _sysdiv, _pll_mult;
890 
891 	for (_sysdiv = OV5640_SYSDIV_MIN;
892 	     _sysdiv <= OV5640_SYSDIV_MAX;
893 	     _sysdiv++) {
894 		for (_pll_mult = OV5640_PLL_MULT_MIN;
895 		     _pll_mult <= OV5640_PLL_MULT_MAX;
896 		     _pll_mult++) {
897 			unsigned long _rate;
898 
899 			/*
900 			 * The PLL multiplier cannot be odd if above
901 			 * 127.
902 			 */
903 			if (_pll_mult > 127 && (_pll_mult % 2))
904 				continue;
905 
906 			_rate = ov5640_compute_sys_clk(sensor,
907 						       OV5640_PLL_PREDIV,
908 						       _pll_mult, _sysdiv);
909 
910 			/*
911 			 * We have reached the maximum allowed PLL1 output,
912 			 * increase sysdiv.
913 			 */
914 			if (!_rate)
915 				break;
916 
917 			/*
918 			 * Prefer rates above the expected clock rate than
919 			 * below, even if that means being less precise.
920 			 */
921 			if (_rate < rate)
922 				continue;
923 
924 			if (abs(rate - _rate) < abs(rate - best)) {
925 				best = _rate;
926 				best_sysdiv = _sysdiv;
927 				best_mult = _pll_mult;
928 			}
929 
930 			if (_rate == rate)
931 				goto out;
932 		}
933 	}
934 
935 out:
936 	*sysdiv = best_sysdiv;
937 	*pll_prediv = OV5640_PLL_PREDIV;
938 	*pll_mult = best_mult;
939 
940 	return best;
941 }
942 
943 /*
944  * ov5640_set_mipi_pclk() - Calculate the clock tree configuration values
945  *			    for the MIPI CSI-2 output.
946  *
947  * @rate: The requested bandwidth per lane in bytes per second.
948  *	  'Bandwidth Per Lane' is calculated as:
949  *	  bpl = HTOT * VTOT * FPS * bpp / num_lanes;
950  *
951  * This function use the requested bandwidth to calculate:
952  * - sample_rate = bpl / (bpp / num_lanes);
953  *	         = bpl / (PLL_RDIV * BIT_DIV * PCLK_DIV * MIPI_DIV / num_lanes);
954  *
955  * - mipi_sclk   = bpl / MIPI_DIV / 2; ( / 2 is for CSI-2 DDR)
956  *
957  * with these fixed parameters:
958  *	PLL_RDIV	= 2;
959  *	BIT_DIVIDER	= 2; (MIPI_BIT_MODE == 8 ? 2 : 2,5);
960  *	PCLK_DIV	= 1;
961  *
962  * The MIPI clock generation differs for modes that use the scaler and modes
963  * that do not. In case the scaler is in use, the MIPI_SCLK generates the MIPI
964  * BIT CLk, and thus:
965  *
966  * - mipi_sclk = bpl / MIPI_DIV / 2;
967  *   MIPI_DIV = 1;
968  *
969  * For modes that do not go through the scaler, the MIPI BIT CLOCK is generated
970  * from the pixel clock, and thus:
971  *
972  * - sample_rate = bpl / (bpp / num_lanes);
973  *	         = bpl / (2 * 2 * 1 * MIPI_DIV / num_lanes);
974  *		 = bpl / (4 * MIPI_DIV / num_lanes);
975  * - MIPI_DIV	 = bpp / (4 * num_lanes);
976  *
977  * FIXME: this have been tested with 16bpp and 2 lanes setup only.
978  * MIPI_DIV is fixed to value 2, but it -might- be changed according to the
979  * above formula for setups with 1 lane or image formats with different bpp.
980  *
981  * FIXME: this deviates from the sensor manual documentation which is quite
982  * thin on the MIPI clock tree generation part.
983  */
984 static int ov5640_set_mipi_pclk(struct ov5640_dev *sensor,
985 				unsigned long rate)
986 {
987 	const struct ov5640_mode_info *mode = sensor->current_mode;
988 	u8 prediv, mult, sysdiv;
989 	u8 mipi_div;
990 	int ret;
991 
992 	/*
993 	 * 1280x720 is reported to use 'SUBSAMPLING' only,
994 	 * but according to the sensor manual it goes through the
995 	 * scaler before subsampling.
996 	 */
997 	if (mode->dn_mode == SCALING ||
998 	   (mode->id == OV5640_MODE_720P_1280_720))
999 		mipi_div = OV5640_MIPI_DIV_SCLK;
1000 	else
1001 		mipi_div = OV5640_MIPI_DIV_PCLK;
1002 
1003 	ov5640_calc_sys_clk(sensor, rate, &prediv, &mult, &sysdiv);
1004 
1005 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1006 			     0x0f, OV5640_PLL_CTRL0_MIPI_MODE_8BIT);
1007 
1008 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1009 			     0xff, sysdiv << 4 | mipi_div);
1010 	if (ret)
1011 		return ret;
1012 
1013 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2, 0xff, mult);
1014 	if (ret)
1015 		return ret;
1016 
1017 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1018 			     0x1f, OV5640_PLL_CTRL3_PLL_ROOT_DIV_2 | prediv);
1019 	if (ret)
1020 		return ret;
1021 
1022 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER,
1023 			      0x30, OV5640_PLL_SYS_ROOT_DIVIDER_BYPASS);
1024 }
1025 
1026 static unsigned long ov5640_calc_pclk(struct ov5640_dev *sensor,
1027 				      unsigned long rate,
1028 				      u8 *pll_prediv, u8 *pll_mult, u8 *sysdiv,
1029 				      u8 *pll_rdiv, u8 *bit_div, u8 *pclk_div)
1030 {
1031 	unsigned long _rate = rate * OV5640_PLL_ROOT_DIV * OV5640_BIT_DIV *
1032 				OV5640_PCLK_ROOT_DIV;
1033 
1034 	_rate = ov5640_calc_sys_clk(sensor, _rate, pll_prediv, pll_mult,
1035 				    sysdiv);
1036 	*pll_rdiv = OV5640_PLL_ROOT_DIV;
1037 	*bit_div = OV5640_BIT_DIV;
1038 	*pclk_div = OV5640_PCLK_ROOT_DIV;
1039 
1040 	return _rate / *pll_rdiv / *bit_div / *pclk_div;
1041 }
1042 
1043 static int ov5640_set_dvp_pclk(struct ov5640_dev *sensor, unsigned long rate)
1044 {
1045 	u8 prediv, mult, sysdiv, pll_rdiv, bit_div, pclk_div;
1046 	int ret;
1047 
1048 	ov5640_calc_pclk(sensor, rate, &prediv, &mult, &sysdiv, &pll_rdiv,
1049 			 &bit_div, &pclk_div);
1050 
1051 	if (bit_div == 2)
1052 		bit_div = 8;
1053 
1054 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL0,
1055 			     0x0f, bit_div);
1056 	if (ret)
1057 		return ret;
1058 
1059 	/*
1060 	 * We need to set sysdiv according to the clock, and to clear
1061 	 * the MIPI divider.
1062 	 */
1063 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL1,
1064 			     0xff, sysdiv << 4);
1065 	if (ret)
1066 		return ret;
1067 
1068 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL2,
1069 			     0xff, mult);
1070 	if (ret)
1071 		return ret;
1072 
1073 	ret = ov5640_mod_reg(sensor, OV5640_REG_SC_PLL_CTRL3,
1074 			     0x1f, prediv | ((pll_rdiv - 1) << 4));
1075 	if (ret)
1076 		return ret;
1077 
1078 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x30,
1079 			      (ilog2(pclk_div) << 4));
1080 }
1081 
1082 /* set JPEG framing sizes */
1083 static int ov5640_set_jpeg_timings(struct ov5640_dev *sensor,
1084 				   const struct ov5640_mode_info *mode)
1085 {
1086 	int ret;
1087 
1088 	/*
1089 	 * compression mode 3 timing
1090 	 *
1091 	 * Data is transmitted with programmable width (VFIFO_HSIZE).
1092 	 * No padding done. Last line may have less data. Varying
1093 	 * number of lines per frame, depending on amount of data.
1094 	 */
1095 	ret = ov5640_mod_reg(sensor, OV5640_REG_JPG_MODE_SELECT, 0x7, 0x3);
1096 	if (ret < 0)
1097 		return ret;
1098 
1099 	ret = ov5640_write_reg16(sensor, OV5640_REG_VFIFO_HSIZE, mode->hact);
1100 	if (ret < 0)
1101 		return ret;
1102 
1103 	return ov5640_write_reg16(sensor, OV5640_REG_VFIFO_VSIZE, mode->vact);
1104 }
1105 
1106 /* download ov5640 settings to sensor through i2c */
1107 static int ov5640_set_timings(struct ov5640_dev *sensor,
1108 			      const struct ov5640_mode_info *mode)
1109 {
1110 	int ret;
1111 
1112 	if (sensor->fmt.code == MEDIA_BUS_FMT_JPEG_1X8) {
1113 		ret = ov5640_set_jpeg_timings(sensor, mode);
1114 		if (ret < 0)
1115 			return ret;
1116 	}
1117 
1118 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPHO, mode->hact);
1119 	if (ret < 0)
1120 		return ret;
1121 
1122 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_DVPVO, mode->vact);
1123 	if (ret < 0)
1124 		return ret;
1125 
1126 	ret = ov5640_write_reg16(sensor, OV5640_REG_TIMING_HTS, mode->htot);
1127 	if (ret < 0)
1128 		return ret;
1129 
1130 	return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, mode->vtot);
1131 }
1132 
1133 static int ov5640_load_regs(struct ov5640_dev *sensor,
1134 			    const struct ov5640_mode_info *mode)
1135 {
1136 	const struct reg_value *regs = mode->reg_data;
1137 	unsigned int i;
1138 	u32 delay_ms;
1139 	u16 reg_addr;
1140 	u8 mask, val;
1141 	int ret = 0;
1142 
1143 	for (i = 0; i < mode->reg_data_size; ++i, ++regs) {
1144 		delay_ms = regs->delay_ms;
1145 		reg_addr = regs->reg_addr;
1146 		val = regs->val;
1147 		mask = regs->mask;
1148 
1149 		/* remain in power down mode for DVP */
1150 		if (regs->reg_addr == OV5640_REG_SYS_CTRL0 &&
1151 		    val == OV5640_REG_SYS_CTRL0_SW_PWUP &&
1152 		    sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY)
1153 			continue;
1154 
1155 		if (mask)
1156 			ret = ov5640_mod_reg(sensor, reg_addr, mask, val);
1157 		else
1158 			ret = ov5640_write_reg(sensor, reg_addr, val);
1159 		if (ret)
1160 			break;
1161 
1162 		if (delay_ms)
1163 			usleep_range(1000 * delay_ms, 1000 * delay_ms + 100);
1164 	}
1165 
1166 	return ov5640_set_timings(sensor, mode);
1167 }
1168 
1169 static int ov5640_set_autoexposure(struct ov5640_dev *sensor, bool on)
1170 {
1171 	return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1172 			      BIT(0), on ? 0 : BIT(0));
1173 }
1174 
1175 /* read exposure, in number of line periods */
1176 static int ov5640_get_exposure(struct ov5640_dev *sensor)
1177 {
1178 	int exp, ret;
1179 	u8 temp;
1180 
1181 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_HI, &temp);
1182 	if (ret)
1183 		return ret;
1184 	exp = ((int)temp & 0x0f) << 16;
1185 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_MED, &temp);
1186 	if (ret)
1187 		return ret;
1188 	exp |= ((int)temp << 8);
1189 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_PK_EXPOSURE_LO, &temp);
1190 	if (ret)
1191 		return ret;
1192 	exp |= (int)temp;
1193 
1194 	return exp >> 4;
1195 }
1196 
1197 /* write exposure, given number of line periods */
1198 static int ov5640_set_exposure(struct ov5640_dev *sensor, u32 exposure)
1199 {
1200 	int ret;
1201 
1202 	exposure <<= 4;
1203 
1204 	ret = ov5640_write_reg(sensor,
1205 			       OV5640_REG_AEC_PK_EXPOSURE_LO,
1206 			       exposure & 0xff);
1207 	if (ret)
1208 		return ret;
1209 	ret = ov5640_write_reg(sensor,
1210 			       OV5640_REG_AEC_PK_EXPOSURE_MED,
1211 			       (exposure >> 8) & 0xff);
1212 	if (ret)
1213 		return ret;
1214 	return ov5640_write_reg(sensor,
1215 				OV5640_REG_AEC_PK_EXPOSURE_HI,
1216 				(exposure >> 16) & 0x0f);
1217 }
1218 
1219 static int ov5640_get_gain(struct ov5640_dev *sensor)
1220 {
1221 	u16 gain;
1222 	int ret;
1223 
1224 	ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN, &gain);
1225 	if (ret)
1226 		return ret;
1227 
1228 	return gain & 0x3ff;
1229 }
1230 
1231 static int ov5640_set_gain(struct ov5640_dev *sensor, int gain)
1232 {
1233 	return ov5640_write_reg16(sensor, OV5640_REG_AEC_PK_REAL_GAIN,
1234 				  (u16)gain & 0x3ff);
1235 }
1236 
1237 static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
1238 {
1239 	return ov5640_mod_reg(sensor, OV5640_REG_AEC_PK_MANUAL,
1240 			      BIT(1), on ? 0 : BIT(1));
1241 }
1242 
1243 static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
1244 {
1245 	return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
1246 				OV5640_REG_SYS_CTRL0_SW_PWUP :
1247 				OV5640_REG_SYS_CTRL0_SW_PWDN);
1248 }
1249 
1250 static int ov5640_set_stream_mipi(struct ov5640_dev *sensor, bool on)
1251 {
1252 	int ret;
1253 
1254 	/*
1255 	 * Enable/disable the MIPI interface
1256 	 *
1257 	 * 0x300e = on ? 0x45 : 0x40
1258 	 *
1259 	 * FIXME: the sensor manual (version 2.03) reports
1260 	 * [7:5] = 000  : 1 data lane mode
1261 	 * [7:5] = 001  : 2 data lanes mode
1262 	 * But this settings do not work, while the following ones
1263 	 * have been validated for 2 data lanes mode.
1264 	 *
1265 	 * [7:5] = 010	: 2 data lanes mode
1266 	 * [4] = 0	: Power up MIPI HS Tx
1267 	 * [3] = 0	: Power up MIPI LS Rx
1268 	 * [2] = 1/0	: MIPI interface enable/disable
1269 	 * [1:0] = 01/00: FIXME: 'debug'
1270 	 */
1271 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00,
1272 			       on ? 0x45 : 0x40);
1273 	if (ret)
1274 		return ret;
1275 
1276 	return ov5640_write_reg(sensor, OV5640_REG_FRAME_CTRL01,
1277 				on ? 0x00 : 0x0f);
1278 }
1279 
1280 static int ov5640_get_sysclk(struct ov5640_dev *sensor)
1281 {
1282 	 /* calculate sysclk */
1283 	u32 xvclk = sensor->xclk_freq / 10000;
1284 	u32 multiplier, prediv, VCO, sysdiv, pll_rdiv;
1285 	u32 sclk_rdiv_map[] = {1, 2, 4, 8};
1286 	u32 bit_div2x = 1, sclk_rdiv, sysclk;
1287 	u8 temp1, temp2;
1288 	int ret;
1289 
1290 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL0, &temp1);
1291 	if (ret)
1292 		return ret;
1293 	temp2 = temp1 & 0x0f;
1294 	if (temp2 == 8 || temp2 == 10)
1295 		bit_div2x = temp2 / 2;
1296 
1297 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL1, &temp1);
1298 	if (ret)
1299 		return ret;
1300 	sysdiv = temp1 >> 4;
1301 	if (sysdiv == 0)
1302 		sysdiv = 16;
1303 
1304 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL2, &temp1);
1305 	if (ret)
1306 		return ret;
1307 	multiplier = temp1;
1308 
1309 	ret = ov5640_read_reg(sensor, OV5640_REG_SC_PLL_CTRL3, &temp1);
1310 	if (ret)
1311 		return ret;
1312 	prediv = temp1 & 0x0f;
1313 	pll_rdiv = ((temp1 >> 4) & 0x01) + 1;
1314 
1315 	ret = ov5640_read_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, &temp1);
1316 	if (ret)
1317 		return ret;
1318 	temp2 = temp1 & 0x03;
1319 	sclk_rdiv = sclk_rdiv_map[temp2];
1320 
1321 	if (!prediv || !sysdiv || !pll_rdiv || !bit_div2x)
1322 		return -EINVAL;
1323 
1324 	VCO = xvclk * multiplier / prediv;
1325 
1326 	sysclk = VCO / sysdiv / pll_rdiv * 2 / bit_div2x / sclk_rdiv;
1327 
1328 	return sysclk;
1329 }
1330 
1331 static int ov5640_set_night_mode(struct ov5640_dev *sensor)
1332 {
1333 	 /* read HTS from register settings */
1334 	u8 mode;
1335 	int ret;
1336 
1337 	ret = ov5640_read_reg(sensor, OV5640_REG_AEC_CTRL00, &mode);
1338 	if (ret)
1339 		return ret;
1340 	mode &= 0xfb;
1341 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL00, mode);
1342 }
1343 
1344 static int ov5640_get_hts(struct ov5640_dev *sensor)
1345 {
1346 	/* read HTS from register settings */
1347 	u16 hts;
1348 	int ret;
1349 
1350 	ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_HTS, &hts);
1351 	if (ret)
1352 		return ret;
1353 	return hts;
1354 }
1355 
1356 static int ov5640_get_vts(struct ov5640_dev *sensor)
1357 {
1358 	u16 vts;
1359 	int ret;
1360 
1361 	ret = ov5640_read_reg16(sensor, OV5640_REG_TIMING_VTS, &vts);
1362 	if (ret)
1363 		return ret;
1364 	return vts;
1365 }
1366 
1367 static int ov5640_set_vts(struct ov5640_dev *sensor, int vts)
1368 {
1369 	return ov5640_write_reg16(sensor, OV5640_REG_TIMING_VTS, vts);
1370 }
1371 
1372 static int ov5640_get_light_freq(struct ov5640_dev *sensor)
1373 {
1374 	/* get banding filter value */
1375 	int ret, light_freq = 0;
1376 	u8 temp, temp1;
1377 
1378 	ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL01, &temp);
1379 	if (ret)
1380 		return ret;
1381 
1382 	if (temp & 0x80) {
1383 		/* manual */
1384 		ret = ov5640_read_reg(sensor, OV5640_REG_HZ5060_CTRL00,
1385 				      &temp1);
1386 		if (ret)
1387 			return ret;
1388 		if (temp1 & 0x04) {
1389 			/* 50Hz */
1390 			light_freq = 50;
1391 		} else {
1392 			/* 60Hz */
1393 			light_freq = 60;
1394 		}
1395 	} else {
1396 		/* auto */
1397 		ret = ov5640_read_reg(sensor, OV5640_REG_SIGMADELTA_CTRL0C,
1398 				      &temp1);
1399 		if (ret)
1400 			return ret;
1401 
1402 		if (temp1 & 0x01) {
1403 			/* 50Hz */
1404 			light_freq = 50;
1405 		} else {
1406 			/* 60Hz */
1407 		}
1408 	}
1409 
1410 	return light_freq;
1411 }
1412 
1413 static int ov5640_set_bandingfilter(struct ov5640_dev *sensor)
1414 {
1415 	u32 band_step60, max_band60, band_step50, max_band50, prev_vts;
1416 	int ret;
1417 
1418 	/* read preview PCLK */
1419 	ret = ov5640_get_sysclk(sensor);
1420 	if (ret < 0)
1421 		return ret;
1422 	if (ret == 0)
1423 		return -EINVAL;
1424 	sensor->prev_sysclk = ret;
1425 	/* read preview HTS */
1426 	ret = ov5640_get_hts(sensor);
1427 	if (ret < 0)
1428 		return ret;
1429 	if (ret == 0)
1430 		return -EINVAL;
1431 	sensor->prev_hts = ret;
1432 
1433 	/* read preview VTS */
1434 	ret = ov5640_get_vts(sensor);
1435 	if (ret < 0)
1436 		return ret;
1437 	prev_vts = ret;
1438 
1439 	/* calculate banding filter */
1440 	/* 60Hz */
1441 	band_step60 = sensor->prev_sysclk * 100 / sensor->prev_hts * 100 / 120;
1442 	ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B60_STEP, band_step60);
1443 	if (ret)
1444 		return ret;
1445 	if (!band_step60)
1446 		return -EINVAL;
1447 	max_band60 = (int)((prev_vts - 4) / band_step60);
1448 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0D, max_band60);
1449 	if (ret)
1450 		return ret;
1451 
1452 	/* 50Hz */
1453 	band_step50 = sensor->prev_sysclk * 100 / sensor->prev_hts;
1454 	ret = ov5640_write_reg16(sensor, OV5640_REG_AEC_B50_STEP, band_step50);
1455 	if (ret)
1456 		return ret;
1457 	if (!band_step50)
1458 		return -EINVAL;
1459 	max_band50 = (int)((prev_vts - 4) / band_step50);
1460 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0E, max_band50);
1461 }
1462 
1463 static int ov5640_set_ae_target(struct ov5640_dev *sensor, int target)
1464 {
1465 	/* stable in high */
1466 	u32 fast_high, fast_low;
1467 	int ret;
1468 
1469 	sensor->ae_low = target * 23 / 25;	/* 0.92 */
1470 	sensor->ae_high = target * 27 / 25;	/* 1.08 */
1471 
1472 	fast_high = sensor->ae_high << 1;
1473 	if (fast_high > 255)
1474 		fast_high = 255;
1475 
1476 	fast_low = sensor->ae_low >> 1;
1477 
1478 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL0F, sensor->ae_high);
1479 	if (ret)
1480 		return ret;
1481 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL10, sensor->ae_low);
1482 	if (ret)
1483 		return ret;
1484 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1B, sensor->ae_high);
1485 	if (ret)
1486 		return ret;
1487 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1E, sensor->ae_low);
1488 	if (ret)
1489 		return ret;
1490 	ret = ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL11, fast_high);
1491 	if (ret)
1492 		return ret;
1493 	return ov5640_write_reg(sensor, OV5640_REG_AEC_CTRL1F, fast_low);
1494 }
1495 
1496 static int ov5640_get_binning(struct ov5640_dev *sensor)
1497 {
1498 	u8 temp;
1499 	int ret;
1500 
1501 	ret = ov5640_read_reg(sensor, OV5640_REG_TIMING_TC_REG21, &temp);
1502 	if (ret)
1503 		return ret;
1504 
1505 	return temp & BIT(0);
1506 }
1507 
1508 static int ov5640_set_binning(struct ov5640_dev *sensor, bool enable)
1509 {
1510 	int ret;
1511 
1512 	/*
1513 	 * TIMING TC REG21:
1514 	 * - [0]:	Horizontal binning enable
1515 	 */
1516 	ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
1517 			     BIT(0), enable ? BIT(0) : 0);
1518 	if (ret)
1519 		return ret;
1520 	/*
1521 	 * TIMING TC REG20:
1522 	 * - [0]:	Undocumented, but hardcoded init sequences
1523 	 *		are always setting REG21/REG20 bit 0 to same value...
1524 	 */
1525 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
1526 			      BIT(0), enable ? BIT(0) : 0);
1527 }
1528 
1529 static int ov5640_set_virtual_channel(struct ov5640_dev *sensor)
1530 {
1531 	struct i2c_client *client = sensor->i2c_client;
1532 	u8 temp, channel = virtual_channel;
1533 	int ret;
1534 
1535 	if (channel > 3) {
1536 		dev_err(&client->dev,
1537 			"%s: wrong virtual_channel parameter, expected (0..3), got %d\n",
1538 			__func__, channel);
1539 		return -EINVAL;
1540 	}
1541 
1542 	ret = ov5640_read_reg(sensor, OV5640_REG_DEBUG_MODE, &temp);
1543 	if (ret)
1544 		return ret;
1545 	temp &= ~(3 << 6);
1546 	temp |= (channel << 6);
1547 	return ov5640_write_reg(sensor, OV5640_REG_DEBUG_MODE, temp);
1548 }
1549 
1550 static const struct ov5640_mode_info *
1551 ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
1552 		 int width, int height, bool nearest)
1553 {
1554 	const struct ov5640_mode_info *mode;
1555 
1556 	mode = v4l2_find_nearest_size(ov5640_mode_data,
1557 				      ARRAY_SIZE(ov5640_mode_data),
1558 				      hact, vact,
1559 				      width, height);
1560 
1561 	if (!mode ||
1562 	    (!nearest && (mode->hact != width || mode->vact != height)))
1563 		return NULL;
1564 
1565 	/* Check to see if the current mode exceeds the max frame rate */
1566 	if (ov5640_framerates[fr] > ov5640_framerates[mode->max_fps])
1567 		return NULL;
1568 
1569 	return mode;
1570 }
1571 
1572 static u64 ov5640_calc_pixel_rate(struct ov5640_dev *sensor)
1573 {
1574 	u64 rate;
1575 
1576 	rate = sensor->current_mode->vtot * sensor->current_mode->htot;
1577 	rate *= ov5640_framerates[sensor->current_fr];
1578 
1579 	return rate;
1580 }
1581 
1582 /*
1583  * sensor changes between scaling and subsampling, go through
1584  * exposure calculation
1585  */
1586 static int ov5640_set_mode_exposure_calc(struct ov5640_dev *sensor,
1587 					 const struct ov5640_mode_info *mode)
1588 {
1589 	u32 prev_shutter, prev_gain16;
1590 	u32 cap_shutter, cap_gain16;
1591 	u32 cap_sysclk, cap_hts, cap_vts;
1592 	u32 light_freq, cap_bandfilt, cap_maxband;
1593 	u32 cap_gain16_shutter;
1594 	u8 average;
1595 	int ret;
1596 
1597 	if (!mode->reg_data)
1598 		return -EINVAL;
1599 
1600 	/* read preview shutter */
1601 	ret = ov5640_get_exposure(sensor);
1602 	if (ret < 0)
1603 		return ret;
1604 	prev_shutter = ret;
1605 	ret = ov5640_get_binning(sensor);
1606 	if (ret < 0)
1607 		return ret;
1608 	if (ret && mode->id != OV5640_MODE_720P_1280_720 &&
1609 	    mode->id != OV5640_MODE_1080P_1920_1080)
1610 		prev_shutter *= 2;
1611 
1612 	/* read preview gain */
1613 	ret = ov5640_get_gain(sensor);
1614 	if (ret < 0)
1615 		return ret;
1616 	prev_gain16 = ret;
1617 
1618 	/* get average */
1619 	ret = ov5640_read_reg(sensor, OV5640_REG_AVG_READOUT, &average);
1620 	if (ret)
1621 		return ret;
1622 
1623 	/* turn off night mode for capture */
1624 	ret = ov5640_set_night_mode(sensor);
1625 	if (ret < 0)
1626 		return ret;
1627 
1628 	/* Write capture setting */
1629 	ret = ov5640_load_regs(sensor, mode);
1630 	if (ret < 0)
1631 		return ret;
1632 
1633 	/* read capture VTS */
1634 	ret = ov5640_get_vts(sensor);
1635 	if (ret < 0)
1636 		return ret;
1637 	cap_vts = ret;
1638 	ret = ov5640_get_hts(sensor);
1639 	if (ret < 0)
1640 		return ret;
1641 	if (ret == 0)
1642 		return -EINVAL;
1643 	cap_hts = ret;
1644 
1645 	ret = ov5640_get_sysclk(sensor);
1646 	if (ret < 0)
1647 		return ret;
1648 	if (ret == 0)
1649 		return -EINVAL;
1650 	cap_sysclk = ret;
1651 
1652 	/* calculate capture banding filter */
1653 	ret = ov5640_get_light_freq(sensor);
1654 	if (ret < 0)
1655 		return ret;
1656 	light_freq = ret;
1657 
1658 	if (light_freq == 60) {
1659 		/* 60Hz */
1660 		cap_bandfilt = cap_sysclk * 100 / cap_hts * 100 / 120;
1661 	} else {
1662 		/* 50Hz */
1663 		cap_bandfilt = cap_sysclk * 100 / cap_hts;
1664 	}
1665 
1666 	if (!sensor->prev_sysclk) {
1667 		ret = ov5640_get_sysclk(sensor);
1668 		if (ret < 0)
1669 			return ret;
1670 		if (ret == 0)
1671 			return -EINVAL;
1672 		sensor->prev_sysclk = ret;
1673 	}
1674 
1675 	if (!cap_bandfilt)
1676 		return -EINVAL;
1677 
1678 	cap_maxband = (int)((cap_vts - 4) / cap_bandfilt);
1679 
1680 	/* calculate capture shutter/gain16 */
1681 	if (average > sensor->ae_low && average < sensor->ae_high) {
1682 		/* in stable range */
1683 		cap_gain16_shutter =
1684 			prev_gain16 * prev_shutter *
1685 			cap_sysclk / sensor->prev_sysclk *
1686 			sensor->prev_hts / cap_hts *
1687 			sensor->ae_target / average;
1688 	} else {
1689 		cap_gain16_shutter =
1690 			prev_gain16 * prev_shutter *
1691 			cap_sysclk / sensor->prev_sysclk *
1692 			sensor->prev_hts / cap_hts;
1693 	}
1694 
1695 	/* gain to shutter */
1696 	if (cap_gain16_shutter < (cap_bandfilt * 16)) {
1697 		/* shutter < 1/100 */
1698 		cap_shutter = cap_gain16_shutter / 16;
1699 		if (cap_shutter < 1)
1700 			cap_shutter = 1;
1701 
1702 		cap_gain16 = cap_gain16_shutter / cap_shutter;
1703 		if (cap_gain16 < 16)
1704 			cap_gain16 = 16;
1705 	} else {
1706 		if (cap_gain16_shutter > (cap_bandfilt * cap_maxband * 16)) {
1707 			/* exposure reach max */
1708 			cap_shutter = cap_bandfilt * cap_maxband;
1709 			if (!cap_shutter)
1710 				return -EINVAL;
1711 
1712 			cap_gain16 = cap_gain16_shutter / cap_shutter;
1713 		} else {
1714 			/* 1/100 < (cap_shutter = n/100) =< max */
1715 			cap_shutter =
1716 				((int)(cap_gain16_shutter / 16 / cap_bandfilt))
1717 				* cap_bandfilt;
1718 			if (!cap_shutter)
1719 				return -EINVAL;
1720 
1721 			cap_gain16 = cap_gain16_shutter / cap_shutter;
1722 		}
1723 	}
1724 
1725 	/* set capture gain */
1726 	ret = ov5640_set_gain(sensor, cap_gain16);
1727 	if (ret)
1728 		return ret;
1729 
1730 	/* write capture shutter */
1731 	if (cap_shutter > (cap_vts - 4)) {
1732 		cap_vts = cap_shutter + 4;
1733 		ret = ov5640_set_vts(sensor, cap_vts);
1734 		if (ret < 0)
1735 			return ret;
1736 	}
1737 
1738 	/* set exposure */
1739 	return ov5640_set_exposure(sensor, cap_shutter);
1740 }
1741 
1742 /*
1743  * if sensor changes inside scaling or subsampling
1744  * change mode directly
1745  */
1746 static int ov5640_set_mode_direct(struct ov5640_dev *sensor,
1747 				  const struct ov5640_mode_info *mode)
1748 {
1749 	if (!mode->reg_data)
1750 		return -EINVAL;
1751 
1752 	/* Write capture setting */
1753 	return ov5640_load_regs(sensor, mode);
1754 }
1755 
1756 static int ov5640_set_mode(struct ov5640_dev *sensor)
1757 {
1758 	const struct ov5640_mode_info *mode = sensor->current_mode;
1759 	const struct ov5640_mode_info *orig_mode = sensor->last_mode;
1760 	enum ov5640_downsize_mode dn_mode, orig_dn_mode;
1761 	bool auto_gain = sensor->ctrls.auto_gain->val == 1;
1762 	bool auto_exp =  sensor->ctrls.auto_exp->val == V4L2_EXPOSURE_AUTO;
1763 	unsigned long rate;
1764 	int ret;
1765 
1766 	dn_mode = mode->dn_mode;
1767 	orig_dn_mode = orig_mode->dn_mode;
1768 
1769 	/* auto gain and exposure must be turned off when changing modes */
1770 	if (auto_gain) {
1771 		ret = ov5640_set_autogain(sensor, false);
1772 		if (ret)
1773 			return ret;
1774 	}
1775 
1776 	if (auto_exp) {
1777 		ret = ov5640_set_autoexposure(sensor, false);
1778 		if (ret)
1779 			goto restore_auto_gain;
1780 	}
1781 
1782 	/*
1783 	 * All the formats we support have 16 bits per pixel, seems to require
1784 	 * the same rate than YUV, so we can just use 16 bpp all the time.
1785 	 */
1786 	rate = ov5640_calc_pixel_rate(sensor) * 16;
1787 	if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1788 		rate = rate / sensor->ep.bus.mipi_csi2.num_data_lanes;
1789 		ret = ov5640_set_mipi_pclk(sensor, rate);
1790 	} else {
1791 		rate = rate / sensor->ep.bus.parallel.bus_width;
1792 		ret = ov5640_set_dvp_pclk(sensor, rate);
1793 	}
1794 
1795 	if (ret < 0)
1796 		return 0;
1797 
1798 	if ((dn_mode == SUBSAMPLING && orig_dn_mode == SCALING) ||
1799 	    (dn_mode == SCALING && orig_dn_mode == SUBSAMPLING)) {
1800 		/*
1801 		 * change between subsampling and scaling
1802 		 * go through exposure calculation
1803 		 */
1804 		ret = ov5640_set_mode_exposure_calc(sensor, mode);
1805 	} else {
1806 		/*
1807 		 * change inside subsampling or scaling
1808 		 * download firmware directly
1809 		 */
1810 		ret = ov5640_set_mode_direct(sensor, mode);
1811 	}
1812 	if (ret < 0)
1813 		goto restore_auto_exp_gain;
1814 
1815 	/* restore auto gain and exposure */
1816 	if (auto_gain)
1817 		ov5640_set_autogain(sensor, true);
1818 	if (auto_exp)
1819 		ov5640_set_autoexposure(sensor, true);
1820 
1821 	ret = ov5640_set_binning(sensor, dn_mode != SCALING);
1822 	if (ret < 0)
1823 		return ret;
1824 	ret = ov5640_set_ae_target(sensor, sensor->ae_target);
1825 	if (ret < 0)
1826 		return ret;
1827 	ret = ov5640_get_light_freq(sensor);
1828 	if (ret < 0)
1829 		return ret;
1830 	ret = ov5640_set_bandingfilter(sensor);
1831 	if (ret < 0)
1832 		return ret;
1833 	ret = ov5640_set_virtual_channel(sensor);
1834 	if (ret < 0)
1835 		return ret;
1836 
1837 	sensor->pending_mode_change = false;
1838 	sensor->last_mode = mode;
1839 
1840 	return 0;
1841 
1842 restore_auto_exp_gain:
1843 	if (auto_exp)
1844 		ov5640_set_autoexposure(sensor, true);
1845 restore_auto_gain:
1846 	if (auto_gain)
1847 		ov5640_set_autogain(sensor, true);
1848 
1849 	return ret;
1850 }
1851 
1852 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
1853 			       struct v4l2_mbus_framefmt *format);
1854 
1855 /* restore the last set video mode after chip power-on */
1856 static int ov5640_restore_mode(struct ov5640_dev *sensor)
1857 {
1858 	int ret;
1859 
1860 	/* first load the initial register values */
1861 	ret = ov5640_load_regs(sensor, &ov5640_mode_init_data);
1862 	if (ret < 0)
1863 		return ret;
1864 	sensor->last_mode = &ov5640_mode_init_data;
1865 
1866 	ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_ROOT_DIVIDER, 0x3f,
1867 			     (ilog2(OV5640_SCLK2X_ROOT_DIV) << 2) |
1868 			     ilog2(OV5640_SCLK_ROOT_DIV));
1869 	if (ret)
1870 		return ret;
1871 
1872 	/* now restore the last capture mode */
1873 	ret = ov5640_set_mode(sensor);
1874 	if (ret < 0)
1875 		return ret;
1876 
1877 	return ov5640_set_framefmt(sensor, &sensor->fmt);
1878 }
1879 
1880 static void ov5640_power(struct ov5640_dev *sensor, bool enable)
1881 {
1882 	gpiod_set_value_cansleep(sensor->pwdn_gpio, enable ? 0 : 1);
1883 }
1884 
1885 static void ov5640_reset(struct ov5640_dev *sensor)
1886 {
1887 	if (!sensor->reset_gpio)
1888 		return;
1889 
1890 	gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1891 
1892 	/* camera power cycle */
1893 	ov5640_power(sensor, false);
1894 	usleep_range(5000, 10000);
1895 	ov5640_power(sensor, true);
1896 	usleep_range(5000, 10000);
1897 
1898 	gpiod_set_value_cansleep(sensor->reset_gpio, 1);
1899 	usleep_range(1000, 2000);
1900 
1901 	gpiod_set_value_cansleep(sensor->reset_gpio, 0);
1902 	usleep_range(20000, 25000);
1903 }
1904 
1905 static int ov5640_set_power_on(struct ov5640_dev *sensor)
1906 {
1907 	struct i2c_client *client = sensor->i2c_client;
1908 	int ret;
1909 
1910 	ret = clk_prepare_enable(sensor->xclk);
1911 	if (ret) {
1912 		dev_err(&client->dev, "%s: failed to enable clock\n",
1913 			__func__);
1914 		return ret;
1915 	}
1916 
1917 	ret = regulator_bulk_enable(OV5640_NUM_SUPPLIES,
1918 				    sensor->supplies);
1919 	if (ret) {
1920 		dev_err(&client->dev, "%s: failed to enable regulators\n",
1921 			__func__);
1922 		goto xclk_off;
1923 	}
1924 
1925 	ov5640_reset(sensor);
1926 	ov5640_power(sensor, true);
1927 
1928 	ret = ov5640_init_slave_id(sensor);
1929 	if (ret)
1930 		goto power_off;
1931 
1932 	return 0;
1933 
1934 power_off:
1935 	ov5640_power(sensor, false);
1936 	regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1937 xclk_off:
1938 	clk_disable_unprepare(sensor->xclk);
1939 	return ret;
1940 }
1941 
1942 static void ov5640_set_power_off(struct ov5640_dev *sensor)
1943 {
1944 	ov5640_power(sensor, false);
1945 	regulator_bulk_disable(OV5640_NUM_SUPPLIES, sensor->supplies);
1946 	clk_disable_unprepare(sensor->xclk);
1947 }
1948 
1949 static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
1950 {
1951 	int ret;
1952 
1953 	if (!on) {
1954 		/* Reset MIPI bus settings to their default values. */
1955 		ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
1956 		ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x04);
1957 		ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x00);
1958 		return 0;
1959 	}
1960 
1961 	/*
1962 	 * Power up MIPI HS Tx and LS Rx; 2 data lanes mode
1963 	 *
1964 	 * 0x300e = 0x40
1965 	 * [7:5] = 010	: 2 data lanes mode (see FIXME note in
1966 	 *		  "ov5640_set_stream_mipi()")
1967 	 * [4] = 0	: Power up MIPI HS Tx
1968 	 * [3] = 0	: Power up MIPI LS Rx
1969 	 * [2] = 0	: MIPI interface disabled
1970 	 */
1971 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x40);
1972 	if (ret)
1973 		return ret;
1974 
1975 	/*
1976 	 * Gate clock and set LP11 in 'no packets mode' (idle)
1977 	 *
1978 	 * 0x4800 = 0x24
1979 	 * [5] = 1	: Gate clock when 'no packets'
1980 	 * [2] = 1	: MIPI bus in LP11 when 'no packets'
1981 	 */
1982 	ret = ov5640_write_reg(sensor, OV5640_REG_MIPI_CTRL00, 0x24);
1983 	if (ret)
1984 		return ret;
1985 
1986 	/*
1987 	 * Set data lanes and clock in LP11 when 'sleeping'
1988 	 *
1989 	 * 0x3019 = 0x70
1990 	 * [6] = 1	: MIPI data lane 2 in LP11 when 'sleeping'
1991 	 * [5] = 1	: MIPI data lane 1 in LP11 when 'sleeping'
1992 	 * [4] = 1	: MIPI clock lane in LP11 when 'sleeping'
1993 	 */
1994 	ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT00, 0x70);
1995 	if (ret)
1996 		return ret;
1997 
1998 	/* Give lanes some time to coax into LP11 state. */
1999 	usleep_range(500, 1000);
2000 
2001 	return 0;
2002 }
2003 
2004 static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
2005 {
2006 	unsigned int flags = sensor->ep.bus.parallel.flags;
2007 	bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
2008 	u8 polarities = 0;
2009 	int ret;
2010 
2011 	if (!on) {
2012 		/* Reset settings to their default values. */
2013 		ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
2014 		ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
2015 		ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
2016 		ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
2017 		ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0x00);
2018 		return 0;
2019 	}
2020 
2021 	/*
2022 	 * Note about parallel port configuration.
2023 	 *
2024 	 * When configured in parallel mode, the OV5640 will
2025 	 * output 10 bits data on DVP data lines [9:0].
2026 	 * If only 8 bits data are wanted, the 8 bits data lines
2027 	 * of the camera interface must be physically connected
2028 	 * on the DVP data lines [9:2].
2029 	 *
2030 	 * Control lines polarity can be configured through
2031 	 * devicetree endpoint control lines properties.
2032 	 * If no endpoint control lines properties are set,
2033 	 * polarity will be as below:
2034 	 * - VSYNC:	active high
2035 	 * - HREF:	active low
2036 	 * - PCLK:	active low
2037 	 *
2038 	 * VSYNC & HREF are not configured if BT656 bus mode is selected
2039 	 */
2040 
2041 	/*
2042 	 * BT656 embedded synchronization configuration
2043 	 *
2044 	 * CCIR656 CTRL00
2045 	 * - [7]:	SYNC code selection (0: auto generate sync code,
2046 	 *		1: sync code from regs 0x4732-0x4735)
2047 	 * - [6]:	f value in CCIR656 SYNC code when fixed f value
2048 	 * - [5]:	Fixed f value
2049 	 * - [4:3]:	Blank toggle data options (00: data=1'h040/1'h200,
2050 	 *		01: data from regs 0x4736-0x4738, 10: always keep 0)
2051 	 * - [1]:	Clip data disable
2052 	 * - [0]:	CCIR656 mode enable
2053 	 *
2054 	 * Default CCIR656 SAV/EAV mode with default codes
2055 	 * SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
2056 	 * - CCIR656 mode enable
2057 	 * - auto generation of sync codes
2058 	 * - blank toggle data 1'h040/1'h200
2059 	 * - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
2060 	 */
2061 	ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
2062 			       bt656 ? 0x01 : 0x00);
2063 	if (ret)
2064 		return ret;
2065 
2066 	/*
2067 	 * configure parallel port control lines polarity
2068 	 *
2069 	 * POLARITY CTRL0
2070 	 * - [5]:	PCLK polarity (0: active low, 1: active high)
2071 	 * - [1]:	HREF polarity (0: active low, 1: active high)
2072 	 * - [0]:	VSYNC polarity (mismatch here between
2073 	 *		datasheet and hardware, 0 is active high
2074 	 *		and 1 is active low...)
2075 	 */
2076 	if (!bt656) {
2077 		if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2078 			polarities |= BIT(1);
2079 		if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
2080 			polarities |= BIT(0);
2081 	}
2082 	if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
2083 		polarities |= BIT(5);
2084 
2085 	ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
2086 	if (ret)
2087 		return ret;
2088 
2089 	/*
2090 	 * powerdown MIPI TX/RX PHY & enable DVP
2091 	 *
2092 	 * MIPI CONTROL 00
2093 	 * [4] = 1	: Power down MIPI HS Tx
2094 	 * [3] = 1	: Power down MIPI LS Rx
2095 	 * [2] = 0	: DVP enable (MIPI disable)
2096 	 */
2097 	ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
2098 	if (ret)
2099 		return ret;
2100 
2101 	/*
2102 	 * enable VSYNC/HREF/PCLK DVP control lines
2103 	 * & D[9:6] DVP data lines
2104 	 *
2105 	 * PAD OUTPUT ENABLE 01
2106 	 * - 6:		VSYNC output enable
2107 	 * - 5:		HREF output enable
2108 	 * - 4:		PCLK output enable
2109 	 * - [3:0]:	D[9:6] output enable
2110 	 */
2111 	ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
2112 			       bt656 ? 0x1f : 0x7f);
2113 	if (ret)
2114 		return ret;
2115 
2116 	/*
2117 	 * enable D[5:0] DVP data lines
2118 	 *
2119 	 * PAD OUTPUT ENABLE 02
2120 	 * - [7:2]:	D[5:0] output enable
2121 	 */
2122 	return ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE02, 0xfc);
2123 }
2124 
2125 static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
2126 {
2127 	int ret = 0;
2128 
2129 	if (on) {
2130 		ret = ov5640_set_power_on(sensor);
2131 		if (ret)
2132 			return ret;
2133 
2134 		ret = ov5640_restore_mode(sensor);
2135 		if (ret)
2136 			goto power_off;
2137 	}
2138 
2139 	if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2140 		ret = ov5640_set_power_mipi(sensor, on);
2141 	else
2142 		ret = ov5640_set_power_dvp(sensor, on);
2143 	if (ret)
2144 		goto power_off;
2145 
2146 	if (!on)
2147 		ov5640_set_power_off(sensor);
2148 
2149 	return 0;
2150 
2151 power_off:
2152 	ov5640_set_power_off(sensor);
2153 	return ret;
2154 }
2155 
2156 /* --------------- Subdev Operations --------------- */
2157 
2158 static int ov5640_s_power(struct v4l2_subdev *sd, int on)
2159 {
2160 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2161 	int ret = 0;
2162 
2163 	mutex_lock(&sensor->lock);
2164 
2165 	/*
2166 	 * If the power count is modified from 0 to != 0 or from != 0 to 0,
2167 	 * update the power state.
2168 	 */
2169 	if (sensor->power_count == !on) {
2170 		ret = ov5640_set_power(sensor, !!on);
2171 		if (ret)
2172 			goto out;
2173 	}
2174 
2175 	/* Update the power count. */
2176 	sensor->power_count += on ? 1 : -1;
2177 	WARN_ON(sensor->power_count < 0);
2178 out:
2179 	mutex_unlock(&sensor->lock);
2180 
2181 	if (on && !ret && sensor->power_count == 1) {
2182 		/* restore controls */
2183 		ret = v4l2_ctrl_handler_setup(&sensor->ctrls.handler);
2184 	}
2185 
2186 	return ret;
2187 }
2188 
2189 static int ov5640_try_frame_interval(struct ov5640_dev *sensor,
2190 				     struct v4l2_fract *fi,
2191 				     u32 width, u32 height)
2192 {
2193 	const struct ov5640_mode_info *mode;
2194 	enum ov5640_frame_rate rate = OV5640_15_FPS;
2195 	int minfps, maxfps, best_fps, fps;
2196 	int i;
2197 
2198 	minfps = ov5640_framerates[OV5640_15_FPS];
2199 	maxfps = ov5640_framerates[OV5640_60_FPS];
2200 
2201 	if (fi->numerator == 0) {
2202 		fi->denominator = maxfps;
2203 		fi->numerator = 1;
2204 		rate = OV5640_60_FPS;
2205 		goto find_mode;
2206 	}
2207 
2208 	fps = clamp_val(DIV_ROUND_CLOSEST(fi->denominator, fi->numerator),
2209 			minfps, maxfps);
2210 
2211 	best_fps = minfps;
2212 	for (i = 0; i < ARRAY_SIZE(ov5640_framerates); i++) {
2213 		int curr_fps = ov5640_framerates[i];
2214 
2215 		if (abs(curr_fps - fps) < abs(best_fps - fps)) {
2216 			best_fps = curr_fps;
2217 			rate = i;
2218 		}
2219 	}
2220 
2221 	fi->numerator = 1;
2222 	fi->denominator = best_fps;
2223 
2224 find_mode:
2225 	mode = ov5640_find_mode(sensor, rate, width, height, false);
2226 	return mode ? rate : -EINVAL;
2227 }
2228 
2229 static int ov5640_get_fmt(struct v4l2_subdev *sd,
2230 			  struct v4l2_subdev_state *sd_state,
2231 			  struct v4l2_subdev_format *format)
2232 {
2233 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2234 	struct v4l2_mbus_framefmt *fmt;
2235 
2236 	if (format->pad != 0)
2237 		return -EINVAL;
2238 
2239 	mutex_lock(&sensor->lock);
2240 
2241 	if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2242 		fmt = v4l2_subdev_get_try_format(&sensor->sd, sd_state,
2243 						 format->pad);
2244 	else
2245 		fmt = &sensor->fmt;
2246 
2247 	format->format = *fmt;
2248 
2249 	mutex_unlock(&sensor->lock);
2250 
2251 	return 0;
2252 }
2253 
2254 static int ov5640_try_fmt_internal(struct v4l2_subdev *sd,
2255 				   struct v4l2_mbus_framefmt *fmt,
2256 				   enum ov5640_frame_rate fr,
2257 				   const struct ov5640_mode_info **new_mode)
2258 {
2259 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2260 	const struct ov5640_mode_info *mode;
2261 	int i;
2262 
2263 	mode = ov5640_find_mode(sensor, fr, fmt->width, fmt->height, true);
2264 	if (!mode)
2265 		return -EINVAL;
2266 	fmt->width = mode->hact;
2267 	fmt->height = mode->vact;
2268 
2269 	if (new_mode)
2270 		*new_mode = mode;
2271 
2272 	for (i = 0; i < ARRAY_SIZE(ov5640_formats); i++)
2273 		if (ov5640_formats[i].code == fmt->code)
2274 			break;
2275 	if (i >= ARRAY_SIZE(ov5640_formats))
2276 		i = 0;
2277 
2278 	fmt->code = ov5640_formats[i].code;
2279 	fmt->colorspace = ov5640_formats[i].colorspace;
2280 	fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
2281 	fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
2282 	fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
2283 
2284 	return 0;
2285 }
2286 
2287 static int ov5640_set_fmt(struct v4l2_subdev *sd,
2288 			  struct v4l2_subdev_state *sd_state,
2289 			  struct v4l2_subdev_format *format)
2290 {
2291 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2292 	const struct ov5640_mode_info *new_mode;
2293 	struct v4l2_mbus_framefmt *mbus_fmt = &format->format;
2294 	struct v4l2_mbus_framefmt *fmt;
2295 	int ret;
2296 
2297 	if (format->pad != 0)
2298 		return -EINVAL;
2299 
2300 	mutex_lock(&sensor->lock);
2301 
2302 	if (sensor->streaming) {
2303 		ret = -EBUSY;
2304 		goto out;
2305 	}
2306 
2307 	ret = ov5640_try_fmt_internal(sd, mbus_fmt,
2308 				      sensor->current_fr, &new_mode);
2309 	if (ret)
2310 		goto out;
2311 
2312 	if (format->which == V4L2_SUBDEV_FORMAT_TRY)
2313 		fmt = v4l2_subdev_get_try_format(sd, sd_state, 0);
2314 	else
2315 		fmt = &sensor->fmt;
2316 
2317 	*fmt = *mbus_fmt;
2318 
2319 	if (new_mode != sensor->current_mode) {
2320 		sensor->current_mode = new_mode;
2321 		sensor->pending_mode_change = true;
2322 	}
2323 	if (mbus_fmt->code != sensor->fmt.code)
2324 		sensor->pending_fmt_change = true;
2325 
2326 	__v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2327 				 ov5640_calc_pixel_rate(sensor));
2328 out:
2329 	mutex_unlock(&sensor->lock);
2330 	return ret;
2331 }
2332 
2333 static int ov5640_set_framefmt(struct ov5640_dev *sensor,
2334 			       struct v4l2_mbus_framefmt *format)
2335 {
2336 	int ret = 0;
2337 	bool is_jpeg = false;
2338 	u8 fmt, mux;
2339 
2340 	switch (format->code) {
2341 	case MEDIA_BUS_FMT_UYVY8_2X8:
2342 		/* YUV422, UYVY */
2343 		fmt = 0x3f;
2344 		mux = OV5640_FMT_MUX_YUV422;
2345 		break;
2346 	case MEDIA_BUS_FMT_YUYV8_2X8:
2347 		/* YUV422, YUYV */
2348 		fmt = 0x30;
2349 		mux = OV5640_FMT_MUX_YUV422;
2350 		break;
2351 	case MEDIA_BUS_FMT_RGB565_2X8_LE:
2352 		/* RGB565 {g[2:0],b[4:0]},{r[4:0],g[5:3]} */
2353 		fmt = 0x6F;
2354 		mux = OV5640_FMT_MUX_RGB;
2355 		break;
2356 	case MEDIA_BUS_FMT_RGB565_2X8_BE:
2357 		/* RGB565 {r[4:0],g[5:3]},{g[2:0],b[4:0]} */
2358 		fmt = 0x61;
2359 		mux = OV5640_FMT_MUX_RGB;
2360 		break;
2361 	case MEDIA_BUS_FMT_JPEG_1X8:
2362 		/* YUV422, YUYV */
2363 		fmt = 0x30;
2364 		mux = OV5640_FMT_MUX_YUV422;
2365 		is_jpeg = true;
2366 		break;
2367 	case MEDIA_BUS_FMT_SBGGR8_1X8:
2368 		/* Raw, BGBG... / GRGR... */
2369 		fmt = 0x00;
2370 		mux = OV5640_FMT_MUX_RAW_DPC;
2371 		break;
2372 	case MEDIA_BUS_FMT_SGBRG8_1X8:
2373 		/* Raw bayer, GBGB... / RGRG... */
2374 		fmt = 0x01;
2375 		mux = OV5640_FMT_MUX_RAW_DPC;
2376 		break;
2377 	case MEDIA_BUS_FMT_SGRBG8_1X8:
2378 		/* Raw bayer, GRGR... / BGBG... */
2379 		fmt = 0x02;
2380 		mux = OV5640_FMT_MUX_RAW_DPC;
2381 		break;
2382 	case MEDIA_BUS_FMT_SRGGB8_1X8:
2383 		/* Raw bayer, RGRG... / GBGB... */
2384 		fmt = 0x03;
2385 		mux = OV5640_FMT_MUX_RAW_DPC;
2386 		break;
2387 	default:
2388 		return -EINVAL;
2389 	}
2390 
2391 	/* FORMAT CONTROL00: YUV and RGB formatting */
2392 	ret = ov5640_write_reg(sensor, OV5640_REG_FORMAT_CONTROL00, fmt);
2393 	if (ret)
2394 		return ret;
2395 
2396 	/* FORMAT MUX CONTROL: ISP YUV or RGB */
2397 	ret = ov5640_write_reg(sensor, OV5640_REG_ISP_FORMAT_MUX_CTRL, mux);
2398 	if (ret)
2399 		return ret;
2400 
2401 	/*
2402 	 * TIMING TC REG21:
2403 	 * - [5]:	JPEG enable
2404 	 */
2405 	ret = ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2406 			     BIT(5), is_jpeg ? BIT(5) : 0);
2407 	if (ret)
2408 		return ret;
2409 
2410 	/*
2411 	 * SYSTEM RESET02:
2412 	 * - [4]:	Reset JFIFO
2413 	 * - [3]:	Reset SFIFO
2414 	 * - [2]:	Reset JPEG
2415 	 */
2416 	ret = ov5640_mod_reg(sensor, OV5640_REG_SYS_RESET02,
2417 			     BIT(4) | BIT(3) | BIT(2),
2418 			     is_jpeg ? 0 : (BIT(4) | BIT(3) | BIT(2)));
2419 	if (ret)
2420 		return ret;
2421 
2422 	/*
2423 	 * CLOCK ENABLE02:
2424 	 * - [5]:	Enable JPEG 2x clock
2425 	 * - [3]:	Enable JPEG clock
2426 	 */
2427 	return ov5640_mod_reg(sensor, OV5640_REG_SYS_CLOCK_ENABLE02,
2428 			      BIT(5) | BIT(3),
2429 			      is_jpeg ? (BIT(5) | BIT(3)) : 0);
2430 }
2431 
2432 /*
2433  * Sensor Controls.
2434  */
2435 
2436 static int ov5640_set_ctrl_hue(struct ov5640_dev *sensor, int value)
2437 {
2438 	int ret;
2439 
2440 	if (value) {
2441 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2442 				     BIT(0), BIT(0));
2443 		if (ret)
2444 			return ret;
2445 		ret = ov5640_write_reg16(sensor, OV5640_REG_SDE_CTRL1, value);
2446 	} else {
2447 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(0), 0);
2448 	}
2449 
2450 	return ret;
2451 }
2452 
2453 static int ov5640_set_ctrl_contrast(struct ov5640_dev *sensor, int value)
2454 {
2455 	int ret;
2456 
2457 	if (value) {
2458 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2459 				     BIT(2), BIT(2));
2460 		if (ret)
2461 			return ret;
2462 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL5,
2463 				       value & 0xff);
2464 	} else {
2465 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(2), 0);
2466 	}
2467 
2468 	return ret;
2469 }
2470 
2471 static int ov5640_set_ctrl_saturation(struct ov5640_dev *sensor, int value)
2472 {
2473 	int ret;
2474 
2475 	if (value) {
2476 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0,
2477 				     BIT(1), BIT(1));
2478 		if (ret)
2479 			return ret;
2480 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL3,
2481 				       value & 0xff);
2482 		if (ret)
2483 			return ret;
2484 		ret = ov5640_write_reg(sensor, OV5640_REG_SDE_CTRL4,
2485 				       value & 0xff);
2486 	} else {
2487 		ret = ov5640_mod_reg(sensor, OV5640_REG_SDE_CTRL0, BIT(1), 0);
2488 	}
2489 
2490 	return ret;
2491 }
2492 
2493 static int ov5640_set_ctrl_white_balance(struct ov5640_dev *sensor, int awb)
2494 {
2495 	int ret;
2496 
2497 	ret = ov5640_mod_reg(sensor, OV5640_REG_AWB_MANUAL_CTRL,
2498 			     BIT(0), awb ? 0 : 1);
2499 	if (ret)
2500 		return ret;
2501 
2502 	if (!awb) {
2503 		u16 red = (u16)sensor->ctrls.red_balance->val;
2504 		u16 blue = (u16)sensor->ctrls.blue_balance->val;
2505 
2506 		ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_R_GAIN, red);
2507 		if (ret)
2508 			return ret;
2509 		ret = ov5640_write_reg16(sensor, OV5640_REG_AWB_B_GAIN, blue);
2510 	}
2511 
2512 	return ret;
2513 }
2514 
2515 static int ov5640_set_ctrl_exposure(struct ov5640_dev *sensor,
2516 				    enum v4l2_exposure_auto_type auto_exposure)
2517 {
2518 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2519 	bool auto_exp = (auto_exposure == V4L2_EXPOSURE_AUTO);
2520 	int ret = 0;
2521 
2522 	if (ctrls->auto_exp->is_new) {
2523 		ret = ov5640_set_autoexposure(sensor, auto_exp);
2524 		if (ret)
2525 			return ret;
2526 	}
2527 
2528 	if (!auto_exp && ctrls->exposure->is_new) {
2529 		u16 max_exp;
2530 
2531 		ret = ov5640_read_reg16(sensor, OV5640_REG_AEC_PK_VTS,
2532 					&max_exp);
2533 		if (ret)
2534 			return ret;
2535 		ret = ov5640_get_vts(sensor);
2536 		if (ret < 0)
2537 			return ret;
2538 		max_exp += ret;
2539 		ret = 0;
2540 
2541 		if (ctrls->exposure->val < max_exp)
2542 			ret = ov5640_set_exposure(sensor, ctrls->exposure->val);
2543 	}
2544 
2545 	return ret;
2546 }
2547 
2548 static int ov5640_set_ctrl_gain(struct ov5640_dev *sensor, bool auto_gain)
2549 {
2550 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2551 	int ret = 0;
2552 
2553 	if (ctrls->auto_gain->is_new) {
2554 		ret = ov5640_set_autogain(sensor, auto_gain);
2555 		if (ret)
2556 			return ret;
2557 	}
2558 
2559 	if (!auto_gain && ctrls->gain->is_new)
2560 		ret = ov5640_set_gain(sensor, ctrls->gain->val);
2561 
2562 	return ret;
2563 }
2564 
2565 static const char * const test_pattern_menu[] = {
2566 	"Disabled",
2567 	"Color bars",
2568 	"Color bars w/ rolling bar",
2569 	"Color squares",
2570 	"Color squares w/ rolling bar",
2571 };
2572 
2573 #define OV5640_TEST_ENABLE		BIT(7)
2574 #define OV5640_TEST_ROLLING		BIT(6)	/* rolling horizontal bar */
2575 #define OV5640_TEST_TRANSPARENT		BIT(5)
2576 #define OV5640_TEST_SQUARE_BW		BIT(4)	/* black & white squares */
2577 #define OV5640_TEST_BAR_STANDARD	(0 << 2)
2578 #define OV5640_TEST_BAR_VERT_CHANGE_1	(1 << 2)
2579 #define OV5640_TEST_BAR_HOR_CHANGE	(2 << 2)
2580 #define OV5640_TEST_BAR_VERT_CHANGE_2	(3 << 2)
2581 #define OV5640_TEST_BAR			(0 << 0)
2582 #define OV5640_TEST_RANDOM		(1 << 0)
2583 #define OV5640_TEST_SQUARE		(2 << 0)
2584 #define OV5640_TEST_BLACK		(3 << 0)
2585 
2586 static const u8 test_pattern_val[] = {
2587 	0,
2588 	OV5640_TEST_ENABLE | OV5640_TEST_BAR_VERT_CHANGE_1 |
2589 		OV5640_TEST_BAR,
2590 	OV5640_TEST_ENABLE | OV5640_TEST_ROLLING |
2591 		OV5640_TEST_BAR_VERT_CHANGE_1 | OV5640_TEST_BAR,
2592 	OV5640_TEST_ENABLE | OV5640_TEST_SQUARE,
2593 	OV5640_TEST_ENABLE | OV5640_TEST_ROLLING | OV5640_TEST_SQUARE,
2594 };
2595 
2596 static int ov5640_set_ctrl_test_pattern(struct ov5640_dev *sensor, int value)
2597 {
2598 	return ov5640_write_reg(sensor, OV5640_REG_PRE_ISP_TEST_SET1,
2599 				test_pattern_val[value]);
2600 }
2601 
2602 static int ov5640_set_ctrl_light_freq(struct ov5640_dev *sensor, int value)
2603 {
2604 	int ret;
2605 
2606 	ret = ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL01, BIT(7),
2607 			     (value == V4L2_CID_POWER_LINE_FREQUENCY_AUTO) ?
2608 			     0 : BIT(7));
2609 	if (ret)
2610 		return ret;
2611 
2612 	return ov5640_mod_reg(sensor, OV5640_REG_HZ5060_CTRL00, BIT(2),
2613 			      (value == V4L2_CID_POWER_LINE_FREQUENCY_50HZ) ?
2614 			      BIT(2) : 0);
2615 }
2616 
2617 static int ov5640_set_ctrl_hflip(struct ov5640_dev *sensor, int value)
2618 {
2619 	/*
2620 	 * If sensor is mounted upside down, mirror logic is inversed.
2621 	 *
2622 	 * Sensor is a BSI (Back Side Illuminated) one,
2623 	 * so image captured is physically mirrored.
2624 	 * This is why mirror logic is inversed in
2625 	 * order to cancel this mirror effect.
2626 	 */
2627 
2628 	/*
2629 	 * TIMING TC REG21:
2630 	 * - [2]:	ISP mirror
2631 	 * - [1]:	Sensor mirror
2632 	 */
2633 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG21,
2634 			      BIT(2) | BIT(1),
2635 			      (!(value ^ sensor->upside_down)) ?
2636 			      (BIT(2) | BIT(1)) : 0);
2637 }
2638 
2639 static int ov5640_set_ctrl_vflip(struct ov5640_dev *sensor, int value)
2640 {
2641 	/* If sensor is mounted upside down, flip logic is inversed */
2642 
2643 	/*
2644 	 * TIMING TC REG20:
2645 	 * - [2]:	ISP vflip
2646 	 * - [1]:	Sensor vflip
2647 	 */
2648 	return ov5640_mod_reg(sensor, OV5640_REG_TIMING_TC_REG20,
2649 			      BIT(2) | BIT(1),
2650 			      (value ^ sensor->upside_down) ?
2651 			      (BIT(2) | BIT(1)) : 0);
2652 }
2653 
2654 static int ov5640_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
2655 {
2656 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2657 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2658 	int val;
2659 
2660 	/* v4l2_ctrl_lock() locks our own mutex */
2661 
2662 	switch (ctrl->id) {
2663 	case V4L2_CID_AUTOGAIN:
2664 		val = ov5640_get_gain(sensor);
2665 		if (val < 0)
2666 			return val;
2667 		sensor->ctrls.gain->val = val;
2668 		break;
2669 	case V4L2_CID_EXPOSURE_AUTO:
2670 		val = ov5640_get_exposure(sensor);
2671 		if (val < 0)
2672 			return val;
2673 		sensor->ctrls.exposure->val = val;
2674 		break;
2675 	}
2676 
2677 	return 0;
2678 }
2679 
2680 static int ov5640_s_ctrl(struct v4l2_ctrl *ctrl)
2681 {
2682 	struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
2683 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2684 	int ret;
2685 
2686 	/* v4l2_ctrl_lock() locks our own mutex */
2687 
2688 	/*
2689 	 * If the device is not powered up by the host driver do
2690 	 * not apply any controls to H/W at this time. Instead
2691 	 * the controls will be restored right after power-up.
2692 	 */
2693 	if (sensor->power_count == 0)
2694 		return 0;
2695 
2696 	switch (ctrl->id) {
2697 	case V4L2_CID_AUTOGAIN:
2698 		ret = ov5640_set_ctrl_gain(sensor, ctrl->val);
2699 		break;
2700 	case V4L2_CID_EXPOSURE_AUTO:
2701 		ret = ov5640_set_ctrl_exposure(sensor, ctrl->val);
2702 		break;
2703 	case V4L2_CID_AUTO_WHITE_BALANCE:
2704 		ret = ov5640_set_ctrl_white_balance(sensor, ctrl->val);
2705 		break;
2706 	case V4L2_CID_HUE:
2707 		ret = ov5640_set_ctrl_hue(sensor, ctrl->val);
2708 		break;
2709 	case V4L2_CID_CONTRAST:
2710 		ret = ov5640_set_ctrl_contrast(sensor, ctrl->val);
2711 		break;
2712 	case V4L2_CID_SATURATION:
2713 		ret = ov5640_set_ctrl_saturation(sensor, ctrl->val);
2714 		break;
2715 	case V4L2_CID_TEST_PATTERN:
2716 		ret = ov5640_set_ctrl_test_pattern(sensor, ctrl->val);
2717 		break;
2718 	case V4L2_CID_POWER_LINE_FREQUENCY:
2719 		ret = ov5640_set_ctrl_light_freq(sensor, ctrl->val);
2720 		break;
2721 	case V4L2_CID_HFLIP:
2722 		ret = ov5640_set_ctrl_hflip(sensor, ctrl->val);
2723 		break;
2724 	case V4L2_CID_VFLIP:
2725 		ret = ov5640_set_ctrl_vflip(sensor, ctrl->val);
2726 		break;
2727 	default:
2728 		ret = -EINVAL;
2729 		break;
2730 	}
2731 
2732 	return ret;
2733 }
2734 
2735 static const struct v4l2_ctrl_ops ov5640_ctrl_ops = {
2736 	.g_volatile_ctrl = ov5640_g_volatile_ctrl,
2737 	.s_ctrl = ov5640_s_ctrl,
2738 };
2739 
2740 static int ov5640_init_controls(struct ov5640_dev *sensor)
2741 {
2742 	const struct v4l2_ctrl_ops *ops = &ov5640_ctrl_ops;
2743 	struct ov5640_ctrls *ctrls = &sensor->ctrls;
2744 	struct v4l2_ctrl_handler *hdl = &ctrls->handler;
2745 	int ret;
2746 
2747 	v4l2_ctrl_handler_init(hdl, 32);
2748 
2749 	/* we can use our own mutex for the ctrl lock */
2750 	hdl->lock = &sensor->lock;
2751 
2752 	/* Clock related controls */
2753 	ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_PIXEL_RATE,
2754 					      0, INT_MAX, 1,
2755 					      ov5640_calc_pixel_rate(sensor));
2756 
2757 	/* Auto/manual white balance */
2758 	ctrls->auto_wb = v4l2_ctrl_new_std(hdl, ops,
2759 					   V4L2_CID_AUTO_WHITE_BALANCE,
2760 					   0, 1, 1, 1);
2761 	ctrls->blue_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_BLUE_BALANCE,
2762 						0, 4095, 1, 0);
2763 	ctrls->red_balance = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_RED_BALANCE,
2764 					       0, 4095, 1, 0);
2765 	/* Auto/manual exposure */
2766 	ctrls->auto_exp = v4l2_ctrl_new_std_menu(hdl, ops,
2767 						 V4L2_CID_EXPOSURE_AUTO,
2768 						 V4L2_EXPOSURE_MANUAL, 0,
2769 						 V4L2_EXPOSURE_AUTO);
2770 	ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE,
2771 					    0, 65535, 1, 0);
2772 	/* Auto/manual gain */
2773 	ctrls->auto_gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_AUTOGAIN,
2774 					     0, 1, 1, 1);
2775 	ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_GAIN,
2776 					0, 1023, 1, 0);
2777 
2778 	ctrls->saturation = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_SATURATION,
2779 					      0, 255, 1, 64);
2780 	ctrls->hue = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HUE,
2781 				       0, 359, 1, 0);
2782 	ctrls->contrast = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_CONTRAST,
2783 					    0, 255, 1, 0);
2784 	ctrls->test_pattern =
2785 		v4l2_ctrl_new_std_menu_items(hdl, ops, V4L2_CID_TEST_PATTERN,
2786 					     ARRAY_SIZE(test_pattern_menu) - 1,
2787 					     0, 0, test_pattern_menu);
2788 	ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP,
2789 					 0, 1, 1, 0);
2790 	ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP,
2791 					 0, 1, 1, 0);
2792 
2793 	ctrls->light_freq =
2794 		v4l2_ctrl_new_std_menu(hdl, ops,
2795 				       V4L2_CID_POWER_LINE_FREQUENCY,
2796 				       V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
2797 				       V4L2_CID_POWER_LINE_FREQUENCY_50HZ);
2798 
2799 	if (hdl->error) {
2800 		ret = hdl->error;
2801 		goto free_ctrls;
2802 	}
2803 
2804 	ctrls->pixel_rate->flags |= V4L2_CTRL_FLAG_READ_ONLY;
2805 	ctrls->gain->flags |= V4L2_CTRL_FLAG_VOLATILE;
2806 	ctrls->exposure->flags |= V4L2_CTRL_FLAG_VOLATILE;
2807 
2808 	v4l2_ctrl_auto_cluster(3, &ctrls->auto_wb, 0, false);
2809 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_gain, 0, true);
2810 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_exp, 1, true);
2811 
2812 	sensor->sd.ctrl_handler = hdl;
2813 	return 0;
2814 
2815 free_ctrls:
2816 	v4l2_ctrl_handler_free(hdl);
2817 	return ret;
2818 }
2819 
2820 static int ov5640_enum_frame_size(struct v4l2_subdev *sd,
2821 				  struct v4l2_subdev_state *sd_state,
2822 				  struct v4l2_subdev_frame_size_enum *fse)
2823 {
2824 	if (fse->pad != 0)
2825 		return -EINVAL;
2826 	if (fse->index >= OV5640_NUM_MODES)
2827 		return -EINVAL;
2828 
2829 	fse->min_width =
2830 		ov5640_mode_data[fse->index].hact;
2831 	fse->max_width = fse->min_width;
2832 	fse->min_height =
2833 		ov5640_mode_data[fse->index].vact;
2834 	fse->max_height = fse->min_height;
2835 
2836 	return 0;
2837 }
2838 
2839 static int ov5640_enum_frame_interval(
2840 	struct v4l2_subdev *sd,
2841 	struct v4l2_subdev_state *sd_state,
2842 	struct v4l2_subdev_frame_interval_enum *fie)
2843 {
2844 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2845 	struct v4l2_fract tpf;
2846 	int ret;
2847 
2848 	if (fie->pad != 0)
2849 		return -EINVAL;
2850 	if (fie->index >= OV5640_NUM_FRAMERATES)
2851 		return -EINVAL;
2852 
2853 	tpf.numerator = 1;
2854 	tpf.denominator = ov5640_framerates[fie->index];
2855 
2856 	ret = ov5640_try_frame_interval(sensor, &tpf,
2857 					fie->width, fie->height);
2858 	if (ret < 0)
2859 		return -EINVAL;
2860 
2861 	fie->interval = tpf;
2862 	return 0;
2863 }
2864 
2865 static int ov5640_g_frame_interval(struct v4l2_subdev *sd,
2866 				   struct v4l2_subdev_frame_interval *fi)
2867 {
2868 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2869 
2870 	mutex_lock(&sensor->lock);
2871 	fi->interval = sensor->frame_interval;
2872 	mutex_unlock(&sensor->lock);
2873 
2874 	return 0;
2875 }
2876 
2877 static int ov5640_s_frame_interval(struct v4l2_subdev *sd,
2878 				   struct v4l2_subdev_frame_interval *fi)
2879 {
2880 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2881 	const struct ov5640_mode_info *mode;
2882 	int frame_rate, ret = 0;
2883 
2884 	if (fi->pad != 0)
2885 		return -EINVAL;
2886 
2887 	mutex_lock(&sensor->lock);
2888 
2889 	if (sensor->streaming) {
2890 		ret = -EBUSY;
2891 		goto out;
2892 	}
2893 
2894 	mode = sensor->current_mode;
2895 
2896 	frame_rate = ov5640_try_frame_interval(sensor, &fi->interval,
2897 					       mode->hact, mode->vact);
2898 	if (frame_rate < 0) {
2899 		/* Always return a valid frame interval value */
2900 		fi->interval = sensor->frame_interval;
2901 		goto out;
2902 	}
2903 
2904 	mode = ov5640_find_mode(sensor, frame_rate, mode->hact,
2905 				mode->vact, true);
2906 	if (!mode) {
2907 		ret = -EINVAL;
2908 		goto out;
2909 	}
2910 
2911 	if (mode != sensor->current_mode ||
2912 	    frame_rate != sensor->current_fr) {
2913 		sensor->current_fr = frame_rate;
2914 		sensor->frame_interval = fi->interval;
2915 		sensor->current_mode = mode;
2916 		sensor->pending_mode_change = true;
2917 
2918 		__v4l2_ctrl_s_ctrl_int64(sensor->ctrls.pixel_rate,
2919 					 ov5640_calc_pixel_rate(sensor));
2920 	}
2921 out:
2922 	mutex_unlock(&sensor->lock);
2923 	return ret;
2924 }
2925 
2926 static int ov5640_enum_mbus_code(struct v4l2_subdev *sd,
2927 				 struct v4l2_subdev_state *sd_state,
2928 				 struct v4l2_subdev_mbus_code_enum *code)
2929 {
2930 	if (code->pad != 0)
2931 		return -EINVAL;
2932 	if (code->index >= ARRAY_SIZE(ov5640_formats))
2933 		return -EINVAL;
2934 
2935 	code->code = ov5640_formats[code->index].code;
2936 	return 0;
2937 }
2938 
2939 static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
2940 {
2941 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
2942 	int ret = 0;
2943 
2944 	mutex_lock(&sensor->lock);
2945 
2946 	if (sensor->streaming == !enable) {
2947 		if (enable && sensor->pending_mode_change) {
2948 			ret = ov5640_set_mode(sensor);
2949 			if (ret)
2950 				goto out;
2951 		}
2952 
2953 		if (enable && sensor->pending_fmt_change) {
2954 			ret = ov5640_set_framefmt(sensor, &sensor->fmt);
2955 			if (ret)
2956 				goto out;
2957 			sensor->pending_fmt_change = false;
2958 		}
2959 
2960 		if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
2961 			ret = ov5640_set_stream_mipi(sensor, enable);
2962 		else
2963 			ret = ov5640_set_stream_dvp(sensor, enable);
2964 
2965 		if (!ret)
2966 			sensor->streaming = enable;
2967 	}
2968 out:
2969 	mutex_unlock(&sensor->lock);
2970 	return ret;
2971 }
2972 
2973 static const struct v4l2_subdev_core_ops ov5640_core_ops = {
2974 	.s_power = ov5640_s_power,
2975 	.log_status = v4l2_ctrl_subdev_log_status,
2976 	.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
2977 	.unsubscribe_event = v4l2_event_subdev_unsubscribe,
2978 };
2979 
2980 static const struct v4l2_subdev_video_ops ov5640_video_ops = {
2981 	.g_frame_interval = ov5640_g_frame_interval,
2982 	.s_frame_interval = ov5640_s_frame_interval,
2983 	.s_stream = ov5640_s_stream,
2984 };
2985 
2986 static const struct v4l2_subdev_pad_ops ov5640_pad_ops = {
2987 	.enum_mbus_code = ov5640_enum_mbus_code,
2988 	.get_fmt = ov5640_get_fmt,
2989 	.set_fmt = ov5640_set_fmt,
2990 	.enum_frame_size = ov5640_enum_frame_size,
2991 	.enum_frame_interval = ov5640_enum_frame_interval,
2992 };
2993 
2994 static const struct v4l2_subdev_ops ov5640_subdev_ops = {
2995 	.core = &ov5640_core_ops,
2996 	.video = &ov5640_video_ops,
2997 	.pad = &ov5640_pad_ops,
2998 };
2999 
3000 static int ov5640_get_regulators(struct ov5640_dev *sensor)
3001 {
3002 	int i;
3003 
3004 	for (i = 0; i < OV5640_NUM_SUPPLIES; i++)
3005 		sensor->supplies[i].supply = ov5640_supply_name[i];
3006 
3007 	return devm_regulator_bulk_get(&sensor->i2c_client->dev,
3008 				       OV5640_NUM_SUPPLIES,
3009 				       sensor->supplies);
3010 }
3011 
3012 static int ov5640_check_chip_id(struct ov5640_dev *sensor)
3013 {
3014 	struct i2c_client *client = sensor->i2c_client;
3015 	int ret = 0;
3016 	u16 chip_id;
3017 
3018 	ret = ov5640_set_power_on(sensor);
3019 	if (ret)
3020 		return ret;
3021 
3022 	ret = ov5640_read_reg16(sensor, OV5640_REG_CHIP_ID, &chip_id);
3023 	if (ret) {
3024 		dev_err(&client->dev, "%s: failed to read chip identifier\n",
3025 			__func__);
3026 		goto power_off;
3027 	}
3028 
3029 	if (chip_id != 0x5640) {
3030 		dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
3031 			__func__, chip_id);
3032 		ret = -ENXIO;
3033 	}
3034 
3035 power_off:
3036 	ov5640_set_power_off(sensor);
3037 	return ret;
3038 }
3039 
3040 static int ov5640_probe(struct i2c_client *client)
3041 {
3042 	struct device *dev = &client->dev;
3043 	struct fwnode_handle *endpoint;
3044 	struct ov5640_dev *sensor;
3045 	struct v4l2_mbus_framefmt *fmt;
3046 	u32 rotation;
3047 	int ret;
3048 
3049 	sensor = devm_kzalloc(dev, sizeof(*sensor), GFP_KERNEL);
3050 	if (!sensor)
3051 		return -ENOMEM;
3052 
3053 	sensor->i2c_client = client;
3054 
3055 	/*
3056 	 * default init sequence initialize sensor to
3057 	 * YUV422 UYVY VGA@30fps
3058 	 */
3059 	fmt = &sensor->fmt;
3060 	fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
3061 	fmt->colorspace = V4L2_COLORSPACE_SRGB;
3062 	fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
3063 	fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
3064 	fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
3065 	fmt->width = 640;
3066 	fmt->height = 480;
3067 	fmt->field = V4L2_FIELD_NONE;
3068 	sensor->frame_interval.numerator = 1;
3069 	sensor->frame_interval.denominator = ov5640_framerates[OV5640_30_FPS];
3070 	sensor->current_fr = OV5640_30_FPS;
3071 	sensor->current_mode =
3072 		&ov5640_mode_data[OV5640_MODE_VGA_640_480];
3073 	sensor->last_mode = sensor->current_mode;
3074 
3075 	sensor->ae_target = 52;
3076 
3077 	/* optional indication of physical rotation of sensor */
3078 	ret = fwnode_property_read_u32(dev_fwnode(&client->dev), "rotation",
3079 				       &rotation);
3080 	if (!ret) {
3081 		switch (rotation) {
3082 		case 180:
3083 			sensor->upside_down = true;
3084 			fallthrough;
3085 		case 0:
3086 			break;
3087 		default:
3088 			dev_warn(dev, "%u degrees rotation is not supported, ignoring...\n",
3089 				 rotation);
3090 		}
3091 	}
3092 
3093 	endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev),
3094 						  NULL);
3095 	if (!endpoint) {
3096 		dev_err(dev, "endpoint node not found\n");
3097 		return -EINVAL;
3098 	}
3099 
3100 	ret = v4l2_fwnode_endpoint_parse(endpoint, &sensor->ep);
3101 	fwnode_handle_put(endpoint);
3102 	if (ret) {
3103 		dev_err(dev, "Could not parse endpoint\n");
3104 		return ret;
3105 	}
3106 
3107 	if (sensor->ep.bus_type != V4L2_MBUS_PARALLEL &&
3108 	    sensor->ep.bus_type != V4L2_MBUS_CSI2_DPHY &&
3109 	    sensor->ep.bus_type != V4L2_MBUS_BT656) {
3110 		dev_err(dev, "Unsupported bus type %d\n", sensor->ep.bus_type);
3111 		return -EINVAL;
3112 	}
3113 
3114 	/* get system clock (xclk) */
3115 	sensor->xclk = devm_clk_get(dev, "xclk");
3116 	if (IS_ERR(sensor->xclk)) {
3117 		dev_err(dev, "failed to get xclk\n");
3118 		return PTR_ERR(sensor->xclk);
3119 	}
3120 
3121 	sensor->xclk_freq = clk_get_rate(sensor->xclk);
3122 	if (sensor->xclk_freq < OV5640_XCLK_MIN ||
3123 	    sensor->xclk_freq > OV5640_XCLK_MAX) {
3124 		dev_err(dev, "xclk frequency out of range: %d Hz\n",
3125 			sensor->xclk_freq);
3126 		return -EINVAL;
3127 	}
3128 
3129 	/* request optional power down pin */
3130 	sensor->pwdn_gpio = devm_gpiod_get_optional(dev, "powerdown",
3131 						    GPIOD_OUT_HIGH);
3132 	if (IS_ERR(sensor->pwdn_gpio))
3133 		return PTR_ERR(sensor->pwdn_gpio);
3134 
3135 	/* request optional reset pin */
3136 	sensor->reset_gpio = devm_gpiod_get_optional(dev, "reset",
3137 						     GPIOD_OUT_HIGH);
3138 	if (IS_ERR(sensor->reset_gpio))
3139 		return PTR_ERR(sensor->reset_gpio);
3140 
3141 	v4l2_i2c_subdev_init(&sensor->sd, client, &ov5640_subdev_ops);
3142 
3143 	sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
3144 			    V4L2_SUBDEV_FL_HAS_EVENTS;
3145 	sensor->pad.flags = MEDIA_PAD_FL_SOURCE;
3146 	sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
3147 	ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad);
3148 	if (ret)
3149 		return ret;
3150 
3151 	ret = ov5640_get_regulators(sensor);
3152 	if (ret)
3153 		return ret;
3154 
3155 	mutex_init(&sensor->lock);
3156 
3157 	ret = ov5640_check_chip_id(sensor);
3158 	if (ret)
3159 		goto entity_cleanup;
3160 
3161 	ret = ov5640_init_controls(sensor);
3162 	if (ret)
3163 		goto entity_cleanup;
3164 
3165 	ret = v4l2_async_register_subdev_sensor(&sensor->sd);
3166 	if (ret)
3167 		goto free_ctrls;
3168 
3169 	return 0;
3170 
3171 free_ctrls:
3172 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3173 entity_cleanup:
3174 	media_entity_cleanup(&sensor->sd.entity);
3175 	mutex_destroy(&sensor->lock);
3176 	return ret;
3177 }
3178 
3179 static int ov5640_remove(struct i2c_client *client)
3180 {
3181 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
3182 	struct ov5640_dev *sensor = to_ov5640_dev(sd);
3183 
3184 	v4l2_async_unregister_subdev(&sensor->sd);
3185 	media_entity_cleanup(&sensor->sd.entity);
3186 	v4l2_ctrl_handler_free(&sensor->ctrls.handler);
3187 	mutex_destroy(&sensor->lock);
3188 
3189 	return 0;
3190 }
3191 
3192 static const struct i2c_device_id ov5640_id[] = {
3193 	{"ov5640", 0},
3194 	{},
3195 };
3196 MODULE_DEVICE_TABLE(i2c, ov5640_id);
3197 
3198 static const struct of_device_id ov5640_dt_ids[] = {
3199 	{ .compatible = "ovti,ov5640" },
3200 	{ /* sentinel */ }
3201 };
3202 MODULE_DEVICE_TABLE(of, ov5640_dt_ids);
3203 
3204 static struct i2c_driver ov5640_i2c_driver = {
3205 	.driver = {
3206 		.name  = "ov5640",
3207 		.of_match_table	= ov5640_dt_ids,
3208 	},
3209 	.id_table = ov5640_id,
3210 	.probe_new = ov5640_probe,
3211 	.remove   = ov5640_remove,
3212 };
3213 
3214 module_i2c_driver(ov5640_i2c_driver);
3215 
3216 MODULE_DESCRIPTION("OV5640 MIPI Camera Subdev Driver");
3217 MODULE_LICENSE("GPL");
3218