1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * ov2685 driver 4 * 5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd. 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/device.h> 10 #include <linux/delay.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/i2c.h> 13 #include <linux/module.h> 14 #include <linux/pm_runtime.h> 15 #include <linux/regulator/consumer.h> 16 #include <linux/sysfs.h> 17 #include <media/media-entity.h> 18 #include <media/v4l2-async.h> 19 #include <media/v4l2-ctrls.h> 20 #include <media/v4l2-fwnode.h> 21 #include <media/v4l2-subdev.h> 22 23 #define CHIP_ID 0x2685 24 #define OV2685_REG_CHIP_ID 0x300a 25 26 #define OV2685_XVCLK_FREQ 24000000 27 28 #define REG_SC_CTRL_MODE 0x0100 29 #define SC_CTRL_MODE_STANDBY 0x0 30 #define SC_CTRL_MODE_STREAMING BIT(0) 31 32 #define OV2685_REG_EXPOSURE 0x3500 33 #define OV2685_EXPOSURE_MIN 4 34 #define OV2685_EXPOSURE_STEP 1 35 36 #define OV2685_REG_VTS 0x380e 37 #define OV2685_VTS_MAX 0x7fff 38 39 #define OV2685_REG_GAIN 0x350a 40 #define OV2685_GAIN_MIN 0 41 #define OV2685_GAIN_MAX 0x07ff 42 #define OV2685_GAIN_STEP 0x1 43 #define OV2685_GAIN_DEFAULT 0x0036 44 45 #define OV2685_REG_TEST_PATTERN 0x5080 46 #define OV2685_TEST_PATTERN_DISABLED 0x00 47 #define OV2685_TEST_PATTERN_COLOR_BAR 0x80 48 #define OV2685_TEST_PATTERN_RANDOM 0x81 49 #define OV2685_TEST_PATTERN_COLOR_BAR_FADE 0x88 50 #define OV2685_TEST_PATTERN_BW_SQUARE 0x92 51 #define OV2685_TEST_PATTERN_COLOR_SQUARE 0x82 52 53 #define REG_NULL 0xFFFF 54 55 #define OV2685_REG_VALUE_08BIT 1 56 #define OV2685_REG_VALUE_16BIT 2 57 #define OV2685_REG_VALUE_24BIT 3 58 59 #define OV2685_NATIVE_WIDTH 1616 60 #define OV2685_NATIVE_HEIGHT 1216 61 62 #define OV2685_LANES 1 63 #define OV2685_BITS_PER_SAMPLE 10 64 65 static const char * const ov2685_supply_names[] = { 66 "avdd", /* Analog power */ 67 "dovdd", /* Digital I/O power */ 68 "dvdd", /* Digital core power */ 69 }; 70 71 #define OV2685_NUM_SUPPLIES ARRAY_SIZE(ov2685_supply_names) 72 73 struct regval { 74 u16 addr; 75 u8 val; 76 }; 77 78 struct ov2685_mode { 79 u32 width; 80 u32 height; 81 u32 exp_def; 82 u32 hts_def; 83 u32 vts_def; 84 const struct v4l2_rect *analog_crop; 85 const struct regval *reg_list; 86 }; 87 88 struct ov2685 { 89 struct i2c_client *client; 90 struct clk *xvclk; 91 struct gpio_desc *reset_gpio; 92 struct regulator_bulk_data supplies[OV2685_NUM_SUPPLIES]; 93 94 struct mutex mutex; 95 struct v4l2_subdev subdev; 96 struct media_pad pad; 97 struct v4l2_ctrl *anal_gain; 98 struct v4l2_ctrl *exposure; 99 struct v4l2_ctrl *hblank; 100 struct v4l2_ctrl *vblank; 101 struct v4l2_ctrl *test_pattern; 102 struct v4l2_ctrl_handler ctrl_handler; 103 104 const struct ov2685_mode *cur_mode; 105 }; 106 107 #define to_ov2685(sd) container_of(sd, struct ov2685, subdev) 108 109 /* PLL settings bases on 24M xvclk */ 110 static struct regval ov2685_1600x1200_regs[] = { 111 {0x0103, 0x01}, 112 {0x0100, 0x00}, 113 {0x3002, 0x00}, 114 {0x3016, 0x1c}, 115 {0x3018, 0x44}, 116 {0x301d, 0xf0}, 117 {0x3020, 0x00}, 118 {0x3082, 0x37}, 119 {0x3083, 0x03}, 120 {0x3084, 0x09}, 121 {0x3085, 0x04}, 122 {0x3086, 0x00}, 123 {0x3087, 0x00}, 124 {0x3501, 0x4e}, 125 {0x3502, 0xe0}, 126 {0x3503, 0x27}, 127 {0x350b, 0x36}, 128 {0x3600, 0xb4}, 129 {0x3603, 0x35}, 130 {0x3604, 0x24}, 131 {0x3605, 0x00}, 132 {0x3620, 0x24}, 133 {0x3621, 0x34}, 134 {0x3622, 0x03}, 135 {0x3628, 0x10}, 136 {0x3705, 0x3c}, 137 {0x370a, 0x21}, 138 {0x370c, 0x50}, 139 {0x370d, 0xc0}, 140 {0x3717, 0x58}, 141 {0x3718, 0x80}, 142 {0x3720, 0x00}, 143 {0x3721, 0x09}, 144 {0x3722, 0x06}, 145 {0x3723, 0x59}, 146 {0x3738, 0x99}, 147 {0x3781, 0x80}, 148 {0x3784, 0x0c}, 149 {0x3789, 0x60}, 150 {0x3800, 0x00}, 151 {0x3801, 0x00}, 152 {0x3802, 0x00}, 153 {0x3803, 0x00}, 154 {0x3804, 0x06}, 155 {0x3805, 0x4f}, 156 {0x3806, 0x04}, 157 {0x3807, 0xbf}, 158 {0x3808, 0x06}, 159 {0x3809, 0x40}, 160 {0x380a, 0x04}, 161 {0x380b, 0xb0}, 162 {0x380c, 0x06}, 163 {0x380d, 0xa4}, 164 {0x380e, 0x05}, 165 {0x380f, 0x0e}, 166 {0x3810, 0x00}, 167 {0x3811, 0x08}, 168 {0x3812, 0x00}, 169 {0x3813, 0x08}, 170 {0x3814, 0x11}, 171 {0x3815, 0x11}, 172 {0x3819, 0x04}, 173 {0x3820, 0xc0}, 174 {0x3821, 0x00}, 175 {0x3a06, 0x01}, 176 {0x3a07, 0x84}, 177 {0x3a08, 0x01}, 178 {0x3a09, 0x43}, 179 {0x3a0a, 0x24}, 180 {0x3a0b, 0x60}, 181 {0x3a0c, 0x28}, 182 {0x3a0d, 0x60}, 183 {0x3a0e, 0x04}, 184 {0x3a0f, 0x8c}, 185 {0x3a10, 0x05}, 186 {0x3a11, 0x0c}, 187 {0x4000, 0x81}, 188 {0x4001, 0x40}, 189 {0x4008, 0x02}, 190 {0x4009, 0x09}, 191 {0x4300, 0x00}, 192 {0x430e, 0x00}, 193 {0x4602, 0x02}, 194 {0x481b, 0x40}, 195 {0x481f, 0x40}, 196 {0x4837, 0x18}, 197 {0x5000, 0x1f}, 198 {0x5001, 0x05}, 199 {0x5002, 0x30}, 200 {0x5003, 0x04}, 201 {0x5004, 0x00}, 202 {0x5005, 0x0c}, 203 {0x5280, 0x15}, 204 {0x5281, 0x06}, 205 {0x5282, 0x06}, 206 {0x5283, 0x08}, 207 {0x5284, 0x1c}, 208 {0x5285, 0x1c}, 209 {0x5286, 0x20}, 210 {0x5287, 0x10}, 211 {REG_NULL, 0x00} 212 }; 213 214 #define OV2685_LINK_FREQ_330MHZ 330000000 215 static const s64 link_freq_menu_items[] = { 216 OV2685_LINK_FREQ_330MHZ 217 }; 218 219 static const char * const ov2685_test_pattern_menu[] = { 220 "Disabled", 221 "Color Bar", 222 "Color Bar FADE", 223 "Random Data", 224 "Black White Square", 225 "Color Square" 226 }; 227 228 static const int ov2685_test_pattern_val[] = { 229 OV2685_TEST_PATTERN_DISABLED, 230 OV2685_TEST_PATTERN_COLOR_BAR, 231 OV2685_TEST_PATTERN_COLOR_BAR_FADE, 232 OV2685_TEST_PATTERN_RANDOM, 233 OV2685_TEST_PATTERN_BW_SQUARE, 234 OV2685_TEST_PATTERN_COLOR_SQUARE, 235 }; 236 237 static const struct v4l2_rect ov2685_analog_crop = { 238 .left = 8, 239 .top = 8, 240 .width = 1600, 241 .height = 1200, 242 }; 243 244 static const struct ov2685_mode supported_modes[] = { 245 { 246 .width = 1600, 247 .height = 1200, 248 .exp_def = 0x04ee, 249 .hts_def = 0x06a4, 250 .vts_def = 0x050e, 251 .analog_crop = &ov2685_analog_crop, 252 .reg_list = ov2685_1600x1200_regs, 253 }, 254 }; 255 256 /* Write registers up to 4 at a time */ 257 static int ov2685_write_reg(struct i2c_client *client, u16 reg, 258 u32 len, u32 val) 259 { 260 u32 val_i, buf_i; 261 u8 buf[6]; 262 u8 *val_p; 263 __be32 val_be; 264 265 if (len > 4) 266 return -EINVAL; 267 268 buf[0] = reg >> 8; 269 buf[1] = reg & 0xff; 270 271 val_be = cpu_to_be32(val); 272 val_p = (u8 *)&val_be; 273 buf_i = 2; 274 val_i = 4 - len; 275 276 while (val_i < 4) 277 buf[buf_i++] = val_p[val_i++]; 278 279 if (i2c_master_send(client, buf, len + 2) != len + 2) 280 return -EIO; 281 282 return 0; 283 } 284 285 static int ov2685_write_array(struct i2c_client *client, 286 const struct regval *regs) 287 { 288 int ret = 0; 289 u32 i; 290 291 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) 292 ret = ov2685_write_reg(client, regs[i].addr, 293 OV2685_REG_VALUE_08BIT, regs[i].val); 294 295 return ret; 296 } 297 298 /* Read registers up to 4 at a time */ 299 static int ov2685_read_reg(struct i2c_client *client, u16 reg, 300 u32 len, u32 *val) 301 { 302 struct i2c_msg msgs[2]; 303 u8 *data_be_p; 304 __be32 data_be = 0; 305 __be16 reg_addr_be = cpu_to_be16(reg); 306 int ret; 307 308 if (len > 4) 309 return -EINVAL; 310 311 data_be_p = (u8 *)&data_be; 312 /* Write register address */ 313 msgs[0].addr = client->addr; 314 msgs[0].flags = 0; 315 msgs[0].len = 2; 316 msgs[0].buf = (u8 *)®_addr_be; 317 318 /* Read data from register */ 319 msgs[1].addr = client->addr; 320 msgs[1].flags = I2C_M_RD; 321 msgs[1].len = len; 322 msgs[1].buf = &data_be_p[4 - len]; 323 324 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 325 if (ret != ARRAY_SIZE(msgs)) 326 return -EIO; 327 328 *val = be32_to_cpu(data_be); 329 330 return 0; 331 } 332 333 static void ov2685_fill_fmt(const struct ov2685_mode *mode, 334 struct v4l2_mbus_framefmt *fmt) 335 { 336 fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10; 337 fmt->width = mode->width; 338 fmt->height = mode->height; 339 fmt->field = V4L2_FIELD_NONE; 340 } 341 342 static int ov2685_set_fmt(struct v4l2_subdev *sd, 343 struct v4l2_subdev_state *sd_state, 344 struct v4l2_subdev_format *fmt) 345 { 346 struct ov2685 *ov2685 = to_ov2685(sd); 347 struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format; 348 349 /* only one mode supported for now */ 350 ov2685_fill_fmt(ov2685->cur_mode, mbus_fmt); 351 352 return 0; 353 } 354 355 static int ov2685_get_fmt(struct v4l2_subdev *sd, 356 struct v4l2_subdev_state *sd_state, 357 struct v4l2_subdev_format *fmt) 358 { 359 struct ov2685 *ov2685 = to_ov2685(sd); 360 struct v4l2_mbus_framefmt *mbus_fmt = &fmt->format; 361 362 ov2685_fill_fmt(ov2685->cur_mode, mbus_fmt); 363 364 return 0; 365 } 366 367 static int ov2685_enum_mbus_code(struct v4l2_subdev *sd, 368 struct v4l2_subdev_state *sd_state, 369 struct v4l2_subdev_mbus_code_enum *code) 370 { 371 if (code->index >= ARRAY_SIZE(supported_modes)) 372 return -EINVAL; 373 374 code->code = MEDIA_BUS_FMT_SBGGR10_1X10; 375 376 return 0; 377 } 378 379 static int ov2685_enum_frame_sizes(struct v4l2_subdev *sd, 380 struct v4l2_subdev_state *sd_state, 381 struct v4l2_subdev_frame_size_enum *fse) 382 { 383 int index = fse->index; 384 385 if (index >= ARRAY_SIZE(supported_modes)) 386 return -EINVAL; 387 388 fse->code = MEDIA_BUS_FMT_SBGGR10_1X10; 389 390 fse->min_width = supported_modes[index].width; 391 fse->max_width = supported_modes[index].width; 392 fse->max_height = supported_modes[index].height; 393 fse->min_height = supported_modes[index].height; 394 395 return 0; 396 } 397 398 static const struct v4l2_rect * 399 __ov2685_get_pad_crop(struct ov2685 *ov2685, 400 struct v4l2_subdev_state *state, unsigned int pad, 401 enum v4l2_subdev_format_whence which) 402 { 403 const struct ov2685_mode *mode = ov2685->cur_mode; 404 405 switch (which) { 406 case V4L2_SUBDEV_FORMAT_TRY: 407 return v4l2_subdev_state_get_crop(state, pad); 408 case V4L2_SUBDEV_FORMAT_ACTIVE: 409 return mode->analog_crop; 410 } 411 412 return NULL; 413 } 414 415 static int ov2685_get_selection(struct v4l2_subdev *sd, 416 struct v4l2_subdev_state *sd_state, 417 struct v4l2_subdev_selection *sel) 418 { 419 struct ov2685 *ov2685 = to_ov2685(sd); 420 421 switch (sel->target) { 422 case V4L2_SEL_TGT_CROP: 423 mutex_lock(&ov2685->mutex); 424 sel->r = *__ov2685_get_pad_crop(ov2685, sd_state, sel->pad, 425 sel->which); 426 mutex_unlock(&ov2685->mutex); 427 break; 428 case V4L2_SEL_TGT_NATIVE_SIZE: 429 case V4L2_SEL_TGT_CROP_BOUNDS: 430 sel->r.top = 0; 431 sel->r.left = 0; 432 sel->r.width = OV2685_NATIVE_WIDTH; 433 sel->r.height = OV2685_NATIVE_HEIGHT; 434 break; 435 case V4L2_SEL_TGT_CROP_DEFAULT: 436 sel->r = ov2685_analog_crop; 437 break; 438 default: 439 return -EINVAL; 440 } 441 442 return 0; 443 } 444 445 /* Calculate the delay in us by clock rate and clock cycles */ 446 static inline u32 ov2685_cal_delay(u32 cycles) 447 { 448 return DIV_ROUND_UP(cycles, OV2685_XVCLK_FREQ / 1000 / 1000); 449 } 450 451 static int __ov2685_power_on(struct ov2685 *ov2685) 452 { 453 int ret; 454 u32 delay_us; 455 struct device *dev = &ov2685->client->dev; 456 457 ret = clk_prepare_enable(ov2685->xvclk); 458 if (ret < 0) { 459 dev_err(dev, "Failed to enable xvclk\n"); 460 return ret; 461 } 462 463 gpiod_set_value_cansleep(ov2685->reset_gpio, 1); 464 465 ret = regulator_bulk_enable(OV2685_NUM_SUPPLIES, ov2685->supplies); 466 if (ret < 0) { 467 dev_err(dev, "Failed to enable regulators\n"); 468 goto disable_clk; 469 } 470 471 /* The minimum delay between power supplies and reset rising can be 0 */ 472 gpiod_set_value_cansleep(ov2685->reset_gpio, 0); 473 /* 8192 xvclk cycles prior to the first SCCB transaction */ 474 delay_us = ov2685_cal_delay(8192); 475 usleep_range(delay_us, delay_us * 2); 476 477 /* HACK: ov2685 would output messy data after reset(R0103), 478 * writing register before .s_stream() as a workaround 479 */ 480 ret = ov2685_write_array(ov2685->client, ov2685->cur_mode->reg_list); 481 if (ret) { 482 dev_err(dev, "Failed to set regs for power on\n"); 483 goto disable_supplies; 484 } 485 486 return 0; 487 488 disable_supplies: 489 regulator_bulk_disable(OV2685_NUM_SUPPLIES, ov2685->supplies); 490 disable_clk: 491 clk_disable_unprepare(ov2685->xvclk); 492 493 return ret; 494 } 495 496 static void __ov2685_power_off(struct ov2685 *ov2685) 497 { 498 /* 512 xvclk cycles after the last SCCB transaction or MIPI frame end */ 499 u32 delay_us = ov2685_cal_delay(512); 500 501 usleep_range(delay_us, delay_us * 2); 502 clk_disable_unprepare(ov2685->xvclk); 503 gpiod_set_value_cansleep(ov2685->reset_gpio, 1); 504 regulator_bulk_disable(OV2685_NUM_SUPPLIES, ov2685->supplies); 505 } 506 507 static int ov2685_s_stream(struct v4l2_subdev *sd, int on) 508 { 509 struct ov2685 *ov2685 = to_ov2685(sd); 510 struct i2c_client *client = ov2685->client; 511 int ret = 0; 512 513 mutex_lock(&ov2685->mutex); 514 515 if (on) { 516 ret = pm_runtime_resume_and_get(&ov2685->client->dev); 517 if (ret < 0) 518 goto unlock_and_return; 519 520 ret = __v4l2_ctrl_handler_setup(&ov2685->ctrl_handler); 521 if (ret) { 522 pm_runtime_put(&client->dev); 523 goto unlock_and_return; 524 } 525 ret = ov2685_write_reg(client, REG_SC_CTRL_MODE, 526 OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STREAMING); 527 if (ret) { 528 pm_runtime_put(&client->dev); 529 goto unlock_and_return; 530 } 531 } else { 532 ov2685_write_reg(client, REG_SC_CTRL_MODE, 533 OV2685_REG_VALUE_08BIT, SC_CTRL_MODE_STANDBY); 534 pm_runtime_put(&ov2685->client->dev); 535 } 536 537 unlock_and_return: 538 mutex_unlock(&ov2685->mutex); 539 540 return ret; 541 } 542 543 static int ov2685_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 544 { 545 struct ov2685 *ov2685 = to_ov2685(sd); 546 struct v4l2_mbus_framefmt *try_fmt; 547 548 mutex_lock(&ov2685->mutex); 549 550 try_fmt = v4l2_subdev_state_get_format(fh->state, 0); 551 /* Initialize try_fmt */ 552 ov2685_fill_fmt(&supported_modes[0], try_fmt); 553 554 mutex_unlock(&ov2685->mutex); 555 556 return 0; 557 } 558 559 static int __maybe_unused ov2685_runtime_resume(struct device *dev) 560 { 561 struct v4l2_subdev *sd = dev_get_drvdata(dev); 562 struct ov2685 *ov2685 = to_ov2685(sd); 563 564 return __ov2685_power_on(ov2685); 565 } 566 567 static int __maybe_unused ov2685_runtime_suspend(struct device *dev) 568 { 569 struct v4l2_subdev *sd = dev_get_drvdata(dev); 570 struct ov2685 *ov2685 = to_ov2685(sd); 571 572 __ov2685_power_off(ov2685); 573 574 return 0; 575 } 576 577 static const struct dev_pm_ops ov2685_pm_ops = { 578 SET_RUNTIME_PM_OPS(ov2685_runtime_suspend, 579 ov2685_runtime_resume, NULL) 580 }; 581 582 static int ov2685_set_ctrl(struct v4l2_ctrl *ctrl) 583 { 584 struct ov2685 *ov2685 = container_of(ctrl->handler, 585 struct ov2685, ctrl_handler); 586 struct i2c_client *client = ov2685->client; 587 s64 max_expo; 588 int ret; 589 590 /* Propagate change of current control to all related controls */ 591 switch (ctrl->id) { 592 case V4L2_CID_VBLANK: 593 /* Update max exposure while meeting expected vblanking */ 594 max_expo = ov2685->cur_mode->height + ctrl->val - 4; 595 __v4l2_ctrl_modify_range(ov2685->exposure, 596 ov2685->exposure->minimum, max_expo, 597 ov2685->exposure->step, 598 ov2685->exposure->default_value); 599 break; 600 } 601 602 if (!pm_runtime_get_if_in_use(&client->dev)) 603 return 0; 604 605 switch (ctrl->id) { 606 case V4L2_CID_EXPOSURE: 607 ret = ov2685_write_reg(ov2685->client, OV2685_REG_EXPOSURE, 608 OV2685_REG_VALUE_24BIT, ctrl->val << 4); 609 break; 610 case V4L2_CID_ANALOGUE_GAIN: 611 ret = ov2685_write_reg(ov2685->client, OV2685_REG_GAIN, 612 OV2685_REG_VALUE_16BIT, ctrl->val); 613 break; 614 case V4L2_CID_VBLANK: 615 ret = ov2685_write_reg(ov2685->client, OV2685_REG_VTS, 616 OV2685_REG_VALUE_16BIT, 617 ctrl->val + ov2685->cur_mode->height); 618 break; 619 case V4L2_CID_TEST_PATTERN: 620 ret = ov2685_write_reg(ov2685->client, OV2685_REG_TEST_PATTERN, 621 OV2685_REG_VALUE_08BIT, 622 ov2685_test_pattern_val[ctrl->val]); 623 break; 624 default: 625 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n", 626 __func__, ctrl->id, ctrl->val); 627 ret = -EINVAL; 628 break; 629 } 630 631 pm_runtime_put(&client->dev); 632 633 return ret; 634 } 635 636 static const struct v4l2_subdev_video_ops ov2685_video_ops = { 637 .s_stream = ov2685_s_stream, 638 }; 639 640 static const struct v4l2_subdev_pad_ops ov2685_pad_ops = { 641 .enum_mbus_code = ov2685_enum_mbus_code, 642 .enum_frame_size = ov2685_enum_frame_sizes, 643 .get_fmt = ov2685_get_fmt, 644 .set_fmt = ov2685_set_fmt, 645 .get_selection = ov2685_get_selection, 646 .set_selection = ov2685_get_selection, 647 }; 648 649 static const struct v4l2_subdev_ops ov2685_subdev_ops = { 650 .video = &ov2685_video_ops, 651 .pad = &ov2685_pad_ops, 652 }; 653 654 static const struct v4l2_subdev_internal_ops ov2685_internal_ops = { 655 .open = ov2685_open, 656 }; 657 658 static const struct v4l2_ctrl_ops ov2685_ctrl_ops = { 659 .s_ctrl = ov2685_set_ctrl, 660 }; 661 662 static int ov2685_initialize_controls(struct ov2685 *ov2685) 663 { 664 const struct ov2685_mode *mode; 665 struct v4l2_ctrl_handler *handler; 666 struct v4l2_ctrl *ctrl; 667 struct v4l2_fwnode_device_properties props; 668 u64 exposure_max; 669 u32 pixel_rate, h_blank; 670 int ret; 671 672 handler = &ov2685->ctrl_handler; 673 mode = ov2685->cur_mode; 674 ret = v4l2_ctrl_handler_init(handler, 10); 675 if (ret) 676 return ret; 677 handler->lock = &ov2685->mutex; 678 679 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ, 680 0, 0, link_freq_menu_items); 681 if (ctrl) 682 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 683 684 pixel_rate = (link_freq_menu_items[0] * 2 * OV2685_LANES) / 685 OV2685_BITS_PER_SAMPLE; 686 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE, 687 0, pixel_rate, 1, pixel_rate); 688 689 h_blank = mode->hts_def - mode->width; 690 ov2685->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK, 691 h_blank, h_blank, 1, h_blank); 692 if (ov2685->hblank) 693 ov2685->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 694 695 ov2685->vblank = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops, 696 V4L2_CID_VBLANK, mode->vts_def - mode->height, 697 OV2685_VTS_MAX - mode->height, 1, 698 mode->vts_def - mode->height); 699 700 exposure_max = mode->vts_def - 4; 701 ov2685->exposure = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops, 702 V4L2_CID_EXPOSURE, OV2685_EXPOSURE_MIN, 703 exposure_max, OV2685_EXPOSURE_STEP, 704 mode->exp_def); 705 706 ov2685->anal_gain = v4l2_ctrl_new_std(handler, &ov2685_ctrl_ops, 707 V4L2_CID_ANALOGUE_GAIN, OV2685_GAIN_MIN, 708 OV2685_GAIN_MAX, OV2685_GAIN_STEP, 709 OV2685_GAIN_DEFAULT); 710 711 ov2685->test_pattern = v4l2_ctrl_new_std_menu_items(handler, 712 &ov2685_ctrl_ops, V4L2_CID_TEST_PATTERN, 713 ARRAY_SIZE(ov2685_test_pattern_menu) - 1, 714 0, 0, ov2685_test_pattern_menu); 715 716 /* set properties from fwnode (e.g. rotation, orientation) */ 717 ret = v4l2_fwnode_device_parse(&ov2685->client->dev, &props); 718 if (ret) 719 goto err_free_handler; 720 721 ret = v4l2_ctrl_new_fwnode_properties(handler, &ov2685_ctrl_ops, &props); 722 if (ret) 723 goto err_free_handler; 724 725 if (handler->error) { 726 ret = handler->error; 727 dev_err(&ov2685->client->dev, 728 "Failed to init controls(%d)\n", ret); 729 goto err_free_handler; 730 } 731 732 ov2685->subdev.ctrl_handler = handler; 733 734 return 0; 735 736 err_free_handler: 737 v4l2_ctrl_handler_free(handler); 738 739 return ret; 740 } 741 742 static int ov2685_check_sensor_id(struct ov2685 *ov2685, 743 struct i2c_client *client) 744 { 745 struct device *dev = &ov2685->client->dev; 746 int ret; 747 u32 id = 0; 748 749 ret = ov2685_read_reg(client, OV2685_REG_CHIP_ID, 750 OV2685_REG_VALUE_16BIT, &id); 751 if (id != CHIP_ID) { 752 dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret); 753 return ret; 754 } 755 756 dev_info(dev, "Detected OV%04x sensor\n", CHIP_ID); 757 758 return 0; 759 } 760 761 static int ov2685_configure_regulators(struct ov2685 *ov2685) 762 { 763 int i; 764 765 for (i = 0; i < OV2685_NUM_SUPPLIES; i++) 766 ov2685->supplies[i].supply = ov2685_supply_names[i]; 767 768 return devm_regulator_bulk_get(&ov2685->client->dev, 769 OV2685_NUM_SUPPLIES, 770 ov2685->supplies); 771 } 772 773 static int ov2685_probe(struct i2c_client *client) 774 { 775 struct device *dev = &client->dev; 776 struct ov2685 *ov2685; 777 int ret; 778 779 ov2685 = devm_kzalloc(dev, sizeof(*ov2685), GFP_KERNEL); 780 if (!ov2685) 781 return -ENOMEM; 782 783 ov2685->client = client; 784 ov2685->cur_mode = &supported_modes[0]; 785 786 ov2685->xvclk = devm_clk_get(dev, "xvclk"); 787 if (IS_ERR(ov2685->xvclk)) { 788 dev_err(dev, "Failed to get xvclk\n"); 789 return -EINVAL; 790 } 791 ret = clk_set_rate(ov2685->xvclk, OV2685_XVCLK_FREQ); 792 if (ret < 0) { 793 dev_err(dev, "Failed to set xvclk rate (24MHz)\n"); 794 return ret; 795 } 796 if (clk_get_rate(ov2685->xvclk) != OV2685_XVCLK_FREQ) 797 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n"); 798 799 ov2685->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); 800 if (IS_ERR(ov2685->reset_gpio)) { 801 dev_err(dev, "Failed to get reset-gpios\n"); 802 return -EINVAL; 803 } 804 805 ret = ov2685_configure_regulators(ov2685); 806 if (ret) { 807 dev_err(dev, "Failed to get power regulators\n"); 808 return ret; 809 } 810 811 mutex_init(&ov2685->mutex); 812 v4l2_i2c_subdev_init(&ov2685->subdev, client, &ov2685_subdev_ops); 813 ret = ov2685_initialize_controls(ov2685); 814 if (ret) 815 goto err_destroy_mutex; 816 817 ret = __ov2685_power_on(ov2685); 818 if (ret) 819 goto err_free_handler; 820 821 ret = ov2685_check_sensor_id(ov2685, client); 822 if (ret) 823 goto err_power_off; 824 825 ov2685->subdev.internal_ops = &ov2685_internal_ops; 826 ov2685->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 827 ov2685->pad.flags = MEDIA_PAD_FL_SOURCE; 828 ov2685->subdev.entity.function = MEDIA_ENT_F_CAM_SENSOR; 829 ret = media_entity_pads_init(&ov2685->subdev.entity, 1, &ov2685->pad); 830 if (ret < 0) 831 goto err_power_off; 832 833 ret = v4l2_async_register_subdev(&ov2685->subdev); 834 if (ret) { 835 dev_err(dev, "v4l2 async register subdev failed\n"); 836 goto err_clean_entity; 837 } 838 839 pm_runtime_set_active(dev); 840 pm_runtime_enable(dev); 841 pm_runtime_idle(dev); 842 843 return 0; 844 845 err_clean_entity: 846 media_entity_cleanup(&ov2685->subdev.entity); 847 err_power_off: 848 __ov2685_power_off(ov2685); 849 err_free_handler: 850 v4l2_ctrl_handler_free(&ov2685->ctrl_handler); 851 err_destroy_mutex: 852 mutex_destroy(&ov2685->mutex); 853 854 return ret; 855 } 856 857 static void ov2685_remove(struct i2c_client *client) 858 { 859 struct v4l2_subdev *sd = i2c_get_clientdata(client); 860 struct ov2685 *ov2685 = to_ov2685(sd); 861 862 v4l2_async_unregister_subdev(sd); 863 media_entity_cleanup(&sd->entity); 864 v4l2_ctrl_handler_free(&ov2685->ctrl_handler); 865 mutex_destroy(&ov2685->mutex); 866 867 pm_runtime_disable(&client->dev); 868 if (!pm_runtime_status_suspended(&client->dev)) 869 __ov2685_power_off(ov2685); 870 pm_runtime_set_suspended(&client->dev); 871 } 872 873 #if IS_ENABLED(CONFIG_OF) 874 static const struct of_device_id ov2685_of_match[] = { 875 { .compatible = "ovti,ov2685" }, 876 {}, 877 }; 878 MODULE_DEVICE_TABLE(of, ov2685_of_match); 879 #endif 880 881 static struct i2c_driver ov2685_i2c_driver = { 882 .driver = { 883 .name = "ov2685", 884 .pm = &ov2685_pm_ops, 885 .of_match_table = of_match_ptr(ov2685_of_match), 886 }, 887 .probe = ov2685_probe, 888 .remove = ov2685_remove, 889 }; 890 891 module_i2c_driver(ov2685_i2c_driver); 892 893 MODULE_DESCRIPTION("OmniVision ov2685 sensor driver"); 894 MODULE_LICENSE("GPL v2"); 895