1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Sony imx335 Camera Sensor Driver 4 * 5 * Copyright (C) 2021 Intel Corporation 6 */ 7 #include <linux/unaligned.h> 8 9 #include <linux/clk.h> 10 #include <linux/delay.h> 11 #include <linux/i2c.h> 12 #include <linux/module.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/regmap.h> 15 16 #include <media/v4l2-cci.h> 17 #include <media/v4l2-ctrls.h> 18 #include <media/v4l2-fwnode.h> 19 #include <media/v4l2-subdev.h> 20 21 /* Streaming Mode */ 22 #define IMX335_REG_MODE_SELECT CCI_REG8(0x3000) 23 #define IMX335_MODE_STANDBY 0x01 24 #define IMX335_MODE_STREAMING 0x00 25 26 /* Group hold register */ 27 #define IMX335_REG_HOLD CCI_REG8(0x3001) 28 29 #define IMX335_REG_MASTER_MODE CCI_REG8(0x3002) 30 #define IMX335_REG_BCWAIT_TIME CCI_REG8(0x300c) 31 #define IMX335_REG_CPWAIT_TIME CCI_REG8(0x300d) 32 #define IMX335_REG_WINMODE CCI_REG8(0x3018) 33 #define IMX335_REG_HTRIMMING_START CCI_REG16_LE(0x302c) 34 #define IMX335_REG_HNUM CCI_REG8(0x302e) 35 36 /* Lines per frame */ 37 #define IMX335_REG_VMAX CCI_REG24_LE(0x3030) 38 39 #define IMX335_REG_OPB_SIZE_V CCI_REG8(0x304c) 40 #define IMX335_REG_ADBIT CCI_REG8(0x3050) 41 #define IMX335_REG_Y_OUT_SIZE CCI_REG16_LE(0x3056) 42 43 #define IMX335_REG_SHUTTER CCI_REG24_LE(0x3058) 44 #define IMX335_EXPOSURE_MIN 1 45 #define IMX335_EXPOSURE_OFFSET 9 46 #define IMX335_EXPOSURE_STEP 1 47 #define IMX335_EXPOSURE_DEFAULT 0x0648 48 49 #define IMX335_REG_AREA3_ST_ADR_1 CCI_REG16_LE(0x3074) 50 #define IMX335_REG_AREA3_WIDTH_1 CCI_REG16_LE(0x3076) 51 52 /* Analog and Digital gain control */ 53 #define IMX335_REG_GAIN CCI_REG8(0x30e8) 54 #define IMX335_AGAIN_MIN 0 55 #define IMX335_AGAIN_MAX 100 56 #define IMX335_AGAIN_STEP 1 57 #define IMX335_AGAIN_DEFAULT 0 58 59 #define IMX335_REG_TPG_TESTCLKEN CCI_REG8(0x3148) 60 61 #define IMX335_REG_INCLKSEL1 CCI_REG16_LE(0x314c) 62 #define IMX335_REG_INCLKSEL2 CCI_REG8(0x315a) 63 #define IMX335_REG_INCLKSEL3 CCI_REG8(0x3168) 64 #define IMX335_REG_INCLKSEL4 CCI_REG8(0x316a) 65 66 #define IMX335_REG_MDBIT CCI_REG8(0x319d) 67 #define IMX335_REG_SYSMODE CCI_REG8(0x319e) 68 69 #define IMX335_REG_XVS_XHS_DRV CCI_REG8(0x31a1) 70 71 /* Test pattern generator */ 72 #define IMX335_REG_TPG_DIG_CLP_MODE CCI_REG8(0x3280) 73 #define IMX335_REG_TPG_EN_DUOUT CCI_REG8(0x329c) 74 #define IMX335_REG_TPG CCI_REG8(0x329e) 75 #define IMX335_TPG_ALL_000 0 76 #define IMX335_TPG_ALL_FFF 1 77 #define IMX335_TPG_ALL_555 2 78 #define IMX335_TPG_ALL_AAA 3 79 #define IMX335_TPG_TOG_555_AAA 4 80 #define IMX335_TPG_TOG_AAA_555 5 81 #define IMX335_TPG_TOG_000_555 6 82 #define IMX335_TPG_TOG_555_000 7 83 #define IMX335_TPG_TOG_000_FFF 8 84 #define IMX335_TPG_TOG_FFF_000 9 85 #define IMX335_TPG_H_COLOR_BARS 10 86 #define IMX335_TPG_V_COLOR_BARS 11 87 #define IMX335_REG_TPG_COLORWIDTH CCI_REG8(0x32a0) 88 89 #define IMX335_REG_BLKLEVEL CCI_REG16_LE(0x3302) 90 91 #define IMX335_REG_WRJ_OPEN CCI_REG8(0x336c) 92 93 #define IMX335_REG_ADBIT1 CCI_REG16_LE(0x341c) 94 95 /* Chip ID */ 96 #define IMX335_REG_ID CCI_REG8(0x3912) 97 #define IMX335_ID 0x00 98 99 /* Data Lanes */ 100 #define IMX335_REG_LANEMODE CCI_REG8(0x3a01) 101 #define IMX335_2LANE 1 102 #define IMX335_4LANE 3 103 104 #define IMX335_REG_TCLKPOST CCI_REG16_LE(0x3a18) 105 #define IMX335_REG_TCLKPREPARE CCI_REG16_LE(0x3a1a) 106 #define IMX335_REG_TCLK_TRAIL CCI_REG16_LE(0x3a1c) 107 #define IMX335_REG_TCLK_ZERO CCI_REG16_LE(0x3a1e) 108 #define IMX335_REG_THS_PREPARE CCI_REG16_LE(0x3a20) 109 #define IMX335_REG_THS_ZERO CCI_REG16_LE(0x3a22) 110 #define IMX335_REG_THS_TRAIL CCI_REG16_LE(0x3a24) 111 #define IMX335_REG_THS_EXIT CCI_REG16_LE(0x3a26) 112 #define IMX335_REG_TPLX CCI_REG16_LE(0x3a28) 113 114 /* Input clock rate */ 115 #define IMX335_INCLK_RATE 24000000 116 117 /* CSI2 HW configuration */ 118 #define IMX335_LINK_FREQ_594MHz 594000000LL 119 #define IMX335_LINK_FREQ_445MHz 445500000LL 120 121 #define IMX335_NUM_DATA_LANES 4 122 123 /* IMX335 native and active pixel array size. */ 124 #define IMX335_NATIVE_WIDTH 2616U 125 #define IMX335_NATIVE_HEIGHT 1964U 126 #define IMX335_PIXEL_ARRAY_LEFT 12U 127 #define IMX335_PIXEL_ARRAY_TOP 12U 128 #define IMX335_PIXEL_ARRAY_WIDTH 2592U 129 #define IMX335_PIXEL_ARRAY_HEIGHT 1944U 130 131 /** 132 * struct imx335_reg_list - imx335 sensor register list 133 * @num_of_regs: Number of registers in the list 134 * @regs: Pointer to register list 135 */ 136 struct imx335_reg_list { 137 u32 num_of_regs; 138 const struct cci_reg_sequence *regs; 139 }; 140 141 static const char * const imx335_supply_name[] = { 142 "avdd", /* Analog (2.9V) supply */ 143 "ovdd", /* Digital I/O (1.8V) supply */ 144 "dvdd", /* Digital Core (1.2V) supply */ 145 }; 146 147 /** 148 * struct imx335_mode - imx335 sensor mode structure 149 * @width: Frame width 150 * @height: Frame height 151 * @code: Format code 152 * @hblank: Horizontal blanking in lines 153 * @vblank: Vertical blanking in lines 154 * @vblank_min: Minimum vertical blanking in lines 155 * @vblank_max: Maximum vertical blanking in lines 156 * @pclk: Sensor pixel clock 157 * @reg_list: Register list for sensor mode 158 */ 159 struct imx335_mode { 160 u32 width; 161 u32 height; 162 u32 code; 163 u32 hblank; 164 u32 vblank; 165 u32 vblank_min; 166 u32 vblank_max; 167 u64 pclk; 168 struct imx335_reg_list reg_list; 169 }; 170 171 /** 172 * struct imx335 - imx335 sensor device structure 173 * @dev: Pointer to generic device 174 * @client: Pointer to i2c client 175 * @sd: V4L2 sub-device 176 * @pad: Media pad. Only one pad supported 177 * @reset_gpio: Sensor reset gpio 178 * @supplies: Regulator supplies to handle power control 179 * @cci: CCI register map 180 * @inclk: Sensor input clock 181 * @ctrl_handler: V4L2 control handler 182 * @link_freq_ctrl: Pointer to link frequency control 183 * @pclk_ctrl: Pointer to pixel clock control 184 * @hblank_ctrl: Pointer to horizontal blanking control 185 * @vblank_ctrl: Pointer to vertical blanking control 186 * @exp_ctrl: Pointer to exposure control 187 * @again_ctrl: Pointer to analog gain control 188 * @vblank: Vertical blanking in lines 189 * @lane_mode: Mode for number of connected data lanes 190 * @cur_mode: Pointer to current selected sensor mode 191 * @mutex: Mutex for serializing sensor controls 192 * @link_freq_bitmap: Menu bitmap for link_freq_ctrl 193 * @cur_mbus_code: Currently selected media bus format code 194 */ 195 struct imx335 { 196 struct device *dev; 197 struct i2c_client *client; 198 struct v4l2_subdev sd; 199 struct media_pad pad; 200 struct gpio_desc *reset_gpio; 201 struct regulator_bulk_data supplies[ARRAY_SIZE(imx335_supply_name)]; 202 struct regmap *cci; 203 204 struct clk *inclk; 205 struct v4l2_ctrl_handler ctrl_handler; 206 struct v4l2_ctrl *link_freq_ctrl; 207 struct v4l2_ctrl *pclk_ctrl; 208 struct v4l2_ctrl *hblank_ctrl; 209 struct v4l2_ctrl *vblank_ctrl; 210 struct { 211 struct v4l2_ctrl *exp_ctrl; 212 struct v4l2_ctrl *again_ctrl; 213 }; 214 u32 vblank; 215 u32 lane_mode; 216 const struct imx335_mode *cur_mode; 217 struct mutex mutex; 218 unsigned long link_freq_bitmap; 219 u32 cur_mbus_code; 220 }; 221 222 static const char * const imx335_tpg_menu[] = { 223 "Disabled", 224 "All 000h", 225 "All FFFh", 226 "All 555h", 227 "All AAAh", 228 "Toggle 555/AAAh", 229 "Toggle AAA/555h", 230 "Toggle 000/555h", 231 "Toggle 555/000h", 232 "Toggle 000/FFFh", 233 "Toggle FFF/000h", 234 "Horizontal color bars", 235 "Vertical color bars", 236 }; 237 238 static const int imx335_tpg_val[] = { 239 IMX335_TPG_ALL_000, 240 IMX335_TPG_ALL_000, 241 IMX335_TPG_ALL_FFF, 242 IMX335_TPG_ALL_555, 243 IMX335_TPG_ALL_AAA, 244 IMX335_TPG_TOG_555_AAA, 245 IMX335_TPG_TOG_AAA_555, 246 IMX335_TPG_TOG_000_555, 247 IMX335_TPG_TOG_555_000, 248 IMX335_TPG_TOG_000_FFF, 249 IMX335_TPG_TOG_FFF_000, 250 IMX335_TPG_H_COLOR_BARS, 251 IMX335_TPG_V_COLOR_BARS, 252 }; 253 254 /* Sensor mode registers */ 255 static const struct cci_reg_sequence mode_2592x1940_regs[] = { 256 { IMX335_REG_MODE_SELECT, IMX335_MODE_STANDBY }, 257 { IMX335_REG_MASTER_MODE, 0x00 }, 258 { IMX335_REG_WINMODE, 0x04 }, 259 { IMX335_REG_HTRIMMING_START, 48 }, 260 { IMX335_REG_HNUM, 2592 }, 261 { IMX335_REG_Y_OUT_SIZE, 1944 }, 262 { IMX335_REG_AREA3_ST_ADR_1, 176 }, 263 { IMX335_REG_AREA3_WIDTH_1, 3928 }, 264 { IMX335_REG_OPB_SIZE_V, 0 }, 265 { IMX335_REG_XVS_XHS_DRV, 0x00 }, 266 { CCI_REG8(0x3288), 0x21 }, 267 { CCI_REG8(0x328a), 0x02 }, 268 { CCI_REG8(0x3414), 0x05 }, 269 { CCI_REG8(0x3416), 0x18 }, 270 { CCI_REG8(0x3648), 0x01 }, 271 { CCI_REG8(0x364a), 0x04 }, 272 { CCI_REG8(0x364c), 0x04 }, 273 { CCI_REG8(0x3678), 0x01 }, 274 { CCI_REG8(0x367c), 0x31 }, 275 { CCI_REG8(0x367e), 0x31 }, 276 { CCI_REG8(0x3706), 0x10 }, 277 { CCI_REG8(0x3708), 0x03 }, 278 { CCI_REG8(0x3714), 0x02 }, 279 { CCI_REG8(0x3715), 0x02 }, 280 { CCI_REG8(0x3716), 0x01 }, 281 { CCI_REG8(0x3717), 0x03 }, 282 { CCI_REG8(0x371c), 0x3d }, 283 { CCI_REG8(0x371d), 0x3f }, 284 { CCI_REG8(0x372c), 0x00 }, 285 { CCI_REG8(0x372d), 0x00 }, 286 { CCI_REG8(0x372e), 0x46 }, 287 { CCI_REG8(0x372f), 0x00 }, 288 { CCI_REG8(0x3730), 0x89 }, 289 { CCI_REG8(0x3731), 0x00 }, 290 { CCI_REG8(0x3732), 0x08 }, 291 { CCI_REG8(0x3733), 0x01 }, 292 { CCI_REG8(0x3734), 0xfe }, 293 { CCI_REG8(0x3735), 0x05 }, 294 { CCI_REG8(0x3740), 0x02 }, 295 { CCI_REG8(0x375d), 0x00 }, 296 { CCI_REG8(0x375e), 0x00 }, 297 { CCI_REG8(0x375f), 0x11 }, 298 { CCI_REG8(0x3760), 0x01 }, 299 { CCI_REG8(0x3768), 0x1b }, 300 { CCI_REG8(0x3769), 0x1b }, 301 { CCI_REG8(0x376a), 0x1b }, 302 { CCI_REG8(0x376b), 0x1b }, 303 { CCI_REG8(0x376c), 0x1a }, 304 { CCI_REG8(0x376d), 0x17 }, 305 { CCI_REG8(0x376e), 0x0f }, 306 { CCI_REG8(0x3776), 0x00 }, 307 { CCI_REG8(0x3777), 0x00 }, 308 { CCI_REG8(0x3778), 0x46 }, 309 { CCI_REG8(0x3779), 0x00 }, 310 { CCI_REG8(0x377a), 0x89 }, 311 { CCI_REG8(0x377b), 0x00 }, 312 { CCI_REG8(0x377c), 0x08 }, 313 { CCI_REG8(0x377d), 0x01 }, 314 { CCI_REG8(0x377e), 0x23 }, 315 { CCI_REG8(0x377f), 0x02 }, 316 { CCI_REG8(0x3780), 0xd9 }, 317 { CCI_REG8(0x3781), 0x03 }, 318 { CCI_REG8(0x3782), 0xf5 }, 319 { CCI_REG8(0x3783), 0x06 }, 320 { CCI_REG8(0x3784), 0xa5 }, 321 { CCI_REG8(0x3788), 0x0f }, 322 { CCI_REG8(0x378a), 0xd9 }, 323 { CCI_REG8(0x378b), 0x03 }, 324 { CCI_REG8(0x378c), 0xeb }, 325 { CCI_REG8(0x378d), 0x05 }, 326 { CCI_REG8(0x378e), 0x87 }, 327 { CCI_REG8(0x378f), 0x06 }, 328 { CCI_REG8(0x3790), 0xf5 }, 329 { CCI_REG8(0x3792), 0x43 }, 330 { CCI_REG8(0x3794), 0x7a }, 331 { CCI_REG8(0x3796), 0xa1 }, 332 { CCI_REG8(0x37b0), 0x36 }, 333 { CCI_REG8(0x3a00), 0x00 }, 334 }; 335 336 static const struct cci_reg_sequence raw10_framefmt_regs[] = { 337 { IMX335_REG_ADBIT, 0x00 }, 338 { IMX335_REG_MDBIT, 0x00 }, 339 { IMX335_REG_ADBIT1, 0x1ff }, 340 }; 341 342 static const struct cci_reg_sequence raw12_framefmt_regs[] = { 343 { IMX335_REG_ADBIT, 0x01 }, 344 { IMX335_REG_MDBIT, 0x01 }, 345 { IMX335_REG_ADBIT1, 0x47 }, 346 }; 347 348 static const struct cci_reg_sequence mipi_data_rate_1188Mbps[] = { 349 { IMX335_REG_BCWAIT_TIME, 0x3b }, 350 { IMX335_REG_CPWAIT_TIME, 0x2a }, 351 { IMX335_REG_INCLKSEL1, 0x00c6 }, 352 { IMX335_REG_INCLKSEL2, 0x02 }, 353 { IMX335_REG_INCLKSEL3, 0xa0 }, 354 { IMX335_REG_INCLKSEL4, 0x7e }, 355 { IMX335_REG_SYSMODE, 0x01 }, 356 { IMX335_REG_TCLKPOST, 0x8f }, 357 { IMX335_REG_TCLKPREPARE, 0x4f }, 358 { IMX335_REG_TCLK_TRAIL, 0x47 }, 359 { IMX335_REG_TCLK_ZERO, 0x0137 }, 360 { IMX335_REG_THS_PREPARE, 0x4f }, 361 { IMX335_REG_THS_ZERO, 0x87 }, 362 { IMX335_REG_THS_TRAIL, 0x4f }, 363 { IMX335_REG_THS_EXIT, 0x7f }, 364 { IMX335_REG_TPLX, 0x3f }, 365 }; 366 367 static const struct cci_reg_sequence mipi_data_rate_891Mbps[] = { 368 { IMX335_REG_BCWAIT_TIME, 0x3b }, 369 { IMX335_REG_CPWAIT_TIME, 0x2a }, 370 { IMX335_REG_INCLKSEL1, 0x0129 }, 371 { IMX335_REG_INCLKSEL2, 0x06 }, 372 { IMX335_REG_INCLKSEL3, 0xa0 }, 373 { IMX335_REG_INCLKSEL4, 0x7e }, 374 { IMX335_REG_SYSMODE, 0x02 }, 375 { IMX335_REG_TCLKPOST, 0x7f }, 376 { IMX335_REG_TCLKPREPARE, 0x37 }, 377 { IMX335_REG_TCLK_TRAIL, 0x37 }, 378 { IMX335_REG_TCLK_ZERO, 0xf7 }, 379 { IMX335_REG_THS_PREPARE, 0x3f }, 380 { IMX335_REG_THS_ZERO, 0x6f }, 381 { IMX335_REG_THS_TRAIL, 0x3f }, 382 { IMX335_REG_THS_EXIT, 0x5f }, 383 { IMX335_REG_TPLX, 0x2f }, 384 }; 385 386 static const s64 link_freq[] = { 387 /* Corresponds to 1188Mbps data lane rate */ 388 IMX335_LINK_FREQ_594MHz, 389 /* Corresponds to 891Mbps data lane rate */ 390 IMX335_LINK_FREQ_445MHz, 391 }; 392 393 static const struct imx335_reg_list link_freq_reglist[] = { 394 { 395 .num_of_regs = ARRAY_SIZE(mipi_data_rate_1188Mbps), 396 .regs = mipi_data_rate_1188Mbps, 397 }, 398 { 399 .num_of_regs = ARRAY_SIZE(mipi_data_rate_891Mbps), 400 .regs = mipi_data_rate_891Mbps, 401 }, 402 }; 403 404 static const u32 imx335_mbus_codes[] = { 405 MEDIA_BUS_FMT_SRGGB12_1X12, 406 MEDIA_BUS_FMT_SRGGB10_1X10, 407 }; 408 409 /* Supported sensor mode configurations */ 410 static const struct imx335_mode supported_mode = { 411 .width = 2592, 412 .height = 1944, 413 .hblank = 342, 414 .vblank = 2556, 415 .vblank_min = 2556, 416 .vblank_max = 133060, 417 .pclk = 396000000, 418 .reg_list = { 419 .num_of_regs = ARRAY_SIZE(mode_2592x1940_regs), 420 .regs = mode_2592x1940_regs, 421 }, 422 }; 423 424 /** 425 * to_imx335() - imx335 V4L2 sub-device to imx335 device. 426 * @subdev: pointer to imx335 V4L2 sub-device 427 * 428 * Return: pointer to imx335 device 429 */ 430 static inline struct imx335 *to_imx335(struct v4l2_subdev *subdev) 431 { 432 return container_of(subdev, struct imx335, sd); 433 } 434 435 /** 436 * imx335_update_controls() - Update control ranges based on streaming mode 437 * @imx335: pointer to imx335 device 438 * @mode: pointer to imx335_mode sensor mode 439 * 440 * Return: 0 if successful, error code otherwise. 441 */ 442 static int imx335_update_controls(struct imx335 *imx335, 443 const struct imx335_mode *mode) 444 { 445 int ret; 446 447 ret = __v4l2_ctrl_s_ctrl(imx335->link_freq_ctrl, 448 __ffs(imx335->link_freq_bitmap)); 449 if (ret) 450 return ret; 451 452 ret = __v4l2_ctrl_s_ctrl(imx335->hblank_ctrl, mode->hblank); 453 if (ret) 454 return ret; 455 456 return __v4l2_ctrl_modify_range(imx335->vblank_ctrl, mode->vblank_min, 457 mode->vblank_max, 1, mode->vblank); 458 } 459 460 /** 461 * imx335_update_exp_gain() - Set updated exposure and gain 462 * @imx335: pointer to imx335 device 463 * @exposure: updated exposure value 464 * @gain: updated analog gain value 465 * 466 * Return: 0 if successful, error code otherwise. 467 */ 468 static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain) 469 { 470 u32 lpfr, shutter; 471 int ret_hold; 472 int ret = 0; 473 474 lpfr = imx335->vblank + imx335->cur_mode->height; 475 shutter = lpfr - exposure; 476 477 dev_dbg(imx335->dev, "Set exp %u, analog gain %u, shutter %u, lpfr %u\n", 478 exposure, gain, shutter, lpfr); 479 480 cci_write(imx335->cci, IMX335_REG_HOLD, 1, &ret); 481 cci_write(imx335->cci, IMX335_REG_VMAX, lpfr, &ret); 482 cci_write(imx335->cci, IMX335_REG_SHUTTER, shutter, &ret); 483 cci_write(imx335->cci, IMX335_REG_GAIN, gain, &ret); 484 /* 485 * Unconditionally attempt to release the hold, but track the 486 * error if the unhold itself fails. 487 */ 488 ret_hold = cci_write(imx335->cci, IMX335_REG_HOLD, 0, NULL); 489 if (ret_hold) 490 ret = ret_hold; 491 492 return ret; 493 } 494 495 static int imx335_update_test_pattern(struct imx335 *imx335, u32 pattern_index) 496 { 497 int ret = 0; 498 499 if (pattern_index >= ARRAY_SIZE(imx335_tpg_val)) 500 return -EINVAL; 501 502 if (pattern_index) { 503 const struct cci_reg_sequence tpg_enable_regs[] = { 504 { IMX335_REG_TPG_TESTCLKEN, 0x10 }, 505 { IMX335_REG_TPG_DIG_CLP_MODE, 0x00 }, 506 { IMX335_REG_TPG_EN_DUOUT, 0x01 }, 507 { IMX335_REG_TPG_COLORWIDTH, 0x11 }, 508 { IMX335_REG_BLKLEVEL, 0x00 }, 509 { IMX335_REG_WRJ_OPEN, 0x00 }, 510 }; 511 512 cci_write(imx335->cci, IMX335_REG_TPG, 513 imx335_tpg_val[pattern_index], &ret); 514 515 cci_multi_reg_write(imx335->cci, tpg_enable_regs, 516 ARRAY_SIZE(tpg_enable_regs), &ret); 517 } else { 518 const struct cci_reg_sequence tpg_disable_regs[] = { 519 { IMX335_REG_TPG_TESTCLKEN, 0x00 }, 520 { IMX335_REG_TPG_DIG_CLP_MODE, 0x01 }, 521 { IMX335_REG_TPG_EN_DUOUT, 0x00 }, 522 { IMX335_REG_TPG_COLORWIDTH, 0x10 }, 523 { IMX335_REG_BLKLEVEL, 0x32 }, 524 { IMX335_REG_WRJ_OPEN, 0x01 }, 525 }; 526 527 cci_multi_reg_write(imx335->cci, tpg_disable_regs, 528 ARRAY_SIZE(tpg_disable_regs), &ret); 529 } 530 531 return ret; 532 } 533 534 /** 535 * imx335_set_ctrl() - Set subdevice control 536 * @ctrl: pointer to v4l2_ctrl structure 537 * 538 * Supported controls: 539 * - V4L2_CID_VBLANK 540 * - cluster controls: 541 * - V4L2_CID_ANALOGUE_GAIN 542 * - V4L2_CID_EXPOSURE 543 * 544 * Return: 0 if successful, error code otherwise. 545 */ 546 static int imx335_set_ctrl(struct v4l2_ctrl *ctrl) 547 { 548 struct imx335 *imx335 = 549 container_of(ctrl->handler, struct imx335, ctrl_handler); 550 u32 analog_gain; 551 u32 exposure; 552 int ret; 553 554 /* Propagate change of current control to all related controls */ 555 if (ctrl->id == V4L2_CID_VBLANK) { 556 imx335->vblank = imx335->vblank_ctrl->val; 557 558 dev_dbg(imx335->dev, "Received vblank %u, new lpfr %u\n", 559 imx335->vblank, 560 imx335->vblank + imx335->cur_mode->height); 561 562 ret = __v4l2_ctrl_modify_range(imx335->exp_ctrl, 563 IMX335_EXPOSURE_MIN, 564 imx335->vblank + 565 imx335->cur_mode->height - 566 IMX335_EXPOSURE_OFFSET, 567 1, IMX335_EXPOSURE_DEFAULT); 568 if (ret) 569 return ret; 570 } 571 572 /* 573 * Applying V4L2 control value only happens 574 * when power is up for streaming. 575 */ 576 if (pm_runtime_get_if_in_use(imx335->dev) == 0) 577 return 0; 578 579 switch (ctrl->id) { 580 case V4L2_CID_VBLANK: 581 exposure = imx335->exp_ctrl->val; 582 analog_gain = imx335->again_ctrl->val; 583 584 ret = imx335_update_exp_gain(imx335, exposure, analog_gain); 585 586 break; 587 case V4L2_CID_EXPOSURE: 588 exposure = ctrl->val; 589 analog_gain = imx335->again_ctrl->val; 590 591 dev_dbg(imx335->dev, "Received exp %u, analog gain %u\n", 592 exposure, analog_gain); 593 594 ret = imx335_update_exp_gain(imx335, exposure, analog_gain); 595 596 break; 597 case V4L2_CID_TEST_PATTERN: 598 ret = imx335_update_test_pattern(imx335, ctrl->val); 599 600 break; 601 default: 602 dev_err(imx335->dev, "Invalid control %d\n", ctrl->id); 603 ret = -EINVAL; 604 } 605 606 pm_runtime_put(imx335->dev); 607 608 return ret; 609 } 610 611 /* V4l2 subdevice control ops*/ 612 static const struct v4l2_ctrl_ops imx335_ctrl_ops = { 613 .s_ctrl = imx335_set_ctrl, 614 }; 615 616 static int imx335_get_format_code(struct imx335 *imx335, u32 code) 617 { 618 unsigned int i; 619 620 for (i = 0; i < ARRAY_SIZE(imx335_mbus_codes); i++) { 621 if (imx335_mbus_codes[i] == code) 622 return imx335_mbus_codes[i]; 623 } 624 625 return imx335_mbus_codes[0]; 626 } 627 628 /** 629 * imx335_enum_mbus_code() - Enumerate V4L2 sub-device mbus codes 630 * @sd: pointer to imx335 V4L2 sub-device structure 631 * @sd_state: V4L2 sub-device configuration 632 * @code: V4L2 sub-device code enumeration need to be filled 633 * 634 * Return: 0 if successful, error code otherwise. 635 */ 636 static int imx335_enum_mbus_code(struct v4l2_subdev *sd, 637 struct v4l2_subdev_state *sd_state, 638 struct v4l2_subdev_mbus_code_enum *code) 639 { 640 if (code->index >= ARRAY_SIZE(imx335_mbus_codes)) 641 return -EINVAL; 642 643 code->code = imx335_mbus_codes[code->index]; 644 645 return 0; 646 } 647 648 /** 649 * imx335_enum_frame_size() - Enumerate V4L2 sub-device frame sizes 650 * @sd: pointer to imx335 V4L2 sub-device structure 651 * @sd_state: V4L2 sub-device configuration 652 * @fsize: V4L2 sub-device size enumeration need to be filled 653 * 654 * Return: 0 if successful, error code otherwise. 655 */ 656 static int imx335_enum_frame_size(struct v4l2_subdev *sd, 657 struct v4l2_subdev_state *sd_state, 658 struct v4l2_subdev_frame_size_enum *fsize) 659 { 660 struct imx335 *imx335 = to_imx335(sd); 661 u32 code; 662 663 if (fsize->index > ARRAY_SIZE(imx335_mbus_codes)) 664 return -EINVAL; 665 666 code = imx335_get_format_code(imx335, fsize->code); 667 if (fsize->code != code) 668 return -EINVAL; 669 670 fsize->min_width = supported_mode.width; 671 fsize->max_width = fsize->min_width; 672 fsize->min_height = supported_mode.height; 673 fsize->max_height = fsize->min_height; 674 675 return 0; 676 } 677 678 /** 679 * imx335_fill_pad_format() - Fill subdevice pad format 680 * from selected sensor mode 681 * @imx335: pointer to imx335 device 682 * @mode: pointer to imx335_mode sensor mode 683 * @fmt: V4L2 sub-device format need to be filled 684 */ 685 static void imx335_fill_pad_format(struct imx335 *imx335, 686 const struct imx335_mode *mode, 687 struct v4l2_subdev_format *fmt) 688 { 689 fmt->format.width = mode->width; 690 fmt->format.height = mode->height; 691 fmt->format.code = imx335->cur_mbus_code; 692 fmt->format.field = V4L2_FIELD_NONE; 693 fmt->format.colorspace = V4L2_COLORSPACE_RAW; 694 fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; 695 fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT; 696 fmt->format.xfer_func = V4L2_XFER_FUNC_NONE; 697 } 698 699 /** 700 * imx335_get_pad_format() - Get subdevice pad format 701 * @sd: pointer to imx335 V4L2 sub-device structure 702 * @sd_state: V4L2 sub-device configuration 703 * @fmt: V4L2 sub-device format need to be set 704 * 705 * Return: 0 if successful, error code otherwise. 706 */ 707 static int imx335_get_pad_format(struct v4l2_subdev *sd, 708 struct v4l2_subdev_state *sd_state, 709 struct v4l2_subdev_format *fmt) 710 { 711 struct imx335 *imx335 = to_imx335(sd); 712 713 mutex_lock(&imx335->mutex); 714 715 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 716 struct v4l2_mbus_framefmt *framefmt; 717 718 framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); 719 fmt->format = *framefmt; 720 } else { 721 imx335_fill_pad_format(imx335, imx335->cur_mode, fmt); 722 } 723 724 mutex_unlock(&imx335->mutex); 725 726 return 0; 727 } 728 729 /** 730 * imx335_set_pad_format() - Set subdevice pad format 731 * @sd: pointer to imx335 V4L2 sub-device structure 732 * @sd_state: V4L2 sub-device configuration 733 * @fmt: V4L2 sub-device format need to be set 734 * 735 * Return: 0 if successful, error code otherwise. 736 */ 737 static int imx335_set_pad_format(struct v4l2_subdev *sd, 738 struct v4l2_subdev_state *sd_state, 739 struct v4l2_subdev_format *fmt) 740 { 741 struct imx335 *imx335 = to_imx335(sd); 742 const struct imx335_mode *mode; 743 int i, ret = 0; 744 745 mutex_lock(&imx335->mutex); 746 747 mode = &supported_mode; 748 for (i = 0; i < ARRAY_SIZE(imx335_mbus_codes); i++) { 749 if (imx335_mbus_codes[i] == fmt->format.code) 750 imx335->cur_mbus_code = imx335_mbus_codes[i]; 751 } 752 753 imx335_fill_pad_format(imx335, mode, fmt); 754 755 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 756 struct v4l2_mbus_framefmt *framefmt; 757 758 framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); 759 *framefmt = fmt->format; 760 } else { 761 ret = imx335_update_controls(imx335, mode); 762 if (!ret) 763 imx335->cur_mode = mode; 764 } 765 766 mutex_unlock(&imx335->mutex); 767 768 return ret; 769 } 770 771 /** 772 * imx335_init_state() - Initialize sub-device state 773 * @sd: pointer to imx335 V4L2 sub-device structure 774 * @sd_state: V4L2 sub-device configuration 775 * 776 * Return: 0 if successful, error code otherwise. 777 */ 778 static int imx335_init_state(struct v4l2_subdev *sd, 779 struct v4l2_subdev_state *sd_state) 780 { 781 struct imx335 *imx335 = to_imx335(sd); 782 struct v4l2_subdev_format fmt = { 0 }; 783 784 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 785 imx335_fill_pad_format(imx335, &supported_mode, &fmt); 786 787 mutex_lock(&imx335->mutex); 788 __v4l2_ctrl_modify_range(imx335->link_freq_ctrl, 0, 789 __fls(imx335->link_freq_bitmap), 790 ~(imx335->link_freq_bitmap), 791 __ffs(imx335->link_freq_bitmap)); 792 mutex_unlock(&imx335->mutex); 793 794 return imx335_set_pad_format(sd, sd_state, &fmt); 795 } 796 797 /** 798 * imx335_get_selection() - Selection API 799 * @sd: pointer to imx335 V4L2 sub-device structure 800 * @sd_state: V4L2 sub-device configuration 801 * @sel: V4L2 selection info 802 * 803 * Return: 0 if successful, error code otherwise. 804 */ 805 static int imx335_get_selection(struct v4l2_subdev *sd, 806 struct v4l2_subdev_state *sd_state, 807 struct v4l2_subdev_selection *sel) 808 { 809 switch (sel->target) { 810 case V4L2_SEL_TGT_NATIVE_SIZE: 811 sel->r.top = 0; 812 sel->r.left = 0; 813 sel->r.width = IMX335_NATIVE_WIDTH; 814 sel->r.height = IMX335_NATIVE_HEIGHT; 815 816 return 0; 817 818 case V4L2_SEL_TGT_CROP: 819 case V4L2_SEL_TGT_CROP_DEFAULT: 820 case V4L2_SEL_TGT_CROP_BOUNDS: 821 sel->r.top = IMX335_PIXEL_ARRAY_TOP; 822 sel->r.left = IMX335_PIXEL_ARRAY_LEFT; 823 sel->r.width = IMX335_PIXEL_ARRAY_WIDTH; 824 sel->r.height = IMX335_PIXEL_ARRAY_HEIGHT; 825 826 return 0; 827 } 828 829 return -EINVAL; 830 } 831 832 static int imx335_set_framefmt(struct imx335 *imx335) 833 { 834 switch (imx335->cur_mbus_code) { 835 case MEDIA_BUS_FMT_SRGGB10_1X10: 836 return cci_multi_reg_write(imx335->cci, raw10_framefmt_regs, 837 ARRAY_SIZE(raw10_framefmt_regs), 838 NULL); 839 840 case MEDIA_BUS_FMT_SRGGB12_1X12: 841 return cci_multi_reg_write(imx335->cci, raw12_framefmt_regs, 842 ARRAY_SIZE(raw12_framefmt_regs), 843 NULL); 844 } 845 846 return -EINVAL; 847 } 848 849 /** 850 * imx335_start_streaming() - Start sensor stream 851 * @imx335: pointer to imx335 device 852 * 853 * Return: 0 if successful, error code otherwise. 854 */ 855 static int imx335_start_streaming(struct imx335 *imx335) 856 { 857 const struct imx335_reg_list *reg_list; 858 int ret; 859 860 /* Setup PLL */ 861 reg_list = &link_freq_reglist[__ffs(imx335->link_freq_bitmap)]; 862 ret = cci_multi_reg_write(imx335->cci, reg_list->regs, 863 reg_list->num_of_regs, NULL); 864 if (ret) { 865 dev_err(imx335->dev, "%s failed to set plls\n", __func__); 866 return ret; 867 } 868 869 /* Write sensor mode registers */ 870 reg_list = &imx335->cur_mode->reg_list; 871 ret = cci_multi_reg_write(imx335->cci, reg_list->regs, 872 reg_list->num_of_regs, NULL); 873 if (ret) { 874 dev_err(imx335->dev, "fail to write initial registers\n"); 875 return ret; 876 } 877 878 ret = imx335_set_framefmt(imx335); 879 if (ret) { 880 dev_err(imx335->dev, "%s failed to set frame format: %d\n", 881 __func__, ret); 882 return ret; 883 } 884 885 /* Configure lanes */ 886 ret = cci_write(imx335->cci, IMX335_REG_LANEMODE, 887 imx335->lane_mode, NULL); 888 if (ret) 889 return ret; 890 891 /* Setup handler will write actual exposure and gain */ 892 ret = __v4l2_ctrl_handler_setup(imx335->sd.ctrl_handler); 893 if (ret) { 894 dev_err(imx335->dev, "fail to setup handler\n"); 895 return ret; 896 } 897 898 /* Start streaming */ 899 ret = cci_write(imx335->cci, IMX335_REG_MODE_SELECT, 900 IMX335_MODE_STREAMING, NULL); 901 if (ret) { 902 dev_err(imx335->dev, "fail to start streaming\n"); 903 return ret; 904 } 905 906 /* Initial regulator stabilization period */ 907 usleep_range(18000, 20000); 908 909 return 0; 910 } 911 912 /** 913 * imx335_stop_streaming() - Stop sensor stream 914 * @imx335: pointer to imx335 device 915 * 916 * Return: 0 if successful, error code otherwise. 917 */ 918 static int imx335_stop_streaming(struct imx335 *imx335) 919 { 920 return cci_write(imx335->cci, IMX335_REG_MODE_SELECT, 921 IMX335_MODE_STANDBY, NULL); 922 } 923 924 /** 925 * imx335_set_stream() - Enable sensor streaming 926 * @sd: pointer to imx335 subdevice 927 * @enable: set to enable sensor streaming 928 * 929 * Return: 0 if successful, error code otherwise. 930 */ 931 static int imx335_set_stream(struct v4l2_subdev *sd, int enable) 932 { 933 struct imx335 *imx335 = to_imx335(sd); 934 int ret; 935 936 mutex_lock(&imx335->mutex); 937 938 if (enable) { 939 ret = pm_runtime_resume_and_get(imx335->dev); 940 if (ret) 941 goto error_unlock; 942 943 ret = imx335_start_streaming(imx335); 944 if (ret) 945 goto error_power_off; 946 } else { 947 imx335_stop_streaming(imx335); 948 pm_runtime_put(imx335->dev); 949 } 950 951 mutex_unlock(&imx335->mutex); 952 953 return 0; 954 955 error_power_off: 956 pm_runtime_put(imx335->dev); 957 error_unlock: 958 mutex_unlock(&imx335->mutex); 959 960 return ret; 961 } 962 963 /** 964 * imx335_detect() - Detect imx335 sensor 965 * @imx335: pointer to imx335 device 966 * 967 * Return: 0 if successful, -EIO if sensor id does not match 968 */ 969 static int imx335_detect(struct imx335 *imx335) 970 { 971 int ret; 972 u64 val; 973 974 ret = cci_read(imx335->cci, IMX335_REG_ID, &val, NULL); 975 if (ret) 976 return ret; 977 978 if (val != IMX335_ID) { 979 dev_err(imx335->dev, "chip id mismatch: %x!=%llx\n", 980 IMX335_ID, val); 981 return -ENXIO; 982 } 983 984 return 0; 985 } 986 987 /** 988 * imx335_parse_hw_config() - Parse HW configuration and check if supported 989 * @imx335: pointer to imx335 device 990 * 991 * Return: 0 if successful, error code otherwise. 992 */ 993 static int imx335_parse_hw_config(struct imx335 *imx335) 994 { 995 struct fwnode_handle *fwnode = dev_fwnode(imx335->dev); 996 struct v4l2_fwnode_endpoint bus_cfg = { 997 .bus_type = V4L2_MBUS_CSI2_DPHY 998 }; 999 struct fwnode_handle *ep; 1000 unsigned long rate; 1001 unsigned int i; 1002 int ret; 1003 1004 if (!fwnode) 1005 return -ENXIO; 1006 1007 /* Request optional reset pin */ 1008 imx335->reset_gpio = devm_gpiod_get_optional(imx335->dev, "reset", 1009 GPIOD_OUT_HIGH); 1010 if (IS_ERR(imx335->reset_gpio)) { 1011 dev_err(imx335->dev, "failed to get reset gpio %ld\n", 1012 PTR_ERR(imx335->reset_gpio)); 1013 return PTR_ERR(imx335->reset_gpio); 1014 } 1015 1016 for (i = 0; i < ARRAY_SIZE(imx335_supply_name); i++) 1017 imx335->supplies[i].supply = imx335_supply_name[i]; 1018 1019 ret = devm_regulator_bulk_get(imx335->dev, 1020 ARRAY_SIZE(imx335_supply_name), 1021 imx335->supplies); 1022 if (ret) { 1023 dev_err(imx335->dev, "Failed to get regulators\n"); 1024 return ret; 1025 } 1026 1027 /* Get sensor input clock */ 1028 imx335->inclk = devm_clk_get(imx335->dev, NULL); 1029 if (IS_ERR(imx335->inclk)) { 1030 dev_err(imx335->dev, "could not get inclk\n"); 1031 return PTR_ERR(imx335->inclk); 1032 } 1033 1034 rate = clk_get_rate(imx335->inclk); 1035 if (rate != IMX335_INCLK_RATE) { 1036 dev_err(imx335->dev, "inclk frequency mismatch\n"); 1037 return -EINVAL; 1038 } 1039 1040 ep = fwnode_graph_get_next_endpoint(fwnode, NULL); 1041 if (!ep) { 1042 dev_err(imx335->dev, "Failed to get next endpoint\n"); 1043 return -ENXIO; 1044 } 1045 1046 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); 1047 fwnode_handle_put(ep); 1048 if (ret) 1049 return ret; 1050 1051 switch (bus_cfg.bus.mipi_csi2.num_data_lanes) { 1052 case 2: 1053 imx335->lane_mode = IMX335_2LANE; 1054 break; 1055 case 4: 1056 imx335->lane_mode = IMX335_4LANE; 1057 break; 1058 default: 1059 dev_err(imx335->dev, 1060 "number of CSI2 data lanes %d is not supported\n", 1061 bus_cfg.bus.mipi_csi2.num_data_lanes); 1062 ret = -EINVAL; 1063 goto done_endpoint_free; 1064 } 1065 1066 ret = v4l2_link_freq_to_bitmap(imx335->dev, bus_cfg.link_frequencies, 1067 bus_cfg.nr_of_link_frequencies, 1068 link_freq, ARRAY_SIZE(link_freq), 1069 &imx335->link_freq_bitmap); 1070 1071 done_endpoint_free: 1072 v4l2_fwnode_endpoint_free(&bus_cfg); 1073 1074 return ret; 1075 } 1076 1077 /* V4l2 subdevice ops */ 1078 static const struct v4l2_subdev_video_ops imx335_video_ops = { 1079 .s_stream = imx335_set_stream, 1080 }; 1081 1082 static const struct v4l2_subdev_pad_ops imx335_pad_ops = { 1083 .enum_mbus_code = imx335_enum_mbus_code, 1084 .enum_frame_size = imx335_enum_frame_size, 1085 .get_selection = imx335_get_selection, 1086 .set_selection = imx335_get_selection, 1087 .get_fmt = imx335_get_pad_format, 1088 .set_fmt = imx335_set_pad_format, 1089 }; 1090 1091 static const struct v4l2_subdev_ops imx335_subdev_ops = { 1092 .video = &imx335_video_ops, 1093 .pad = &imx335_pad_ops, 1094 }; 1095 1096 static const struct v4l2_subdev_internal_ops imx335_internal_ops = { 1097 .init_state = imx335_init_state, 1098 }; 1099 1100 /** 1101 * imx335_power_on() - Sensor power on sequence 1102 * @dev: pointer to i2c device 1103 * 1104 * Return: 0 if successful, error code otherwise. 1105 */ 1106 static int imx335_power_on(struct device *dev) 1107 { 1108 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1109 struct imx335 *imx335 = to_imx335(sd); 1110 int ret; 1111 1112 ret = regulator_bulk_enable(ARRAY_SIZE(imx335_supply_name), 1113 imx335->supplies); 1114 if (ret) { 1115 dev_err(dev, "%s: failed to enable regulators\n", 1116 __func__); 1117 return ret; 1118 } 1119 1120 usleep_range(500, 550); /* Tlow */ 1121 1122 gpiod_set_value_cansleep(imx335->reset_gpio, 0); 1123 1124 ret = clk_prepare_enable(imx335->inclk); 1125 if (ret) { 1126 dev_err(imx335->dev, "fail to enable inclk\n"); 1127 goto error_reset; 1128 } 1129 1130 usleep_range(20, 22); /* T4 */ 1131 1132 return 0; 1133 1134 error_reset: 1135 gpiod_set_value_cansleep(imx335->reset_gpio, 1); 1136 regulator_bulk_disable(ARRAY_SIZE(imx335_supply_name), imx335->supplies); 1137 1138 return ret; 1139 } 1140 1141 /** 1142 * imx335_power_off() - Sensor power off sequence 1143 * @dev: pointer to i2c device 1144 * 1145 * Return: 0 if successful, error code otherwise. 1146 */ 1147 static int imx335_power_off(struct device *dev) 1148 { 1149 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1150 struct imx335 *imx335 = to_imx335(sd); 1151 1152 gpiod_set_value_cansleep(imx335->reset_gpio, 1); 1153 clk_disable_unprepare(imx335->inclk); 1154 regulator_bulk_disable(ARRAY_SIZE(imx335_supply_name), imx335->supplies); 1155 1156 return 0; 1157 } 1158 1159 /** 1160 * imx335_init_controls() - Initialize sensor subdevice controls 1161 * @imx335: pointer to imx335 device 1162 * 1163 * Return: 0 if successful, error code otherwise. 1164 */ 1165 static int imx335_init_controls(struct imx335 *imx335) 1166 { 1167 struct v4l2_ctrl_handler *ctrl_hdlr = &imx335->ctrl_handler; 1168 const struct imx335_mode *mode = imx335->cur_mode; 1169 struct v4l2_fwnode_device_properties props; 1170 u32 lpfr; 1171 int ret; 1172 1173 ret = v4l2_fwnode_device_parse(imx335->dev, &props); 1174 if (ret) 1175 return ret; 1176 1177 /* v4l2_fwnode_device_properties can add two more controls */ 1178 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 9); 1179 if (ret) 1180 return ret; 1181 1182 /* Serialize controls with sensor device */ 1183 ctrl_hdlr->lock = &imx335->mutex; 1184 1185 /* Initialize exposure and gain */ 1186 lpfr = mode->vblank + mode->height; 1187 imx335->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1188 &imx335_ctrl_ops, 1189 V4L2_CID_EXPOSURE, 1190 IMX335_EXPOSURE_MIN, 1191 lpfr - IMX335_EXPOSURE_OFFSET, 1192 IMX335_EXPOSURE_STEP, 1193 IMX335_EXPOSURE_DEFAULT); 1194 1195 /* 1196 * The sensor has an analog gain and a digital gain, both controlled 1197 * through a single gain value, expressed in 0.3dB increments. Values 1198 * from 0.0dB (0) to 30.0dB (100) apply analog gain only, higher values 1199 * up to 72.0dB (240) add further digital gain. Limit the range to 1200 * analog gain only, support for digital gain can be added separately 1201 * if needed. 1202 */ 1203 imx335->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1204 &imx335_ctrl_ops, 1205 V4L2_CID_ANALOGUE_GAIN, 1206 IMX335_AGAIN_MIN, 1207 IMX335_AGAIN_MAX, 1208 IMX335_AGAIN_STEP, 1209 IMX335_AGAIN_DEFAULT); 1210 1211 v4l2_ctrl_cluster(2, &imx335->exp_ctrl); 1212 1213 imx335->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1214 &imx335_ctrl_ops, 1215 V4L2_CID_VBLANK, 1216 mode->vblank_min, 1217 mode->vblank_max, 1218 1, mode->vblank); 1219 1220 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, 1221 &imx335_ctrl_ops, 1222 V4L2_CID_TEST_PATTERN, 1223 ARRAY_SIZE(imx335_tpg_menu) - 1, 1224 0, 0, imx335_tpg_menu); 1225 1226 /* Read only controls */ 1227 imx335->pclk_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1228 &imx335_ctrl_ops, 1229 V4L2_CID_PIXEL_RATE, 1230 mode->pclk, mode->pclk, 1231 1, mode->pclk); 1232 1233 imx335->link_freq_ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr, 1234 &imx335_ctrl_ops, 1235 V4L2_CID_LINK_FREQ, 1236 __fls(imx335->link_freq_bitmap), 1237 __ffs(imx335->link_freq_bitmap), 1238 link_freq); 1239 if (imx335->link_freq_ctrl) 1240 imx335->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1241 1242 imx335->hblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1243 &imx335_ctrl_ops, 1244 V4L2_CID_HBLANK, 1245 mode->hblank, 1246 mode->hblank, 1247 1, mode->hblank); 1248 if (imx335->hblank_ctrl) 1249 imx335->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1250 1251 v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx335_ctrl_ops, &props); 1252 1253 if (ctrl_hdlr->error) { 1254 dev_err(imx335->dev, "control init failed: %d\n", 1255 ctrl_hdlr->error); 1256 v4l2_ctrl_handler_free(ctrl_hdlr); 1257 return ctrl_hdlr->error; 1258 } 1259 1260 imx335->sd.ctrl_handler = ctrl_hdlr; 1261 1262 return 0; 1263 } 1264 1265 /** 1266 * imx335_probe() - I2C client device binding 1267 * @client: pointer to i2c client device 1268 * 1269 * Return: 0 if successful, error code otherwise. 1270 */ 1271 static int imx335_probe(struct i2c_client *client) 1272 { 1273 struct imx335 *imx335; 1274 int ret; 1275 1276 imx335 = devm_kzalloc(&client->dev, sizeof(*imx335), GFP_KERNEL); 1277 if (!imx335) 1278 return -ENOMEM; 1279 1280 imx335->dev = &client->dev; 1281 imx335->cci = devm_cci_regmap_init_i2c(client, 16); 1282 if (IS_ERR(imx335->cci)) { 1283 dev_err(imx335->dev, "Unable to initialize I2C\n"); 1284 return -ENODEV; 1285 } 1286 1287 /* Initialize subdev */ 1288 v4l2_i2c_subdev_init(&imx335->sd, client, &imx335_subdev_ops); 1289 imx335->sd.internal_ops = &imx335_internal_ops; 1290 1291 ret = imx335_parse_hw_config(imx335); 1292 if (ret) { 1293 dev_err(imx335->dev, "HW configuration is not supported\n"); 1294 return ret; 1295 } 1296 1297 mutex_init(&imx335->mutex); 1298 1299 ret = imx335_power_on(imx335->dev); 1300 if (ret) { 1301 dev_err(imx335->dev, "failed to power-on the sensor\n"); 1302 goto error_mutex_destroy; 1303 } 1304 1305 /* Check module identity */ 1306 ret = imx335_detect(imx335); 1307 if (ret) { 1308 dev_err(imx335->dev, "failed to find sensor: %d\n", ret); 1309 goto error_power_off; 1310 } 1311 1312 /* Set default mode to max resolution */ 1313 imx335->cur_mode = &supported_mode; 1314 imx335->cur_mbus_code = imx335_mbus_codes[0]; 1315 imx335->vblank = imx335->cur_mode->vblank; 1316 1317 ret = imx335_init_controls(imx335); 1318 if (ret) { 1319 dev_err(imx335->dev, "failed to init controls: %d\n", ret); 1320 goto error_power_off; 1321 } 1322 1323 /* Initialize subdev */ 1324 imx335->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1325 imx335->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1326 1327 /* Initialize source pad */ 1328 imx335->pad.flags = MEDIA_PAD_FL_SOURCE; 1329 ret = media_entity_pads_init(&imx335->sd.entity, 1, &imx335->pad); 1330 if (ret) { 1331 dev_err(imx335->dev, "failed to init entity pads: %d\n", ret); 1332 goto error_handler_free; 1333 } 1334 1335 ret = v4l2_async_register_subdev_sensor(&imx335->sd); 1336 if (ret < 0) { 1337 dev_err(imx335->dev, 1338 "failed to register async subdev: %d\n", ret); 1339 goto error_media_entity; 1340 } 1341 1342 pm_runtime_set_active(imx335->dev); 1343 pm_runtime_enable(imx335->dev); 1344 pm_runtime_idle(imx335->dev); 1345 1346 return 0; 1347 1348 error_media_entity: 1349 media_entity_cleanup(&imx335->sd.entity); 1350 error_handler_free: 1351 v4l2_ctrl_handler_free(imx335->sd.ctrl_handler); 1352 error_power_off: 1353 imx335_power_off(imx335->dev); 1354 error_mutex_destroy: 1355 mutex_destroy(&imx335->mutex); 1356 1357 return ret; 1358 } 1359 1360 /** 1361 * imx335_remove() - I2C client device unbinding 1362 * @client: pointer to I2C client device 1363 * 1364 * Return: 0 if successful, error code otherwise. 1365 */ 1366 static void imx335_remove(struct i2c_client *client) 1367 { 1368 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1369 struct imx335 *imx335 = to_imx335(sd); 1370 1371 v4l2_async_unregister_subdev(sd); 1372 media_entity_cleanup(&sd->entity); 1373 v4l2_ctrl_handler_free(sd->ctrl_handler); 1374 1375 pm_runtime_disable(&client->dev); 1376 if (!pm_runtime_status_suspended(&client->dev)) 1377 imx335_power_off(&client->dev); 1378 pm_runtime_set_suspended(&client->dev); 1379 1380 mutex_destroy(&imx335->mutex); 1381 } 1382 1383 static const struct dev_pm_ops imx335_pm_ops = { 1384 SET_RUNTIME_PM_OPS(imx335_power_off, imx335_power_on, NULL) 1385 }; 1386 1387 static const struct of_device_id imx335_of_match[] = { 1388 { .compatible = "sony,imx335" }, 1389 { } 1390 }; 1391 1392 MODULE_DEVICE_TABLE(of, imx335_of_match); 1393 1394 static struct i2c_driver imx335_driver = { 1395 .probe = imx335_probe, 1396 .remove = imx335_remove, 1397 .driver = { 1398 .name = "imx335", 1399 .pm = &imx335_pm_ops, 1400 .of_match_table = imx335_of_match, 1401 }, 1402 }; 1403 1404 module_i2c_driver(imx335_driver); 1405 1406 MODULE_DESCRIPTION("Sony imx335 sensor driver"); 1407 MODULE_LICENSE("GPL"); 1408