1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Sony imx335 Camera Sensor Driver 4 * 5 * Copyright (C) 2021 Intel Corporation 6 */ 7 #include <asm/unaligned.h> 8 9 #include <linux/clk.h> 10 #include <linux/delay.h> 11 #include <linux/i2c.h> 12 #include <linux/module.h> 13 #include <linux/pm_runtime.h> 14 #include <linux/regmap.h> 15 16 #include <media/v4l2-cci.h> 17 #include <media/v4l2-ctrls.h> 18 #include <media/v4l2-fwnode.h> 19 #include <media/v4l2-subdev.h> 20 21 /* Streaming Mode */ 22 #define IMX335_REG_MODE_SELECT CCI_REG8(0x3000) 23 #define IMX335_MODE_STANDBY 0x01 24 #define IMX335_MODE_STREAMING 0x00 25 26 /* Group hold register */ 27 #define IMX335_REG_HOLD CCI_REG8(0x3001) 28 29 #define IMX335_REG_MASTER_MODE CCI_REG8(0x3002) 30 #define IMX335_REG_BCWAIT_TIME CCI_REG8(0x300c) 31 #define IMX335_REG_CPWAIT_TIME CCI_REG8(0x300d) 32 #define IMX335_REG_WINMODE CCI_REG8(0x3018) 33 #define IMX335_REG_HTRIMMING_START CCI_REG16_LE(0x302c) 34 #define IMX335_REG_HNUM CCI_REG8(0x302e) 35 36 /* Lines per frame */ 37 #define IMX335_REG_VMAX CCI_REG24_LE(0x3030) 38 39 #define IMX335_REG_OPB_SIZE_V CCI_REG8(0x304c) 40 #define IMX335_REG_ADBIT CCI_REG8(0x3050) 41 #define IMX335_REG_Y_OUT_SIZE CCI_REG16_LE(0x3056) 42 43 #define IMX335_REG_SHUTTER CCI_REG24_LE(0x3058) 44 #define IMX335_EXPOSURE_MIN 1 45 #define IMX335_EXPOSURE_OFFSET 9 46 #define IMX335_EXPOSURE_STEP 1 47 #define IMX335_EXPOSURE_DEFAULT 0x0648 48 49 #define IMX335_REG_AREA3_ST_ADR_1 CCI_REG16_LE(0x3074) 50 #define IMX335_REG_AREA3_WIDTH_1 CCI_REG16_LE(0x3076) 51 52 /* Analog and Digital gain control */ 53 #define IMX335_REG_GAIN CCI_REG8(0x30e8) 54 #define IMX335_AGAIN_MIN 0 55 #define IMX335_AGAIN_MAX 100 56 #define IMX335_AGAIN_STEP 1 57 #define IMX335_AGAIN_DEFAULT 0 58 59 #define IMX335_REG_TPG_TESTCLKEN CCI_REG8(0x3148) 60 61 #define IMX335_REG_INCLKSEL1 CCI_REG16_LE(0x314c) 62 #define IMX335_REG_INCLKSEL2 CCI_REG8(0x315a) 63 #define IMX335_REG_INCLKSEL3 CCI_REG8(0x3168) 64 #define IMX335_REG_INCLKSEL4 CCI_REG8(0x316a) 65 66 #define IMX335_REG_MDBIT CCI_REG8(0x319d) 67 #define IMX335_REG_SYSMODE CCI_REG8(0x319e) 68 69 #define IMX335_REG_XVS_XHS_DRV CCI_REG8(0x31a1) 70 71 /* Test pattern generator */ 72 #define IMX335_REG_TPG_DIG_CLP_MODE CCI_REG8(0x3280) 73 #define IMX335_REG_TPG_EN_DUOUT CCI_REG8(0x329c) 74 #define IMX335_REG_TPG CCI_REG8(0x329e) 75 #define IMX335_TPG_ALL_000 0 76 #define IMX335_TPG_ALL_FFF 1 77 #define IMX335_TPG_ALL_555 2 78 #define IMX335_TPG_ALL_AAA 3 79 #define IMX335_TPG_TOG_555_AAA 4 80 #define IMX335_TPG_TOG_AAA_555 5 81 #define IMX335_TPG_TOG_000_555 6 82 #define IMX335_TPG_TOG_555_000 7 83 #define IMX335_TPG_TOG_000_FFF 8 84 #define IMX335_TPG_TOG_FFF_000 9 85 #define IMX335_TPG_H_COLOR_BARS 10 86 #define IMX335_TPG_V_COLOR_BARS 11 87 #define IMX335_REG_TPG_COLORWIDTH CCI_REG8(0x32a0) 88 89 #define IMX335_REG_BLKLEVEL CCI_REG16_LE(0x3302) 90 91 #define IMX335_REG_WRJ_OPEN CCI_REG8(0x336c) 92 93 #define IMX335_REG_ADBIT1 CCI_REG16_LE(0x341c) 94 95 /* Chip ID */ 96 #define IMX335_REG_ID CCI_REG8(0x3912) 97 #define IMX335_ID 0x00 98 99 /* Data Lanes */ 100 #define IMX335_REG_LANEMODE CCI_REG8(0x3a01) 101 #define IMX335_2LANE 1 102 #define IMX335_4LANE 3 103 104 #define IMX335_REG_TCLKPOST CCI_REG16_LE(0x3a18) 105 #define IMX335_REG_TCLKPREPARE CCI_REG16_LE(0x3a1a) 106 #define IMX335_REG_TCLK_TRAIL CCI_REG16_LE(0x3a1c) 107 #define IMX335_REG_TCLK_ZERO CCI_REG16_LE(0x3a1e) 108 #define IMX335_REG_THS_PREPARE CCI_REG16_LE(0x3a20) 109 #define IMX335_REG_THS_ZERO CCI_REG16_LE(0x3a22) 110 #define IMX335_REG_THS_TRAIL CCI_REG16_LE(0x3a24) 111 #define IMX335_REG_THS_EXIT CCI_REG16_LE(0x3a26) 112 #define IMX335_REG_TPLX CCI_REG16_LE(0x3a28) 113 114 /* Input clock rate */ 115 #define IMX335_INCLK_RATE 24000000 116 117 /* CSI2 HW configuration */ 118 #define IMX335_LINK_FREQ_594MHz 594000000LL 119 #define IMX335_LINK_FREQ_445MHz 445500000LL 120 121 #define IMX335_NUM_DATA_LANES 4 122 123 /* IMX335 native and active pixel array size. */ 124 #define IMX335_NATIVE_WIDTH 2616U 125 #define IMX335_NATIVE_HEIGHT 1964U 126 #define IMX335_PIXEL_ARRAY_LEFT 12U 127 #define IMX335_PIXEL_ARRAY_TOP 12U 128 #define IMX335_PIXEL_ARRAY_WIDTH 2592U 129 #define IMX335_PIXEL_ARRAY_HEIGHT 1944U 130 131 /** 132 * struct imx335_reg_list - imx335 sensor register list 133 * @num_of_regs: Number of registers in the list 134 * @regs: Pointer to register list 135 */ 136 struct imx335_reg_list { 137 u32 num_of_regs; 138 const struct cci_reg_sequence *regs; 139 }; 140 141 static const char * const imx335_supply_name[] = { 142 "avdd", /* Analog (2.9V) supply */ 143 "ovdd", /* Digital I/O (1.8V) supply */ 144 "dvdd", /* Digital Core (1.2V) supply */ 145 }; 146 147 /** 148 * struct imx335_mode - imx335 sensor mode structure 149 * @width: Frame width 150 * @height: Frame height 151 * @code: Format code 152 * @hblank: Horizontal blanking in lines 153 * @vblank: Vertical blanking in lines 154 * @vblank_min: Minimum vertical blanking in lines 155 * @vblank_max: Maximum vertical blanking in lines 156 * @pclk: Sensor pixel clock 157 * @reg_list: Register list for sensor mode 158 */ 159 struct imx335_mode { 160 u32 width; 161 u32 height; 162 u32 code; 163 u32 hblank; 164 u32 vblank; 165 u32 vblank_min; 166 u32 vblank_max; 167 u64 pclk; 168 struct imx335_reg_list reg_list; 169 }; 170 171 /** 172 * struct imx335 - imx335 sensor device structure 173 * @dev: Pointer to generic device 174 * @client: Pointer to i2c client 175 * @sd: V4L2 sub-device 176 * @pad: Media pad. Only one pad supported 177 * @reset_gpio: Sensor reset gpio 178 * @supplies: Regulator supplies to handle power control 179 * @cci: CCI register map 180 * @inclk: Sensor input clock 181 * @ctrl_handler: V4L2 control handler 182 * @link_freq_ctrl: Pointer to link frequency control 183 * @pclk_ctrl: Pointer to pixel clock control 184 * @hblank_ctrl: Pointer to horizontal blanking control 185 * @vblank_ctrl: Pointer to vertical blanking control 186 * @exp_ctrl: Pointer to exposure control 187 * @again_ctrl: Pointer to analog gain control 188 * @vblank: Vertical blanking in lines 189 * @lane_mode: Mode for number of connected data lanes 190 * @cur_mode: Pointer to current selected sensor mode 191 * @mutex: Mutex for serializing sensor controls 192 * @link_freq_bitmap: Menu bitmap for link_freq_ctrl 193 * @cur_mbus_code: Currently selected media bus format code 194 */ 195 struct imx335 { 196 struct device *dev; 197 struct i2c_client *client; 198 struct v4l2_subdev sd; 199 struct media_pad pad; 200 struct gpio_desc *reset_gpio; 201 struct regulator_bulk_data supplies[ARRAY_SIZE(imx335_supply_name)]; 202 struct regmap *cci; 203 204 struct clk *inclk; 205 struct v4l2_ctrl_handler ctrl_handler; 206 struct v4l2_ctrl *link_freq_ctrl; 207 struct v4l2_ctrl *pclk_ctrl; 208 struct v4l2_ctrl *hblank_ctrl; 209 struct v4l2_ctrl *vblank_ctrl; 210 struct { 211 struct v4l2_ctrl *exp_ctrl; 212 struct v4l2_ctrl *again_ctrl; 213 }; 214 u32 vblank; 215 u32 lane_mode; 216 const struct imx335_mode *cur_mode; 217 struct mutex mutex; 218 unsigned long link_freq_bitmap; 219 u32 cur_mbus_code; 220 }; 221 222 static const char * const imx335_tpg_menu[] = { 223 "Disabled", 224 "All 000h", 225 "All FFFh", 226 "All 555h", 227 "All AAAh", 228 "Toggle 555/AAAh", 229 "Toggle AAA/555h", 230 "Toggle 000/555h", 231 "Toggle 555/000h", 232 "Toggle 000/FFFh", 233 "Toggle FFF/000h", 234 "Horizontal color bars", 235 "Vertical color bars", 236 }; 237 238 static const int imx335_tpg_val[] = { 239 IMX335_TPG_ALL_000, 240 IMX335_TPG_ALL_000, 241 IMX335_TPG_ALL_FFF, 242 IMX335_TPG_ALL_555, 243 IMX335_TPG_ALL_AAA, 244 IMX335_TPG_TOG_555_AAA, 245 IMX335_TPG_TOG_AAA_555, 246 IMX335_TPG_TOG_000_555, 247 IMX335_TPG_TOG_555_000, 248 IMX335_TPG_TOG_000_FFF, 249 IMX335_TPG_TOG_FFF_000, 250 IMX335_TPG_H_COLOR_BARS, 251 IMX335_TPG_V_COLOR_BARS, 252 }; 253 254 /* Sensor mode registers */ 255 static const struct cci_reg_sequence mode_2592x1940_regs[] = { 256 { IMX335_REG_MODE_SELECT, IMX335_MODE_STANDBY }, 257 { IMX335_REG_MASTER_MODE, 0x00 }, 258 { IMX335_REG_WINMODE, 0x04 }, 259 { IMX335_REG_HTRIMMING_START, 48 }, 260 { IMX335_REG_HNUM, 2592 }, 261 { IMX335_REG_Y_OUT_SIZE, 1944 }, 262 { IMX335_REG_AREA3_ST_ADR_1, 176 }, 263 { IMX335_REG_AREA3_WIDTH_1, 3928 }, 264 { IMX335_REG_OPB_SIZE_V, 0 }, 265 { IMX335_REG_XVS_XHS_DRV, 0x00 }, 266 { CCI_REG8(0x3288), 0x21 }, 267 { CCI_REG8(0x328a), 0x02 }, 268 { CCI_REG8(0x3414), 0x05 }, 269 { CCI_REG8(0x3416), 0x18 }, 270 { CCI_REG8(0x3648), 0x01 }, 271 { CCI_REG8(0x364a), 0x04 }, 272 { CCI_REG8(0x364c), 0x04 }, 273 { CCI_REG8(0x3678), 0x01 }, 274 { CCI_REG8(0x367c), 0x31 }, 275 { CCI_REG8(0x367e), 0x31 }, 276 { CCI_REG8(0x3706), 0x10 }, 277 { CCI_REG8(0x3708), 0x03 }, 278 { CCI_REG8(0x3714), 0x02 }, 279 { CCI_REG8(0x3715), 0x02 }, 280 { CCI_REG8(0x3716), 0x01 }, 281 { CCI_REG8(0x3717), 0x03 }, 282 { CCI_REG8(0x371c), 0x3d }, 283 { CCI_REG8(0x371d), 0x3f }, 284 { CCI_REG8(0x372c), 0x00 }, 285 { CCI_REG8(0x372d), 0x00 }, 286 { CCI_REG8(0x372e), 0x46 }, 287 { CCI_REG8(0x372f), 0x00 }, 288 { CCI_REG8(0x3730), 0x89 }, 289 { CCI_REG8(0x3731), 0x00 }, 290 { CCI_REG8(0x3732), 0x08 }, 291 { CCI_REG8(0x3733), 0x01 }, 292 { CCI_REG8(0x3734), 0xfe }, 293 { CCI_REG8(0x3735), 0x05 }, 294 { CCI_REG8(0x3740), 0x02 }, 295 { CCI_REG8(0x375d), 0x00 }, 296 { CCI_REG8(0x375e), 0x00 }, 297 { CCI_REG8(0x375f), 0x11 }, 298 { CCI_REG8(0x3760), 0x01 }, 299 { CCI_REG8(0x3768), 0x1b }, 300 { CCI_REG8(0x3769), 0x1b }, 301 { CCI_REG8(0x376a), 0x1b }, 302 { CCI_REG8(0x376b), 0x1b }, 303 { CCI_REG8(0x376c), 0x1a }, 304 { CCI_REG8(0x376d), 0x17 }, 305 { CCI_REG8(0x376e), 0x0f }, 306 { CCI_REG8(0x3776), 0x00 }, 307 { CCI_REG8(0x3777), 0x00 }, 308 { CCI_REG8(0x3778), 0x46 }, 309 { CCI_REG8(0x3779), 0x00 }, 310 { CCI_REG8(0x377a), 0x89 }, 311 { CCI_REG8(0x377b), 0x00 }, 312 { CCI_REG8(0x377c), 0x08 }, 313 { CCI_REG8(0x377d), 0x01 }, 314 { CCI_REG8(0x377e), 0x23 }, 315 { CCI_REG8(0x377f), 0x02 }, 316 { CCI_REG8(0x3780), 0xd9 }, 317 { CCI_REG8(0x3781), 0x03 }, 318 { CCI_REG8(0x3782), 0xf5 }, 319 { CCI_REG8(0x3783), 0x06 }, 320 { CCI_REG8(0x3784), 0xa5 }, 321 { CCI_REG8(0x3788), 0x0f }, 322 { CCI_REG8(0x378a), 0xd9 }, 323 { CCI_REG8(0x378b), 0x03 }, 324 { CCI_REG8(0x378c), 0xeb }, 325 { CCI_REG8(0x378d), 0x05 }, 326 { CCI_REG8(0x378e), 0x87 }, 327 { CCI_REG8(0x378f), 0x06 }, 328 { CCI_REG8(0x3790), 0xf5 }, 329 { CCI_REG8(0x3792), 0x43 }, 330 { CCI_REG8(0x3794), 0x7a }, 331 { CCI_REG8(0x3796), 0xa1 }, 332 { CCI_REG8(0x37b0), 0x36 }, 333 { CCI_REG8(0x3a00), 0x00 }, 334 }; 335 336 static const struct cci_reg_sequence raw10_framefmt_regs[] = { 337 { IMX335_REG_ADBIT, 0x00 }, 338 { IMX335_REG_MDBIT, 0x00 }, 339 { IMX335_REG_ADBIT1, 0x1ff }, 340 }; 341 342 static const struct cci_reg_sequence raw12_framefmt_regs[] = { 343 { IMX335_REG_ADBIT, 0x01 }, 344 { IMX335_REG_MDBIT, 0x01 }, 345 { IMX335_REG_ADBIT1, 0x47 }, 346 }; 347 348 static const struct cci_reg_sequence mipi_data_rate_1188Mbps[] = { 349 { IMX335_REG_BCWAIT_TIME, 0x3b }, 350 { IMX335_REG_CPWAIT_TIME, 0x2a }, 351 { IMX335_REG_INCLKSEL1, 0x00c6 }, 352 { IMX335_REG_INCLKSEL2, 0x02 }, 353 { IMX335_REG_INCLKSEL3, 0xa0 }, 354 { IMX335_REG_INCLKSEL4, 0x7e }, 355 { IMX335_REG_SYSMODE, 0x01 }, 356 { IMX335_REG_TCLKPOST, 0x8f }, 357 { IMX335_REG_TCLKPREPARE, 0x4f }, 358 { IMX335_REG_TCLK_TRAIL, 0x47 }, 359 { IMX335_REG_TCLK_ZERO, 0x0137 }, 360 { IMX335_REG_THS_PREPARE, 0x4f }, 361 { IMX335_REG_THS_ZERO, 0x87 }, 362 { IMX335_REG_THS_TRAIL, 0x4f }, 363 { IMX335_REG_THS_EXIT, 0x7f }, 364 { IMX335_REG_TPLX, 0x3f }, 365 }; 366 367 static const struct cci_reg_sequence mipi_data_rate_891Mbps[] = { 368 { IMX335_REG_BCWAIT_TIME, 0x3b }, 369 { IMX335_REG_CPWAIT_TIME, 0x2a }, 370 { IMX335_REG_INCLKSEL1, 0x0129 }, 371 { IMX335_REG_INCLKSEL2, 0x06 }, 372 { IMX335_REG_INCLKSEL3, 0xa0 }, 373 { IMX335_REG_INCLKSEL4, 0x7e }, 374 { IMX335_REG_SYSMODE, 0x02 }, 375 { IMX335_REG_TCLKPOST, 0x7f }, 376 { IMX335_REG_TCLKPREPARE, 0x37 }, 377 { IMX335_REG_TCLK_TRAIL, 0x37 }, 378 { IMX335_REG_TCLK_ZERO, 0xf7 }, 379 { IMX335_REG_THS_PREPARE, 0x3f }, 380 { IMX335_REG_THS_ZERO, 0x6f }, 381 { IMX335_REG_THS_TRAIL, 0x3f }, 382 { IMX335_REG_THS_EXIT, 0x5f }, 383 { IMX335_REG_TPLX, 0x2f }, 384 }; 385 386 static const s64 link_freq[] = { 387 /* Corresponds to 1188Mbps data lane rate */ 388 IMX335_LINK_FREQ_594MHz, 389 /* Corresponds to 891Mbps data lane rate */ 390 IMX335_LINK_FREQ_445MHz, 391 }; 392 393 static const struct imx335_reg_list link_freq_reglist[] = { 394 { 395 .num_of_regs = ARRAY_SIZE(mipi_data_rate_1188Mbps), 396 .regs = mipi_data_rate_1188Mbps, 397 }, 398 { 399 .num_of_regs = ARRAY_SIZE(mipi_data_rate_891Mbps), 400 .regs = mipi_data_rate_891Mbps, 401 }, 402 }; 403 404 static const u32 imx335_mbus_codes[] = { 405 MEDIA_BUS_FMT_SRGGB12_1X12, 406 MEDIA_BUS_FMT_SRGGB10_1X10, 407 }; 408 409 /* Supported sensor mode configurations */ 410 static const struct imx335_mode supported_mode = { 411 .width = 2592, 412 .height = 1944, 413 .hblank = 342, 414 .vblank = 2556, 415 .vblank_min = 2556, 416 .vblank_max = 133060, 417 .pclk = 396000000, 418 .reg_list = { 419 .num_of_regs = ARRAY_SIZE(mode_2592x1940_regs), 420 .regs = mode_2592x1940_regs, 421 }, 422 }; 423 424 /** 425 * to_imx335() - imx335 V4L2 sub-device to imx335 device. 426 * @subdev: pointer to imx335 V4L2 sub-device 427 * 428 * Return: pointer to imx335 device 429 */ 430 static inline struct imx335 *to_imx335(struct v4l2_subdev *subdev) 431 { 432 return container_of(subdev, struct imx335, sd); 433 } 434 435 /** 436 * imx335_update_controls() - Update control ranges based on streaming mode 437 * @imx335: pointer to imx335 device 438 * @mode: pointer to imx335_mode sensor mode 439 * 440 * Return: 0 if successful, error code otherwise. 441 */ 442 static int imx335_update_controls(struct imx335 *imx335, 443 const struct imx335_mode *mode) 444 { 445 int ret; 446 447 ret = __v4l2_ctrl_s_ctrl(imx335->link_freq_ctrl, 448 __ffs(imx335->link_freq_bitmap)); 449 if (ret) 450 return ret; 451 452 ret = __v4l2_ctrl_s_ctrl(imx335->hblank_ctrl, mode->hblank); 453 if (ret) 454 return ret; 455 456 return __v4l2_ctrl_modify_range(imx335->vblank_ctrl, mode->vblank_min, 457 mode->vblank_max, 1, mode->vblank); 458 } 459 460 /** 461 * imx335_update_exp_gain() - Set updated exposure and gain 462 * @imx335: pointer to imx335 device 463 * @exposure: updated exposure value 464 * @gain: updated analog gain value 465 * 466 * Return: 0 if successful, error code otherwise. 467 */ 468 static int imx335_update_exp_gain(struct imx335 *imx335, u32 exposure, u32 gain) 469 { 470 u32 lpfr, shutter; 471 int ret_hold; 472 int ret = 0; 473 474 lpfr = imx335->vblank + imx335->cur_mode->height; 475 shutter = lpfr - exposure; 476 477 dev_dbg(imx335->dev, "Set exp %u, analog gain %u, shutter %u, lpfr %u\n", 478 exposure, gain, shutter, lpfr); 479 480 cci_write(imx335->cci, IMX335_REG_HOLD, 1, &ret); 481 cci_write(imx335->cci, IMX335_REG_VMAX, lpfr, &ret); 482 cci_write(imx335->cci, IMX335_REG_SHUTTER, shutter, &ret); 483 cci_write(imx335->cci, IMX335_REG_GAIN, gain, &ret); 484 /* 485 * Unconditionally attempt to release the hold, but track the 486 * error if the unhold itself fails. 487 */ 488 ret_hold = cci_write(imx335->cci, IMX335_REG_HOLD, 0, NULL); 489 if (ret_hold) 490 ret = ret_hold; 491 492 return ret; 493 } 494 495 static int imx335_update_test_pattern(struct imx335 *imx335, u32 pattern_index) 496 { 497 int ret = 0; 498 499 if (pattern_index >= ARRAY_SIZE(imx335_tpg_val)) 500 return -EINVAL; 501 502 if (pattern_index) { 503 const struct cci_reg_sequence tpg_enable_regs[] = { 504 { IMX335_REG_TPG_TESTCLKEN, 0x10 }, 505 { IMX335_REG_TPG_DIG_CLP_MODE, 0x00 }, 506 { IMX335_REG_TPG_EN_DUOUT, 0x01 }, 507 { IMX335_REG_TPG_COLORWIDTH, 0x11 }, 508 { IMX335_REG_BLKLEVEL, 0x00 }, 509 { IMX335_REG_WRJ_OPEN, 0x00 }, 510 }; 511 512 cci_write(imx335->cci, IMX335_REG_TPG, 513 imx335_tpg_val[pattern_index], &ret); 514 515 cci_multi_reg_write(imx335->cci, tpg_enable_regs, 516 ARRAY_SIZE(tpg_enable_regs), &ret); 517 } else { 518 const struct cci_reg_sequence tpg_disable_regs[] = { 519 { IMX335_REG_TPG_TESTCLKEN, 0x00 }, 520 { IMX335_REG_TPG_DIG_CLP_MODE, 0x01 }, 521 { IMX335_REG_TPG_EN_DUOUT, 0x00 }, 522 { IMX335_REG_TPG_COLORWIDTH, 0x10 }, 523 { IMX335_REG_BLKLEVEL, 0x32 }, 524 { IMX335_REG_WRJ_OPEN, 0x01 }, 525 }; 526 527 cci_multi_reg_write(imx335->cci, tpg_disable_regs, 528 ARRAY_SIZE(tpg_disable_regs), &ret); 529 } 530 531 return ret; 532 } 533 534 /** 535 * imx335_set_ctrl() - Set subdevice control 536 * @ctrl: pointer to v4l2_ctrl structure 537 * 538 * Supported controls: 539 * - V4L2_CID_VBLANK 540 * - cluster controls: 541 * - V4L2_CID_ANALOGUE_GAIN 542 * - V4L2_CID_EXPOSURE 543 * 544 * Return: 0 if successful, error code otherwise. 545 */ 546 static int imx335_set_ctrl(struct v4l2_ctrl *ctrl) 547 { 548 struct imx335 *imx335 = 549 container_of(ctrl->handler, struct imx335, ctrl_handler); 550 u32 analog_gain; 551 u32 exposure; 552 int ret; 553 554 /* Propagate change of current control to all related controls */ 555 if (ctrl->id == V4L2_CID_VBLANK) { 556 imx335->vblank = imx335->vblank_ctrl->val; 557 558 dev_dbg(imx335->dev, "Received vblank %u, new lpfr %u\n", 559 imx335->vblank, 560 imx335->vblank + imx335->cur_mode->height); 561 562 return __v4l2_ctrl_modify_range(imx335->exp_ctrl, 563 IMX335_EXPOSURE_MIN, 564 imx335->vblank + 565 imx335->cur_mode->height - 566 IMX335_EXPOSURE_OFFSET, 567 1, IMX335_EXPOSURE_DEFAULT); 568 } 569 570 /* 571 * Applying V4L2 control value only happens 572 * when power is up for streaming. 573 */ 574 if (pm_runtime_get_if_in_use(imx335->dev) == 0) 575 return 0; 576 577 switch (ctrl->id) { 578 case V4L2_CID_EXPOSURE: 579 exposure = ctrl->val; 580 analog_gain = imx335->again_ctrl->val; 581 582 dev_dbg(imx335->dev, "Received exp %u, analog gain %u\n", 583 exposure, analog_gain); 584 585 ret = imx335_update_exp_gain(imx335, exposure, analog_gain); 586 587 break; 588 case V4L2_CID_TEST_PATTERN: 589 ret = imx335_update_test_pattern(imx335, ctrl->val); 590 591 break; 592 default: 593 dev_err(imx335->dev, "Invalid control %d\n", ctrl->id); 594 ret = -EINVAL; 595 } 596 597 pm_runtime_put(imx335->dev); 598 599 return ret; 600 } 601 602 /* V4l2 subdevice control ops*/ 603 static const struct v4l2_ctrl_ops imx335_ctrl_ops = { 604 .s_ctrl = imx335_set_ctrl, 605 }; 606 607 static int imx335_get_format_code(struct imx335 *imx335, u32 code) 608 { 609 unsigned int i; 610 611 for (i = 0; i < ARRAY_SIZE(imx335_mbus_codes); i++) { 612 if (imx335_mbus_codes[i] == code) 613 return imx335_mbus_codes[i]; 614 } 615 616 return imx335_mbus_codes[0]; 617 } 618 619 /** 620 * imx335_enum_mbus_code() - Enumerate V4L2 sub-device mbus codes 621 * @sd: pointer to imx335 V4L2 sub-device structure 622 * @sd_state: V4L2 sub-device configuration 623 * @code: V4L2 sub-device code enumeration need to be filled 624 * 625 * Return: 0 if successful, error code otherwise. 626 */ 627 static int imx335_enum_mbus_code(struct v4l2_subdev *sd, 628 struct v4l2_subdev_state *sd_state, 629 struct v4l2_subdev_mbus_code_enum *code) 630 { 631 if (code->index >= ARRAY_SIZE(imx335_mbus_codes)) 632 return -EINVAL; 633 634 code->code = imx335_mbus_codes[code->index]; 635 636 return 0; 637 } 638 639 /** 640 * imx335_enum_frame_size() - Enumerate V4L2 sub-device frame sizes 641 * @sd: pointer to imx335 V4L2 sub-device structure 642 * @sd_state: V4L2 sub-device configuration 643 * @fsize: V4L2 sub-device size enumeration need to be filled 644 * 645 * Return: 0 if successful, error code otherwise. 646 */ 647 static int imx335_enum_frame_size(struct v4l2_subdev *sd, 648 struct v4l2_subdev_state *sd_state, 649 struct v4l2_subdev_frame_size_enum *fsize) 650 { 651 struct imx335 *imx335 = to_imx335(sd); 652 u32 code; 653 654 if (fsize->index > ARRAY_SIZE(imx335_mbus_codes)) 655 return -EINVAL; 656 657 code = imx335_get_format_code(imx335, fsize->code); 658 if (fsize->code != code) 659 return -EINVAL; 660 661 fsize->min_width = supported_mode.width; 662 fsize->max_width = fsize->min_width; 663 fsize->min_height = supported_mode.height; 664 fsize->max_height = fsize->min_height; 665 666 return 0; 667 } 668 669 /** 670 * imx335_fill_pad_format() - Fill subdevice pad format 671 * from selected sensor mode 672 * @imx335: pointer to imx335 device 673 * @mode: pointer to imx335_mode sensor mode 674 * @fmt: V4L2 sub-device format need to be filled 675 */ 676 static void imx335_fill_pad_format(struct imx335 *imx335, 677 const struct imx335_mode *mode, 678 struct v4l2_subdev_format *fmt) 679 { 680 fmt->format.width = mode->width; 681 fmt->format.height = mode->height; 682 fmt->format.code = imx335->cur_mbus_code; 683 fmt->format.field = V4L2_FIELD_NONE; 684 fmt->format.colorspace = V4L2_COLORSPACE_RAW; 685 fmt->format.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT; 686 fmt->format.quantization = V4L2_QUANTIZATION_DEFAULT; 687 fmt->format.xfer_func = V4L2_XFER_FUNC_NONE; 688 } 689 690 /** 691 * imx335_get_pad_format() - Get subdevice pad format 692 * @sd: pointer to imx335 V4L2 sub-device structure 693 * @sd_state: V4L2 sub-device configuration 694 * @fmt: V4L2 sub-device format need to be set 695 * 696 * Return: 0 if successful, error code otherwise. 697 */ 698 static int imx335_get_pad_format(struct v4l2_subdev *sd, 699 struct v4l2_subdev_state *sd_state, 700 struct v4l2_subdev_format *fmt) 701 { 702 struct imx335 *imx335 = to_imx335(sd); 703 704 mutex_lock(&imx335->mutex); 705 706 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 707 struct v4l2_mbus_framefmt *framefmt; 708 709 framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); 710 fmt->format = *framefmt; 711 } else { 712 imx335_fill_pad_format(imx335, imx335->cur_mode, fmt); 713 } 714 715 mutex_unlock(&imx335->mutex); 716 717 return 0; 718 } 719 720 /** 721 * imx335_set_pad_format() - Set subdevice pad format 722 * @sd: pointer to imx335 V4L2 sub-device structure 723 * @sd_state: V4L2 sub-device configuration 724 * @fmt: V4L2 sub-device format need to be set 725 * 726 * Return: 0 if successful, error code otherwise. 727 */ 728 static int imx335_set_pad_format(struct v4l2_subdev *sd, 729 struct v4l2_subdev_state *sd_state, 730 struct v4l2_subdev_format *fmt) 731 { 732 struct imx335 *imx335 = to_imx335(sd); 733 const struct imx335_mode *mode; 734 int i, ret = 0; 735 736 mutex_lock(&imx335->mutex); 737 738 mode = &supported_mode; 739 for (i = 0; i < ARRAY_SIZE(imx335_mbus_codes); i++) { 740 if (imx335_mbus_codes[i] == fmt->format.code) 741 imx335->cur_mbus_code = imx335_mbus_codes[i]; 742 } 743 744 imx335_fill_pad_format(imx335, mode, fmt); 745 746 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 747 struct v4l2_mbus_framefmt *framefmt; 748 749 framefmt = v4l2_subdev_state_get_format(sd_state, fmt->pad); 750 *framefmt = fmt->format; 751 } else { 752 ret = imx335_update_controls(imx335, mode); 753 if (!ret) 754 imx335->cur_mode = mode; 755 } 756 757 mutex_unlock(&imx335->mutex); 758 759 return ret; 760 } 761 762 /** 763 * imx335_init_state() - Initialize sub-device state 764 * @sd: pointer to imx335 V4L2 sub-device structure 765 * @sd_state: V4L2 sub-device configuration 766 * 767 * Return: 0 if successful, error code otherwise. 768 */ 769 static int imx335_init_state(struct v4l2_subdev *sd, 770 struct v4l2_subdev_state *sd_state) 771 { 772 struct imx335 *imx335 = to_imx335(sd); 773 struct v4l2_subdev_format fmt = { 0 }; 774 775 fmt.which = sd_state ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE; 776 imx335_fill_pad_format(imx335, &supported_mode, &fmt); 777 778 mutex_lock(&imx335->mutex); 779 __v4l2_ctrl_modify_range(imx335->link_freq_ctrl, 0, 780 __fls(imx335->link_freq_bitmap), 781 ~(imx335->link_freq_bitmap), 782 __ffs(imx335->link_freq_bitmap)); 783 mutex_unlock(&imx335->mutex); 784 785 return imx335_set_pad_format(sd, sd_state, &fmt); 786 } 787 788 /** 789 * imx335_get_selection() - Selection API 790 * @sd: pointer to imx335 V4L2 sub-device structure 791 * @sd_state: V4L2 sub-device configuration 792 * @sel: V4L2 selection info 793 * 794 * Return: 0 if successful, error code otherwise. 795 */ 796 static int imx335_get_selection(struct v4l2_subdev *sd, 797 struct v4l2_subdev_state *sd_state, 798 struct v4l2_subdev_selection *sel) 799 { 800 switch (sel->target) { 801 case V4L2_SEL_TGT_NATIVE_SIZE: 802 sel->r.top = 0; 803 sel->r.left = 0; 804 sel->r.width = IMX335_NATIVE_WIDTH; 805 sel->r.height = IMX335_NATIVE_HEIGHT; 806 807 return 0; 808 809 case V4L2_SEL_TGT_CROP: 810 case V4L2_SEL_TGT_CROP_DEFAULT: 811 case V4L2_SEL_TGT_CROP_BOUNDS: 812 sel->r.top = IMX335_PIXEL_ARRAY_TOP; 813 sel->r.left = IMX335_PIXEL_ARRAY_LEFT; 814 sel->r.width = IMX335_PIXEL_ARRAY_WIDTH; 815 sel->r.height = IMX335_PIXEL_ARRAY_HEIGHT; 816 817 return 0; 818 } 819 820 return -EINVAL; 821 } 822 823 static int imx335_set_framefmt(struct imx335 *imx335) 824 { 825 switch (imx335->cur_mbus_code) { 826 case MEDIA_BUS_FMT_SRGGB10_1X10: 827 return cci_multi_reg_write(imx335->cci, raw10_framefmt_regs, 828 ARRAY_SIZE(raw10_framefmt_regs), 829 NULL); 830 831 case MEDIA_BUS_FMT_SRGGB12_1X12: 832 return cci_multi_reg_write(imx335->cci, raw12_framefmt_regs, 833 ARRAY_SIZE(raw12_framefmt_regs), 834 NULL); 835 } 836 837 return -EINVAL; 838 } 839 840 /** 841 * imx335_start_streaming() - Start sensor stream 842 * @imx335: pointer to imx335 device 843 * 844 * Return: 0 if successful, error code otherwise. 845 */ 846 static int imx335_start_streaming(struct imx335 *imx335) 847 { 848 const struct imx335_reg_list *reg_list; 849 int ret; 850 851 /* Setup PLL */ 852 reg_list = &link_freq_reglist[__ffs(imx335->link_freq_bitmap)]; 853 ret = cci_multi_reg_write(imx335->cci, reg_list->regs, 854 reg_list->num_of_regs, NULL); 855 if (ret) { 856 dev_err(imx335->dev, "%s failed to set plls\n", __func__); 857 return ret; 858 } 859 860 /* Write sensor mode registers */ 861 reg_list = &imx335->cur_mode->reg_list; 862 ret = cci_multi_reg_write(imx335->cci, reg_list->regs, 863 reg_list->num_of_regs, NULL); 864 if (ret) { 865 dev_err(imx335->dev, "fail to write initial registers\n"); 866 return ret; 867 } 868 869 ret = imx335_set_framefmt(imx335); 870 if (ret) { 871 dev_err(imx335->dev, "%s failed to set frame format: %d\n", 872 __func__, ret); 873 return ret; 874 } 875 876 /* Configure lanes */ 877 ret = cci_write(imx335->cci, IMX335_REG_LANEMODE, 878 imx335->lane_mode, NULL); 879 if (ret) 880 return ret; 881 882 /* Setup handler will write actual exposure and gain */ 883 ret = __v4l2_ctrl_handler_setup(imx335->sd.ctrl_handler); 884 if (ret) { 885 dev_err(imx335->dev, "fail to setup handler\n"); 886 return ret; 887 } 888 889 /* Start streaming */ 890 ret = cci_write(imx335->cci, IMX335_REG_MODE_SELECT, 891 IMX335_MODE_STREAMING, NULL); 892 if (ret) { 893 dev_err(imx335->dev, "fail to start streaming\n"); 894 return ret; 895 } 896 897 /* Initial regulator stabilization period */ 898 usleep_range(18000, 20000); 899 900 return 0; 901 } 902 903 /** 904 * imx335_stop_streaming() - Stop sensor stream 905 * @imx335: pointer to imx335 device 906 * 907 * Return: 0 if successful, error code otherwise. 908 */ 909 static int imx335_stop_streaming(struct imx335 *imx335) 910 { 911 return cci_write(imx335->cci, IMX335_REG_MODE_SELECT, 912 IMX335_MODE_STANDBY, NULL); 913 } 914 915 /** 916 * imx335_set_stream() - Enable sensor streaming 917 * @sd: pointer to imx335 subdevice 918 * @enable: set to enable sensor streaming 919 * 920 * Return: 0 if successful, error code otherwise. 921 */ 922 static int imx335_set_stream(struct v4l2_subdev *sd, int enable) 923 { 924 struct imx335 *imx335 = to_imx335(sd); 925 int ret; 926 927 mutex_lock(&imx335->mutex); 928 929 if (enable) { 930 ret = pm_runtime_resume_and_get(imx335->dev); 931 if (ret) 932 goto error_unlock; 933 934 ret = imx335_start_streaming(imx335); 935 if (ret) 936 goto error_power_off; 937 } else { 938 imx335_stop_streaming(imx335); 939 pm_runtime_put(imx335->dev); 940 } 941 942 mutex_unlock(&imx335->mutex); 943 944 return 0; 945 946 error_power_off: 947 pm_runtime_put(imx335->dev); 948 error_unlock: 949 mutex_unlock(&imx335->mutex); 950 951 return ret; 952 } 953 954 /** 955 * imx335_detect() - Detect imx335 sensor 956 * @imx335: pointer to imx335 device 957 * 958 * Return: 0 if successful, -EIO if sensor id does not match 959 */ 960 static int imx335_detect(struct imx335 *imx335) 961 { 962 int ret; 963 u64 val; 964 965 ret = cci_read(imx335->cci, IMX335_REG_ID, &val, NULL); 966 if (ret) 967 return ret; 968 969 if (val != IMX335_ID) { 970 dev_err(imx335->dev, "chip id mismatch: %x!=%llx\n", 971 IMX335_ID, val); 972 return -ENXIO; 973 } 974 975 return 0; 976 } 977 978 /** 979 * imx335_parse_hw_config() - Parse HW configuration and check if supported 980 * @imx335: pointer to imx335 device 981 * 982 * Return: 0 if successful, error code otherwise. 983 */ 984 static int imx335_parse_hw_config(struct imx335 *imx335) 985 { 986 struct fwnode_handle *fwnode = dev_fwnode(imx335->dev); 987 struct v4l2_fwnode_endpoint bus_cfg = { 988 .bus_type = V4L2_MBUS_CSI2_DPHY 989 }; 990 struct fwnode_handle *ep; 991 unsigned long rate; 992 unsigned int i; 993 int ret; 994 995 if (!fwnode) 996 return -ENXIO; 997 998 /* Request optional reset pin */ 999 imx335->reset_gpio = devm_gpiod_get_optional(imx335->dev, "reset", 1000 GPIOD_OUT_LOW); 1001 if (IS_ERR(imx335->reset_gpio)) { 1002 dev_err(imx335->dev, "failed to get reset gpio %ld\n", 1003 PTR_ERR(imx335->reset_gpio)); 1004 return PTR_ERR(imx335->reset_gpio); 1005 } 1006 1007 for (i = 0; i < ARRAY_SIZE(imx335_supply_name); i++) 1008 imx335->supplies[i].supply = imx335_supply_name[i]; 1009 1010 ret = devm_regulator_bulk_get(imx335->dev, 1011 ARRAY_SIZE(imx335_supply_name), 1012 imx335->supplies); 1013 if (ret) { 1014 dev_err(imx335->dev, "Failed to get regulators\n"); 1015 return ret; 1016 } 1017 1018 /* Get sensor input clock */ 1019 imx335->inclk = devm_clk_get(imx335->dev, NULL); 1020 if (IS_ERR(imx335->inclk)) { 1021 dev_err(imx335->dev, "could not get inclk\n"); 1022 return PTR_ERR(imx335->inclk); 1023 } 1024 1025 rate = clk_get_rate(imx335->inclk); 1026 if (rate != IMX335_INCLK_RATE) { 1027 dev_err(imx335->dev, "inclk frequency mismatch\n"); 1028 return -EINVAL; 1029 } 1030 1031 ep = fwnode_graph_get_next_endpoint(fwnode, NULL); 1032 if (!ep) { 1033 dev_err(imx335->dev, "Failed to get next endpoint\n"); 1034 return -ENXIO; 1035 } 1036 1037 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); 1038 fwnode_handle_put(ep); 1039 if (ret) 1040 return ret; 1041 1042 switch (bus_cfg.bus.mipi_csi2.num_data_lanes) { 1043 case 2: 1044 imx335->lane_mode = IMX335_2LANE; 1045 break; 1046 case 4: 1047 imx335->lane_mode = IMX335_4LANE; 1048 break; 1049 default: 1050 dev_err(imx335->dev, 1051 "number of CSI2 data lanes %d is not supported\n", 1052 bus_cfg.bus.mipi_csi2.num_data_lanes); 1053 ret = -EINVAL; 1054 goto done_endpoint_free; 1055 } 1056 1057 ret = v4l2_link_freq_to_bitmap(imx335->dev, bus_cfg.link_frequencies, 1058 bus_cfg.nr_of_link_frequencies, 1059 link_freq, ARRAY_SIZE(link_freq), 1060 &imx335->link_freq_bitmap); 1061 1062 done_endpoint_free: 1063 v4l2_fwnode_endpoint_free(&bus_cfg); 1064 1065 return ret; 1066 } 1067 1068 /* V4l2 subdevice ops */ 1069 static const struct v4l2_subdev_video_ops imx335_video_ops = { 1070 .s_stream = imx335_set_stream, 1071 }; 1072 1073 static const struct v4l2_subdev_pad_ops imx335_pad_ops = { 1074 .enum_mbus_code = imx335_enum_mbus_code, 1075 .enum_frame_size = imx335_enum_frame_size, 1076 .get_selection = imx335_get_selection, 1077 .set_selection = imx335_get_selection, 1078 .get_fmt = imx335_get_pad_format, 1079 .set_fmt = imx335_set_pad_format, 1080 }; 1081 1082 static const struct v4l2_subdev_ops imx335_subdev_ops = { 1083 .video = &imx335_video_ops, 1084 .pad = &imx335_pad_ops, 1085 }; 1086 1087 static const struct v4l2_subdev_internal_ops imx335_internal_ops = { 1088 .init_state = imx335_init_state, 1089 }; 1090 1091 /** 1092 * imx335_power_on() - Sensor power on sequence 1093 * @dev: pointer to i2c device 1094 * 1095 * Return: 0 if successful, error code otherwise. 1096 */ 1097 static int imx335_power_on(struct device *dev) 1098 { 1099 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1100 struct imx335 *imx335 = to_imx335(sd); 1101 int ret; 1102 1103 ret = regulator_bulk_enable(ARRAY_SIZE(imx335_supply_name), 1104 imx335->supplies); 1105 if (ret) { 1106 dev_err(dev, "%s: failed to enable regulators\n", 1107 __func__); 1108 return ret; 1109 } 1110 1111 usleep_range(500, 550); /* Tlow */ 1112 1113 /* Set XCLR */ 1114 gpiod_set_value_cansleep(imx335->reset_gpio, 1); 1115 1116 ret = clk_prepare_enable(imx335->inclk); 1117 if (ret) { 1118 dev_err(imx335->dev, "fail to enable inclk\n"); 1119 goto error_reset; 1120 } 1121 1122 usleep_range(20, 22); /* T4 */ 1123 1124 return 0; 1125 1126 error_reset: 1127 gpiod_set_value_cansleep(imx335->reset_gpio, 0); 1128 regulator_bulk_disable(ARRAY_SIZE(imx335_supply_name), imx335->supplies); 1129 1130 return ret; 1131 } 1132 1133 /** 1134 * imx335_power_off() - Sensor power off sequence 1135 * @dev: pointer to i2c device 1136 * 1137 * Return: 0 if successful, error code otherwise. 1138 */ 1139 static int imx335_power_off(struct device *dev) 1140 { 1141 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1142 struct imx335 *imx335 = to_imx335(sd); 1143 1144 gpiod_set_value_cansleep(imx335->reset_gpio, 0); 1145 clk_disable_unprepare(imx335->inclk); 1146 regulator_bulk_disable(ARRAY_SIZE(imx335_supply_name), imx335->supplies); 1147 1148 return 0; 1149 } 1150 1151 /** 1152 * imx335_init_controls() - Initialize sensor subdevice controls 1153 * @imx335: pointer to imx335 device 1154 * 1155 * Return: 0 if successful, error code otherwise. 1156 */ 1157 static int imx335_init_controls(struct imx335 *imx335) 1158 { 1159 struct v4l2_ctrl_handler *ctrl_hdlr = &imx335->ctrl_handler; 1160 const struct imx335_mode *mode = imx335->cur_mode; 1161 struct v4l2_fwnode_device_properties props; 1162 u32 lpfr; 1163 int ret; 1164 1165 ret = v4l2_fwnode_device_parse(imx335->dev, &props); 1166 if (ret) 1167 return ret; 1168 1169 /* v4l2_fwnode_device_properties can add two more controls */ 1170 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 9); 1171 if (ret) 1172 return ret; 1173 1174 /* Serialize controls with sensor device */ 1175 ctrl_hdlr->lock = &imx335->mutex; 1176 1177 /* Initialize exposure and gain */ 1178 lpfr = mode->vblank + mode->height; 1179 imx335->exp_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1180 &imx335_ctrl_ops, 1181 V4L2_CID_EXPOSURE, 1182 IMX335_EXPOSURE_MIN, 1183 lpfr - IMX335_EXPOSURE_OFFSET, 1184 IMX335_EXPOSURE_STEP, 1185 IMX335_EXPOSURE_DEFAULT); 1186 1187 /* 1188 * The sensor has an analog gain and a digital gain, both controlled 1189 * through a single gain value, expressed in 0.3dB increments. Values 1190 * from 0.0dB (0) to 30.0dB (100) apply analog gain only, higher values 1191 * up to 72.0dB (240) add further digital gain. Limit the range to 1192 * analog gain only, support for digital gain can be added separately 1193 * if needed. 1194 */ 1195 imx335->again_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1196 &imx335_ctrl_ops, 1197 V4L2_CID_ANALOGUE_GAIN, 1198 IMX335_AGAIN_MIN, 1199 IMX335_AGAIN_MAX, 1200 IMX335_AGAIN_STEP, 1201 IMX335_AGAIN_DEFAULT); 1202 1203 v4l2_ctrl_cluster(2, &imx335->exp_ctrl); 1204 1205 imx335->vblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1206 &imx335_ctrl_ops, 1207 V4L2_CID_VBLANK, 1208 mode->vblank_min, 1209 mode->vblank_max, 1210 1, mode->vblank); 1211 1212 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, 1213 &imx335_ctrl_ops, 1214 V4L2_CID_TEST_PATTERN, 1215 ARRAY_SIZE(imx335_tpg_menu) - 1, 1216 0, 0, imx335_tpg_menu); 1217 1218 /* Read only controls */ 1219 imx335->pclk_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1220 &imx335_ctrl_ops, 1221 V4L2_CID_PIXEL_RATE, 1222 mode->pclk, mode->pclk, 1223 1, mode->pclk); 1224 1225 imx335->link_freq_ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr, 1226 &imx335_ctrl_ops, 1227 V4L2_CID_LINK_FREQ, 1228 __fls(imx335->link_freq_bitmap), 1229 __ffs(imx335->link_freq_bitmap), 1230 link_freq); 1231 if (imx335->link_freq_ctrl) 1232 imx335->link_freq_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1233 1234 imx335->hblank_ctrl = v4l2_ctrl_new_std(ctrl_hdlr, 1235 &imx335_ctrl_ops, 1236 V4L2_CID_HBLANK, 1237 mode->hblank, 1238 mode->hblank, 1239 1, mode->hblank); 1240 if (imx335->hblank_ctrl) 1241 imx335->hblank_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1242 1243 v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx335_ctrl_ops, &props); 1244 1245 if (ctrl_hdlr->error) { 1246 dev_err(imx335->dev, "control init failed: %d\n", 1247 ctrl_hdlr->error); 1248 v4l2_ctrl_handler_free(ctrl_hdlr); 1249 return ctrl_hdlr->error; 1250 } 1251 1252 imx335->sd.ctrl_handler = ctrl_hdlr; 1253 1254 return 0; 1255 } 1256 1257 /** 1258 * imx335_probe() - I2C client device binding 1259 * @client: pointer to i2c client device 1260 * 1261 * Return: 0 if successful, error code otherwise. 1262 */ 1263 static int imx335_probe(struct i2c_client *client) 1264 { 1265 struct imx335 *imx335; 1266 int ret; 1267 1268 imx335 = devm_kzalloc(&client->dev, sizeof(*imx335), GFP_KERNEL); 1269 if (!imx335) 1270 return -ENOMEM; 1271 1272 imx335->dev = &client->dev; 1273 imx335->cci = devm_cci_regmap_init_i2c(client, 16); 1274 if (IS_ERR(imx335->cci)) { 1275 dev_err(imx335->dev, "Unable to initialize I2C\n"); 1276 return -ENODEV; 1277 } 1278 1279 /* Initialize subdev */ 1280 v4l2_i2c_subdev_init(&imx335->sd, client, &imx335_subdev_ops); 1281 imx335->sd.internal_ops = &imx335_internal_ops; 1282 1283 ret = imx335_parse_hw_config(imx335); 1284 if (ret) { 1285 dev_err(imx335->dev, "HW configuration is not supported\n"); 1286 return ret; 1287 } 1288 1289 mutex_init(&imx335->mutex); 1290 1291 ret = imx335_power_on(imx335->dev); 1292 if (ret) { 1293 dev_err(imx335->dev, "failed to power-on the sensor\n"); 1294 goto error_mutex_destroy; 1295 } 1296 1297 /* Check module identity */ 1298 ret = imx335_detect(imx335); 1299 if (ret) { 1300 dev_err(imx335->dev, "failed to find sensor: %d\n", ret); 1301 goto error_power_off; 1302 } 1303 1304 /* Set default mode to max resolution */ 1305 imx335->cur_mode = &supported_mode; 1306 imx335->cur_mbus_code = imx335_mbus_codes[0]; 1307 imx335->vblank = imx335->cur_mode->vblank; 1308 1309 ret = imx335_init_controls(imx335); 1310 if (ret) { 1311 dev_err(imx335->dev, "failed to init controls: %d\n", ret); 1312 goto error_power_off; 1313 } 1314 1315 /* Initialize subdev */ 1316 imx335->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1317 imx335->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1318 1319 /* Initialize source pad */ 1320 imx335->pad.flags = MEDIA_PAD_FL_SOURCE; 1321 ret = media_entity_pads_init(&imx335->sd.entity, 1, &imx335->pad); 1322 if (ret) { 1323 dev_err(imx335->dev, "failed to init entity pads: %d\n", ret); 1324 goto error_handler_free; 1325 } 1326 1327 ret = v4l2_async_register_subdev_sensor(&imx335->sd); 1328 if (ret < 0) { 1329 dev_err(imx335->dev, 1330 "failed to register async subdev: %d\n", ret); 1331 goto error_media_entity; 1332 } 1333 1334 pm_runtime_set_active(imx335->dev); 1335 pm_runtime_enable(imx335->dev); 1336 pm_runtime_idle(imx335->dev); 1337 1338 return 0; 1339 1340 error_media_entity: 1341 media_entity_cleanup(&imx335->sd.entity); 1342 error_handler_free: 1343 v4l2_ctrl_handler_free(imx335->sd.ctrl_handler); 1344 error_power_off: 1345 imx335_power_off(imx335->dev); 1346 error_mutex_destroy: 1347 mutex_destroy(&imx335->mutex); 1348 1349 return ret; 1350 } 1351 1352 /** 1353 * imx335_remove() - I2C client device unbinding 1354 * @client: pointer to I2C client device 1355 * 1356 * Return: 0 if successful, error code otherwise. 1357 */ 1358 static void imx335_remove(struct i2c_client *client) 1359 { 1360 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1361 struct imx335 *imx335 = to_imx335(sd); 1362 1363 v4l2_async_unregister_subdev(sd); 1364 media_entity_cleanup(&sd->entity); 1365 v4l2_ctrl_handler_free(sd->ctrl_handler); 1366 1367 pm_runtime_disable(&client->dev); 1368 if (!pm_runtime_status_suspended(&client->dev)) 1369 imx335_power_off(&client->dev); 1370 pm_runtime_set_suspended(&client->dev); 1371 1372 mutex_destroy(&imx335->mutex); 1373 } 1374 1375 static const struct dev_pm_ops imx335_pm_ops = { 1376 SET_RUNTIME_PM_OPS(imx335_power_off, imx335_power_on, NULL) 1377 }; 1378 1379 static const struct of_device_id imx335_of_match[] = { 1380 { .compatible = "sony,imx335" }, 1381 { } 1382 }; 1383 1384 MODULE_DEVICE_TABLE(of, imx335_of_match); 1385 1386 static struct i2c_driver imx335_driver = { 1387 .probe = imx335_probe, 1388 .remove = imx335_remove, 1389 .driver = { 1390 .name = "imx335", 1391 .pm = &imx335_pm_ops, 1392 .of_match_table = imx335_of_match, 1393 }, 1394 }; 1395 1396 module_i2c_driver(imx335_driver); 1397 1398 MODULE_DESCRIPTION("Sony imx335 sensor driver"); 1399 MODULE_LICENSE("GPL"); 1400