1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * A V4L2 driver for Sony IMX219 cameras. 4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd 5 * 6 * Based on Sony imx258 camera driver 7 * Copyright (C) 2018 Intel Corporation 8 * 9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver 10 * Copyright 2018 Qtechnology A/S 11 * 12 * Flip handling taken from the Sony IMX319 driver. 13 * Copyright (C) 2018 Intel Corporation 14 * 15 */ 16 17 #include <linux/clk.h> 18 #include <linux/delay.h> 19 #include <linux/gpio/consumer.h> 20 #include <linux/i2c.h> 21 #include <linux/module.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regulator/consumer.h> 24 #include <media/v4l2-ctrls.h> 25 #include <media/v4l2-device.h> 26 #include <media/v4l2-event.h> 27 #include <media/v4l2-fwnode.h> 28 #include <media/v4l2-mediabus.h> 29 #include <asm/unaligned.h> 30 31 #define IMX219_REG_VALUE_08BIT 1 32 #define IMX219_REG_VALUE_16BIT 2 33 34 #define IMX219_REG_MODE_SELECT 0x0100 35 #define IMX219_MODE_STANDBY 0x00 36 #define IMX219_MODE_STREAMING 0x01 37 38 /* Chip ID */ 39 #define IMX219_REG_CHIP_ID 0x0000 40 #define IMX219_CHIP_ID 0x0219 41 42 /* External clock frequency is 24.0M */ 43 #define IMX219_XCLK_FREQ 24000000 44 45 /* Pixel rate is fixed for all the modes */ 46 #define IMX219_PIXEL_RATE 182400000 47 #define IMX219_PIXEL_RATE_4LANE 280800000 48 49 #define IMX219_DEFAULT_LINK_FREQ 456000000 50 #define IMX219_DEFAULT_LINK_FREQ_4LANE 363000000 51 52 #define IMX219_REG_CSI_LANE_MODE 0x0114 53 #define IMX219_CSI_2_LANE_MODE 0x01 54 #define IMX219_CSI_4_LANE_MODE 0x03 55 56 /* V_TIMING internal */ 57 #define IMX219_REG_VTS 0x0160 58 #define IMX219_VTS_15FPS 0x0dc6 59 #define IMX219_VTS_30FPS_1080P 0x06e3 60 #define IMX219_VTS_30FPS_BINNED 0x06e3 61 #define IMX219_VTS_30FPS_640x480 0x06e3 62 #define IMX219_VTS_MAX 0xffff 63 64 #define IMX219_VBLANK_MIN 4 65 66 /*Frame Length Line*/ 67 #define IMX219_FLL_MIN 0x08a6 68 #define IMX219_FLL_MAX 0xffff 69 #define IMX219_FLL_STEP 1 70 #define IMX219_FLL_DEFAULT 0x0c98 71 72 /* HBLANK control - read only */ 73 #define IMX219_PPL_DEFAULT 3448 74 75 /* Exposure control */ 76 #define IMX219_REG_EXPOSURE 0x015a 77 #define IMX219_EXPOSURE_MIN 4 78 #define IMX219_EXPOSURE_STEP 1 79 #define IMX219_EXPOSURE_DEFAULT 0x640 80 #define IMX219_EXPOSURE_MAX 65535 81 82 /* Analog gain control */ 83 #define IMX219_REG_ANALOG_GAIN 0x0157 84 #define IMX219_ANA_GAIN_MIN 0 85 #define IMX219_ANA_GAIN_MAX 232 86 #define IMX219_ANA_GAIN_STEP 1 87 #define IMX219_ANA_GAIN_DEFAULT 0x0 88 89 /* Digital gain control */ 90 #define IMX219_REG_DIGITAL_GAIN 0x0158 91 #define IMX219_DGTL_GAIN_MIN 0x0100 92 #define IMX219_DGTL_GAIN_MAX 0x0fff 93 #define IMX219_DGTL_GAIN_DEFAULT 0x0100 94 #define IMX219_DGTL_GAIN_STEP 1 95 96 #define IMX219_REG_ORIENTATION 0x0172 97 98 /* Binning Mode */ 99 #define IMX219_REG_BINNING_MODE 0x0174 100 #define IMX219_BINNING_NONE 0x0000 101 #define IMX219_BINNING_2X2 0x0101 102 #define IMX219_BINNING_2X2_ANALOG 0x0303 103 104 /* Test Pattern Control */ 105 #define IMX219_REG_TEST_PATTERN 0x0600 106 #define IMX219_TEST_PATTERN_DISABLE 0 107 #define IMX219_TEST_PATTERN_SOLID_COLOR 1 108 #define IMX219_TEST_PATTERN_COLOR_BARS 2 109 #define IMX219_TEST_PATTERN_GREY_COLOR 3 110 #define IMX219_TEST_PATTERN_PN9 4 111 112 /* Test pattern colour components */ 113 #define IMX219_REG_TESTP_RED 0x0602 114 #define IMX219_REG_TESTP_GREENR 0x0604 115 #define IMX219_REG_TESTP_BLUE 0x0606 116 #define IMX219_REG_TESTP_GREENB 0x0608 117 #define IMX219_TESTP_COLOUR_MIN 0 118 #define IMX219_TESTP_COLOUR_MAX 0x03ff 119 #define IMX219_TESTP_COLOUR_STEP 1 120 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX 121 #define IMX219_TESTP_GREENR_DEFAULT 0 122 #define IMX219_TESTP_BLUE_DEFAULT 0 123 #define IMX219_TESTP_GREENB_DEFAULT 0 124 125 /* IMX219 native and active pixel array size. */ 126 #define IMX219_NATIVE_WIDTH 3296U 127 #define IMX219_NATIVE_HEIGHT 2480U 128 #define IMX219_PIXEL_ARRAY_LEFT 8U 129 #define IMX219_PIXEL_ARRAY_TOP 8U 130 #define IMX219_PIXEL_ARRAY_WIDTH 3280U 131 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U 132 133 struct imx219_reg { 134 u16 address; 135 u8 val; 136 }; 137 138 struct imx219_reg_list { 139 unsigned int num_of_regs; 140 const struct imx219_reg *regs; 141 }; 142 143 /* Mode : resolution and related config&values */ 144 struct imx219_mode { 145 /* Frame width */ 146 unsigned int width; 147 /* Frame height */ 148 unsigned int height; 149 150 /* Analog crop rectangle. */ 151 struct v4l2_rect crop; 152 153 /* V-timing */ 154 unsigned int vts_def; 155 156 /* Default register values */ 157 struct imx219_reg_list reg_list; 158 159 /* 2x2 binning is used */ 160 bool binning; 161 }; 162 163 static const struct imx219_reg imx219_common_regs[] = { 164 {0x0100, 0x00}, /* Mode Select */ 165 166 /* To Access Addresses 3000-5fff, send the following commands */ 167 {0x30eb, 0x0c}, 168 {0x30eb, 0x05}, 169 {0x300a, 0xff}, 170 {0x300b, 0xff}, 171 {0x30eb, 0x05}, 172 {0x30eb, 0x09}, 173 174 /* PLL Clock Table */ 175 {0x0301, 0x05}, /* VTPXCK_DIV */ 176 {0x0303, 0x01}, /* VTSYSCK_DIV */ 177 {0x0304, 0x03}, /* PREPLLCK_VT_DIV 0x03 = AUTO set */ 178 {0x0305, 0x03}, /* PREPLLCK_OP_DIV 0x03 = AUTO set */ 179 {0x0306, 0x00}, /* PLL_VT_MPY */ 180 {0x0307, 0x39}, 181 {0x030b, 0x01}, /* OP_SYS_CLK_DIV */ 182 {0x030c, 0x00}, /* PLL_OP_MPY */ 183 {0x030d, 0x72}, 184 185 /* Undocumented registers */ 186 {0x455e, 0x00}, 187 {0x471e, 0x4b}, 188 {0x4767, 0x0f}, 189 {0x4750, 0x14}, 190 {0x4540, 0x00}, 191 {0x47b4, 0x14}, 192 {0x4713, 0x30}, 193 {0x478b, 0x10}, 194 {0x478f, 0x10}, 195 {0x4793, 0x10}, 196 {0x4797, 0x0e}, 197 {0x479b, 0x0e}, 198 199 /* Frame Bank Register Group "A" */ 200 {0x0162, 0x0d}, /* Line_Length_A */ 201 {0x0163, 0x78}, 202 {0x0170, 0x01}, /* X_ODD_INC_A */ 203 {0x0171, 0x01}, /* Y_ODD_INC_A */ 204 205 /* Output setup registers */ 206 {0x0114, 0x01}, /* CSI 2-Lane Mode */ 207 {0x0128, 0x00}, /* DPHY Auto Mode */ 208 {0x012a, 0x18}, /* EXCK_Freq */ 209 {0x012b, 0x00}, 210 }; 211 212 /* 213 * Register sets lifted off the i2C interface from the Raspberry Pi firmware 214 * driver. 215 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7. 216 */ 217 static const struct imx219_reg mode_3280x2464_regs[] = { 218 {0x0164, 0x00}, 219 {0x0165, 0x00}, 220 {0x0166, 0x0c}, 221 {0x0167, 0xcf}, 222 {0x0168, 0x00}, 223 {0x0169, 0x00}, 224 {0x016a, 0x09}, 225 {0x016b, 0x9f}, 226 {0x016c, 0x0c}, 227 {0x016d, 0xd0}, 228 {0x016e, 0x09}, 229 {0x016f, 0xa0}, 230 {0x0624, 0x0c}, 231 {0x0625, 0xd0}, 232 {0x0626, 0x09}, 233 {0x0627, 0xa0}, 234 }; 235 236 static const struct imx219_reg mode_1920_1080_regs[] = { 237 {0x0164, 0x02}, 238 {0x0165, 0xa8}, 239 {0x0166, 0x0a}, 240 {0x0167, 0x27}, 241 {0x0168, 0x02}, 242 {0x0169, 0xb4}, 243 {0x016a, 0x06}, 244 {0x016b, 0xeb}, 245 {0x016c, 0x07}, 246 {0x016d, 0x80}, 247 {0x016e, 0x04}, 248 {0x016f, 0x38}, 249 {0x0624, 0x07}, 250 {0x0625, 0x80}, 251 {0x0626, 0x04}, 252 {0x0627, 0x38}, 253 }; 254 255 static const struct imx219_reg mode_1640_1232_regs[] = { 256 {0x0164, 0x00}, 257 {0x0165, 0x00}, 258 {0x0166, 0x0c}, 259 {0x0167, 0xcf}, 260 {0x0168, 0x00}, 261 {0x0169, 0x00}, 262 {0x016a, 0x09}, 263 {0x016b, 0x9f}, 264 {0x016c, 0x06}, 265 {0x016d, 0x68}, 266 {0x016e, 0x04}, 267 {0x016f, 0xd0}, 268 {0x0624, 0x06}, 269 {0x0625, 0x68}, 270 {0x0626, 0x04}, 271 {0x0627, 0xd0}, 272 }; 273 274 static const struct imx219_reg mode_640_480_regs[] = { 275 {0x0164, 0x03}, 276 {0x0165, 0xe8}, 277 {0x0166, 0x08}, 278 {0x0167, 0xe7}, 279 {0x0168, 0x02}, 280 {0x0169, 0xf0}, 281 {0x016a, 0x06}, 282 {0x016b, 0xaf}, 283 {0x016c, 0x02}, 284 {0x016d, 0x80}, 285 {0x016e, 0x01}, 286 {0x016f, 0xe0}, 287 {0x0624, 0x06}, 288 {0x0625, 0x68}, 289 {0x0626, 0x04}, 290 {0x0627, 0xd0}, 291 }; 292 293 static const struct imx219_reg raw8_framefmt_regs[] = { 294 {0x018c, 0x08}, 295 {0x018d, 0x08}, 296 {0x0309, 0x08}, 297 }; 298 299 static const struct imx219_reg raw10_framefmt_regs[] = { 300 {0x018c, 0x0a}, 301 {0x018d, 0x0a}, 302 {0x0309, 0x0a}, 303 }; 304 305 static const s64 imx219_link_freq_menu[] = { 306 IMX219_DEFAULT_LINK_FREQ, 307 }; 308 309 static const s64 imx219_link_freq_4lane_menu[] = { 310 IMX219_DEFAULT_LINK_FREQ_4LANE, 311 }; 312 313 static const char * const imx219_test_pattern_menu[] = { 314 "Disabled", 315 "Color Bars", 316 "Solid Color", 317 "Grey Color Bars", 318 "PN9" 319 }; 320 321 static const int imx219_test_pattern_val[] = { 322 IMX219_TEST_PATTERN_DISABLE, 323 IMX219_TEST_PATTERN_COLOR_BARS, 324 IMX219_TEST_PATTERN_SOLID_COLOR, 325 IMX219_TEST_PATTERN_GREY_COLOR, 326 IMX219_TEST_PATTERN_PN9, 327 }; 328 329 /* regulator supplies */ 330 static const char * const imx219_supply_name[] = { 331 /* Supplies can be enabled in any order */ 332 "VANA", /* Analog (2.8V) supply */ 333 "VDIG", /* Digital Core (1.8V) supply */ 334 "VDDL", /* IF (1.2V) supply */ 335 }; 336 337 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name) 338 339 /* 340 * The supported formats. 341 * This table MUST contain 4 entries per format, to cover the various flip 342 * combinations in the order 343 * - no flip 344 * - h flip 345 * - v flip 346 * - h&v flips 347 */ 348 static const u32 imx219_mbus_formats[] = { 349 MEDIA_BUS_FMT_SRGGB10_1X10, 350 MEDIA_BUS_FMT_SGRBG10_1X10, 351 MEDIA_BUS_FMT_SGBRG10_1X10, 352 MEDIA_BUS_FMT_SBGGR10_1X10, 353 354 MEDIA_BUS_FMT_SRGGB8_1X8, 355 MEDIA_BUS_FMT_SGRBG8_1X8, 356 MEDIA_BUS_FMT_SGBRG8_1X8, 357 MEDIA_BUS_FMT_SBGGR8_1X8, 358 }; 359 360 /* 361 * Initialisation delay between XCLR low->high and the moment when the sensor 362 * can start capture (i.e. can leave software stanby) must be not less than: 363 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>) 364 * where 365 * t4 is fixed, and is max 200uS, 366 * t5 is fixed, and is 6000uS, 367 * t6 depends on the sensor external clock, and is max 32000 clock periods. 368 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz. 369 * So for any acceptable external clock t6 is always within the range of 370 * 1185 to 5333 uS, and is always less than t5. 371 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then 372 * initialize the sensor over I2C, and then exit the software standby. 373 * 374 * This start-up time can be optimized a bit more, if we start the writes 375 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor 376 * initialization over I2C may complete before (t4+t5) expires, and we must 377 * ensure that capture is not started before (t4+t5). 378 * 379 * This delay doesn't account for the power supply startup time. If needed, 380 * this should be taken care of via the regulator framework. E.g. in the 381 * case of DT for regulator-fixed one should define the startup-delay-us 382 * property. 383 */ 384 #define IMX219_XCLR_MIN_DELAY_US 6200 385 #define IMX219_XCLR_DELAY_RANGE_US 1000 386 387 /* Mode configs */ 388 static const struct imx219_mode supported_modes[] = { 389 { 390 /* 8MPix 15fps mode */ 391 .width = 3280, 392 .height = 2464, 393 .crop = { 394 .left = IMX219_PIXEL_ARRAY_LEFT, 395 .top = IMX219_PIXEL_ARRAY_TOP, 396 .width = 3280, 397 .height = 2464 398 }, 399 .vts_def = IMX219_VTS_15FPS, 400 .reg_list = { 401 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs), 402 .regs = mode_3280x2464_regs, 403 }, 404 .binning = false, 405 }, 406 { 407 /* 1080P 30fps cropped */ 408 .width = 1920, 409 .height = 1080, 410 .crop = { 411 .left = 688, 412 .top = 700, 413 .width = 1920, 414 .height = 1080 415 }, 416 .vts_def = IMX219_VTS_30FPS_1080P, 417 .reg_list = { 418 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs), 419 .regs = mode_1920_1080_regs, 420 }, 421 .binning = false, 422 }, 423 { 424 /* 2x2 binned 30fps mode */ 425 .width = 1640, 426 .height = 1232, 427 .crop = { 428 .left = IMX219_PIXEL_ARRAY_LEFT, 429 .top = IMX219_PIXEL_ARRAY_TOP, 430 .width = 3280, 431 .height = 2464 432 }, 433 .vts_def = IMX219_VTS_30FPS_BINNED, 434 .reg_list = { 435 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs), 436 .regs = mode_1640_1232_regs, 437 }, 438 .binning = true, 439 }, 440 { 441 /* 640x480 30fps mode */ 442 .width = 640, 443 .height = 480, 444 .crop = { 445 .left = 1008, 446 .top = 760, 447 .width = 1280, 448 .height = 960 449 }, 450 .vts_def = IMX219_VTS_30FPS_640x480, 451 .reg_list = { 452 .num_of_regs = ARRAY_SIZE(mode_640_480_regs), 453 .regs = mode_640_480_regs, 454 }, 455 .binning = true, 456 }, 457 }; 458 459 struct imx219 { 460 struct v4l2_subdev sd; 461 struct media_pad pad; 462 463 struct clk *xclk; /* system clock to IMX219 */ 464 u32 xclk_freq; 465 466 struct gpio_desc *reset_gpio; 467 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES]; 468 469 struct v4l2_ctrl_handler ctrl_handler; 470 /* V4L2 Controls */ 471 struct v4l2_ctrl *pixel_rate; 472 struct v4l2_ctrl *link_freq; 473 struct v4l2_ctrl *exposure; 474 struct v4l2_ctrl *vflip; 475 struct v4l2_ctrl *hflip; 476 struct v4l2_ctrl *vblank; 477 struct v4l2_ctrl *hblank; 478 479 /* Current mode */ 480 const struct imx219_mode *mode; 481 482 /* Two or Four lanes */ 483 u8 lanes; 484 }; 485 486 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd) 487 { 488 return container_of(_sd, struct imx219, sd); 489 } 490 491 /* Read registers up to 2 at a time */ 492 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val) 493 { 494 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 495 struct i2c_msg msgs[2]; 496 u8 addr_buf[2] = { reg >> 8, reg & 0xff }; 497 u8 data_buf[4] = { 0, }; 498 int ret; 499 500 if (len > 4) 501 return -EINVAL; 502 503 /* Write register address */ 504 msgs[0].addr = client->addr; 505 msgs[0].flags = 0; 506 msgs[0].len = ARRAY_SIZE(addr_buf); 507 msgs[0].buf = addr_buf; 508 509 /* Read data from register */ 510 msgs[1].addr = client->addr; 511 msgs[1].flags = I2C_M_RD; 512 msgs[1].len = len; 513 msgs[1].buf = &data_buf[4 - len]; 514 515 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 516 if (ret != ARRAY_SIZE(msgs)) 517 return -EIO; 518 519 *val = get_unaligned_be32(data_buf); 520 521 return 0; 522 } 523 524 /* Write registers up to 2 at a time */ 525 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val) 526 { 527 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 528 u8 buf[6]; 529 530 if (len > 4) 531 return -EINVAL; 532 533 put_unaligned_be16(reg, buf); 534 put_unaligned_be32(val << (8 * (4 - len)), buf + 2); 535 if (i2c_master_send(client, buf, len + 2) != len + 2) 536 return -EIO; 537 538 return 0; 539 } 540 541 /* Write a list of registers */ 542 static int imx219_write_regs(struct imx219 *imx219, 543 const struct imx219_reg *regs, u32 len) 544 { 545 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 546 unsigned int i; 547 int ret; 548 549 for (i = 0; i < len; i++) { 550 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val); 551 if (ret) { 552 dev_err_ratelimited(&client->dev, 553 "Failed to write reg 0x%4.4x. error = %d\n", 554 regs[i].address, ret); 555 556 return ret; 557 } 558 } 559 560 return 0; 561 } 562 563 /* Get bayer order based on flip setting. */ 564 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code) 565 { 566 unsigned int i; 567 568 for (i = 0; i < ARRAY_SIZE(imx219_mbus_formats); i++) 569 if (imx219_mbus_formats[i] == code) 570 break; 571 572 if (i >= ARRAY_SIZE(imx219_mbus_formats)) 573 i = 0; 574 575 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) | 576 (imx219->hflip->val ? 1 : 0); 577 578 return imx219_mbus_formats[i]; 579 } 580 581 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl) 582 { 583 struct imx219 *imx219 = 584 container_of(ctrl->handler, struct imx219, ctrl_handler); 585 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 586 int ret; 587 588 if (ctrl->id == V4L2_CID_VBLANK) { 589 int exposure_max, exposure_def; 590 591 /* Update max exposure while meeting expected vblanking */ 592 exposure_max = imx219->mode->height + ctrl->val - 4; 593 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? 594 exposure_max : IMX219_EXPOSURE_DEFAULT; 595 __v4l2_ctrl_modify_range(imx219->exposure, 596 imx219->exposure->minimum, 597 exposure_max, imx219->exposure->step, 598 exposure_def); 599 } 600 601 /* 602 * Applying V4L2 control value only happens 603 * when power is up for streaming 604 */ 605 if (pm_runtime_get_if_in_use(&client->dev) == 0) 606 return 0; 607 608 switch (ctrl->id) { 609 case V4L2_CID_ANALOGUE_GAIN: 610 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN, 611 IMX219_REG_VALUE_08BIT, ctrl->val); 612 break; 613 case V4L2_CID_EXPOSURE: 614 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE, 615 IMX219_REG_VALUE_16BIT, ctrl->val); 616 break; 617 case V4L2_CID_DIGITAL_GAIN: 618 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN, 619 IMX219_REG_VALUE_16BIT, ctrl->val); 620 break; 621 case V4L2_CID_TEST_PATTERN: 622 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN, 623 IMX219_REG_VALUE_16BIT, 624 imx219_test_pattern_val[ctrl->val]); 625 break; 626 case V4L2_CID_HFLIP: 627 case V4L2_CID_VFLIP: 628 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1, 629 imx219->hflip->val | 630 imx219->vflip->val << 1); 631 break; 632 case V4L2_CID_VBLANK: 633 ret = imx219_write_reg(imx219, IMX219_REG_VTS, 634 IMX219_REG_VALUE_16BIT, 635 imx219->mode->height + ctrl->val); 636 break; 637 case V4L2_CID_TEST_PATTERN_RED: 638 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED, 639 IMX219_REG_VALUE_16BIT, ctrl->val); 640 break; 641 case V4L2_CID_TEST_PATTERN_GREENR: 642 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR, 643 IMX219_REG_VALUE_16BIT, ctrl->val); 644 break; 645 case V4L2_CID_TEST_PATTERN_BLUE: 646 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE, 647 IMX219_REG_VALUE_16BIT, ctrl->val); 648 break; 649 case V4L2_CID_TEST_PATTERN_GREENB: 650 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB, 651 IMX219_REG_VALUE_16BIT, ctrl->val); 652 break; 653 default: 654 dev_info(&client->dev, 655 "ctrl(id:0x%x,val:0x%x) is not handled\n", 656 ctrl->id, ctrl->val); 657 ret = -EINVAL; 658 break; 659 } 660 661 pm_runtime_put(&client->dev); 662 663 return ret; 664 } 665 666 static const struct v4l2_ctrl_ops imx219_ctrl_ops = { 667 .s_ctrl = imx219_set_ctrl, 668 }; 669 670 static void imx219_update_pad_format(struct imx219 *imx219, 671 const struct imx219_mode *mode, 672 struct v4l2_mbus_framefmt *fmt, u32 code) 673 { 674 /* Bayer order varies with flips */ 675 fmt->code = imx219_get_format_code(imx219, code); 676 fmt->width = mode->width; 677 fmt->height = mode->height; 678 fmt->field = V4L2_FIELD_NONE; 679 fmt->colorspace = V4L2_COLORSPACE_RAW; 680 fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE; 681 fmt->xfer_func = V4L2_XFER_FUNC_NONE; 682 } 683 684 static int imx219_init_cfg(struct v4l2_subdev *sd, 685 struct v4l2_subdev_state *state) 686 { 687 struct imx219 *imx219 = to_imx219(sd); 688 struct v4l2_mbus_framefmt *format; 689 struct v4l2_rect *crop; 690 691 /* Initialize the format. */ 692 format = v4l2_subdev_get_pad_format(sd, state, 0); 693 imx219_update_pad_format(imx219, &supported_modes[0], format, 694 MEDIA_BUS_FMT_SRGGB10_1X10); 695 696 /* Initialize the crop rectangle. */ 697 crop = v4l2_subdev_get_pad_crop(sd, state, 0); 698 crop->top = IMX219_PIXEL_ARRAY_TOP; 699 crop->left = IMX219_PIXEL_ARRAY_LEFT; 700 crop->width = IMX219_PIXEL_ARRAY_WIDTH; 701 crop->height = IMX219_PIXEL_ARRAY_HEIGHT; 702 703 return 0; 704 } 705 706 static int imx219_enum_mbus_code(struct v4l2_subdev *sd, 707 struct v4l2_subdev_state *sd_state, 708 struct v4l2_subdev_mbus_code_enum *code) 709 { 710 struct imx219 *imx219 = to_imx219(sd); 711 712 if (code->index >= (ARRAY_SIZE(imx219_mbus_formats) / 4)) 713 return -EINVAL; 714 715 code->code = imx219_get_format_code(imx219, imx219_mbus_formats[code->index * 4]); 716 717 return 0; 718 } 719 720 static int imx219_enum_frame_size(struct v4l2_subdev *sd, 721 struct v4l2_subdev_state *sd_state, 722 struct v4l2_subdev_frame_size_enum *fse) 723 { 724 struct imx219 *imx219 = to_imx219(sd); 725 u32 code; 726 727 if (fse->index >= ARRAY_SIZE(supported_modes)) 728 return -EINVAL; 729 730 code = imx219_get_format_code(imx219, fse->code); 731 if (fse->code != code) 732 return -EINVAL; 733 734 fse->min_width = supported_modes[fse->index].width; 735 fse->max_width = fse->min_width; 736 fse->min_height = supported_modes[fse->index].height; 737 fse->max_height = fse->min_height; 738 739 return 0; 740 } 741 742 static int imx219_set_pad_format(struct v4l2_subdev *sd, 743 struct v4l2_subdev_state *sd_state, 744 struct v4l2_subdev_format *fmt) 745 { 746 struct imx219 *imx219 = to_imx219(sd); 747 const struct imx219_mode *mode; 748 int exposure_max, exposure_def, hblank; 749 struct v4l2_mbus_framefmt *format; 750 struct v4l2_rect *crop; 751 752 mode = v4l2_find_nearest_size(supported_modes, 753 ARRAY_SIZE(supported_modes), 754 width, height, 755 fmt->format.width, fmt->format.height); 756 757 imx219_update_pad_format(imx219, mode, &fmt->format, fmt->format.code); 758 759 format = v4l2_subdev_get_pad_format(sd, sd_state, 0); 760 crop = v4l2_subdev_get_pad_crop(sd, sd_state, 0); 761 762 *format = fmt->format; 763 *crop = mode->crop; 764 765 if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) { 766 imx219->mode = mode; 767 /* Update limits and set FPS to default */ 768 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN, 769 IMX219_VTS_MAX - mode->height, 1, 770 mode->vts_def - mode->height); 771 __v4l2_ctrl_s_ctrl(imx219->vblank, 772 mode->vts_def - mode->height); 773 /* Update max exposure while meeting expected vblanking */ 774 exposure_max = mode->vts_def - 4; 775 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? 776 exposure_max : IMX219_EXPOSURE_DEFAULT; 777 __v4l2_ctrl_modify_range(imx219->exposure, 778 imx219->exposure->minimum, 779 exposure_max, imx219->exposure->step, 780 exposure_def); 781 /* 782 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank 783 * depends on mode->width only, and is not changeble in any 784 * way other than changing the mode. 785 */ 786 hblank = IMX219_PPL_DEFAULT - mode->width; 787 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1, 788 hblank); 789 } 790 791 return 0; 792 } 793 794 static int imx219_set_framefmt(struct imx219 *imx219, 795 const struct v4l2_mbus_framefmt *format) 796 { 797 switch (format->code) { 798 case MEDIA_BUS_FMT_SRGGB8_1X8: 799 case MEDIA_BUS_FMT_SGRBG8_1X8: 800 case MEDIA_BUS_FMT_SGBRG8_1X8: 801 case MEDIA_BUS_FMT_SBGGR8_1X8: 802 return imx219_write_regs(imx219, raw8_framefmt_regs, 803 ARRAY_SIZE(raw8_framefmt_regs)); 804 805 case MEDIA_BUS_FMT_SRGGB10_1X10: 806 case MEDIA_BUS_FMT_SGRBG10_1X10: 807 case MEDIA_BUS_FMT_SGBRG10_1X10: 808 case MEDIA_BUS_FMT_SBGGR10_1X10: 809 return imx219_write_regs(imx219, raw10_framefmt_regs, 810 ARRAY_SIZE(raw10_framefmt_regs)); 811 } 812 813 return -EINVAL; 814 } 815 816 static int imx219_set_binning(struct imx219 *imx219, 817 const struct v4l2_mbus_framefmt *format) 818 { 819 if (!imx219->mode->binning) { 820 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE, 821 IMX219_REG_VALUE_16BIT, 822 IMX219_BINNING_NONE); 823 } 824 825 switch (format->code) { 826 case MEDIA_BUS_FMT_SRGGB8_1X8: 827 case MEDIA_BUS_FMT_SGRBG8_1X8: 828 case MEDIA_BUS_FMT_SGBRG8_1X8: 829 case MEDIA_BUS_FMT_SBGGR8_1X8: 830 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE, 831 IMX219_REG_VALUE_16BIT, 832 IMX219_BINNING_2X2_ANALOG); 833 834 case MEDIA_BUS_FMT_SRGGB10_1X10: 835 case MEDIA_BUS_FMT_SGRBG10_1X10: 836 case MEDIA_BUS_FMT_SGBRG10_1X10: 837 case MEDIA_BUS_FMT_SBGGR10_1X10: 838 return imx219_write_reg(imx219, IMX219_REG_BINNING_MODE, 839 IMX219_REG_VALUE_16BIT, 840 IMX219_BINNING_2X2); 841 } 842 843 return -EINVAL; 844 } 845 846 static int imx219_get_selection(struct v4l2_subdev *sd, 847 struct v4l2_subdev_state *sd_state, 848 struct v4l2_subdev_selection *sel) 849 { 850 switch (sel->target) { 851 case V4L2_SEL_TGT_CROP: { 852 sel->r = *v4l2_subdev_get_pad_crop(sd, sd_state, 0); 853 return 0; 854 } 855 856 case V4L2_SEL_TGT_NATIVE_SIZE: 857 sel->r.top = 0; 858 sel->r.left = 0; 859 sel->r.width = IMX219_NATIVE_WIDTH; 860 sel->r.height = IMX219_NATIVE_HEIGHT; 861 862 return 0; 863 864 case V4L2_SEL_TGT_CROP_DEFAULT: 865 case V4L2_SEL_TGT_CROP_BOUNDS: 866 sel->r.top = IMX219_PIXEL_ARRAY_TOP; 867 sel->r.left = IMX219_PIXEL_ARRAY_LEFT; 868 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH; 869 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT; 870 871 return 0; 872 } 873 874 return -EINVAL; 875 } 876 877 static int imx219_configure_lanes(struct imx219 *imx219) 878 { 879 return imx219_write_reg(imx219, IMX219_REG_CSI_LANE_MODE, 880 IMX219_REG_VALUE_08BIT, (imx219->lanes == 2) ? 881 IMX219_CSI_2_LANE_MODE : IMX219_CSI_4_LANE_MODE); 882 }; 883 884 static int imx219_start_streaming(struct imx219 *imx219, 885 struct v4l2_subdev_state *state) 886 { 887 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 888 const struct v4l2_mbus_framefmt *format; 889 const struct imx219_reg_list *reg_list; 890 int ret; 891 892 ret = pm_runtime_resume_and_get(&client->dev); 893 if (ret < 0) 894 return ret; 895 896 /* Send all registers that are common to all modes */ 897 ret = imx219_write_regs(imx219, imx219_common_regs, ARRAY_SIZE(imx219_common_regs)); 898 if (ret) { 899 dev_err(&client->dev, "%s failed to send mfg header\n", __func__); 900 goto err_rpm_put; 901 } 902 903 /* Configure two or four Lane mode */ 904 ret = imx219_configure_lanes(imx219); 905 if (ret) { 906 dev_err(&client->dev, "%s failed to configure lanes\n", __func__); 907 goto err_rpm_put; 908 } 909 910 /* Apply default values of current mode */ 911 reg_list = &imx219->mode->reg_list; 912 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs); 913 if (ret) { 914 dev_err(&client->dev, "%s failed to set mode\n", __func__); 915 goto err_rpm_put; 916 } 917 918 format = v4l2_subdev_get_pad_format(&imx219->sd, state, 0); 919 ret = imx219_set_framefmt(imx219, format); 920 if (ret) { 921 dev_err(&client->dev, "%s failed to set frame format: %d\n", 922 __func__, ret); 923 goto err_rpm_put; 924 } 925 926 ret = imx219_set_binning(imx219, format); 927 if (ret) { 928 dev_err(&client->dev, "%s failed to set binning: %d\n", 929 __func__, ret); 930 goto err_rpm_put; 931 } 932 933 /* Apply customized values from user */ 934 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler); 935 if (ret) 936 goto err_rpm_put; 937 938 /* set stream on register */ 939 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 940 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING); 941 if (ret) 942 goto err_rpm_put; 943 944 /* vflip and hflip cannot change during streaming */ 945 __v4l2_ctrl_grab(imx219->vflip, true); 946 __v4l2_ctrl_grab(imx219->hflip, true); 947 948 return 0; 949 950 err_rpm_put: 951 pm_runtime_put(&client->dev); 952 return ret; 953 } 954 955 static void imx219_stop_streaming(struct imx219 *imx219) 956 { 957 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 958 int ret; 959 960 /* set stream off register */ 961 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 962 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY); 963 if (ret) 964 dev_err(&client->dev, "%s failed to set stream\n", __func__); 965 966 __v4l2_ctrl_grab(imx219->vflip, false); 967 __v4l2_ctrl_grab(imx219->hflip, false); 968 969 pm_runtime_put(&client->dev); 970 } 971 972 static int imx219_set_stream(struct v4l2_subdev *sd, int enable) 973 { 974 struct imx219 *imx219 = to_imx219(sd); 975 struct v4l2_subdev_state *state; 976 int ret = 0; 977 978 state = v4l2_subdev_lock_and_get_active_state(sd); 979 980 if (enable) { 981 /* 982 * Apply default & customized values 983 * and then start streaming. 984 */ 985 ret = imx219_start_streaming(imx219, state); 986 if (ret) 987 goto unlock; 988 } else { 989 imx219_stop_streaming(imx219); 990 } 991 992 unlock: 993 v4l2_subdev_unlock_state(state); 994 return ret; 995 } 996 997 /* Power/clock management functions */ 998 static int imx219_power_on(struct device *dev) 999 { 1000 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1001 struct imx219 *imx219 = to_imx219(sd); 1002 int ret; 1003 1004 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES, 1005 imx219->supplies); 1006 if (ret) { 1007 dev_err(dev, "%s: failed to enable regulators\n", 1008 __func__); 1009 return ret; 1010 } 1011 1012 ret = clk_prepare_enable(imx219->xclk); 1013 if (ret) { 1014 dev_err(dev, "%s: failed to enable clock\n", 1015 __func__); 1016 goto reg_off; 1017 } 1018 1019 gpiod_set_value_cansleep(imx219->reset_gpio, 1); 1020 usleep_range(IMX219_XCLR_MIN_DELAY_US, 1021 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US); 1022 1023 return 0; 1024 1025 reg_off: 1026 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies); 1027 1028 return ret; 1029 } 1030 1031 static int imx219_power_off(struct device *dev) 1032 { 1033 struct v4l2_subdev *sd = dev_get_drvdata(dev); 1034 struct imx219 *imx219 = to_imx219(sd); 1035 1036 gpiod_set_value_cansleep(imx219->reset_gpio, 0); 1037 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies); 1038 clk_disable_unprepare(imx219->xclk); 1039 1040 return 0; 1041 } 1042 1043 static int imx219_get_regulators(struct imx219 *imx219) 1044 { 1045 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1046 unsigned int i; 1047 1048 for (i = 0; i < IMX219_NUM_SUPPLIES; i++) 1049 imx219->supplies[i].supply = imx219_supply_name[i]; 1050 1051 return devm_regulator_bulk_get(&client->dev, 1052 IMX219_NUM_SUPPLIES, 1053 imx219->supplies); 1054 } 1055 1056 /* Verify chip ID */ 1057 static int imx219_identify_module(struct imx219 *imx219) 1058 { 1059 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1060 int ret; 1061 u32 val; 1062 1063 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID, 1064 IMX219_REG_VALUE_16BIT, &val); 1065 if (ret) { 1066 dev_err(&client->dev, "failed to read chip id %x\n", 1067 IMX219_CHIP_ID); 1068 return ret; 1069 } 1070 1071 if (val != IMX219_CHIP_ID) { 1072 dev_err(&client->dev, "chip id mismatch: %x!=%x\n", 1073 IMX219_CHIP_ID, val); 1074 return -EIO; 1075 } 1076 1077 return 0; 1078 } 1079 1080 static const struct v4l2_subdev_core_ops imx219_core_ops = { 1081 .subscribe_event = v4l2_ctrl_subdev_subscribe_event, 1082 .unsubscribe_event = v4l2_event_subdev_unsubscribe, 1083 }; 1084 1085 static const struct v4l2_subdev_video_ops imx219_video_ops = { 1086 .s_stream = imx219_set_stream, 1087 }; 1088 1089 static const struct v4l2_subdev_pad_ops imx219_pad_ops = { 1090 .init_cfg = imx219_init_cfg, 1091 .enum_mbus_code = imx219_enum_mbus_code, 1092 .get_fmt = v4l2_subdev_get_fmt, 1093 .set_fmt = imx219_set_pad_format, 1094 .get_selection = imx219_get_selection, 1095 .enum_frame_size = imx219_enum_frame_size, 1096 }; 1097 1098 static const struct v4l2_subdev_ops imx219_subdev_ops = { 1099 .core = &imx219_core_ops, 1100 .video = &imx219_video_ops, 1101 .pad = &imx219_pad_ops, 1102 }; 1103 1104 1105 static unsigned long imx219_get_pixel_rate(struct imx219 *imx219) 1106 { 1107 return (imx219->lanes == 2) ? IMX219_PIXEL_RATE : IMX219_PIXEL_RATE_4LANE; 1108 } 1109 1110 /* Initialize control handlers */ 1111 static int imx219_init_controls(struct imx219 *imx219) 1112 { 1113 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd); 1114 struct v4l2_ctrl_handler *ctrl_hdlr; 1115 unsigned int height = imx219->mode->height; 1116 struct v4l2_fwnode_device_properties props; 1117 int exposure_max, exposure_def, hblank; 1118 int i, ret; 1119 1120 ctrl_hdlr = &imx219->ctrl_handler; 1121 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12); 1122 if (ret) 1123 return ret; 1124 1125 /* By default, PIXEL_RATE is read only */ 1126 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1127 V4L2_CID_PIXEL_RATE, 1128 imx219_get_pixel_rate(imx219), 1129 imx219_get_pixel_rate(imx219), 1, 1130 imx219_get_pixel_rate(imx219)); 1131 1132 imx219->link_freq = 1133 v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops, 1134 V4L2_CID_LINK_FREQ, 1135 ARRAY_SIZE(imx219_link_freq_menu) - 1, 0, 1136 (imx219->lanes == 2) ? imx219_link_freq_menu : 1137 imx219_link_freq_4lane_menu); 1138 if (imx219->link_freq) 1139 imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1140 1141 /* Initial vblank/hblank/exposure parameters based on current mode */ 1142 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1143 V4L2_CID_VBLANK, IMX219_VBLANK_MIN, 1144 IMX219_VTS_MAX - height, 1, 1145 imx219->mode->vts_def - height); 1146 hblank = IMX219_PPL_DEFAULT - imx219->mode->width; 1147 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1148 V4L2_CID_HBLANK, hblank, hblank, 1149 1, hblank); 1150 if (imx219->hblank) 1151 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 1152 exposure_max = imx219->mode->vts_def - 4; 1153 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ? 1154 exposure_max : IMX219_EXPOSURE_DEFAULT; 1155 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1156 V4L2_CID_EXPOSURE, 1157 IMX219_EXPOSURE_MIN, exposure_max, 1158 IMX219_EXPOSURE_STEP, 1159 exposure_def); 1160 1161 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 1162 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX, 1163 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT); 1164 1165 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN, 1166 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX, 1167 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT); 1168 1169 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1170 V4L2_CID_HFLIP, 0, 1, 1, 0); 1171 if (imx219->hflip) 1172 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 1173 1174 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1175 V4L2_CID_VFLIP, 0, 1, 1, 0); 1176 if (imx219->vflip) 1177 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 1178 1179 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops, 1180 V4L2_CID_TEST_PATTERN, 1181 ARRAY_SIZE(imx219_test_pattern_menu) - 1, 1182 0, 0, imx219_test_pattern_menu); 1183 for (i = 0; i < 4; i++) { 1184 /* 1185 * The assumption is that 1186 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1 1187 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2 1188 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3 1189 */ 1190 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, 1191 V4L2_CID_TEST_PATTERN_RED + i, 1192 IMX219_TESTP_COLOUR_MIN, 1193 IMX219_TESTP_COLOUR_MAX, 1194 IMX219_TESTP_COLOUR_STEP, 1195 IMX219_TESTP_COLOUR_MAX); 1196 /* The "Solid color" pattern is white by default */ 1197 } 1198 1199 if (ctrl_hdlr->error) { 1200 ret = ctrl_hdlr->error; 1201 dev_err(&client->dev, "%s control init failed (%d)\n", 1202 __func__, ret); 1203 goto error; 1204 } 1205 1206 ret = v4l2_fwnode_device_parse(&client->dev, &props); 1207 if (ret) 1208 goto error; 1209 1210 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops, 1211 &props); 1212 if (ret) 1213 goto error; 1214 1215 imx219->sd.ctrl_handler = ctrl_hdlr; 1216 1217 return 0; 1218 1219 error: 1220 v4l2_ctrl_handler_free(ctrl_hdlr); 1221 1222 return ret; 1223 } 1224 1225 static void imx219_free_controls(struct imx219 *imx219) 1226 { 1227 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler); 1228 } 1229 1230 static int imx219_check_hwcfg(struct device *dev, struct imx219 *imx219) 1231 { 1232 struct fwnode_handle *endpoint; 1233 struct v4l2_fwnode_endpoint ep_cfg = { 1234 .bus_type = V4L2_MBUS_CSI2_DPHY 1235 }; 1236 int ret = -EINVAL; 1237 1238 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL); 1239 if (!endpoint) { 1240 dev_err(dev, "endpoint node not found\n"); 1241 return -EINVAL; 1242 } 1243 1244 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) { 1245 dev_err(dev, "could not parse endpoint\n"); 1246 goto error_out; 1247 } 1248 1249 /* Check the number of MIPI CSI2 data lanes */ 1250 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2 && 1251 ep_cfg.bus.mipi_csi2.num_data_lanes != 4) { 1252 dev_err(dev, "only 2 or 4 data lanes are currently supported\n"); 1253 goto error_out; 1254 } 1255 imx219->lanes = ep_cfg.bus.mipi_csi2.num_data_lanes; 1256 1257 /* Check the link frequency set in device tree */ 1258 if (!ep_cfg.nr_of_link_frequencies) { 1259 dev_err(dev, "link-frequency property not found in DT\n"); 1260 goto error_out; 1261 } 1262 1263 if (ep_cfg.nr_of_link_frequencies != 1 || 1264 (ep_cfg.link_frequencies[0] != ((imx219->lanes == 2) ? 1265 IMX219_DEFAULT_LINK_FREQ : IMX219_DEFAULT_LINK_FREQ_4LANE))) { 1266 dev_err(dev, "Link frequency not supported: %lld\n", 1267 ep_cfg.link_frequencies[0]); 1268 goto error_out; 1269 } 1270 1271 ret = 0; 1272 1273 error_out: 1274 v4l2_fwnode_endpoint_free(&ep_cfg); 1275 fwnode_handle_put(endpoint); 1276 1277 return ret; 1278 } 1279 1280 static int imx219_probe(struct i2c_client *client) 1281 { 1282 struct device *dev = &client->dev; 1283 struct imx219 *imx219; 1284 int ret; 1285 1286 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL); 1287 if (!imx219) 1288 return -ENOMEM; 1289 1290 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops); 1291 1292 /* Check the hardware configuration in device tree */ 1293 if (imx219_check_hwcfg(dev, imx219)) 1294 return -EINVAL; 1295 1296 /* Get system clock (xclk) */ 1297 imx219->xclk = devm_clk_get(dev, NULL); 1298 if (IS_ERR(imx219->xclk)) { 1299 dev_err(dev, "failed to get xclk\n"); 1300 return PTR_ERR(imx219->xclk); 1301 } 1302 1303 imx219->xclk_freq = clk_get_rate(imx219->xclk); 1304 if (imx219->xclk_freq != IMX219_XCLK_FREQ) { 1305 dev_err(dev, "xclk frequency not supported: %d Hz\n", 1306 imx219->xclk_freq); 1307 return -EINVAL; 1308 } 1309 1310 ret = imx219_get_regulators(imx219); 1311 if (ret) { 1312 dev_err(dev, "failed to get regulators\n"); 1313 return ret; 1314 } 1315 1316 /* Request optional enable pin */ 1317 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset", 1318 GPIOD_OUT_HIGH); 1319 1320 /* 1321 * The sensor must be powered for imx219_identify_module() 1322 * to be able to read the CHIP_ID register 1323 */ 1324 ret = imx219_power_on(dev); 1325 if (ret) 1326 return ret; 1327 1328 ret = imx219_identify_module(imx219); 1329 if (ret) 1330 goto error_power_off; 1331 1332 /* Set default mode to max resolution */ 1333 imx219->mode = &supported_modes[0]; 1334 1335 /* sensor doesn't enter LP-11 state upon power up until and unless 1336 * streaming is started, so upon power up switch the modes to: 1337 * streaming -> standby 1338 */ 1339 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 1340 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING); 1341 if (ret < 0) 1342 goto error_power_off; 1343 usleep_range(100, 110); 1344 1345 /* put sensor back to standby mode */ 1346 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT, 1347 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY); 1348 if (ret < 0) 1349 goto error_power_off; 1350 usleep_range(100, 110); 1351 1352 ret = imx219_init_controls(imx219); 1353 if (ret) 1354 goto error_power_off; 1355 1356 /* Initialize subdev */ 1357 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 1358 V4L2_SUBDEV_FL_HAS_EVENTS; 1359 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1360 1361 /* Initialize source pad */ 1362 imx219->pad.flags = MEDIA_PAD_FL_SOURCE; 1363 1364 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad); 1365 if (ret) { 1366 dev_err(dev, "failed to init entity pads: %d\n", ret); 1367 goto error_handler_free; 1368 } 1369 1370 imx219->sd.state_lock = imx219->ctrl_handler.lock; 1371 ret = v4l2_subdev_init_finalize(&imx219->sd); 1372 if (ret < 0) { 1373 dev_err(dev, "subdev init error: %d\n", ret); 1374 goto error_media_entity; 1375 } 1376 1377 ret = v4l2_async_register_subdev_sensor(&imx219->sd); 1378 if (ret < 0) { 1379 dev_err(dev, "failed to register sensor sub-device: %d\n", ret); 1380 goto error_subdev_cleanup; 1381 } 1382 1383 /* Enable runtime PM and turn off the device */ 1384 pm_runtime_set_active(dev); 1385 pm_runtime_enable(dev); 1386 pm_runtime_idle(dev); 1387 1388 return 0; 1389 1390 error_subdev_cleanup: 1391 v4l2_subdev_cleanup(&imx219->sd); 1392 1393 error_media_entity: 1394 media_entity_cleanup(&imx219->sd.entity); 1395 1396 error_handler_free: 1397 imx219_free_controls(imx219); 1398 1399 error_power_off: 1400 imx219_power_off(dev); 1401 1402 return ret; 1403 } 1404 1405 static void imx219_remove(struct i2c_client *client) 1406 { 1407 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1408 struct imx219 *imx219 = to_imx219(sd); 1409 1410 v4l2_async_unregister_subdev(sd); 1411 v4l2_subdev_cleanup(sd); 1412 media_entity_cleanup(&sd->entity); 1413 imx219_free_controls(imx219); 1414 1415 pm_runtime_disable(&client->dev); 1416 if (!pm_runtime_status_suspended(&client->dev)) 1417 imx219_power_off(&client->dev); 1418 pm_runtime_set_suspended(&client->dev); 1419 } 1420 1421 static const struct of_device_id imx219_dt_ids[] = { 1422 { .compatible = "sony,imx219" }, 1423 { /* sentinel */ } 1424 }; 1425 MODULE_DEVICE_TABLE(of, imx219_dt_ids); 1426 1427 static const struct dev_pm_ops imx219_pm_ops = { 1428 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL) 1429 }; 1430 1431 static struct i2c_driver imx219_i2c_driver = { 1432 .driver = { 1433 .name = "imx219", 1434 .of_match_table = imx219_dt_ids, 1435 .pm = &imx219_pm_ops, 1436 }, 1437 .probe = imx219_probe, 1438 .remove = imx219_remove, 1439 }; 1440 1441 module_i2c_driver(imx219_i2c_driver); 1442 1443 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com"); 1444 MODULE_DESCRIPTION("Sony IMX219 sensor driver"); 1445 MODULE_LICENSE("GPL v2"); 1446