1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2021 Intel Corporation 3 4 #include <linux/acpi.h> 5 #include <linux/delay.h> 6 #include <linux/i2c.h> 7 #include <linux/module.h> 8 #include <linux/pm_runtime.h> 9 #include <media/v4l2-ctrls.h> 10 #include <media/v4l2-device.h> 11 #include <asm/unaligned.h> 12 13 #define IMX208_REG_MODE_SELECT 0x0100 14 #define IMX208_MODE_STANDBY 0x00 15 #define IMX208_MODE_STREAMING 0x01 16 17 /* Chip ID */ 18 #define IMX208_REG_CHIP_ID 0x0000 19 #define IMX208_CHIP_ID 0x0208 20 21 /* V_TIMING internal */ 22 #define IMX208_REG_VTS 0x0340 23 #define IMX208_VTS_60FPS 0x0472 24 #define IMX208_VTS_BINNING 0x0239 25 #define IMX208_VTS_60FPS_MIN 0x0458 26 #define IMX208_VTS_BINNING_MIN 0x0230 27 #define IMX208_VTS_MAX 0xffff 28 29 /* HBLANK control - read only */ 30 #define IMX208_PPL_384MHZ 2248 31 #define IMX208_PPL_96MHZ 2248 32 33 /* Exposure control */ 34 #define IMX208_REG_EXPOSURE 0x0202 35 #define IMX208_EXPOSURE_MIN 4 36 #define IMX208_EXPOSURE_STEP 1 37 #define IMX208_EXPOSURE_DEFAULT 0x190 38 #define IMX208_EXPOSURE_MAX 65535 39 40 /* Analog gain control */ 41 #define IMX208_REG_ANALOG_GAIN 0x0204 42 #define IMX208_ANA_GAIN_MIN 0 43 #define IMX208_ANA_GAIN_MAX 0x00e0 44 #define IMX208_ANA_GAIN_STEP 1 45 #define IMX208_ANA_GAIN_DEFAULT 0x0 46 47 /* Digital gain control */ 48 #define IMX208_REG_GR_DIGITAL_GAIN 0x020e 49 #define IMX208_REG_R_DIGITAL_GAIN 0x0210 50 #define IMX208_REG_B_DIGITAL_GAIN 0x0212 51 #define IMX208_REG_GB_DIGITAL_GAIN 0x0214 52 #define IMX208_DIGITAL_GAIN_SHIFT 8 53 54 /* Orientation */ 55 #define IMX208_REG_ORIENTATION_CONTROL 0x0101 56 57 /* Test Pattern Control */ 58 #define IMX208_REG_TEST_PATTERN_MODE 0x0600 59 #define IMX208_TEST_PATTERN_DISABLE 0x0 60 #define IMX208_TEST_PATTERN_SOLID_COLOR 0x1 61 #define IMX208_TEST_PATTERN_COLOR_BARS 0x2 62 #define IMX208_TEST_PATTERN_GREY_COLOR 0x3 63 #define IMX208_TEST_PATTERN_PN9 0x4 64 #define IMX208_TEST_PATTERN_FIX_1 0x100 65 #define IMX208_TEST_PATTERN_FIX_2 0x101 66 #define IMX208_TEST_PATTERN_FIX_3 0x102 67 #define IMX208_TEST_PATTERN_FIX_4 0x103 68 #define IMX208_TEST_PATTERN_FIX_5 0x104 69 #define IMX208_TEST_PATTERN_FIX_6 0x105 70 71 /* OTP Access */ 72 #define IMX208_OTP_BASE 0x3500 73 #define IMX208_OTP_SIZE 40 74 75 struct imx208_reg { 76 u16 address; 77 u8 val; 78 }; 79 80 struct imx208_reg_list { 81 u32 num_of_regs; 82 const struct imx208_reg *regs; 83 }; 84 85 /* Link frequency config */ 86 struct imx208_link_freq_config { 87 u32 pixels_per_line; 88 89 /* PLL registers for this link frequency */ 90 struct imx208_reg_list reg_list; 91 }; 92 93 /* Mode : resolution and related config&values */ 94 struct imx208_mode { 95 /* Frame width */ 96 u32 width; 97 /* Frame height */ 98 u32 height; 99 100 /* V-timing */ 101 u32 vts_def; 102 u32 vts_min; 103 104 /* Index of Link frequency config to be used */ 105 u32 link_freq_index; 106 /* Default register values */ 107 struct imx208_reg_list reg_list; 108 }; 109 110 static const struct imx208_reg pll_ctrl_reg[] = { 111 {0x0305, 0x02}, 112 {0x0307, 0x50}, 113 {0x303C, 0x3C}, 114 }; 115 116 static const struct imx208_reg mode_1936x1096_60fps_regs[] = { 117 {0x0340, 0x04}, 118 {0x0341, 0x72}, 119 {0x0342, 0x04}, 120 {0x0343, 0x64}, 121 {0x034C, 0x07}, 122 {0x034D, 0x90}, 123 {0x034E, 0x04}, 124 {0x034F, 0x48}, 125 {0x0381, 0x01}, 126 {0x0383, 0x01}, 127 {0x0385, 0x01}, 128 {0x0387, 0x01}, 129 {0x3048, 0x00}, 130 {0x3050, 0x01}, 131 {0x30D5, 0x00}, 132 {0x3301, 0x00}, 133 {0x3318, 0x62}, 134 {0x0202, 0x01}, 135 {0x0203, 0x90}, 136 {0x0205, 0x00}, 137 }; 138 139 static const struct imx208_reg mode_968_548_60fps_regs[] = { 140 {0x0340, 0x02}, 141 {0x0341, 0x39}, 142 {0x0342, 0x08}, 143 {0x0343, 0xC8}, 144 {0x034C, 0x03}, 145 {0x034D, 0xC8}, 146 {0x034E, 0x02}, 147 {0x034F, 0x24}, 148 {0x0381, 0x01}, 149 {0x0383, 0x03}, 150 {0x0385, 0x01}, 151 {0x0387, 0x03}, 152 {0x3048, 0x01}, 153 {0x3050, 0x02}, 154 {0x30D5, 0x03}, 155 {0x3301, 0x10}, 156 {0x3318, 0x75}, 157 {0x0202, 0x01}, 158 {0x0203, 0x90}, 159 {0x0205, 0x00}, 160 }; 161 162 static const s64 imx208_discrete_digital_gain[] = { 163 1, 2, 4, 8, 16, 164 }; 165 166 static const char * const imx208_test_pattern_menu[] = { 167 "Disabled", 168 "Solid Color", 169 "100% Color Bar", 170 "Fade to Grey Color Bar", 171 "PN9", 172 "Fixed Pattern1", 173 "Fixed Pattern2", 174 "Fixed Pattern3", 175 "Fixed Pattern4", 176 "Fixed Pattern5", 177 "Fixed Pattern6" 178 }; 179 180 static const int imx208_test_pattern_val[] = { 181 IMX208_TEST_PATTERN_DISABLE, 182 IMX208_TEST_PATTERN_SOLID_COLOR, 183 IMX208_TEST_PATTERN_COLOR_BARS, 184 IMX208_TEST_PATTERN_GREY_COLOR, 185 IMX208_TEST_PATTERN_PN9, 186 IMX208_TEST_PATTERN_FIX_1, 187 IMX208_TEST_PATTERN_FIX_2, 188 IMX208_TEST_PATTERN_FIX_3, 189 IMX208_TEST_PATTERN_FIX_4, 190 IMX208_TEST_PATTERN_FIX_5, 191 IMX208_TEST_PATTERN_FIX_6, 192 }; 193 194 /* Configurations for supported link frequencies */ 195 #define IMX208_MHZ (1000 * 1000ULL) 196 #define IMX208_LINK_FREQ_384MHZ (384ULL * IMX208_MHZ) 197 #define IMX208_LINK_FREQ_96MHZ (96ULL * IMX208_MHZ) 198 199 #define IMX208_DATA_RATE_DOUBLE 2 200 #define IMX208_NUM_OF_LANES 2 201 #define IMX208_PIXEL_BITS 10 202 203 enum { 204 IMX208_LINK_FREQ_384MHZ_INDEX, 205 IMX208_LINK_FREQ_96MHZ_INDEX, 206 }; 207 208 /* 209 * pixel_rate = link_freq * data-rate * nr_of_lanes / bits_per_sample 210 * data rate => double data rate; number of lanes => 2; bits per pixel => 10 211 */ 212 static u64 link_freq_to_pixel_rate(u64 f) 213 { 214 f *= IMX208_DATA_RATE_DOUBLE * IMX208_NUM_OF_LANES; 215 do_div(f, IMX208_PIXEL_BITS); 216 217 return f; 218 } 219 220 /* Menu items for LINK_FREQ V4L2 control */ 221 static const s64 link_freq_menu_items[] = { 222 [IMX208_LINK_FREQ_384MHZ_INDEX] = IMX208_LINK_FREQ_384MHZ, 223 [IMX208_LINK_FREQ_96MHZ_INDEX] = IMX208_LINK_FREQ_96MHZ, 224 }; 225 226 /* Link frequency configs */ 227 static const struct imx208_link_freq_config link_freq_configs[] = { 228 [IMX208_LINK_FREQ_384MHZ_INDEX] = { 229 .pixels_per_line = IMX208_PPL_384MHZ, 230 .reg_list = { 231 .num_of_regs = ARRAY_SIZE(pll_ctrl_reg), 232 .regs = pll_ctrl_reg, 233 } 234 }, 235 [IMX208_LINK_FREQ_96MHZ_INDEX] = { 236 .pixels_per_line = IMX208_PPL_96MHZ, 237 .reg_list = { 238 .num_of_regs = ARRAY_SIZE(pll_ctrl_reg), 239 .regs = pll_ctrl_reg, 240 } 241 }, 242 }; 243 244 /* Mode configs */ 245 static const struct imx208_mode supported_modes[] = { 246 { 247 .width = 1936, 248 .height = 1096, 249 .vts_def = IMX208_VTS_60FPS, 250 .vts_min = IMX208_VTS_60FPS_MIN, 251 .reg_list = { 252 .num_of_regs = ARRAY_SIZE(mode_1936x1096_60fps_regs), 253 .regs = mode_1936x1096_60fps_regs, 254 }, 255 .link_freq_index = IMX208_LINK_FREQ_384MHZ_INDEX, 256 }, 257 { 258 .width = 968, 259 .height = 548, 260 .vts_def = IMX208_VTS_BINNING, 261 .vts_min = IMX208_VTS_BINNING_MIN, 262 .reg_list = { 263 .num_of_regs = ARRAY_SIZE(mode_968_548_60fps_regs), 264 .regs = mode_968_548_60fps_regs, 265 }, 266 .link_freq_index = IMX208_LINK_FREQ_96MHZ_INDEX, 267 }, 268 }; 269 270 struct imx208 { 271 struct v4l2_subdev sd; 272 struct media_pad pad; 273 274 struct v4l2_ctrl_handler ctrl_handler; 275 /* V4L2 Controls */ 276 struct v4l2_ctrl *link_freq; 277 struct v4l2_ctrl *pixel_rate; 278 struct v4l2_ctrl *vblank; 279 struct v4l2_ctrl *hblank; 280 struct v4l2_ctrl *vflip; 281 struct v4l2_ctrl *hflip; 282 283 /* Current mode */ 284 const struct imx208_mode *cur_mode; 285 286 /* 287 * Mutex for serialized access: 288 * Protect sensor set pad format and start/stop streaming safely. 289 * Protect access to sensor v4l2 controls. 290 */ 291 struct mutex imx208_mx; 292 293 /* OTP data */ 294 bool otp_read; 295 char otp_data[IMX208_OTP_SIZE]; 296 297 /* True if the device has been identified */ 298 bool identified; 299 }; 300 301 static inline struct imx208 *to_imx208(struct v4l2_subdev *_sd) 302 { 303 return container_of(_sd, struct imx208, sd); 304 } 305 306 /* Get bayer order based on flip setting. */ 307 static u32 imx208_get_format_code(struct imx208 *imx208) 308 { 309 /* 310 * Only one bayer order is supported. 311 * It depends on the flip settings. 312 */ 313 static const u32 codes[2][2] = { 314 { MEDIA_BUS_FMT_SRGGB10_1X10, MEDIA_BUS_FMT_SGRBG10_1X10, }, 315 { MEDIA_BUS_FMT_SGBRG10_1X10, MEDIA_BUS_FMT_SBGGR10_1X10, }, 316 }; 317 318 return codes[imx208->vflip->val][imx208->hflip->val]; 319 } 320 321 /* Read registers up to 4 at a time */ 322 static int imx208_read_reg(struct imx208 *imx208, u16 reg, u32 len, u32 *val) 323 { 324 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 325 struct i2c_msg msgs[2]; 326 u8 addr_buf[2] = { reg >> 8, reg & 0xff }; 327 u8 data_buf[4] = { 0, }; 328 int ret; 329 330 if (len > 4) 331 return -EINVAL; 332 333 /* Write register address */ 334 msgs[0].addr = client->addr; 335 msgs[0].flags = 0; 336 msgs[0].len = ARRAY_SIZE(addr_buf); 337 msgs[0].buf = addr_buf; 338 339 /* Read data from register */ 340 msgs[1].addr = client->addr; 341 msgs[1].flags = I2C_M_RD; 342 msgs[1].len = len; 343 msgs[1].buf = &data_buf[4 - len]; 344 345 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 346 if (ret != ARRAY_SIZE(msgs)) 347 return -EIO; 348 349 *val = get_unaligned_be32(data_buf); 350 351 return 0; 352 } 353 354 /* Write registers up to 4 at a time */ 355 static int imx208_write_reg(struct imx208 *imx208, u16 reg, u32 len, u32 val) 356 { 357 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 358 u8 buf[6]; 359 360 if (len > 4) 361 return -EINVAL; 362 363 put_unaligned_be16(reg, buf); 364 put_unaligned_be32(val << (8 * (4 - len)), buf + 2); 365 if (i2c_master_send(client, buf, len + 2) != len + 2) 366 return -EIO; 367 368 return 0; 369 } 370 371 /* Write a list of registers */ 372 static int imx208_write_regs(struct imx208 *imx208, 373 const struct imx208_reg *regs, u32 len) 374 { 375 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 376 unsigned int i; 377 int ret; 378 379 for (i = 0; i < len; i++) { 380 ret = imx208_write_reg(imx208, regs[i].address, 1, 381 regs[i].val); 382 if (ret) { 383 dev_err_ratelimited(&client->dev, 384 "Failed to write reg 0x%4.4x. error = %d\n", 385 regs[i].address, ret); 386 387 return ret; 388 } 389 } 390 391 return 0; 392 } 393 394 /* Open sub-device */ 395 static int imx208_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh) 396 { 397 struct v4l2_mbus_framefmt *try_fmt = 398 v4l2_subdev_get_try_format(sd, fh->state, 0); 399 400 /* Initialize try_fmt */ 401 try_fmt->width = supported_modes[0].width; 402 try_fmt->height = supported_modes[0].height; 403 try_fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10; 404 try_fmt->field = V4L2_FIELD_NONE; 405 406 return 0; 407 } 408 409 static int imx208_update_digital_gain(struct imx208 *imx208, u32 len, u32 val) 410 { 411 int ret; 412 413 val = imx208_discrete_digital_gain[val] << IMX208_DIGITAL_GAIN_SHIFT; 414 415 ret = imx208_write_reg(imx208, IMX208_REG_GR_DIGITAL_GAIN, 2, val); 416 if (ret) 417 return ret; 418 419 ret = imx208_write_reg(imx208, IMX208_REG_GB_DIGITAL_GAIN, 2, val); 420 if (ret) 421 return ret; 422 423 ret = imx208_write_reg(imx208, IMX208_REG_R_DIGITAL_GAIN, 2, val); 424 if (ret) 425 return ret; 426 427 return imx208_write_reg(imx208, IMX208_REG_B_DIGITAL_GAIN, 2, val); 428 } 429 430 static int imx208_set_ctrl(struct v4l2_ctrl *ctrl) 431 { 432 struct imx208 *imx208 = 433 container_of(ctrl->handler, struct imx208, ctrl_handler); 434 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 435 int ret; 436 437 /* 438 * Applying V4L2 control value only happens 439 * when power is up for streaming 440 */ 441 if (!pm_runtime_get_if_in_use(&client->dev)) 442 return 0; 443 444 switch (ctrl->id) { 445 case V4L2_CID_ANALOGUE_GAIN: 446 ret = imx208_write_reg(imx208, IMX208_REG_ANALOG_GAIN, 447 2, ctrl->val); 448 break; 449 case V4L2_CID_EXPOSURE: 450 ret = imx208_write_reg(imx208, IMX208_REG_EXPOSURE, 451 2, ctrl->val); 452 break; 453 case V4L2_CID_DIGITAL_GAIN: 454 ret = imx208_update_digital_gain(imx208, 2, ctrl->val); 455 break; 456 case V4L2_CID_VBLANK: 457 /* Update VTS that meets expected vertical blanking */ 458 ret = imx208_write_reg(imx208, IMX208_REG_VTS, 2, 459 imx208->cur_mode->height + ctrl->val); 460 break; 461 case V4L2_CID_TEST_PATTERN: 462 ret = imx208_write_reg(imx208, IMX208_REG_TEST_PATTERN_MODE, 463 2, imx208_test_pattern_val[ctrl->val]); 464 break; 465 case V4L2_CID_HFLIP: 466 case V4L2_CID_VFLIP: 467 ret = imx208_write_reg(imx208, IMX208_REG_ORIENTATION_CONTROL, 468 1, 469 imx208->hflip->val | 470 imx208->vflip->val << 1); 471 break; 472 default: 473 ret = -EINVAL; 474 dev_err(&client->dev, 475 "ctrl(id:0x%x,val:0x%x) is not handled\n", 476 ctrl->id, ctrl->val); 477 break; 478 } 479 480 pm_runtime_put(&client->dev); 481 482 return ret; 483 } 484 485 static const struct v4l2_ctrl_ops imx208_ctrl_ops = { 486 .s_ctrl = imx208_set_ctrl, 487 }; 488 489 static const struct v4l2_ctrl_config imx208_digital_gain_control = { 490 .ops = &imx208_ctrl_ops, 491 .id = V4L2_CID_DIGITAL_GAIN, 492 .name = "Digital Gain", 493 .type = V4L2_CTRL_TYPE_INTEGER_MENU, 494 .min = 0, 495 .max = ARRAY_SIZE(imx208_discrete_digital_gain) - 1, 496 .step = 0, 497 .def = 0, 498 .menu_skip_mask = 0, 499 .qmenu_int = imx208_discrete_digital_gain, 500 }; 501 502 static int imx208_enum_mbus_code(struct v4l2_subdev *sd, 503 struct v4l2_subdev_state *sd_state, 504 struct v4l2_subdev_mbus_code_enum *code) 505 { 506 struct imx208 *imx208 = to_imx208(sd); 507 508 if (code->index > 0) 509 return -EINVAL; 510 511 code->code = imx208_get_format_code(imx208); 512 513 return 0; 514 } 515 516 static int imx208_enum_frame_size(struct v4l2_subdev *sd, 517 struct v4l2_subdev_state *sd_state, 518 struct v4l2_subdev_frame_size_enum *fse) 519 { 520 struct imx208 *imx208 = to_imx208(sd); 521 522 if (fse->index >= ARRAY_SIZE(supported_modes)) 523 return -EINVAL; 524 525 if (fse->code != imx208_get_format_code(imx208)) 526 return -EINVAL; 527 528 fse->min_width = supported_modes[fse->index].width; 529 fse->max_width = fse->min_width; 530 fse->min_height = supported_modes[fse->index].height; 531 fse->max_height = fse->min_height; 532 533 return 0; 534 } 535 536 static void imx208_mode_to_pad_format(struct imx208 *imx208, 537 const struct imx208_mode *mode, 538 struct v4l2_subdev_format *fmt) 539 { 540 fmt->format.width = mode->width; 541 fmt->format.height = mode->height; 542 fmt->format.code = imx208_get_format_code(imx208); 543 fmt->format.field = V4L2_FIELD_NONE; 544 } 545 546 static int __imx208_get_pad_format(struct imx208 *imx208, 547 struct v4l2_subdev_state *sd_state, 548 struct v4l2_subdev_format *fmt) 549 { 550 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) 551 fmt->format = *v4l2_subdev_get_try_format(&imx208->sd, 552 sd_state, 553 fmt->pad); 554 else 555 imx208_mode_to_pad_format(imx208, imx208->cur_mode, fmt); 556 557 return 0; 558 } 559 560 static int imx208_get_pad_format(struct v4l2_subdev *sd, 561 struct v4l2_subdev_state *sd_state, 562 struct v4l2_subdev_format *fmt) 563 { 564 struct imx208 *imx208 = to_imx208(sd); 565 int ret; 566 567 mutex_lock(&imx208->imx208_mx); 568 ret = __imx208_get_pad_format(imx208, sd_state, fmt); 569 mutex_unlock(&imx208->imx208_mx); 570 571 return ret; 572 } 573 574 static int imx208_set_pad_format(struct v4l2_subdev *sd, 575 struct v4l2_subdev_state *sd_state, 576 struct v4l2_subdev_format *fmt) 577 { 578 struct imx208 *imx208 = to_imx208(sd); 579 const struct imx208_mode *mode; 580 s32 vblank_def; 581 s32 vblank_min; 582 s64 h_blank; 583 s64 pixel_rate; 584 s64 link_freq; 585 586 mutex_lock(&imx208->imx208_mx); 587 588 fmt->format.code = imx208_get_format_code(imx208); 589 mode = v4l2_find_nearest_size(supported_modes, 590 ARRAY_SIZE(supported_modes), width, height, 591 fmt->format.width, fmt->format.height); 592 imx208_mode_to_pad_format(imx208, mode, fmt); 593 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) { 594 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format; 595 } else { 596 imx208->cur_mode = mode; 597 __v4l2_ctrl_s_ctrl(imx208->link_freq, mode->link_freq_index); 598 link_freq = link_freq_menu_items[mode->link_freq_index]; 599 pixel_rate = link_freq_to_pixel_rate(link_freq); 600 __v4l2_ctrl_s_ctrl_int64(imx208->pixel_rate, pixel_rate); 601 /* Update limits and set FPS to default */ 602 vblank_def = imx208->cur_mode->vts_def - 603 imx208->cur_mode->height; 604 vblank_min = imx208->cur_mode->vts_min - 605 imx208->cur_mode->height; 606 __v4l2_ctrl_modify_range(imx208->vblank, vblank_min, 607 IMX208_VTS_MAX - imx208->cur_mode->height, 608 1, vblank_def); 609 __v4l2_ctrl_s_ctrl(imx208->vblank, vblank_def); 610 h_blank = 611 link_freq_configs[mode->link_freq_index].pixels_per_line 612 - imx208->cur_mode->width; 613 __v4l2_ctrl_modify_range(imx208->hblank, h_blank, 614 h_blank, 1, h_blank); 615 } 616 617 mutex_unlock(&imx208->imx208_mx); 618 619 return 0; 620 } 621 622 static int imx208_identify_module(struct imx208 *imx208) 623 { 624 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 625 int ret; 626 u32 val; 627 628 if (imx208->identified) 629 return 0; 630 631 ret = imx208_read_reg(imx208, IMX208_REG_CHIP_ID, 632 2, &val); 633 if (ret) { 634 dev_err(&client->dev, "failed to read chip id %x\n", 635 IMX208_CHIP_ID); 636 return ret; 637 } 638 639 if (val != IMX208_CHIP_ID) { 640 dev_err(&client->dev, "chip id mismatch: %x!=%x\n", 641 IMX208_CHIP_ID, val); 642 return -EIO; 643 } 644 645 imx208->identified = true; 646 647 return 0; 648 } 649 650 /* Start streaming */ 651 static int imx208_start_streaming(struct imx208 *imx208) 652 { 653 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 654 const struct imx208_reg_list *reg_list; 655 int ret, link_freq_index; 656 657 ret = imx208_identify_module(imx208); 658 if (ret) 659 return ret; 660 661 /* Setup PLL */ 662 link_freq_index = imx208->cur_mode->link_freq_index; 663 reg_list = &link_freq_configs[link_freq_index].reg_list; 664 ret = imx208_write_regs(imx208, reg_list->regs, reg_list->num_of_regs); 665 if (ret) { 666 dev_err(&client->dev, "%s failed to set plls\n", __func__); 667 return ret; 668 } 669 670 /* Apply default values of current mode */ 671 reg_list = &imx208->cur_mode->reg_list; 672 ret = imx208_write_regs(imx208, reg_list->regs, reg_list->num_of_regs); 673 if (ret) { 674 dev_err(&client->dev, "%s failed to set mode\n", __func__); 675 return ret; 676 } 677 678 /* Apply customized values from user */ 679 ret = __v4l2_ctrl_handler_setup(imx208->sd.ctrl_handler); 680 if (ret) 681 return ret; 682 683 /* set stream on register */ 684 return imx208_write_reg(imx208, IMX208_REG_MODE_SELECT, 685 1, IMX208_MODE_STREAMING); 686 } 687 688 /* Stop streaming */ 689 static int imx208_stop_streaming(struct imx208 *imx208) 690 { 691 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 692 int ret; 693 694 /* set stream off register */ 695 ret = imx208_write_reg(imx208, IMX208_REG_MODE_SELECT, 696 1, IMX208_MODE_STANDBY); 697 if (ret) 698 dev_err(&client->dev, "%s failed to set stream\n", __func__); 699 700 /* 701 * Return success even if it was an error, as there is nothing the 702 * caller can do about it. 703 */ 704 return 0; 705 } 706 707 static int imx208_set_stream(struct v4l2_subdev *sd, int enable) 708 { 709 struct imx208 *imx208 = to_imx208(sd); 710 struct i2c_client *client = v4l2_get_subdevdata(sd); 711 int ret = 0; 712 713 mutex_lock(&imx208->imx208_mx); 714 715 if (enable) { 716 ret = pm_runtime_resume_and_get(&client->dev); 717 if (ret) { 718 mutex_unlock(&imx208->imx208_mx); 719 return ret; 720 } 721 722 /* 723 * Apply default & customized values 724 * and then start streaming. 725 */ 726 ret = imx208_start_streaming(imx208); 727 if (ret) 728 goto err_rpm_put; 729 } else { 730 imx208_stop_streaming(imx208); 731 pm_runtime_put(&client->dev); 732 } 733 734 mutex_unlock(&imx208->imx208_mx); 735 736 /* vflip and hflip cannot change during streaming */ 737 v4l2_ctrl_grab(imx208->vflip, enable); 738 v4l2_ctrl_grab(imx208->hflip, enable); 739 740 return ret; 741 742 err_rpm_put: 743 pm_runtime_put(&client->dev); 744 mutex_unlock(&imx208->imx208_mx); 745 746 return ret; 747 } 748 749 /* Verify chip ID */ 750 static const struct v4l2_subdev_video_ops imx208_video_ops = { 751 .s_stream = imx208_set_stream, 752 }; 753 754 static const struct v4l2_subdev_pad_ops imx208_pad_ops = { 755 .enum_mbus_code = imx208_enum_mbus_code, 756 .get_fmt = imx208_get_pad_format, 757 .set_fmt = imx208_set_pad_format, 758 .enum_frame_size = imx208_enum_frame_size, 759 }; 760 761 static const struct v4l2_subdev_ops imx208_subdev_ops = { 762 .video = &imx208_video_ops, 763 .pad = &imx208_pad_ops, 764 }; 765 766 static const struct v4l2_subdev_internal_ops imx208_internal_ops = { 767 .open = imx208_open, 768 }; 769 770 static int imx208_read_otp(struct imx208 *imx208) 771 { 772 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 773 struct i2c_msg msgs[2]; 774 u8 addr_buf[2] = { IMX208_OTP_BASE >> 8, IMX208_OTP_BASE & 0xff }; 775 int ret = 0; 776 777 mutex_lock(&imx208->imx208_mx); 778 779 if (imx208->otp_read) 780 goto out_unlock; 781 782 ret = pm_runtime_resume_and_get(&client->dev); 783 if (ret) 784 goto out_unlock; 785 786 ret = imx208_identify_module(imx208); 787 if (ret) 788 goto out_pm_put; 789 790 /* Write register address */ 791 msgs[0].addr = client->addr; 792 msgs[0].flags = 0; 793 msgs[0].len = ARRAY_SIZE(addr_buf); 794 msgs[0].buf = addr_buf; 795 796 /* Read data from registers */ 797 msgs[1].addr = client->addr; 798 msgs[1].flags = I2C_M_RD; 799 msgs[1].len = sizeof(imx208->otp_data); 800 msgs[1].buf = imx208->otp_data; 801 802 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); 803 if (ret == ARRAY_SIZE(msgs)) { 804 imx208->otp_read = true; 805 ret = 0; 806 } 807 808 out_pm_put: 809 pm_runtime_put(&client->dev); 810 811 out_unlock: 812 mutex_unlock(&imx208->imx208_mx); 813 814 return ret; 815 } 816 817 static ssize_t otp_read(struct file *filp, struct kobject *kobj, 818 struct bin_attribute *bin_attr, 819 char *buf, loff_t off, size_t count) 820 { 821 struct i2c_client *client = to_i2c_client(kobj_to_dev(kobj)); 822 struct v4l2_subdev *sd = i2c_get_clientdata(client); 823 struct imx208 *imx208 = to_imx208(sd); 824 int ret; 825 826 ret = imx208_read_otp(imx208); 827 if (ret) 828 return ret; 829 830 memcpy(buf, &imx208->otp_data[off], count); 831 return count; 832 } 833 834 static const BIN_ATTR_RO(otp, IMX208_OTP_SIZE); 835 836 /* Initialize control handlers */ 837 static int imx208_init_controls(struct imx208 *imx208) 838 { 839 struct i2c_client *client = v4l2_get_subdevdata(&imx208->sd); 840 struct v4l2_ctrl_handler *ctrl_hdlr = &imx208->ctrl_handler; 841 s64 exposure_max; 842 s64 vblank_def; 843 s64 vblank_min; 844 s64 pixel_rate_min; 845 s64 pixel_rate_max; 846 int ret; 847 848 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8); 849 if (ret) 850 return ret; 851 852 mutex_init(&imx208->imx208_mx); 853 ctrl_hdlr->lock = &imx208->imx208_mx; 854 imx208->link_freq = 855 v4l2_ctrl_new_int_menu(ctrl_hdlr, 856 &imx208_ctrl_ops, 857 V4L2_CID_LINK_FREQ, 858 ARRAY_SIZE(link_freq_menu_items) - 1, 859 0, link_freq_menu_items); 860 861 if (imx208->link_freq) 862 imx208->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 863 864 pixel_rate_max = link_freq_to_pixel_rate(link_freq_menu_items[0]); 865 pixel_rate_min = 866 link_freq_to_pixel_rate(link_freq_menu_items[ARRAY_SIZE(link_freq_menu_items) - 1]); 867 /* By default, PIXEL_RATE is read only */ 868 imx208->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, 869 V4L2_CID_PIXEL_RATE, 870 pixel_rate_min, pixel_rate_max, 871 1, pixel_rate_max); 872 873 vblank_def = imx208->cur_mode->vts_def - imx208->cur_mode->height; 874 vblank_min = imx208->cur_mode->vts_min - imx208->cur_mode->height; 875 imx208->vblank = 876 v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, V4L2_CID_VBLANK, 877 vblank_min, 878 IMX208_VTS_MAX - imx208->cur_mode->height, 1, 879 vblank_def); 880 881 imx208->hblank = 882 v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, V4L2_CID_HBLANK, 883 IMX208_PPL_384MHZ - imx208->cur_mode->width, 884 IMX208_PPL_384MHZ - imx208->cur_mode->width, 885 1, 886 IMX208_PPL_384MHZ - imx208->cur_mode->width); 887 888 if (imx208->hblank) 889 imx208->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 890 891 exposure_max = imx208->cur_mode->vts_def - 8; 892 v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, V4L2_CID_EXPOSURE, 893 IMX208_EXPOSURE_MIN, exposure_max, 894 IMX208_EXPOSURE_STEP, IMX208_EXPOSURE_DEFAULT); 895 896 imx208->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, 897 V4L2_CID_HFLIP, 0, 1, 1, 0); 898 if (imx208->hflip) 899 imx208->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 900 imx208->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, 901 V4L2_CID_VFLIP, 0, 1, 1, 0); 902 if (imx208->vflip) 903 imx208->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 904 905 v4l2_ctrl_new_std(ctrl_hdlr, &imx208_ctrl_ops, V4L2_CID_ANALOGUE_GAIN, 906 IMX208_ANA_GAIN_MIN, IMX208_ANA_GAIN_MAX, 907 IMX208_ANA_GAIN_STEP, IMX208_ANA_GAIN_DEFAULT); 908 909 v4l2_ctrl_new_custom(ctrl_hdlr, &imx208_digital_gain_control, NULL); 910 911 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx208_ctrl_ops, 912 V4L2_CID_TEST_PATTERN, 913 ARRAY_SIZE(imx208_test_pattern_menu) - 1, 914 0, 0, imx208_test_pattern_menu); 915 916 if (ctrl_hdlr->error) { 917 ret = ctrl_hdlr->error; 918 dev_err(&client->dev, "%s control init failed (%d)\n", 919 __func__, ret); 920 goto error; 921 } 922 923 imx208->sd.ctrl_handler = ctrl_hdlr; 924 925 return 0; 926 927 error: 928 v4l2_ctrl_handler_free(ctrl_hdlr); 929 mutex_destroy(&imx208->imx208_mx); 930 931 return ret; 932 } 933 934 static void imx208_free_controls(struct imx208 *imx208) 935 { 936 v4l2_ctrl_handler_free(imx208->sd.ctrl_handler); 937 } 938 939 static int imx208_probe(struct i2c_client *client) 940 { 941 struct imx208 *imx208; 942 int ret; 943 bool full_power; 944 u32 val = 0; 945 946 device_property_read_u32(&client->dev, "clock-frequency", &val); 947 if (val != 19200000) { 948 dev_err(&client->dev, 949 "Unsupported clock-frequency %u. Expected 19200000.\n", 950 val); 951 return -EINVAL; 952 } 953 954 imx208 = devm_kzalloc(&client->dev, sizeof(*imx208), GFP_KERNEL); 955 if (!imx208) 956 return -ENOMEM; 957 958 /* Initialize subdev */ 959 v4l2_i2c_subdev_init(&imx208->sd, client, &imx208_subdev_ops); 960 961 full_power = acpi_dev_state_d0(&client->dev); 962 if (full_power) { 963 /* Check module identity */ 964 ret = imx208_identify_module(imx208); 965 if (ret) { 966 dev_err(&client->dev, "failed to find sensor: %d", ret); 967 goto error_probe; 968 } 969 } 970 971 /* Set default mode to max resolution */ 972 imx208->cur_mode = &supported_modes[0]; 973 974 ret = imx208_init_controls(imx208); 975 if (ret) { 976 dev_err(&client->dev, "failed to init controls: %d", ret); 977 goto error_probe; 978 } 979 980 /* Initialize subdev */ 981 imx208->sd.internal_ops = &imx208_internal_ops; 982 imx208->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 983 imx208->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 984 985 /* Initialize source pad */ 986 imx208->pad.flags = MEDIA_PAD_FL_SOURCE; 987 ret = media_entity_pads_init(&imx208->sd.entity, 1, &imx208->pad); 988 if (ret) { 989 dev_err(&client->dev, "%s failed:%d\n", __func__, ret); 990 goto error_handler_free; 991 } 992 993 ret = v4l2_async_register_subdev_sensor(&imx208->sd); 994 if (ret < 0) 995 goto error_media_entity; 996 997 ret = device_create_bin_file(&client->dev, &bin_attr_otp); 998 if (ret) { 999 dev_err(&client->dev, "sysfs otp creation failed\n"); 1000 goto error_async_subdev; 1001 } 1002 1003 /* Set the device's state to active if it's in D0 state. */ 1004 if (full_power) 1005 pm_runtime_set_active(&client->dev); 1006 pm_runtime_enable(&client->dev); 1007 pm_runtime_idle(&client->dev); 1008 1009 return 0; 1010 1011 error_async_subdev: 1012 v4l2_async_unregister_subdev(&imx208->sd); 1013 1014 error_media_entity: 1015 media_entity_cleanup(&imx208->sd.entity); 1016 1017 error_handler_free: 1018 imx208_free_controls(imx208); 1019 1020 error_probe: 1021 mutex_destroy(&imx208->imx208_mx); 1022 1023 return ret; 1024 } 1025 1026 static void imx208_remove(struct i2c_client *client) 1027 { 1028 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1029 struct imx208 *imx208 = to_imx208(sd); 1030 1031 device_remove_bin_file(&client->dev, &bin_attr_otp); 1032 v4l2_async_unregister_subdev(sd); 1033 media_entity_cleanup(&sd->entity); 1034 imx208_free_controls(imx208); 1035 1036 pm_runtime_disable(&client->dev); 1037 pm_runtime_set_suspended(&client->dev); 1038 1039 mutex_destroy(&imx208->imx208_mx); 1040 } 1041 1042 #ifdef CONFIG_ACPI 1043 static const struct acpi_device_id imx208_acpi_ids[] = { 1044 { "INT3478" }, 1045 { /* sentinel */ } 1046 }; 1047 1048 MODULE_DEVICE_TABLE(acpi, imx208_acpi_ids); 1049 #endif 1050 1051 static struct i2c_driver imx208_i2c_driver = { 1052 .driver = { 1053 .name = "imx208", 1054 .acpi_match_table = ACPI_PTR(imx208_acpi_ids), 1055 }, 1056 .probe = imx208_probe, 1057 .remove = imx208_remove, 1058 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, 1059 }; 1060 1061 module_i2c_driver(imx208_i2c_driver); 1062 1063 MODULE_AUTHOR("Yeh, Andy <andy.yeh@intel.com>"); 1064 MODULE_AUTHOR("Chen, Ping-chung <ping-chung.chen@intel.com>"); 1065 MODULE_AUTHOR("Shawn Tu"); 1066 MODULE_DESCRIPTION("Sony IMX208 sensor driver"); 1067 MODULE_LICENSE("GPL v2"); 1068