1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Texas Instruments DS90UB953 video serializer 4 * 5 * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net> 6 * 7 * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net> 8 * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 9 */ 10 11 #include <linux/clk-provider.h> 12 #include <linux/clk.h> 13 #include <linux/delay.h> 14 #include <linux/gpio/driver.h> 15 #include <linux/i2c-atr.h> 16 #include <linux/i2c.h> 17 #include <linux/kernel.h> 18 #include <linux/math64.h> 19 #include <linux/module.h> 20 #include <linux/property.h> 21 #include <linux/rational.h> 22 #include <linux/regmap.h> 23 24 #include <media/i2c/ds90ub9xx.h> 25 #include <media/v4l2-ctrls.h> 26 #include <media/v4l2-fwnode.h> 27 #include <media/v4l2-mediabus.h> 28 #include <media/v4l2-subdev.h> 29 30 #include "ds90ub953.h" 31 32 #define UB953_PAD_SINK 0 33 #define UB953_PAD_SOURCE 1 34 35 #define UB953_NUM_GPIOS 4 36 37 #define UB953_DEFAULT_CLKOUT_RATE 25000000UL 38 39 /* Note: Only sync mode supported for now */ 40 enum ub953_mode { 41 /* FPD-Link III CSI-2 synchronous mode */ 42 UB953_MODE_SYNC, 43 /* FPD-Link III CSI-2 non-synchronous mode, external ref clock */ 44 UB953_MODE_NONSYNC_EXT, 45 /* FPD-Link III CSI-2 non-synchronous mode, internal ref clock */ 46 UB953_MODE_NONSYNC_INT, 47 /* FPD-Link III DVP mode */ 48 UB953_MODE_DVP, 49 }; 50 51 struct ub953_hw_data { 52 const char *model; 53 bool is_ub971; 54 }; 55 56 struct ub953_clkout_data { 57 u32 hs_div; 58 u32 m; 59 u32 n; 60 unsigned long rate; 61 }; 62 63 struct ub953_data { 64 const struct ub953_hw_data *hw_data; 65 66 struct i2c_client *client; 67 struct regmap *regmap; 68 struct clk *clkin; 69 70 u32 num_data_lanes; 71 bool non_continous_clk; 72 73 struct gpio_chip gpio_chip; 74 75 struct v4l2_subdev sd; 76 struct media_pad pads[2]; 77 78 struct v4l2_async_notifier notifier; 79 80 struct v4l2_subdev *source_sd; 81 u16 source_sd_pad; 82 83 u64 enabled_source_streams; 84 85 /* lock for register access */ 86 struct mutex reg_lock; 87 88 u8 current_indirect_target; 89 90 struct clk_hw clkout_clk_hw; 91 92 enum ub953_mode mode; 93 94 const struct ds90ub9xx_platform_data *plat_data; 95 }; 96 97 static inline struct ub953_data *sd_to_ub953(struct v4l2_subdev *sd) 98 { 99 return container_of(sd, struct ub953_data, sd); 100 } 101 102 /* 103 * HW Access 104 */ 105 106 static int ub953_read(struct ub953_data *priv, u8 reg, u8 *val, int *err) 107 { 108 unsigned int v; 109 int ret; 110 111 if (err && *err) 112 return *err; 113 114 mutex_lock(&priv->reg_lock); 115 116 ret = regmap_read(priv->regmap, reg, &v); 117 if (ret) { 118 dev_err(&priv->client->dev, "Cannot read register 0x%02x: %d\n", 119 reg, ret); 120 goto out_unlock; 121 } 122 123 *val = v; 124 125 out_unlock: 126 mutex_unlock(&priv->reg_lock); 127 128 if (ret && err) 129 *err = ret; 130 131 return ret; 132 } 133 134 static int ub953_write(struct ub953_data *priv, u8 reg, u8 val, int *err) 135 { 136 int ret; 137 138 if (err && *err) 139 return *err; 140 141 mutex_lock(&priv->reg_lock); 142 143 ret = regmap_write(priv->regmap, reg, val); 144 if (ret) 145 dev_err(&priv->client->dev, 146 "Cannot write register 0x%02x: %d\n", reg, ret); 147 148 mutex_unlock(&priv->reg_lock); 149 150 if (ret && err) 151 *err = ret; 152 153 return ret; 154 } 155 156 static int ub953_select_ind_reg_block(struct ub953_data *priv, u8 block) 157 { 158 struct device *dev = &priv->client->dev; 159 int ret; 160 161 if (priv->current_indirect_target == block) 162 return 0; 163 164 ret = regmap_write(priv->regmap, UB953_REG_IND_ACC_CTL, block << 2); 165 if (ret) { 166 dev_err(dev, "%s: cannot select indirect target %u (%d)\n", 167 __func__, block, ret); 168 return ret; 169 } 170 171 priv->current_indirect_target = block; 172 173 return 0; 174 } 175 176 __maybe_unused 177 static int ub953_read_ind(struct ub953_data *priv, u8 block, u8 reg, u8 *val, 178 int *err) 179 { 180 unsigned int v; 181 int ret; 182 183 if (err && *err) 184 return *err; 185 186 mutex_lock(&priv->reg_lock); 187 188 ret = ub953_select_ind_reg_block(priv, block); 189 if (ret) 190 goto out_unlock; 191 192 ret = regmap_write(priv->regmap, UB953_REG_IND_ACC_ADDR, reg); 193 if (ret) { 194 dev_err(&priv->client->dev, 195 "Write to IND_ACC_ADDR failed when reading %u:0x%02x: %d\n", 196 block, reg, ret); 197 goto out_unlock; 198 } 199 200 ret = regmap_read(priv->regmap, UB953_REG_IND_ACC_DATA, &v); 201 if (ret) { 202 dev_err(&priv->client->dev, 203 "Write to IND_ACC_DATA failed when reading %u:0x%02x: %d\n", 204 block, reg, ret); 205 goto out_unlock; 206 } 207 208 *val = v; 209 210 out_unlock: 211 mutex_unlock(&priv->reg_lock); 212 213 if (ret && err) 214 *err = ret; 215 216 return ret; 217 } 218 219 __maybe_unused 220 static int ub953_write_ind(struct ub953_data *priv, u8 block, u8 reg, u8 val, 221 int *err) 222 { 223 int ret; 224 225 if (err && *err) 226 return *err; 227 228 mutex_lock(&priv->reg_lock); 229 230 ret = ub953_select_ind_reg_block(priv, block); 231 if (ret) 232 goto out_unlock; 233 234 ret = regmap_write(priv->regmap, UB953_REG_IND_ACC_ADDR, reg); 235 if (ret) { 236 dev_err(&priv->client->dev, 237 "Write to IND_ACC_ADDR failed when writing %u:0x%02x: %d\n", 238 block, reg, ret); 239 goto out_unlock; 240 } 241 242 ret = regmap_write(priv->regmap, UB953_REG_IND_ACC_DATA, val); 243 if (ret) { 244 dev_err(&priv->client->dev, 245 "Write to IND_ACC_DATA failed when writing %u:0x%02x: %d\n", 246 block, reg, ret); 247 } 248 249 out_unlock: 250 mutex_unlock(&priv->reg_lock); 251 252 if (ret && err) 253 *err = ret; 254 255 return ret; 256 } 257 258 /* 259 * GPIO chip 260 */ 261 static int ub953_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) 262 { 263 struct ub953_data *priv = gpiochip_get_data(gc); 264 int ret; 265 u8 v; 266 267 ret = ub953_read(priv, UB953_REG_GPIO_INPUT_CTRL, &v, NULL); 268 if (ret) 269 return ret; 270 271 if (v & UB953_REG_GPIO_INPUT_CTRL_INPUT_EN(offset)) 272 return GPIO_LINE_DIRECTION_IN; 273 else 274 return GPIO_LINE_DIRECTION_OUT; 275 } 276 277 static int ub953_gpio_direction_in(struct gpio_chip *gc, unsigned int offset) 278 { 279 struct ub953_data *priv = gpiochip_get_data(gc); 280 281 return regmap_update_bits(priv->regmap, UB953_REG_GPIO_INPUT_CTRL, 282 UB953_REG_GPIO_INPUT_CTRL_INPUT_EN(offset) | 283 UB953_REG_GPIO_INPUT_CTRL_OUT_EN(offset), 284 UB953_REG_GPIO_INPUT_CTRL_INPUT_EN(offset)); 285 } 286 287 static int ub953_gpio_direction_out(struct gpio_chip *gc, unsigned int offset, 288 int value) 289 { 290 struct ub953_data *priv = gpiochip_get_data(gc); 291 int ret; 292 293 ret = regmap_update_bits(priv->regmap, UB953_REG_LOCAL_GPIO_DATA, 294 UB953_REG_LOCAL_GPIO_DATA_GPIO_OUT_SRC(offset), 295 value ? UB953_REG_LOCAL_GPIO_DATA_GPIO_OUT_SRC(offset) : 296 0); 297 298 if (ret) 299 return ret; 300 301 return regmap_update_bits(priv->regmap, UB953_REG_GPIO_INPUT_CTRL, 302 UB953_REG_GPIO_INPUT_CTRL_INPUT_EN(offset) | 303 UB953_REG_GPIO_INPUT_CTRL_OUT_EN(offset), 304 UB953_REG_GPIO_INPUT_CTRL_OUT_EN(offset)); 305 } 306 307 static int ub953_gpio_get(struct gpio_chip *gc, unsigned int offset) 308 { 309 struct ub953_data *priv = gpiochip_get_data(gc); 310 int ret; 311 u8 v; 312 313 ret = ub953_read(priv, UB953_REG_GPIO_PIN_STS, &v, NULL); 314 if (ret) 315 return ret; 316 317 return !!(v & UB953_REG_GPIO_PIN_STS_GPIO_STS(offset)); 318 } 319 320 static int ub953_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 321 { 322 struct ub953_data *priv = gpiochip_get_data(gc); 323 324 return regmap_update_bits(priv->regmap, UB953_REG_LOCAL_GPIO_DATA, 325 UB953_REG_LOCAL_GPIO_DATA_GPIO_OUT_SRC(offset), 326 value ? UB953_REG_LOCAL_GPIO_DATA_GPIO_OUT_SRC(offset) : 0); 327 } 328 329 static int ub953_gpio_of_xlate(struct gpio_chip *gc, 330 const struct of_phandle_args *gpiospec, 331 u32 *flags) 332 { 333 if (flags) 334 *flags = gpiospec->args[1]; 335 336 return gpiospec->args[0]; 337 } 338 339 static int ub953_gpiochip_probe(struct ub953_data *priv) 340 { 341 struct device *dev = &priv->client->dev; 342 struct gpio_chip *gc = &priv->gpio_chip; 343 int ret; 344 345 /* Set all GPIOs to local input mode */ 346 ret = ub953_write(priv, UB953_REG_LOCAL_GPIO_DATA, 0, NULL); 347 if (ret) 348 return ret; 349 350 ret = ub953_write(priv, UB953_REG_GPIO_INPUT_CTRL, 0xf, NULL); 351 if (ret) 352 return ret; 353 354 gc->label = dev_name(dev); 355 gc->parent = dev; 356 gc->owner = THIS_MODULE; 357 gc->base = -1; 358 gc->can_sleep = true; 359 gc->ngpio = UB953_NUM_GPIOS; 360 gc->get_direction = ub953_gpio_get_direction; 361 gc->direction_input = ub953_gpio_direction_in; 362 gc->direction_output = ub953_gpio_direction_out; 363 gc->get = ub953_gpio_get; 364 gc->set_rv = ub953_gpio_set; 365 gc->of_xlate = ub953_gpio_of_xlate; 366 gc->of_gpio_n_cells = 2; 367 368 ret = gpiochip_add_data(gc, priv); 369 if (ret) { 370 dev_err(dev, "Failed to add GPIOs: %d\n", ret); 371 return ret; 372 } 373 374 return 0; 375 } 376 377 static void ub953_gpiochip_remove(struct ub953_data *priv) 378 { 379 gpiochip_remove(&priv->gpio_chip); 380 } 381 382 /* 383 * V4L2 384 */ 385 386 static int _ub953_set_routing(struct v4l2_subdev *sd, 387 struct v4l2_subdev_state *state, 388 struct v4l2_subdev_krouting *routing) 389 { 390 static const struct v4l2_mbus_framefmt format = { 391 .width = 640, 392 .height = 480, 393 .code = MEDIA_BUS_FMT_UYVY8_1X16, 394 .field = V4L2_FIELD_NONE, 395 .colorspace = V4L2_COLORSPACE_SRGB, 396 .ycbcr_enc = V4L2_YCBCR_ENC_601, 397 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 398 .xfer_func = V4L2_XFER_FUNC_SRGB, 399 }; 400 int ret; 401 402 /* 403 * Note: we can only support up to V4L2_FRAME_DESC_ENTRY_MAX, until 404 * frame desc is made dynamically allocated. 405 */ 406 407 if (routing->num_routes > V4L2_FRAME_DESC_ENTRY_MAX) 408 return -EINVAL; 409 410 ret = v4l2_subdev_routing_validate(sd, routing, 411 V4L2_SUBDEV_ROUTING_ONLY_1_TO_1); 412 if (ret) 413 return ret; 414 415 ret = v4l2_subdev_set_routing_with_fmt(sd, state, routing, &format); 416 if (ret) 417 return ret; 418 419 return 0; 420 } 421 422 static int ub953_set_routing(struct v4l2_subdev *sd, 423 struct v4l2_subdev_state *state, 424 enum v4l2_subdev_format_whence which, 425 struct v4l2_subdev_krouting *routing) 426 { 427 struct ub953_data *priv = sd_to_ub953(sd); 428 429 if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams) 430 return -EBUSY; 431 432 return _ub953_set_routing(sd, state, routing); 433 } 434 435 static int ub953_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad, 436 struct v4l2_mbus_frame_desc *fd) 437 { 438 struct ub953_data *priv = sd_to_ub953(sd); 439 struct v4l2_mbus_frame_desc source_fd; 440 struct v4l2_subdev_route *route; 441 struct v4l2_subdev_state *state; 442 int ret; 443 444 if (pad != UB953_PAD_SOURCE) 445 return -EINVAL; 446 447 ret = v4l2_subdev_call(priv->source_sd, pad, get_frame_desc, 448 priv->source_sd_pad, &source_fd); 449 if (ret) 450 return ret; 451 452 fd->type = V4L2_MBUS_FRAME_DESC_TYPE_CSI2; 453 454 state = v4l2_subdev_lock_and_get_active_state(sd); 455 456 for_each_active_route(&state->routing, route) { 457 struct v4l2_mbus_frame_desc_entry *source_entry = NULL; 458 unsigned int i; 459 460 if (route->source_pad != pad) 461 continue; 462 463 for (i = 0; i < source_fd.num_entries; i++) { 464 if (source_fd.entry[i].stream == route->sink_stream) { 465 source_entry = &source_fd.entry[i]; 466 break; 467 } 468 } 469 470 if (!source_entry) { 471 dev_err(&priv->client->dev, 472 "Failed to find stream from source frame desc\n"); 473 ret = -EPIPE; 474 goto out_unlock; 475 } 476 477 fd->entry[fd->num_entries].stream = route->source_stream; 478 fd->entry[fd->num_entries].flags = source_entry->flags; 479 fd->entry[fd->num_entries].length = source_entry->length; 480 fd->entry[fd->num_entries].pixelcode = source_entry->pixelcode; 481 fd->entry[fd->num_entries].bus.csi2.vc = 482 source_entry->bus.csi2.vc; 483 fd->entry[fd->num_entries].bus.csi2.dt = 484 source_entry->bus.csi2.dt; 485 486 fd->num_entries++; 487 } 488 489 out_unlock: 490 v4l2_subdev_unlock_state(state); 491 492 return ret; 493 } 494 495 static int ub953_set_fmt(struct v4l2_subdev *sd, 496 struct v4l2_subdev_state *state, 497 struct v4l2_subdev_format *format) 498 { 499 struct ub953_data *priv = sd_to_ub953(sd); 500 struct v4l2_mbus_framefmt *fmt; 501 502 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE && 503 priv->enabled_source_streams) 504 return -EBUSY; 505 506 /* No transcoding, source and sink formats must match. */ 507 if (format->pad == UB953_PAD_SOURCE) 508 return v4l2_subdev_get_fmt(sd, state, format); 509 510 /* Set sink format */ 511 fmt = v4l2_subdev_state_get_format(state, format->pad, format->stream); 512 if (!fmt) 513 return -EINVAL; 514 515 *fmt = format->format; 516 517 /* Propagate to source format */ 518 fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad, 519 format->stream); 520 if (!fmt) 521 return -EINVAL; 522 523 *fmt = format->format; 524 525 return 0; 526 } 527 528 static int ub953_init_state(struct v4l2_subdev *sd, 529 struct v4l2_subdev_state *state) 530 { 531 struct v4l2_subdev_route routes[] = { 532 { 533 .sink_pad = UB953_PAD_SINK, 534 .sink_stream = 0, 535 .source_pad = UB953_PAD_SOURCE, 536 .source_stream = 0, 537 .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE, 538 }, 539 }; 540 541 struct v4l2_subdev_krouting routing = { 542 .num_routes = ARRAY_SIZE(routes), 543 .routes = routes, 544 }; 545 546 return _ub953_set_routing(sd, state, &routing); 547 } 548 549 static int ub953_log_status(struct v4l2_subdev *sd) 550 { 551 struct ub953_data *priv = sd_to_ub953(sd); 552 struct device *dev = &priv->client->dev; 553 char id[UB953_REG_FPD3_RX_ID_LEN]; 554 u8 gpio_local_data; 555 u8 gpio_input_ctrl; 556 u8 gpio_pin_sts; 557 unsigned int i; 558 u8 v, v1, v2; 559 int ret; 560 561 for (i = 0; i < sizeof(id); i++) { 562 ret = ub953_read(priv, UB953_REG_FPD3_RX_ID(i), &id[i], NULL); 563 if (ret) 564 return ret; 565 } 566 567 dev_info(dev, "ID '%.*s'\n", (int)sizeof(id), id); 568 569 ret = ub953_read(priv, UB953_REG_GENERAL_STATUS, &v, NULL); 570 if (ret) 571 return ret; 572 573 dev_info(dev, "GENERAL_STATUS %#02x\n", v); 574 575 ub953_read(priv, UB953_REG_CRC_ERR_CNT1, &v1, &ret); 576 ub953_read(priv, UB953_REG_CRC_ERR_CNT2, &v2, &ret); 577 if (ret) 578 return ret; 579 580 dev_info(dev, "CRC error count %u\n", v1 | (v2 << 8)); 581 582 /* Clear CRC error counter */ 583 if (v1 || v2) 584 regmap_update_bits(priv->regmap, UB953_REG_BC_CTRL, 585 UB953_REG_BC_CTRL_CRC_ERR_CLR, 586 UB953_REG_BC_CTRL_CRC_ERR_CLR); 587 588 ret = ub953_read(priv, UB953_REG_CSI_ERR_CNT, &v, NULL); 589 if (ret) 590 return ret; 591 592 dev_info(dev, "CSI error count %u\n", v); 593 594 ret = ub953_read(priv, UB953_REG_CSI_ERR_STATUS, &v, NULL); 595 if (ret) 596 return ret; 597 598 dev_info(dev, "CSI_ERR_STATUS %#02x\n", v); 599 600 ret = ub953_read(priv, UB953_REG_CSI_ERR_DLANE01, &v, NULL); 601 if (ret) 602 return ret; 603 604 dev_info(dev, "CSI_ERR_DLANE01 %#02x\n", v); 605 606 ret = ub953_read(priv, UB953_REG_CSI_ERR_DLANE23, &v, NULL); 607 if (ret) 608 return ret; 609 610 dev_info(dev, "CSI_ERR_DLANE23 %#02x\n", v); 611 612 ret = ub953_read(priv, UB953_REG_CSI_ERR_CLK_LANE, &v, NULL); 613 if (ret) 614 return ret; 615 616 dev_info(dev, "CSI_ERR_CLK_LANE %#02x\n", v); 617 618 ret = ub953_read(priv, UB953_REG_CSI_PKT_HDR_VC_ID, &v, NULL); 619 if (ret) 620 return ret; 621 622 dev_info(dev, "CSI packet header VC %u ID %u\n", v >> 6, v & 0x3f); 623 624 ub953_read(priv, UB953_REG_PKT_HDR_WC_LSB, &v1, &ret); 625 ub953_read(priv, UB953_REG_PKT_HDR_WC_MSB, &v2, &ret); 626 if (ret) 627 return ret; 628 629 dev_info(dev, "CSI packet header WC %u\n", (v2 << 8) | v1); 630 631 ret = ub953_read(priv, UB953_REG_CSI_ECC, &v, NULL); 632 if (ret) 633 return ret; 634 635 dev_info(dev, "CSI ECC %#02x\n", v); 636 637 ub953_read(priv, UB953_REG_LOCAL_GPIO_DATA, &gpio_local_data, &ret); 638 ub953_read(priv, UB953_REG_GPIO_INPUT_CTRL, &gpio_input_ctrl, &ret); 639 ub953_read(priv, UB953_REG_GPIO_PIN_STS, &gpio_pin_sts, &ret); 640 if (ret) 641 return ret; 642 643 for (i = 0; i < UB953_NUM_GPIOS; i++) { 644 dev_info(dev, 645 "GPIO%u: remote: %u is_input: %u is_output: %u val: %u sts: %u\n", 646 i, 647 !!(gpio_local_data & UB953_REG_LOCAL_GPIO_DATA_GPIO_RMTEN(i)), 648 !!(gpio_input_ctrl & UB953_REG_GPIO_INPUT_CTRL_INPUT_EN(i)), 649 !!(gpio_input_ctrl & UB953_REG_GPIO_INPUT_CTRL_OUT_EN(i)), 650 !!(gpio_local_data & UB953_REG_LOCAL_GPIO_DATA_GPIO_OUT_SRC(i)), 651 !!(gpio_pin_sts & UB953_REG_GPIO_PIN_STS_GPIO_STS(i))); 652 } 653 654 return 0; 655 } 656 657 static int ub953_enable_streams(struct v4l2_subdev *sd, 658 struct v4l2_subdev_state *state, u32 pad, 659 u64 streams_mask) 660 { 661 struct ub953_data *priv = sd_to_ub953(sd); 662 u64 sink_streams; 663 int ret; 664 665 sink_streams = v4l2_subdev_state_xlate_streams(state, UB953_PAD_SOURCE, 666 UB953_PAD_SINK, 667 &streams_mask); 668 669 ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad, 670 sink_streams); 671 if (ret) 672 return ret; 673 674 priv->enabled_source_streams |= streams_mask; 675 676 return 0; 677 } 678 679 static int ub953_disable_streams(struct v4l2_subdev *sd, 680 struct v4l2_subdev_state *state, u32 pad, 681 u64 streams_mask) 682 { 683 struct ub953_data *priv = sd_to_ub953(sd); 684 u64 sink_streams; 685 int ret; 686 687 sink_streams = v4l2_subdev_state_xlate_streams(state, UB953_PAD_SOURCE, 688 UB953_PAD_SINK, 689 &streams_mask); 690 691 ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad, 692 sink_streams); 693 if (ret) 694 return ret; 695 696 priv->enabled_source_streams &= ~streams_mask; 697 698 return 0; 699 } 700 701 static const struct v4l2_subdev_pad_ops ub953_pad_ops = { 702 .enable_streams = ub953_enable_streams, 703 .disable_streams = ub953_disable_streams, 704 .set_routing = ub953_set_routing, 705 .get_frame_desc = ub953_get_frame_desc, 706 .get_fmt = v4l2_subdev_get_fmt, 707 .set_fmt = ub953_set_fmt, 708 }; 709 710 static const struct v4l2_subdev_core_ops ub953_subdev_core_ops = { 711 .log_status = ub953_log_status, 712 }; 713 714 static const struct v4l2_subdev_ops ub953_subdev_ops = { 715 .core = &ub953_subdev_core_ops, 716 .pad = &ub953_pad_ops, 717 }; 718 719 static const struct v4l2_subdev_internal_ops ub953_internal_ops = { 720 .init_state = ub953_init_state, 721 }; 722 723 static const struct media_entity_operations ub953_entity_ops = { 724 .link_validate = v4l2_subdev_link_validate, 725 }; 726 727 static int ub953_notify_bound(struct v4l2_async_notifier *notifier, 728 struct v4l2_subdev *source_subdev, 729 struct v4l2_async_connection *asd) 730 { 731 struct ub953_data *priv = sd_to_ub953(notifier->sd); 732 struct device *dev = &priv->client->dev; 733 int ret; 734 735 ret = media_entity_get_fwnode_pad(&source_subdev->entity, 736 source_subdev->fwnode, 737 MEDIA_PAD_FL_SOURCE); 738 if (ret < 0) { 739 dev_err(dev, "Failed to find pad for %s\n", 740 source_subdev->name); 741 return ret; 742 } 743 744 priv->source_sd = source_subdev; 745 priv->source_sd_pad = ret; 746 747 ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad, 748 &priv->sd.entity, 0, 749 MEDIA_LNK_FL_ENABLED | 750 MEDIA_LNK_FL_IMMUTABLE); 751 if (ret) { 752 dev_err(dev, "Unable to link %s:%u -> %s:0\n", 753 source_subdev->name, priv->source_sd_pad, 754 priv->sd.name); 755 return ret; 756 } 757 758 return 0; 759 } 760 761 static const struct v4l2_async_notifier_operations ub953_notify_ops = { 762 .bound = ub953_notify_bound, 763 }; 764 765 static int ub953_v4l2_notifier_register(struct ub953_data *priv) 766 { 767 struct device *dev = &priv->client->dev; 768 struct v4l2_async_connection *asd; 769 struct fwnode_handle *ep_fwnode; 770 int ret; 771 772 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 773 UB953_PAD_SINK, 0, 0); 774 if (!ep_fwnode) { 775 dev_err(dev, "No graph endpoint\n"); 776 return -ENODEV; 777 } 778 779 v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd); 780 781 asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode, 782 struct v4l2_async_connection); 783 784 fwnode_handle_put(ep_fwnode); 785 786 if (IS_ERR(asd)) { 787 dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd)); 788 v4l2_async_nf_cleanup(&priv->notifier); 789 return PTR_ERR(asd); 790 } 791 792 priv->notifier.ops = &ub953_notify_ops; 793 794 ret = v4l2_async_nf_register(&priv->notifier); 795 if (ret) { 796 dev_err(dev, "Failed to register subdev_notifier"); 797 v4l2_async_nf_cleanup(&priv->notifier); 798 return ret; 799 } 800 801 return 0; 802 } 803 804 static void ub953_v4l2_notifier_unregister(struct ub953_data *priv) 805 { 806 v4l2_async_nf_unregister(&priv->notifier); 807 v4l2_async_nf_cleanup(&priv->notifier); 808 } 809 810 /* 811 * Probing 812 */ 813 814 static int ub953_i2c_master_init(struct ub953_data *priv) 815 { 816 /* i2c fast mode */ 817 u32 ref = 26250000; 818 u32 scl_high = 915; /* ns */ 819 u32 scl_low = 1641; /* ns */ 820 int ret; 821 822 scl_high = div64_u64((u64)scl_high * ref, 1000000000) - 5; 823 scl_low = div64_u64((u64)scl_low * ref, 1000000000) - 5; 824 825 ret = ub953_write(priv, UB953_REG_SCL_HIGH_TIME, scl_high, NULL); 826 if (ret) 827 return ret; 828 829 ret = ub953_write(priv, UB953_REG_SCL_LOW_TIME, scl_low, NULL); 830 if (ret) 831 return ret; 832 833 return 0; 834 } 835 836 static u64 ub953_get_fc_rate(struct ub953_data *priv) 837 { 838 switch (priv->mode) { 839 case UB953_MODE_SYNC: 840 if (priv->hw_data->is_ub971) 841 return priv->plat_data->bc_rate * 160ull; 842 else 843 return priv->plat_data->bc_rate / 2 * 160ull; 844 845 case UB953_MODE_NONSYNC_EXT: 846 /* CLKIN_DIV = 1 always */ 847 return clk_get_rate(priv->clkin) * 80ull; 848 849 default: 850 /* Not supported */ 851 return 0; 852 } 853 } 854 855 static unsigned long ub953_calc_clkout_ub953(struct ub953_data *priv, 856 unsigned long target, u64 fc, 857 u8 *hs_div, u8 *m, u8 *n) 858 { 859 /* 860 * We always use 4 as a pre-divider (HS_CLK_DIV = 2). 861 * 862 * According to the datasheet: 863 * - "HS_CLK_DIV typically should be set to either 16, 8, or 4 (default)." 864 * - "if it is not possible to have an integer ratio of N/M, it is best to 865 * select a smaller value for HS_CLK_DIV. 866 * 867 * For above reasons the default HS_CLK_DIV seems the best in the average 868 * case. Use always that value to keep the code simple. 869 */ 870 static const unsigned long hs_clk_div = 4; 871 872 u64 fc_divided; 873 unsigned long mul, div; 874 unsigned long res; 875 876 /* clkout = fc / hs_clk_div * m / n */ 877 878 fc_divided = div_u64(fc, hs_clk_div); 879 880 rational_best_approximation(target, fc_divided, (1 << 5) - 1, 881 (1 << 8) - 1, &mul, &div); 882 883 res = div_u64(fc_divided * mul, div); 884 885 *hs_div = hs_clk_div; 886 *m = mul; 887 *n = div; 888 889 return res; 890 } 891 892 static unsigned long ub953_calc_clkout_ub971(struct ub953_data *priv, 893 unsigned long target, u64 fc, 894 u8 *m, u8 *n) 895 { 896 u64 fc_divided; 897 unsigned long mul, div; 898 unsigned long res; 899 900 /* clkout = fc * m / (8 * n) */ 901 902 fc_divided = div_u64(fc, 8); 903 904 rational_best_approximation(target, fc_divided, (1 << 5) - 1, 905 (1 << 8) - 1, &mul, &div); 906 907 res = div_u64(fc_divided * mul, div); 908 909 *m = mul; 910 *n = div; 911 912 return res; 913 } 914 915 static void ub953_calc_clkout_params(struct ub953_data *priv, 916 unsigned long target_rate, 917 struct ub953_clkout_data *clkout_data) 918 { 919 struct device *dev = &priv->client->dev; 920 unsigned long clkout_rate; 921 u64 fc_rate; 922 923 fc_rate = ub953_get_fc_rate(priv); 924 925 if (priv->hw_data->is_ub971) { 926 u8 m, n; 927 928 clkout_rate = ub953_calc_clkout_ub971(priv, target_rate, 929 fc_rate, &m, &n); 930 931 clkout_data->m = m; 932 clkout_data->n = n; 933 934 dev_dbg(dev, "%s %llu * %u / (8 * %u) = %lu (requested %lu)", 935 __func__, fc_rate, m, n, clkout_rate, target_rate); 936 } else { 937 u8 hs_div, m, n; 938 939 clkout_rate = ub953_calc_clkout_ub953(priv, target_rate, 940 fc_rate, &hs_div, &m, &n); 941 942 clkout_data->hs_div = hs_div; 943 clkout_data->m = m; 944 clkout_data->n = n; 945 946 dev_dbg(dev, "%s %llu / %u * %u / %u = %lu (requested %lu)", 947 __func__, fc_rate, hs_div, m, n, clkout_rate, 948 target_rate); 949 } 950 951 clkout_data->rate = clkout_rate; 952 } 953 954 static int ub953_write_clkout_regs(struct ub953_data *priv, 955 const struct ub953_clkout_data *clkout_data) 956 { 957 u8 clkout_ctrl0, clkout_ctrl1; 958 int ret; 959 960 if (priv->hw_data->is_ub971) 961 clkout_ctrl0 = clkout_data->m; 962 else 963 clkout_ctrl0 = (__ffs(clkout_data->hs_div) << 5) | 964 clkout_data->m; 965 966 clkout_ctrl1 = clkout_data->n; 967 968 ret = ub953_write(priv, UB953_REG_CLKOUT_CTRL0, clkout_ctrl0, NULL); 969 if (ret) 970 return ret; 971 972 ret = ub953_write(priv, UB953_REG_CLKOUT_CTRL1, clkout_ctrl1, NULL); 973 if (ret) 974 return ret; 975 976 return 0; 977 } 978 979 static unsigned long ub953_clkout_recalc_rate(struct clk_hw *hw, 980 unsigned long parent_rate) 981 { 982 struct ub953_data *priv = container_of(hw, struct ub953_data, clkout_clk_hw); 983 struct device *dev = &priv->client->dev; 984 u8 ctrl0, ctrl1; 985 u32 mul, div; 986 u64 fc_rate; 987 u32 hs_clk_div; 988 u64 rate; 989 int ret; 990 991 ret = ub953_read(priv, UB953_REG_CLKOUT_CTRL0, &ctrl0, NULL); 992 if (ret) { 993 dev_err(dev, "Failed to read CLKOUT_CTRL0: %d\n", ret); 994 return 0; 995 } 996 997 ret = ub953_read(priv, UB953_REG_CLKOUT_CTRL1, &ctrl1, NULL); 998 if (ret) { 999 dev_err(dev, "Failed to read CLKOUT_CTRL1: %d\n", ret); 1000 return 0; 1001 } 1002 1003 fc_rate = ub953_get_fc_rate(priv); 1004 1005 if (priv->hw_data->is_ub971) { 1006 mul = ctrl0 & 0x1f; 1007 div = ctrl1; 1008 1009 if (div == 0) 1010 return 0; 1011 1012 rate = div_u64(fc_rate * mul, 8 * div); 1013 1014 dev_dbg(dev, "clkout: fc rate %llu, mul %u, div %u = %llu\n", 1015 fc_rate, mul, div, rate); 1016 } else { 1017 mul = ctrl0 & 0x1f; 1018 hs_clk_div = 1 << (ctrl0 >> 5); 1019 div = ctrl1; 1020 1021 if (div == 0) 1022 return 0; 1023 1024 rate = div_u64(div_u64(fc_rate, hs_clk_div) * mul, div); 1025 1026 dev_dbg(dev, 1027 "clkout: fc rate %llu, hs_clk_div %u, mul %u, div %u = %llu\n", 1028 fc_rate, hs_clk_div, mul, div, rate); 1029 } 1030 1031 return rate; 1032 } 1033 1034 static long ub953_clkout_round_rate(struct clk_hw *hw, unsigned long rate, 1035 unsigned long *parent_rate) 1036 { 1037 struct ub953_data *priv = container_of(hw, struct ub953_data, clkout_clk_hw); 1038 struct ub953_clkout_data clkout_data; 1039 1040 ub953_calc_clkout_params(priv, rate, &clkout_data); 1041 1042 return clkout_data.rate; 1043 } 1044 1045 static int ub953_clkout_set_rate(struct clk_hw *hw, unsigned long rate, 1046 unsigned long parent_rate) 1047 { 1048 struct ub953_data *priv = container_of(hw, struct ub953_data, clkout_clk_hw); 1049 struct ub953_clkout_data clkout_data; 1050 1051 ub953_calc_clkout_params(priv, rate, &clkout_data); 1052 1053 dev_dbg(&priv->client->dev, "%s %lu (requested %lu)\n", __func__, 1054 clkout_data.rate, rate); 1055 1056 return ub953_write_clkout_regs(priv, &clkout_data); 1057 } 1058 1059 static const struct clk_ops ub953_clkout_ops = { 1060 .recalc_rate = ub953_clkout_recalc_rate, 1061 .round_rate = ub953_clkout_round_rate, 1062 .set_rate = ub953_clkout_set_rate, 1063 }; 1064 1065 static int ub953_register_clkout(struct ub953_data *priv) 1066 { 1067 struct device *dev = &priv->client->dev; 1068 const struct clk_init_data init = { 1069 .name = kasprintf(GFP_KERNEL, "ds90%s.%s.clk_out", 1070 priv->hw_data->model, dev_name(dev)), 1071 .ops = &ub953_clkout_ops, 1072 }; 1073 struct ub953_clkout_data clkout_data; 1074 int ret; 1075 1076 if (!init.name) 1077 return -ENOMEM; 1078 1079 /* Initialize clkout to 25MHz by default */ 1080 ub953_calc_clkout_params(priv, UB953_DEFAULT_CLKOUT_RATE, &clkout_data); 1081 ret = ub953_write_clkout_regs(priv, &clkout_data); 1082 if (ret) 1083 return ret; 1084 1085 priv->clkout_clk_hw.init = &init; 1086 1087 ret = devm_clk_hw_register(dev, &priv->clkout_clk_hw); 1088 kfree(init.name); 1089 if (ret) 1090 return dev_err_probe(dev, ret, "Cannot register clock HW\n"); 1091 1092 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 1093 &priv->clkout_clk_hw); 1094 if (ret) 1095 return dev_err_probe(dev, ret, 1096 "Cannot add OF clock provider\n"); 1097 1098 return 0; 1099 } 1100 1101 static int ub953_add_i2c_adapter(struct ub953_data *priv) 1102 { 1103 struct device *dev = &priv->client->dev; 1104 struct i2c_atr_adap_desc desc = { }; 1105 struct fwnode_handle *i2c_handle; 1106 int ret; 1107 1108 i2c_handle = device_get_named_child_node(dev, "i2c"); 1109 if (!i2c_handle) 1110 return 0; 1111 1112 desc.chan_id = priv->plat_data->port; 1113 desc.parent = dev; 1114 desc.bus_handle = i2c_handle; 1115 desc.num_aliases = 0; 1116 1117 ret = i2c_atr_add_adapter(priv->plat_data->atr, &desc); 1118 1119 fwnode_handle_put(i2c_handle); 1120 1121 if (ret) 1122 return ret; 1123 1124 return 0; 1125 } 1126 1127 static const struct regmap_config ub953_regmap_config = { 1128 .name = "ds90ub953", 1129 .reg_bits = 8, 1130 .val_bits = 8, 1131 .reg_format_endian = REGMAP_ENDIAN_DEFAULT, 1132 .val_format_endian = REGMAP_ENDIAN_DEFAULT, 1133 }; 1134 1135 static int ub953_parse_dt(struct ub953_data *priv) 1136 { 1137 struct device *dev = &priv->client->dev; 1138 struct v4l2_fwnode_endpoint vep = { 1139 .bus_type = V4L2_MBUS_CSI2_DPHY, 1140 }; 1141 struct fwnode_handle *ep_fwnode; 1142 unsigned char nlanes; 1143 int ret; 1144 1145 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 1146 UB953_PAD_SINK, 0, 0); 1147 if (!ep_fwnode) 1148 return dev_err_probe(dev, -ENOENT, "no endpoint found\n"); 1149 1150 ret = v4l2_fwnode_endpoint_parse(ep_fwnode, &vep); 1151 1152 fwnode_handle_put(ep_fwnode); 1153 1154 if (ret) 1155 return dev_err_probe(dev, ret, 1156 "failed to parse sink endpoint data\n"); 1157 1158 nlanes = vep.bus.mipi_csi2.num_data_lanes; 1159 if (nlanes != 1 && nlanes != 2 && nlanes != 4) 1160 return dev_err_probe(dev, -EINVAL, 1161 "bad number of data-lanes: %u\n", nlanes); 1162 1163 priv->num_data_lanes = nlanes; 1164 1165 priv->non_continous_clk = vep.bus.mipi_csi2.flags & 1166 V4L2_MBUS_CSI2_NONCONTINUOUS_CLOCK; 1167 1168 return 0; 1169 } 1170 1171 static int ub953_hw_init(struct ub953_data *priv) 1172 { 1173 struct device *dev = &priv->client->dev; 1174 bool mode_override; 1175 int ret; 1176 u8 v; 1177 1178 ret = ub953_read(priv, UB953_REG_MODE_SEL, &v, NULL); 1179 if (ret) 1180 return ret; 1181 1182 if (!(v & UB953_REG_MODE_SEL_MODE_DONE)) 1183 return dev_err_probe(dev, -EIO, "Mode value not stabilized\n"); 1184 1185 mode_override = v & UB953_REG_MODE_SEL_MODE_OVERRIDE; 1186 1187 switch (v & UB953_REG_MODE_SEL_MODE_MASK) { 1188 case 0: 1189 priv->mode = UB953_MODE_SYNC; 1190 break; 1191 case 2: 1192 priv->mode = UB953_MODE_NONSYNC_EXT; 1193 break; 1194 case 3: 1195 priv->mode = UB953_MODE_NONSYNC_INT; 1196 break; 1197 case 5: 1198 priv->mode = UB953_MODE_DVP; 1199 break; 1200 default: 1201 return dev_err_probe(dev, -EIO, 1202 "Invalid mode in mode register\n"); 1203 } 1204 1205 dev_dbg(dev, "mode from %s: %#x\n", mode_override ? "reg" : "strap", 1206 priv->mode); 1207 1208 if (priv->mode != UB953_MODE_SYNC && 1209 priv->mode != UB953_MODE_NONSYNC_EXT) 1210 return dev_err_probe(dev, -ENODEV, 1211 "Unsupported mode selected: %u\n", 1212 priv->mode); 1213 1214 if (priv->mode == UB953_MODE_NONSYNC_EXT && !priv->clkin) 1215 return dev_err_probe(dev, -EINVAL, 1216 "clkin required for non-sync ext mode\n"); 1217 1218 ret = ub953_read(priv, UB953_REG_REV_MASK_ID, &v, NULL); 1219 if (ret) 1220 return dev_err_probe(dev, ret, "Failed to read revision"); 1221 1222 dev_info(dev, "Found %s rev/mask %#04x\n", priv->hw_data->model, v); 1223 1224 ret = ub953_read(priv, UB953_REG_GENERAL_CFG, &v, NULL); 1225 if (ret) 1226 return ret; 1227 1228 dev_dbg(dev, "i2c strap setting %s V\n", 1229 (v & UB953_REG_GENERAL_CFG_I2C_STRAP_MODE) ? "1.8" : "3.3"); 1230 1231 ret = ub953_i2c_master_init(priv); 1232 if (ret) 1233 return dev_err_probe(dev, ret, "i2c init failed\n"); 1234 1235 v = 0; 1236 v |= priv->non_continous_clk ? 0 : UB953_REG_GENERAL_CFG_CONT_CLK; 1237 v |= (priv->num_data_lanes - 1) << 1238 UB953_REG_GENERAL_CFG_CSI_LANE_SEL_SHIFT; 1239 v |= UB953_REG_GENERAL_CFG_CRC_TX_GEN_ENABLE; 1240 1241 ret = ub953_write(priv, UB953_REG_GENERAL_CFG, v, NULL); 1242 if (ret) 1243 return ret; 1244 1245 v = 1U << UB953_REG_I2C_CONTROL2_SDA_OUTPUT_SETUP_SHIFT; 1246 v |= UB953_REG_I2C_CONTROL2_BUS_SPEEDUP; 1247 1248 ret = ub953_write(priv, UB953_REG_I2C_CONTROL2, v, NULL); 1249 1250 return ret; 1251 } 1252 1253 static int ub953_subdev_init(struct ub953_data *priv) 1254 { 1255 struct device *dev = &priv->client->dev; 1256 int ret; 1257 1258 v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub953_subdev_ops); 1259 priv->sd.internal_ops = &ub953_internal_ops; 1260 1261 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | 1262 V4L2_SUBDEV_FL_STREAMS; 1263 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; 1264 priv->sd.entity.ops = &ub953_entity_ops; 1265 1266 priv->pads[0].flags = MEDIA_PAD_FL_SINK; 1267 priv->pads[1].flags = MEDIA_PAD_FL_SOURCE; 1268 1269 ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads); 1270 if (ret) 1271 return dev_err_probe(dev, ret, "Failed to init pads\n"); 1272 1273 ret = v4l2_subdev_init_finalize(&priv->sd); 1274 if (ret) 1275 goto err_entity_cleanup; 1276 1277 ret = ub953_v4l2_notifier_register(priv); 1278 if (ret) { 1279 dev_err_probe(dev, ret, 1280 "v4l2 subdev notifier register failed\n"); 1281 goto err_free_state; 1282 } 1283 1284 ret = v4l2_async_register_subdev(&priv->sd); 1285 if (ret) { 1286 dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n"); 1287 goto err_unreg_notif; 1288 } 1289 1290 return 0; 1291 1292 err_unreg_notif: 1293 ub953_v4l2_notifier_unregister(priv); 1294 err_free_state: 1295 v4l2_subdev_cleanup(&priv->sd); 1296 err_entity_cleanup: 1297 media_entity_cleanup(&priv->sd.entity); 1298 1299 return ret; 1300 } 1301 1302 static void ub953_subdev_uninit(struct ub953_data *priv) 1303 { 1304 v4l2_async_unregister_subdev(&priv->sd); 1305 ub953_v4l2_notifier_unregister(priv); 1306 v4l2_subdev_cleanup(&priv->sd); 1307 media_entity_cleanup(&priv->sd.entity); 1308 } 1309 1310 static int ub953_probe(struct i2c_client *client) 1311 { 1312 struct device *dev = &client->dev; 1313 struct ub953_data *priv; 1314 int ret; 1315 1316 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 1317 if (!priv) 1318 return -ENOMEM; 1319 1320 priv->client = client; 1321 1322 priv->hw_data = device_get_match_data(dev); 1323 1324 priv->plat_data = dev_get_platdata(&client->dev); 1325 if (!priv->plat_data) 1326 return dev_err_probe(dev, -ENODEV, "Platform data missing\n"); 1327 1328 mutex_init(&priv->reg_lock); 1329 1330 /* 1331 * Initialize to invalid values so that the first reg writes will 1332 * configure the target. 1333 */ 1334 priv->current_indirect_target = 0xff; 1335 1336 priv->regmap = devm_regmap_init_i2c(client, &ub953_regmap_config); 1337 if (IS_ERR(priv->regmap)) { 1338 ret = PTR_ERR(priv->regmap); 1339 dev_err_probe(dev, ret, "Failed to init regmap\n"); 1340 goto err_mutex_destroy; 1341 } 1342 1343 priv->clkin = devm_clk_get_optional(dev, "clkin"); 1344 if (IS_ERR(priv->clkin)) { 1345 ret = PTR_ERR(priv->clkin); 1346 dev_err_probe(dev, ret, "failed to parse 'clkin'\n"); 1347 goto err_mutex_destroy; 1348 } 1349 1350 ret = ub953_parse_dt(priv); 1351 if (ret) 1352 goto err_mutex_destroy; 1353 1354 ret = ub953_hw_init(priv); 1355 if (ret) 1356 goto err_mutex_destroy; 1357 1358 ret = ub953_gpiochip_probe(priv); 1359 if (ret) { 1360 dev_err_probe(dev, ret, "Failed to init gpiochip\n"); 1361 goto err_mutex_destroy; 1362 } 1363 1364 ret = ub953_register_clkout(priv); 1365 if (ret) { 1366 dev_err_probe(dev, ret, "Failed to register clkout\n"); 1367 goto err_gpiochip_remove; 1368 } 1369 1370 ret = ub953_subdev_init(priv); 1371 if (ret) 1372 goto err_gpiochip_remove; 1373 1374 ret = ub953_add_i2c_adapter(priv); 1375 if (ret) { 1376 dev_err_probe(dev, ret, "failed to add remote i2c adapter\n"); 1377 goto err_subdev_uninit; 1378 } 1379 1380 return 0; 1381 1382 err_subdev_uninit: 1383 ub953_subdev_uninit(priv); 1384 err_gpiochip_remove: 1385 ub953_gpiochip_remove(priv); 1386 err_mutex_destroy: 1387 mutex_destroy(&priv->reg_lock); 1388 1389 return ret; 1390 } 1391 1392 static void ub953_remove(struct i2c_client *client) 1393 { 1394 struct v4l2_subdev *sd = i2c_get_clientdata(client); 1395 struct ub953_data *priv = sd_to_ub953(sd); 1396 1397 i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port); 1398 1399 ub953_subdev_uninit(priv); 1400 1401 ub953_gpiochip_remove(priv); 1402 mutex_destroy(&priv->reg_lock); 1403 } 1404 1405 static const struct ub953_hw_data ds90ub953_hw = { 1406 .model = "ub953", 1407 }; 1408 1409 static const struct ub953_hw_data ds90ub971_hw = { 1410 .model = "ub971", 1411 .is_ub971 = true, 1412 }; 1413 1414 static const struct i2c_device_id ub953_id[] = { 1415 { "ds90ub953-q1", (kernel_ulong_t)&ds90ub953_hw }, 1416 { "ds90ub971-q1", (kernel_ulong_t)&ds90ub971_hw }, 1417 {} 1418 }; 1419 MODULE_DEVICE_TABLE(i2c, ub953_id); 1420 1421 static const struct of_device_id ub953_dt_ids[] = { 1422 { .compatible = "ti,ds90ub953-q1", .data = &ds90ub953_hw }, 1423 { .compatible = "ti,ds90ub971-q1", .data = &ds90ub971_hw }, 1424 {} 1425 }; 1426 MODULE_DEVICE_TABLE(of, ub953_dt_ids); 1427 1428 static struct i2c_driver ds90ub953_driver = { 1429 .probe = ub953_probe, 1430 .remove = ub953_remove, 1431 .id_table = ub953_id, 1432 .driver = { 1433 .name = "ds90ub953", 1434 .of_match_table = ub953_dt_ids, 1435 }, 1436 }; 1437 module_i2c_driver(ds90ub953_driver); 1438 1439 MODULE_LICENSE("GPL"); 1440 MODULE_DESCRIPTION("Texas Instruments FPD-Link III/IV CSI-2 Serializers Driver"); 1441 MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>"); 1442 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>"); 1443 MODULE_IMPORT_NS("I2C_ATR"); 1444