1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Texas Instruments DS90UB913 video serializer 4 * 5 * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net> 6 * 7 * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net> 8 * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 9 */ 10 11 #include <linux/bitfield.h> 12 #include <linux/clk-provider.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/gpio/driver.h> 16 #include <linux/i2c-atr.h> 17 #include <linux/i2c.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/property.h> 21 #include <linux/regmap.h> 22 23 #include <media/i2c/ds90ub9xx.h> 24 #include <media/v4l2-fwnode.h> 25 #include <media/v4l2-mediabus.h> 26 #include <media/v4l2-subdev.h> 27 28 #define UB913_PAD_SINK 0 29 #define UB913_PAD_SOURCE 1 30 31 /* 32 * UB913 has 4 gpios, but gpios 3 and 4 are reserved for external oscillator 33 * mode. Thus we only support 2 gpios for now. 34 */ 35 #define UB913_NUM_GPIOS 2 36 37 #define UB913_REG_RESET_CTL 0x01 38 #define UB913_REG_RESET_CTL_DIGITAL_RESET_1 BIT(1) 39 #define UB913_REG_RESET_CTL_DIGITAL_RESET_0 BIT(0) 40 41 #define UB913_REG_GENERAL_CFG 0x03 42 #define UB913_REG_GENERAL_CFG_CRC_ERR_RESET BIT(5) 43 #define UB913_REG_GENERAL_CFG_PCLK_RISING BIT(0) 44 45 #define UB913_REG_MODE_SEL 0x05 46 #define UB913_REG_MODE_SEL_MODE_OVERRIDE BIT(5) 47 #define UB913_REG_MODE_SEL_MODE_UP_TO_DATE BIT(4) 48 #define UB913_REG_MODE_SEL_MODE_MASK GENMASK(3, 0) 49 50 #define UB913_REG_CRC_ERRORS_LSB 0x0a 51 #define UB913_REG_CRC_ERRORS_MSB 0x0b 52 53 #define UB913_REG_GENERAL_STATUS 0x0c 54 55 #define UB913_REG_GPIO_CFG(n) (0x0d + (n)) 56 #define UB913_REG_GPIO_CFG_ENABLE(n) BIT(0 + (n) * 4) 57 #define UB913_REG_GPIO_CFG_DIR_INPUT(n) BIT(1 + (n) * 4) 58 #define UB913_REG_GPIO_CFG_REMOTE_EN(n) BIT(2 + (n) * 4) 59 #define UB913_REG_GPIO_CFG_OUT_VAL(n) BIT(3 + (n) * 4) 60 #define UB913_REG_GPIO_CFG_MASK(n) (0xf << ((n) * 4)) 61 62 #define UB913_REG_SCL_HIGH_TIME 0x11 63 #define UB913_REG_SCL_LOW_TIME 0x12 64 65 #define UB913_REG_PLL_OVR 0x35 66 67 struct ub913_data { 68 struct i2c_client *client; 69 struct regmap *regmap; 70 struct clk *clkin; 71 72 struct gpio_chip gpio_chip; 73 74 struct v4l2_subdev sd; 75 struct media_pad pads[2]; 76 77 struct v4l2_async_notifier notifier; 78 79 struct v4l2_subdev *source_sd; 80 u16 source_sd_pad; 81 82 u64 enabled_source_streams; 83 84 struct clk_hw *clkout_clk_hw; 85 86 struct ds90ub9xx_platform_data *plat_data; 87 88 bool pclk_polarity_rising; 89 }; 90 91 static inline struct ub913_data *sd_to_ub913(struct v4l2_subdev *sd) 92 { 93 return container_of(sd, struct ub913_data, sd); 94 } 95 96 struct ub913_format_info { 97 u32 incode; 98 u32 outcode; 99 }; 100 101 static const struct ub913_format_info ub913_formats[] = { 102 /* Only RAW10 with 8-bit payload is supported at the moment */ 103 { .incode = MEDIA_BUS_FMT_YUYV8_2X8, .outcode = MEDIA_BUS_FMT_YUYV8_1X16 }, 104 { .incode = MEDIA_BUS_FMT_UYVY8_2X8, .outcode = MEDIA_BUS_FMT_UYVY8_1X16 }, 105 { .incode = MEDIA_BUS_FMT_VYUY8_2X8, .outcode = MEDIA_BUS_FMT_VYUY8_1X16 }, 106 { .incode = MEDIA_BUS_FMT_YVYU8_2X8, .outcode = MEDIA_BUS_FMT_YVYU8_1X16 }, 107 }; 108 109 static const struct ub913_format_info *ub913_find_format(u32 incode) 110 { 111 unsigned int i; 112 113 for (i = 0; i < ARRAY_SIZE(ub913_formats); i++) { 114 if (ub913_formats[i].incode == incode) 115 return &ub913_formats[i]; 116 } 117 118 return NULL; 119 } 120 121 static int ub913_read(const struct ub913_data *priv, u8 reg, u8 *val, 122 int *err) 123 { 124 unsigned int v; 125 int ret; 126 127 if (err && *err) 128 return *err; 129 130 ret = regmap_read(priv->regmap, reg, &v); 131 if (ret) { 132 dev_err(&priv->client->dev, 133 "Cannot read register 0x%02x: %d!\n", reg, ret); 134 goto out; 135 } 136 137 *val = v; 138 139 out: 140 if (ret && err) 141 *err = ret; 142 143 return ret; 144 } 145 146 static int ub913_write(const struct ub913_data *priv, u8 reg, u8 val, 147 int *err) 148 { 149 int ret; 150 151 if (err && *err) 152 return *err; 153 154 ret = regmap_write(priv->regmap, reg, val); 155 if (ret < 0) 156 dev_err(&priv->client->dev, 157 "Cannot write register 0x%02x: %d!\n", reg, ret); 158 159 if (ret && err) 160 *err = ret; 161 162 return ret; 163 } 164 165 static int ub913_update_bits(const struct ub913_data *priv, u8 reg, u8 mask, 166 u8 val, int *err) 167 { 168 int ret; 169 170 if (err && *err) 171 return *err; 172 173 ret = regmap_update_bits(priv->regmap, reg, mask, val); 174 if (ret < 0) 175 dev_err(&priv->client->dev, 176 "Cannot update register 0x%02x %d!\n", reg, ret); 177 178 if (ret && err) 179 *err = ret; 180 181 return ret; 182 } 183 184 /* 185 * GPIO chip 186 */ 187 static int ub913_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) 188 { 189 return GPIO_LINE_DIRECTION_OUT; 190 } 191 192 static int ub913_gpio_direction_out(struct gpio_chip *gc, unsigned int offset, 193 int value) 194 { 195 struct ub913_data *priv = gpiochip_get_data(gc); 196 unsigned int reg_idx = offset / 2; 197 unsigned int field_idx = offset % 2; 198 199 return regmap_update_bits(priv->regmap, UB913_REG_GPIO_CFG(reg_idx), 200 UB913_REG_GPIO_CFG_MASK(field_idx), 201 UB913_REG_GPIO_CFG_ENABLE(field_idx) | 202 (value ? UB913_REG_GPIO_CFG_OUT_VAL(field_idx) : 203 0)); 204 } 205 206 static int ub913_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 207 { 208 return ub913_gpio_direction_out(gc, offset, value); 209 } 210 211 static int ub913_gpio_of_xlate(struct gpio_chip *gc, 212 const struct of_phandle_args *gpiospec, 213 u32 *flags) 214 { 215 if (flags) 216 *flags = gpiospec->args[1]; 217 218 return gpiospec->args[0]; 219 } 220 221 static int ub913_gpiochip_probe(struct ub913_data *priv) 222 { 223 struct device *dev = &priv->client->dev; 224 struct gpio_chip *gc = &priv->gpio_chip; 225 int ret; 226 227 /* Initialize GPIOs 0 and 1 to local control, tri-state */ 228 ub913_write(priv, UB913_REG_GPIO_CFG(0), 0, NULL); 229 230 gc->label = dev_name(dev); 231 gc->parent = dev; 232 gc->owner = THIS_MODULE; 233 gc->base = -1; 234 gc->can_sleep = true; 235 gc->ngpio = UB913_NUM_GPIOS; 236 gc->get_direction = ub913_gpio_get_direction; 237 gc->direction_output = ub913_gpio_direction_out; 238 gc->set = ub913_gpio_set; 239 gc->of_xlate = ub913_gpio_of_xlate; 240 gc->of_gpio_n_cells = 2; 241 242 ret = gpiochip_add_data(gc, priv); 243 if (ret) { 244 dev_err(dev, "Failed to add GPIOs: %d\n", ret); 245 return ret; 246 } 247 248 return 0; 249 } 250 251 static void ub913_gpiochip_remove(struct ub913_data *priv) 252 { 253 gpiochip_remove(&priv->gpio_chip); 254 } 255 256 static const struct regmap_config ub913_regmap_config = { 257 .name = "ds90ub913", 258 .reg_bits = 8, 259 .val_bits = 8, 260 .reg_format_endian = REGMAP_ENDIAN_DEFAULT, 261 .val_format_endian = REGMAP_ENDIAN_DEFAULT, 262 }; 263 264 /* 265 * V4L2 266 */ 267 268 static int ub913_enable_streams(struct v4l2_subdev *sd, 269 struct v4l2_subdev_state *state, u32 pad, 270 u64 streams_mask) 271 { 272 struct ub913_data *priv = sd_to_ub913(sd); 273 u64 sink_streams; 274 int ret; 275 276 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE, 277 UB913_PAD_SINK, 278 &streams_mask); 279 280 ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad, 281 sink_streams); 282 if (ret) 283 return ret; 284 285 priv->enabled_source_streams |= streams_mask; 286 287 return 0; 288 } 289 290 static int ub913_disable_streams(struct v4l2_subdev *sd, 291 struct v4l2_subdev_state *state, u32 pad, 292 u64 streams_mask) 293 { 294 struct ub913_data *priv = sd_to_ub913(sd); 295 u64 sink_streams; 296 int ret; 297 298 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE, 299 UB913_PAD_SINK, 300 &streams_mask); 301 302 ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad, 303 sink_streams); 304 if (ret) 305 return ret; 306 307 priv->enabled_source_streams &= ~streams_mask; 308 309 return 0; 310 } 311 312 static int _ub913_set_routing(struct v4l2_subdev *sd, 313 struct v4l2_subdev_state *state, 314 struct v4l2_subdev_krouting *routing) 315 { 316 static const struct v4l2_mbus_framefmt in_format = { 317 .width = 640, 318 .height = 480, 319 .code = MEDIA_BUS_FMT_UYVY8_2X8, 320 .field = V4L2_FIELD_NONE, 321 .colorspace = V4L2_COLORSPACE_SRGB, 322 .ycbcr_enc = V4L2_YCBCR_ENC_601, 323 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 324 .xfer_func = V4L2_XFER_FUNC_SRGB, 325 }; 326 static const struct v4l2_mbus_framefmt out_format = { 327 .width = 640, 328 .height = 480, 329 .code = MEDIA_BUS_FMT_UYVY8_1X16, 330 .field = V4L2_FIELD_NONE, 331 .colorspace = V4L2_COLORSPACE_SRGB, 332 .ycbcr_enc = V4L2_YCBCR_ENC_601, 333 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 334 .xfer_func = V4L2_XFER_FUNC_SRGB, 335 }; 336 struct v4l2_subdev_route *route; 337 int ret; 338 339 ret = v4l2_subdev_routing_validate(sd, routing, 340 V4L2_SUBDEV_ROUTING_ONLY_1_TO_1); 341 if (ret) 342 return ret; 343 344 ret = v4l2_subdev_set_routing(sd, state, routing); 345 if (ret) 346 return ret; 347 348 for_each_active_route(&state->routing, route) { 349 struct v4l2_mbus_framefmt *fmt; 350 351 fmt = v4l2_subdev_state_get_format(state, route->sink_pad, 352 route->sink_stream); 353 *fmt = in_format; 354 fmt = v4l2_subdev_state_get_format(state, route->source_pad, 355 route->source_stream); 356 *fmt = out_format; 357 } 358 359 return 0; 360 } 361 362 static int ub913_set_routing(struct v4l2_subdev *sd, 363 struct v4l2_subdev_state *state, 364 enum v4l2_subdev_format_whence which, 365 struct v4l2_subdev_krouting *routing) 366 { 367 struct ub913_data *priv = sd_to_ub913(sd); 368 369 if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams) 370 return -EBUSY; 371 372 return _ub913_set_routing(sd, state, routing); 373 } 374 375 static int ub913_set_fmt(struct v4l2_subdev *sd, 376 struct v4l2_subdev_state *state, 377 struct v4l2_subdev_format *format) 378 { 379 struct ub913_data *priv = sd_to_ub913(sd); 380 struct v4l2_mbus_framefmt *fmt; 381 const struct ub913_format_info *finfo; 382 383 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE && 384 priv->enabled_source_streams) 385 return -EBUSY; 386 387 /* Source format is fully defined by the sink format, so not settable */ 388 if (format->pad == UB913_PAD_SOURCE) 389 return v4l2_subdev_get_fmt(sd, state, format); 390 391 finfo = ub913_find_format(format->format.code); 392 if (!finfo) { 393 finfo = &ub913_formats[0]; 394 format->format.code = finfo->incode; 395 } 396 397 /* Set sink format */ 398 fmt = v4l2_subdev_state_get_format(state, format->pad, format->stream); 399 if (!fmt) 400 return -EINVAL; 401 402 *fmt = format->format; 403 404 /* Propagate to source format, and adjust the mbus code */ 405 fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad, 406 format->stream); 407 if (!fmt) 408 return -EINVAL; 409 410 *fmt = format->format; 411 412 fmt->code = finfo->outcode; 413 414 return 0; 415 } 416 417 static int ub913_init_state(struct v4l2_subdev *sd, 418 struct v4l2_subdev_state *state) 419 { 420 struct v4l2_subdev_route routes[] = { 421 { 422 .sink_pad = UB913_PAD_SINK, 423 .sink_stream = 0, 424 .source_pad = UB913_PAD_SOURCE, 425 .source_stream = 0, 426 .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE, 427 }, 428 }; 429 430 struct v4l2_subdev_krouting routing = { 431 .num_routes = ARRAY_SIZE(routes), 432 .routes = routes, 433 }; 434 435 return _ub913_set_routing(sd, state, &routing); 436 } 437 438 static int ub913_log_status(struct v4l2_subdev *sd) 439 { 440 struct ub913_data *priv = sd_to_ub913(sd); 441 struct device *dev = &priv->client->dev; 442 u8 v, v1, v2; 443 int ret; 444 445 ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL); 446 if (ret) 447 return ret; 448 449 dev_info(dev, "MODE_SEL %#02x\n", v); 450 451 ub913_read(priv, UB913_REG_CRC_ERRORS_LSB, &v1, &ret); 452 ub913_read(priv, UB913_REG_CRC_ERRORS_MSB, &v2, &ret); 453 if (ret) 454 return ret; 455 456 dev_info(dev, "CRC errors %u\n", v1 | (v2 << 8)); 457 458 /* clear CRC errors */ 459 ub913_read(priv, UB913_REG_GENERAL_CFG, &v, &ret); 460 ub913_write(priv, UB913_REG_GENERAL_CFG, 461 v | UB913_REG_GENERAL_CFG_CRC_ERR_RESET, &ret); 462 ub913_write(priv, UB913_REG_GENERAL_CFG, v, &ret); 463 464 if (ret) 465 return ret; 466 467 ret = ub913_read(priv, UB913_REG_GENERAL_STATUS, &v, NULL); 468 if (ret) 469 return ret; 470 471 dev_info(dev, "GENERAL_STATUS %#02x\n", v); 472 473 ret = ub913_read(priv, UB913_REG_PLL_OVR, &v, NULL); 474 if (ret) 475 return ret; 476 477 dev_info(dev, "PLL_OVR %#02x\n", v); 478 479 return 0; 480 } 481 482 static const struct v4l2_subdev_core_ops ub913_subdev_core_ops = { 483 .log_status = ub913_log_status, 484 }; 485 486 static const struct v4l2_subdev_pad_ops ub913_pad_ops = { 487 .enable_streams = ub913_enable_streams, 488 .disable_streams = ub913_disable_streams, 489 .set_routing = ub913_set_routing, 490 .get_frame_desc = v4l2_subdev_get_frame_desc_passthrough, 491 .get_fmt = v4l2_subdev_get_fmt, 492 .set_fmt = ub913_set_fmt, 493 }; 494 495 static const struct v4l2_subdev_ops ub913_subdev_ops = { 496 .core = &ub913_subdev_core_ops, 497 .pad = &ub913_pad_ops, 498 }; 499 500 static const struct v4l2_subdev_internal_ops ub913_internal_ops = { 501 .init_state = ub913_init_state, 502 }; 503 504 static const struct media_entity_operations ub913_entity_ops = { 505 .link_validate = v4l2_subdev_link_validate, 506 }; 507 508 static int ub913_notify_bound(struct v4l2_async_notifier *notifier, 509 struct v4l2_subdev *source_subdev, 510 struct v4l2_async_connection *asd) 511 { 512 struct ub913_data *priv = sd_to_ub913(notifier->sd); 513 struct device *dev = &priv->client->dev; 514 int ret; 515 516 ret = media_entity_get_fwnode_pad(&source_subdev->entity, 517 source_subdev->fwnode, 518 MEDIA_PAD_FL_SOURCE); 519 if (ret < 0) { 520 dev_err(dev, "Failed to find pad for %s\n", 521 source_subdev->name); 522 return ret; 523 } 524 525 priv->source_sd = source_subdev; 526 priv->source_sd_pad = ret; 527 528 ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad, 529 &priv->sd.entity, UB913_PAD_SINK, 530 MEDIA_LNK_FL_ENABLED | 531 MEDIA_LNK_FL_IMMUTABLE); 532 if (ret) { 533 dev_err(dev, "Unable to link %s:%u -> %s:0\n", 534 source_subdev->name, priv->source_sd_pad, 535 priv->sd.name); 536 return ret; 537 } 538 539 return 0; 540 } 541 542 static const struct v4l2_async_notifier_operations ub913_notify_ops = { 543 .bound = ub913_notify_bound, 544 }; 545 546 static int ub913_v4l2_notifier_register(struct ub913_data *priv) 547 { 548 struct device *dev = &priv->client->dev; 549 struct v4l2_async_connection *asd; 550 struct fwnode_handle *ep_fwnode; 551 int ret; 552 553 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 554 UB913_PAD_SINK, 0, 0); 555 if (!ep_fwnode) { 556 dev_err(dev, "No graph endpoint\n"); 557 return -ENODEV; 558 } 559 560 v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd); 561 562 asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode, 563 struct v4l2_async_connection); 564 565 fwnode_handle_put(ep_fwnode); 566 567 if (IS_ERR(asd)) { 568 dev_err(dev, "Failed to add subdev: %pe", asd); 569 v4l2_async_nf_cleanup(&priv->notifier); 570 return PTR_ERR(asd); 571 } 572 573 priv->notifier.ops = &ub913_notify_ops; 574 575 ret = v4l2_async_nf_register(&priv->notifier); 576 if (ret) { 577 dev_err(dev, "Failed to register subdev_notifier"); 578 v4l2_async_nf_cleanup(&priv->notifier); 579 return ret; 580 } 581 582 return 0; 583 } 584 585 static void ub913_v4l2_nf_unregister(struct ub913_data *priv) 586 { 587 v4l2_async_nf_unregister(&priv->notifier); 588 v4l2_async_nf_cleanup(&priv->notifier); 589 } 590 591 static int ub913_register_clkout(struct ub913_data *priv) 592 { 593 struct device *dev = &priv->client->dev; 594 const char *name; 595 int ret; 596 597 name = kasprintf(GFP_KERNEL, "ds90ub913.%s.clk_out", dev_name(dev)); 598 if (!name) 599 return -ENOMEM; 600 601 priv->clkout_clk_hw = devm_clk_hw_register_fixed_factor(dev, name, 602 __clk_get_name(priv->clkin), 0, 1, 2); 603 604 kfree(name); 605 606 if (IS_ERR(priv->clkout_clk_hw)) 607 return dev_err_probe(dev, PTR_ERR(priv->clkout_clk_hw), 608 "Cannot register clkout hw\n"); 609 610 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 611 priv->clkout_clk_hw); 612 if (ret) 613 return dev_err_probe(dev, ret, 614 "Cannot add OF clock provider\n"); 615 616 return 0; 617 } 618 619 static int ub913_i2c_master_init(struct ub913_data *priv) 620 { 621 /* i2c fast mode */ 622 u32 scl_high = 600 + 300; /* high period + rise time, ns */ 623 u32 scl_low = 1300 + 300; /* low period + fall time, ns */ 624 unsigned long ref; 625 int ret; 626 627 ref = clk_get_rate(priv->clkin) / 2; 628 629 scl_high = div64_u64((u64)scl_high * ref, 1000000000); 630 scl_low = div64_u64((u64)scl_low * ref, 1000000000); 631 632 ret = ub913_write(priv, UB913_REG_SCL_HIGH_TIME, scl_high, NULL); 633 if (ret) 634 return ret; 635 636 ret = ub913_write(priv, UB913_REG_SCL_LOW_TIME, scl_low, NULL); 637 if (ret) 638 return ret; 639 640 return 0; 641 } 642 643 static int ub913_add_i2c_adapter(struct ub913_data *priv) 644 { 645 struct device *dev = &priv->client->dev; 646 struct i2c_atr_adap_desc desc = { }; 647 struct fwnode_handle *i2c_handle; 648 int ret; 649 650 i2c_handle = device_get_named_child_node(dev, "i2c"); 651 if (!i2c_handle) 652 return 0; 653 654 desc.chan_id = priv->plat_data->port; 655 desc.parent = dev; 656 desc.bus_handle = i2c_handle; 657 desc.num_aliases = 0; 658 659 ret = i2c_atr_add_adapter(priv->plat_data->atr, &desc); 660 661 fwnode_handle_put(i2c_handle); 662 663 if (ret) 664 return ret; 665 666 return 0; 667 } 668 669 static int ub913_parse_dt(struct ub913_data *priv) 670 { 671 struct device *dev = &priv->client->dev; 672 struct v4l2_fwnode_endpoint vep = { 673 .bus_type = V4L2_MBUS_PARALLEL, 674 }; 675 struct fwnode_handle *ep_fwnode; 676 int ret; 677 678 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 679 UB913_PAD_SINK, 0, 0); 680 if (!ep_fwnode) 681 return dev_err_probe(dev, -ENOENT, "No sink endpoint\n"); 682 683 ret = v4l2_fwnode_endpoint_parse(ep_fwnode, &vep); 684 685 fwnode_handle_put(ep_fwnode); 686 687 if (ret) 688 return dev_err_probe(dev, ret, 689 "failed to parse sink endpoint data\n"); 690 691 if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_RISING) 692 priv->pclk_polarity_rising = true; 693 else if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) 694 priv->pclk_polarity_rising = false; 695 else 696 return dev_err_probe(dev, -EINVAL, 697 "bad value for 'pclk-sample'\n"); 698 699 return 0; 700 } 701 702 static int ub913_hw_init(struct ub913_data *priv) 703 { 704 struct device *dev = &priv->client->dev; 705 bool mode_override; 706 u8 mode; 707 int ret; 708 u8 v; 709 710 ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL); 711 if (ret) 712 return ret; 713 714 if (!(v & UB913_REG_MODE_SEL_MODE_UP_TO_DATE)) 715 return dev_err_probe(dev, -ENODEV, 716 "Mode value not stabilized\n"); 717 718 mode_override = v & UB913_REG_MODE_SEL_MODE_OVERRIDE; 719 mode = v & UB913_REG_MODE_SEL_MODE_MASK; 720 721 dev_dbg(dev, "mode from %s: %#x\n", 722 mode_override ? "reg" : "deserializer", mode); 723 724 ret = ub913_i2c_master_init(priv); 725 if (ret) 726 return dev_err_probe(dev, ret, "i2c master init failed\n"); 727 728 ret = ub913_update_bits(priv, UB913_REG_GENERAL_CFG, 729 UB913_REG_GENERAL_CFG_PCLK_RISING, 730 FIELD_PREP(UB913_REG_GENERAL_CFG_PCLK_RISING, 731 priv->pclk_polarity_rising), NULL); 732 733 if (ret) 734 return ret; 735 736 return 0; 737 } 738 739 static int ub913_subdev_init(struct ub913_data *priv) 740 { 741 struct device *dev = &priv->client->dev; 742 int ret; 743 744 v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub913_subdev_ops); 745 priv->sd.internal_ops = &ub913_internal_ops; 746 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS; 747 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; 748 priv->sd.entity.ops = &ub913_entity_ops; 749 750 priv->pads[0].flags = MEDIA_PAD_FL_SINK; 751 priv->pads[1].flags = MEDIA_PAD_FL_SOURCE; 752 753 ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads); 754 if (ret) 755 return dev_err_probe(dev, ret, "Failed to init pads\n"); 756 757 ret = v4l2_subdev_init_finalize(&priv->sd); 758 if (ret) 759 goto err_entity_cleanup; 760 761 ret = ub913_v4l2_notifier_register(priv); 762 if (ret) { 763 dev_err_probe(dev, ret, 764 "v4l2 subdev notifier register failed\n"); 765 goto err_subdev_cleanup; 766 } 767 768 ret = v4l2_async_register_subdev(&priv->sd); 769 if (ret) { 770 dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n"); 771 goto err_unreg_notif; 772 } 773 774 return 0; 775 776 err_unreg_notif: 777 ub913_v4l2_nf_unregister(priv); 778 err_subdev_cleanup: 779 v4l2_subdev_cleanup(&priv->sd); 780 err_entity_cleanup: 781 media_entity_cleanup(&priv->sd.entity); 782 783 return ret; 784 } 785 786 static void ub913_subdev_uninit(struct ub913_data *priv) 787 { 788 v4l2_async_unregister_subdev(&priv->sd); 789 ub913_v4l2_nf_unregister(priv); 790 v4l2_subdev_cleanup(&priv->sd); 791 media_entity_cleanup(&priv->sd.entity); 792 } 793 794 static int ub913_probe(struct i2c_client *client) 795 { 796 struct device *dev = &client->dev; 797 struct ub913_data *priv; 798 int ret; 799 800 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 801 if (!priv) 802 return -ENOMEM; 803 804 priv->client = client; 805 806 priv->plat_data = dev_get_platdata(&client->dev); 807 if (!priv->plat_data) 808 return dev_err_probe(dev, -ENODEV, "Platform data missing\n"); 809 810 priv->regmap = devm_regmap_init_i2c(client, &ub913_regmap_config); 811 if (IS_ERR(priv->regmap)) 812 return dev_err_probe(dev, PTR_ERR(priv->regmap), 813 "Failed to init regmap\n"); 814 815 /* 816 * ub913 can also work without ext clock, but that is not supported by 817 * the driver yet. 818 */ 819 priv->clkin = devm_clk_get(dev, "clkin"); 820 if (IS_ERR(priv->clkin)) 821 return dev_err_probe(dev, PTR_ERR(priv->clkin), 822 "Cannot get CLKIN\n"); 823 824 ret = ub913_parse_dt(priv); 825 if (ret) 826 return ret; 827 828 ret = ub913_hw_init(priv); 829 if (ret) 830 return ret; 831 832 ret = ub913_gpiochip_probe(priv); 833 if (ret) 834 return dev_err_probe(dev, ret, "Failed to init gpiochip\n"); 835 836 ret = ub913_register_clkout(priv); 837 if (ret) { 838 dev_err_probe(dev, ret, "Failed to register clkout\n"); 839 goto err_gpiochip_remove; 840 } 841 842 ret = ub913_subdev_init(priv); 843 if (ret) 844 goto err_gpiochip_remove; 845 846 ret = ub913_add_i2c_adapter(priv); 847 if (ret) { 848 dev_err_probe(dev, ret, "failed to add remote i2c adapter\n"); 849 goto err_subdev_uninit; 850 } 851 852 return 0; 853 854 err_subdev_uninit: 855 ub913_subdev_uninit(priv); 856 err_gpiochip_remove: 857 ub913_gpiochip_remove(priv); 858 859 return ret; 860 } 861 862 static void ub913_remove(struct i2c_client *client) 863 { 864 struct v4l2_subdev *sd = i2c_get_clientdata(client); 865 struct ub913_data *priv = sd_to_ub913(sd); 866 867 i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port); 868 869 ub913_subdev_uninit(priv); 870 871 ub913_gpiochip_remove(priv); 872 } 873 874 static const struct i2c_device_id ub913_id[] = { 875 { "ds90ub913a-q1" }, 876 {} 877 }; 878 MODULE_DEVICE_TABLE(i2c, ub913_id); 879 880 static const struct of_device_id ub913_dt_ids[] = { 881 { .compatible = "ti,ds90ub913a-q1" }, 882 {} 883 }; 884 MODULE_DEVICE_TABLE(of, ub913_dt_ids); 885 886 static struct i2c_driver ds90ub913_driver = { 887 .probe = ub913_probe, 888 .remove = ub913_remove, 889 .id_table = ub913_id, 890 .driver = { 891 .name = "ds90ub913a", 892 .of_match_table = ub913_dt_ids, 893 }, 894 }; 895 module_i2c_driver(ds90ub913_driver); 896 897 MODULE_LICENSE("GPL"); 898 MODULE_DESCRIPTION("Texas Instruments DS90UB913 FPD-Link III Serializer Driver"); 899 MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>"); 900 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>"); 901 MODULE_IMPORT_NS("I2C_ATR"); 902