1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Texas Instruments DS90UB913 video serializer 4 * 5 * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net> 6 * 7 * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net> 8 * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 9 */ 10 11 #include <linux/bitfield.h> 12 #include <linux/clk-provider.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/gpio/driver.h> 16 #include <linux/i2c-atr.h> 17 #include <linux/i2c.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/property.h> 21 #include <linux/regmap.h> 22 23 #include <media/i2c/ds90ub9xx.h> 24 #include <media/v4l2-fwnode.h> 25 #include <media/v4l2-mediabus.h> 26 #include <media/v4l2-subdev.h> 27 28 #define UB913_PAD_SINK 0 29 #define UB913_PAD_SOURCE 1 30 31 /* 32 * UB913 has 4 gpios, but gpios 3 and 4 are reserved for external oscillator 33 * mode. Thus we only support 2 gpios for now. 34 */ 35 #define UB913_NUM_GPIOS 2 36 37 #define UB913_REG_RESET_CTL 0x01 38 #define UB913_REG_RESET_CTL_DIGITAL_RESET_1 BIT(1) 39 #define UB913_REG_RESET_CTL_DIGITAL_RESET_0 BIT(0) 40 41 #define UB913_REG_GENERAL_CFG 0x03 42 #define UB913_REG_GENERAL_CFG_CRC_ERR_RESET BIT(5) 43 #define UB913_REG_GENERAL_CFG_PCLK_RISING BIT(0) 44 45 #define UB913_REG_MODE_SEL 0x05 46 #define UB913_REG_MODE_SEL_MODE_OVERRIDE BIT(5) 47 #define UB913_REG_MODE_SEL_MODE_UP_TO_DATE BIT(4) 48 #define UB913_REG_MODE_SEL_MODE_MASK GENMASK(3, 0) 49 50 #define UB913_REG_CRC_ERRORS_LSB 0x0a 51 #define UB913_REG_CRC_ERRORS_MSB 0x0b 52 53 #define UB913_REG_GENERAL_STATUS 0x0c 54 55 #define UB913_REG_GPIO_CFG(n) (0x0d + (n)) 56 #define UB913_REG_GPIO_CFG_ENABLE(n) BIT(0 + (n) * 4) 57 #define UB913_REG_GPIO_CFG_DIR_INPUT(n) BIT(1 + (n) * 4) 58 #define UB913_REG_GPIO_CFG_REMOTE_EN(n) BIT(2 + (n) * 4) 59 #define UB913_REG_GPIO_CFG_OUT_VAL(n) BIT(3 + (n) * 4) 60 #define UB913_REG_GPIO_CFG_MASK(n) (0xf << ((n) * 4)) 61 62 #define UB913_REG_SCL_HIGH_TIME 0x11 63 #define UB913_REG_SCL_LOW_TIME 0x12 64 65 #define UB913_REG_PLL_OVR 0x35 66 67 struct ub913_data { 68 struct i2c_client *client; 69 struct regmap *regmap; 70 struct clk *clkin; 71 72 struct gpio_chip gpio_chip; 73 74 struct v4l2_subdev sd; 75 struct media_pad pads[2]; 76 77 struct v4l2_async_notifier notifier; 78 79 struct v4l2_subdev *source_sd; 80 u16 source_sd_pad; 81 82 u64 enabled_source_streams; 83 84 struct clk_hw *clkout_clk_hw; 85 86 struct ds90ub9xx_platform_data *plat_data; 87 88 bool pclk_polarity_rising; 89 }; 90 91 static inline struct ub913_data *sd_to_ub913(struct v4l2_subdev *sd) 92 { 93 return container_of(sd, struct ub913_data, sd); 94 } 95 96 struct ub913_format_info { 97 u32 incode; 98 u32 outcode; 99 }; 100 101 static const struct ub913_format_info ub913_formats[] = { 102 /* Only RAW10 with 8-bit payload is supported at the moment */ 103 { .incode = MEDIA_BUS_FMT_YUYV8_2X8, .outcode = MEDIA_BUS_FMT_YUYV8_1X16 }, 104 { .incode = MEDIA_BUS_FMT_UYVY8_2X8, .outcode = MEDIA_BUS_FMT_UYVY8_1X16 }, 105 { .incode = MEDIA_BUS_FMT_VYUY8_2X8, .outcode = MEDIA_BUS_FMT_VYUY8_1X16 }, 106 { .incode = MEDIA_BUS_FMT_YVYU8_2X8, .outcode = MEDIA_BUS_FMT_YVYU8_1X16 }, 107 }; 108 109 static const struct ub913_format_info *ub913_find_format(u32 incode) 110 { 111 unsigned int i; 112 113 for (i = 0; i < ARRAY_SIZE(ub913_formats); i++) { 114 if (ub913_formats[i].incode == incode) 115 return &ub913_formats[i]; 116 } 117 118 return NULL; 119 } 120 121 static int ub913_read(const struct ub913_data *priv, u8 reg, u8 *val, 122 int *err) 123 { 124 unsigned int v; 125 int ret; 126 127 if (err && *err) 128 return *err; 129 130 ret = regmap_read(priv->regmap, reg, &v); 131 if (ret) { 132 dev_err(&priv->client->dev, 133 "Cannot read register 0x%02x: %d!\n", reg, ret); 134 goto out; 135 } 136 137 *val = v; 138 139 out: 140 if (ret && err) 141 *err = ret; 142 143 return ret; 144 } 145 146 static int ub913_write(const struct ub913_data *priv, u8 reg, u8 val, 147 int *err) 148 { 149 int ret; 150 151 if (err && *err) 152 return *err; 153 154 ret = regmap_write(priv->regmap, reg, val); 155 if (ret < 0) 156 dev_err(&priv->client->dev, 157 "Cannot write register 0x%02x: %d!\n", reg, ret); 158 159 if (ret && err) 160 *err = ret; 161 162 return ret; 163 } 164 165 static int ub913_update_bits(const struct ub913_data *priv, u8 reg, u8 mask, 166 u8 val, int *err) 167 { 168 int ret; 169 170 if (err && *err) 171 return *err; 172 173 ret = regmap_update_bits(priv->regmap, reg, mask, val); 174 if (ret < 0) 175 dev_err(&priv->client->dev, 176 "Cannot update register 0x%02x %d!\n", reg, ret); 177 178 if (ret && err) 179 *err = ret; 180 181 return ret; 182 } 183 184 /* 185 * GPIO chip 186 */ 187 static int ub913_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) 188 { 189 return GPIO_LINE_DIRECTION_OUT; 190 } 191 192 static int ub913_gpio_direction_out(struct gpio_chip *gc, unsigned int offset, 193 int value) 194 { 195 struct ub913_data *priv = gpiochip_get_data(gc); 196 unsigned int reg_idx = offset / 2; 197 unsigned int field_idx = offset % 2; 198 199 return regmap_update_bits(priv->regmap, UB913_REG_GPIO_CFG(reg_idx), 200 UB913_REG_GPIO_CFG_MASK(field_idx), 201 UB913_REG_GPIO_CFG_ENABLE(field_idx) | 202 (value ? UB913_REG_GPIO_CFG_OUT_VAL(field_idx) : 203 0)); 204 } 205 206 static int ub913_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 207 { 208 return ub913_gpio_direction_out(gc, offset, value); 209 } 210 211 static int ub913_gpio_of_xlate(struct gpio_chip *gc, 212 const struct of_phandle_args *gpiospec, 213 u32 *flags) 214 { 215 if (flags) 216 *flags = gpiospec->args[1]; 217 218 return gpiospec->args[0]; 219 } 220 221 static int ub913_gpiochip_probe(struct ub913_data *priv) 222 { 223 struct device *dev = &priv->client->dev; 224 struct gpio_chip *gc = &priv->gpio_chip; 225 int ret; 226 227 /* Initialize GPIOs 0 and 1 to local control, tri-state */ 228 ub913_write(priv, UB913_REG_GPIO_CFG(0), 0, NULL); 229 230 gc->label = dev_name(dev); 231 gc->parent = dev; 232 gc->owner = THIS_MODULE; 233 gc->base = -1; 234 gc->can_sleep = true; 235 gc->ngpio = UB913_NUM_GPIOS; 236 gc->get_direction = ub913_gpio_get_direction; 237 gc->direction_output = ub913_gpio_direction_out; 238 gc->set = ub913_gpio_set; 239 gc->of_xlate = ub913_gpio_of_xlate; 240 gc->of_gpio_n_cells = 2; 241 242 ret = gpiochip_add_data(gc, priv); 243 if (ret) { 244 dev_err(dev, "Failed to add GPIOs: %d\n", ret); 245 return ret; 246 } 247 248 return 0; 249 } 250 251 static void ub913_gpiochip_remove(struct ub913_data *priv) 252 { 253 gpiochip_remove(&priv->gpio_chip); 254 } 255 256 static const struct regmap_config ub913_regmap_config = { 257 .name = "ds90ub913", 258 .reg_bits = 8, 259 .val_bits = 8, 260 .reg_format_endian = REGMAP_ENDIAN_DEFAULT, 261 .val_format_endian = REGMAP_ENDIAN_DEFAULT, 262 }; 263 264 /* 265 * V4L2 266 */ 267 268 static int ub913_enable_streams(struct v4l2_subdev *sd, 269 struct v4l2_subdev_state *state, u32 pad, 270 u64 streams_mask) 271 { 272 struct ub913_data *priv = sd_to_ub913(sd); 273 u64 sink_streams; 274 int ret; 275 276 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE, 277 UB913_PAD_SINK, 278 &streams_mask); 279 280 ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad, 281 sink_streams); 282 if (ret) 283 return ret; 284 285 priv->enabled_source_streams |= streams_mask; 286 287 return 0; 288 } 289 290 static int ub913_disable_streams(struct v4l2_subdev *sd, 291 struct v4l2_subdev_state *state, u32 pad, 292 u64 streams_mask) 293 { 294 struct ub913_data *priv = sd_to_ub913(sd); 295 u64 sink_streams; 296 int ret; 297 298 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE, 299 UB913_PAD_SINK, 300 &streams_mask); 301 302 ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad, 303 sink_streams); 304 if (ret) 305 return ret; 306 307 priv->enabled_source_streams &= ~streams_mask; 308 309 return 0; 310 } 311 312 static int _ub913_set_routing(struct v4l2_subdev *sd, 313 struct v4l2_subdev_state *state, 314 struct v4l2_subdev_krouting *routing) 315 { 316 static const struct v4l2_mbus_framefmt in_format = { 317 .width = 640, 318 .height = 480, 319 .code = MEDIA_BUS_FMT_UYVY8_2X8, 320 .field = V4L2_FIELD_NONE, 321 .colorspace = V4L2_COLORSPACE_SRGB, 322 .ycbcr_enc = V4L2_YCBCR_ENC_601, 323 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 324 .xfer_func = V4L2_XFER_FUNC_SRGB, 325 }; 326 static const struct v4l2_mbus_framefmt out_format = { 327 .width = 640, 328 .height = 480, 329 .code = MEDIA_BUS_FMT_UYVY8_1X16, 330 .field = V4L2_FIELD_NONE, 331 .colorspace = V4L2_COLORSPACE_SRGB, 332 .ycbcr_enc = V4L2_YCBCR_ENC_601, 333 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 334 .xfer_func = V4L2_XFER_FUNC_SRGB, 335 }; 336 struct v4l2_subdev_stream_configs *stream_configs; 337 unsigned int i; 338 int ret; 339 340 ret = v4l2_subdev_routing_validate(sd, routing, 341 V4L2_SUBDEV_ROUTING_ONLY_1_TO_1); 342 if (ret) 343 return ret; 344 345 ret = v4l2_subdev_set_routing(sd, state, routing); 346 if (ret) 347 return ret; 348 349 stream_configs = &state->stream_configs; 350 351 for (i = 0; i < stream_configs->num_configs; i++) { 352 if (stream_configs->configs[i].pad == UB913_PAD_SINK) 353 stream_configs->configs[i].fmt = in_format; 354 else 355 stream_configs->configs[i].fmt = out_format; 356 } 357 358 return 0; 359 } 360 361 static int ub913_set_routing(struct v4l2_subdev *sd, 362 struct v4l2_subdev_state *state, 363 enum v4l2_subdev_format_whence which, 364 struct v4l2_subdev_krouting *routing) 365 { 366 struct ub913_data *priv = sd_to_ub913(sd); 367 368 if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams) 369 return -EBUSY; 370 371 return _ub913_set_routing(sd, state, routing); 372 } 373 374 static int ub913_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad, 375 struct v4l2_mbus_frame_desc *fd) 376 { 377 struct ub913_data *priv = sd_to_ub913(sd); 378 const struct v4l2_subdev_krouting *routing; 379 struct v4l2_mbus_frame_desc source_fd; 380 struct v4l2_subdev_route *route; 381 struct v4l2_subdev_state *state; 382 int ret; 383 384 if (pad != UB913_PAD_SOURCE) 385 return -EINVAL; 386 387 ret = v4l2_subdev_call(priv->source_sd, pad, get_frame_desc, 388 priv->source_sd_pad, &source_fd); 389 if (ret) 390 return ret; 391 392 fd->type = V4L2_MBUS_FRAME_DESC_TYPE_PARALLEL; 393 394 state = v4l2_subdev_lock_and_get_active_state(sd); 395 396 routing = &state->routing; 397 398 for_each_active_route(routing, route) { 399 unsigned int i; 400 401 if (route->source_pad != pad) 402 continue; 403 404 for (i = 0; i < source_fd.num_entries; i++) { 405 if (source_fd.entry[i].stream == route->sink_stream) 406 break; 407 } 408 409 if (i == source_fd.num_entries) { 410 dev_err(&priv->client->dev, 411 "Failed to find stream from source frame desc\n"); 412 ret = -EPIPE; 413 goto out_unlock; 414 } 415 416 fd->entry[fd->num_entries].stream = route->source_stream; 417 fd->entry[fd->num_entries].flags = source_fd.entry[i].flags; 418 fd->entry[fd->num_entries].length = source_fd.entry[i].length; 419 fd->entry[fd->num_entries].pixelcode = 420 source_fd.entry[i].pixelcode; 421 422 fd->num_entries++; 423 } 424 425 out_unlock: 426 v4l2_subdev_unlock_state(state); 427 428 return ret; 429 } 430 431 static int ub913_set_fmt(struct v4l2_subdev *sd, 432 struct v4l2_subdev_state *state, 433 struct v4l2_subdev_format *format) 434 { 435 struct ub913_data *priv = sd_to_ub913(sd); 436 struct v4l2_mbus_framefmt *fmt; 437 const struct ub913_format_info *finfo; 438 439 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE && 440 priv->enabled_source_streams) 441 return -EBUSY; 442 443 /* Source format is fully defined by the sink format, so not settable */ 444 if (format->pad == UB913_PAD_SOURCE) 445 return v4l2_subdev_get_fmt(sd, state, format); 446 447 finfo = ub913_find_format(format->format.code); 448 if (!finfo) { 449 finfo = &ub913_formats[0]; 450 format->format.code = finfo->incode; 451 } 452 453 /* Set sink format */ 454 fmt = v4l2_subdev_state_get_format(state, format->pad, format->stream); 455 if (!fmt) 456 return -EINVAL; 457 458 *fmt = format->format; 459 460 /* Propagate to source format, and adjust the mbus code */ 461 fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad, 462 format->stream); 463 if (!fmt) 464 return -EINVAL; 465 466 *fmt = format->format; 467 468 fmt->code = finfo->outcode; 469 470 return 0; 471 } 472 473 static int ub913_init_state(struct v4l2_subdev *sd, 474 struct v4l2_subdev_state *state) 475 { 476 struct v4l2_subdev_route routes[] = { 477 { 478 .sink_pad = UB913_PAD_SINK, 479 .sink_stream = 0, 480 .source_pad = UB913_PAD_SOURCE, 481 .source_stream = 0, 482 .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE, 483 }, 484 }; 485 486 struct v4l2_subdev_krouting routing = { 487 .num_routes = ARRAY_SIZE(routes), 488 .routes = routes, 489 }; 490 491 return _ub913_set_routing(sd, state, &routing); 492 } 493 494 static int ub913_log_status(struct v4l2_subdev *sd) 495 { 496 struct ub913_data *priv = sd_to_ub913(sd); 497 struct device *dev = &priv->client->dev; 498 u8 v, v1, v2; 499 int ret; 500 501 ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL); 502 if (ret) 503 return ret; 504 505 dev_info(dev, "MODE_SEL %#02x\n", v); 506 507 ub913_read(priv, UB913_REG_CRC_ERRORS_LSB, &v1, &ret); 508 ub913_read(priv, UB913_REG_CRC_ERRORS_MSB, &v2, &ret); 509 if (ret) 510 return ret; 511 512 dev_info(dev, "CRC errors %u\n", v1 | (v2 << 8)); 513 514 /* clear CRC errors */ 515 ub913_read(priv, UB913_REG_GENERAL_CFG, &v, &ret); 516 ub913_write(priv, UB913_REG_GENERAL_CFG, 517 v | UB913_REG_GENERAL_CFG_CRC_ERR_RESET, &ret); 518 ub913_write(priv, UB913_REG_GENERAL_CFG, v, &ret); 519 520 if (ret) 521 return ret; 522 523 ret = ub913_read(priv, UB913_REG_GENERAL_STATUS, &v, NULL); 524 if (ret) 525 return ret; 526 527 dev_info(dev, "GENERAL_STATUS %#02x\n", v); 528 529 ret = ub913_read(priv, UB913_REG_PLL_OVR, &v, NULL); 530 if (ret) 531 return ret; 532 533 dev_info(dev, "PLL_OVR %#02x\n", v); 534 535 return 0; 536 } 537 538 static const struct v4l2_subdev_core_ops ub913_subdev_core_ops = { 539 .log_status = ub913_log_status, 540 }; 541 542 static const struct v4l2_subdev_pad_ops ub913_pad_ops = { 543 .enable_streams = ub913_enable_streams, 544 .disable_streams = ub913_disable_streams, 545 .set_routing = ub913_set_routing, 546 .get_frame_desc = ub913_get_frame_desc, 547 .get_fmt = v4l2_subdev_get_fmt, 548 .set_fmt = ub913_set_fmt, 549 }; 550 551 static const struct v4l2_subdev_ops ub913_subdev_ops = { 552 .core = &ub913_subdev_core_ops, 553 .pad = &ub913_pad_ops, 554 }; 555 556 static const struct v4l2_subdev_internal_ops ub913_internal_ops = { 557 .init_state = ub913_init_state, 558 }; 559 560 static const struct media_entity_operations ub913_entity_ops = { 561 .link_validate = v4l2_subdev_link_validate, 562 }; 563 564 static int ub913_notify_bound(struct v4l2_async_notifier *notifier, 565 struct v4l2_subdev *source_subdev, 566 struct v4l2_async_connection *asd) 567 { 568 struct ub913_data *priv = sd_to_ub913(notifier->sd); 569 struct device *dev = &priv->client->dev; 570 int ret; 571 572 ret = media_entity_get_fwnode_pad(&source_subdev->entity, 573 source_subdev->fwnode, 574 MEDIA_PAD_FL_SOURCE); 575 if (ret < 0) { 576 dev_err(dev, "Failed to find pad for %s\n", 577 source_subdev->name); 578 return ret; 579 } 580 581 priv->source_sd = source_subdev; 582 priv->source_sd_pad = ret; 583 584 ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad, 585 &priv->sd.entity, UB913_PAD_SINK, 586 MEDIA_LNK_FL_ENABLED | 587 MEDIA_LNK_FL_IMMUTABLE); 588 if (ret) { 589 dev_err(dev, "Unable to link %s:%u -> %s:0\n", 590 source_subdev->name, priv->source_sd_pad, 591 priv->sd.name); 592 return ret; 593 } 594 595 return 0; 596 } 597 598 static const struct v4l2_async_notifier_operations ub913_notify_ops = { 599 .bound = ub913_notify_bound, 600 }; 601 602 static int ub913_v4l2_notifier_register(struct ub913_data *priv) 603 { 604 struct device *dev = &priv->client->dev; 605 struct v4l2_async_connection *asd; 606 struct fwnode_handle *ep_fwnode; 607 int ret; 608 609 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 610 UB913_PAD_SINK, 0, 0); 611 if (!ep_fwnode) { 612 dev_err(dev, "No graph endpoint\n"); 613 return -ENODEV; 614 } 615 616 v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd); 617 618 asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode, 619 struct v4l2_async_connection); 620 621 fwnode_handle_put(ep_fwnode); 622 623 if (IS_ERR(asd)) { 624 dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd)); 625 v4l2_async_nf_cleanup(&priv->notifier); 626 return PTR_ERR(asd); 627 } 628 629 priv->notifier.ops = &ub913_notify_ops; 630 631 ret = v4l2_async_nf_register(&priv->notifier); 632 if (ret) { 633 dev_err(dev, "Failed to register subdev_notifier"); 634 v4l2_async_nf_cleanup(&priv->notifier); 635 return ret; 636 } 637 638 return 0; 639 } 640 641 static void ub913_v4l2_nf_unregister(struct ub913_data *priv) 642 { 643 v4l2_async_nf_unregister(&priv->notifier); 644 v4l2_async_nf_cleanup(&priv->notifier); 645 } 646 647 static int ub913_register_clkout(struct ub913_data *priv) 648 { 649 struct device *dev = &priv->client->dev; 650 const char *name; 651 int ret; 652 653 name = kasprintf(GFP_KERNEL, "ds90ub913.%s.clk_out", dev_name(dev)); 654 if (!name) 655 return -ENOMEM; 656 657 priv->clkout_clk_hw = devm_clk_hw_register_fixed_factor(dev, name, 658 __clk_get_name(priv->clkin), 0, 1, 2); 659 660 kfree(name); 661 662 if (IS_ERR(priv->clkout_clk_hw)) 663 return dev_err_probe(dev, PTR_ERR(priv->clkout_clk_hw), 664 "Cannot register clkout hw\n"); 665 666 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 667 priv->clkout_clk_hw); 668 if (ret) 669 return dev_err_probe(dev, ret, 670 "Cannot add OF clock provider\n"); 671 672 return 0; 673 } 674 675 static int ub913_i2c_master_init(struct ub913_data *priv) 676 { 677 /* i2c fast mode */ 678 u32 scl_high = 600 + 300; /* high period + rise time, ns */ 679 u32 scl_low = 1300 + 300; /* low period + fall time, ns */ 680 unsigned long ref; 681 int ret; 682 683 ref = clk_get_rate(priv->clkin) / 2; 684 685 scl_high = div64_u64((u64)scl_high * ref, 1000000000); 686 scl_low = div64_u64((u64)scl_low * ref, 1000000000); 687 688 ret = ub913_write(priv, UB913_REG_SCL_HIGH_TIME, scl_high, NULL); 689 if (ret) 690 return ret; 691 692 ret = ub913_write(priv, UB913_REG_SCL_LOW_TIME, scl_low, NULL); 693 if (ret) 694 return ret; 695 696 return 0; 697 } 698 699 static int ub913_add_i2c_adapter(struct ub913_data *priv) 700 { 701 struct device *dev = &priv->client->dev; 702 struct i2c_atr_adap_desc desc = { }; 703 struct fwnode_handle *i2c_handle; 704 int ret; 705 706 i2c_handle = device_get_named_child_node(dev, "i2c"); 707 if (!i2c_handle) 708 return 0; 709 710 desc.chan_id = priv->plat_data->port; 711 desc.parent = dev; 712 desc.bus_handle = i2c_handle; 713 desc.num_aliases = 0; 714 715 ret = i2c_atr_add_adapter(priv->plat_data->atr, &desc); 716 717 fwnode_handle_put(i2c_handle); 718 719 if (ret) 720 return ret; 721 722 return 0; 723 } 724 725 static int ub913_parse_dt(struct ub913_data *priv) 726 { 727 struct device *dev = &priv->client->dev; 728 struct v4l2_fwnode_endpoint vep = { 729 .bus_type = V4L2_MBUS_PARALLEL, 730 }; 731 struct fwnode_handle *ep_fwnode; 732 int ret; 733 734 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 735 UB913_PAD_SINK, 0, 0); 736 if (!ep_fwnode) 737 return dev_err_probe(dev, -ENOENT, "No sink endpoint\n"); 738 739 ret = v4l2_fwnode_endpoint_parse(ep_fwnode, &vep); 740 741 fwnode_handle_put(ep_fwnode); 742 743 if (ret) 744 return dev_err_probe(dev, ret, 745 "failed to parse sink endpoint data\n"); 746 747 if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_RISING) 748 priv->pclk_polarity_rising = true; 749 else if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING) 750 priv->pclk_polarity_rising = false; 751 else 752 return dev_err_probe(dev, -EINVAL, 753 "bad value for 'pclk-sample'\n"); 754 755 return 0; 756 } 757 758 static int ub913_hw_init(struct ub913_data *priv) 759 { 760 struct device *dev = &priv->client->dev; 761 bool mode_override; 762 u8 mode; 763 int ret; 764 u8 v; 765 766 ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL); 767 if (ret) 768 return ret; 769 770 if (!(v & UB913_REG_MODE_SEL_MODE_UP_TO_DATE)) 771 return dev_err_probe(dev, -ENODEV, 772 "Mode value not stabilized\n"); 773 774 mode_override = v & UB913_REG_MODE_SEL_MODE_OVERRIDE; 775 mode = v & UB913_REG_MODE_SEL_MODE_MASK; 776 777 dev_dbg(dev, "mode from %s: %#x\n", 778 mode_override ? "reg" : "deserializer", mode); 779 780 ret = ub913_i2c_master_init(priv); 781 if (ret) 782 return dev_err_probe(dev, ret, "i2c master init failed\n"); 783 784 ret = ub913_update_bits(priv, UB913_REG_GENERAL_CFG, 785 UB913_REG_GENERAL_CFG_PCLK_RISING, 786 FIELD_PREP(UB913_REG_GENERAL_CFG_PCLK_RISING, 787 priv->pclk_polarity_rising), NULL); 788 789 if (ret) 790 return ret; 791 792 return 0; 793 } 794 795 static int ub913_subdev_init(struct ub913_data *priv) 796 { 797 struct device *dev = &priv->client->dev; 798 int ret; 799 800 v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub913_subdev_ops); 801 priv->sd.internal_ops = &ub913_internal_ops; 802 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS; 803 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; 804 priv->sd.entity.ops = &ub913_entity_ops; 805 806 priv->pads[0].flags = MEDIA_PAD_FL_SINK; 807 priv->pads[1].flags = MEDIA_PAD_FL_SOURCE; 808 809 ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads); 810 if (ret) 811 return dev_err_probe(dev, ret, "Failed to init pads\n"); 812 813 ret = v4l2_subdev_init_finalize(&priv->sd); 814 if (ret) 815 goto err_entity_cleanup; 816 817 ret = ub913_v4l2_notifier_register(priv); 818 if (ret) { 819 dev_err_probe(dev, ret, 820 "v4l2 subdev notifier register failed\n"); 821 goto err_subdev_cleanup; 822 } 823 824 ret = v4l2_async_register_subdev(&priv->sd); 825 if (ret) { 826 dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n"); 827 goto err_unreg_notif; 828 } 829 830 return 0; 831 832 err_unreg_notif: 833 ub913_v4l2_nf_unregister(priv); 834 err_subdev_cleanup: 835 v4l2_subdev_cleanup(&priv->sd); 836 err_entity_cleanup: 837 media_entity_cleanup(&priv->sd.entity); 838 839 return ret; 840 } 841 842 static void ub913_subdev_uninit(struct ub913_data *priv) 843 { 844 v4l2_async_unregister_subdev(&priv->sd); 845 ub913_v4l2_nf_unregister(priv); 846 v4l2_subdev_cleanup(&priv->sd); 847 media_entity_cleanup(&priv->sd.entity); 848 } 849 850 static int ub913_probe(struct i2c_client *client) 851 { 852 struct device *dev = &client->dev; 853 struct ub913_data *priv; 854 int ret; 855 856 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 857 if (!priv) 858 return -ENOMEM; 859 860 priv->client = client; 861 862 priv->plat_data = dev_get_platdata(&client->dev); 863 if (!priv->plat_data) 864 return dev_err_probe(dev, -ENODEV, "Platform data missing\n"); 865 866 priv->regmap = devm_regmap_init_i2c(client, &ub913_regmap_config); 867 if (IS_ERR(priv->regmap)) 868 return dev_err_probe(dev, PTR_ERR(priv->regmap), 869 "Failed to init regmap\n"); 870 871 /* 872 * ub913 can also work without ext clock, but that is not supported by 873 * the driver yet. 874 */ 875 priv->clkin = devm_clk_get(dev, "clkin"); 876 if (IS_ERR(priv->clkin)) 877 return dev_err_probe(dev, PTR_ERR(priv->clkin), 878 "Cannot get CLKIN\n"); 879 880 ret = ub913_parse_dt(priv); 881 if (ret) 882 return ret; 883 884 ret = ub913_hw_init(priv); 885 if (ret) 886 return ret; 887 888 ret = ub913_gpiochip_probe(priv); 889 if (ret) 890 return dev_err_probe(dev, ret, "Failed to init gpiochip\n"); 891 892 ret = ub913_register_clkout(priv); 893 if (ret) { 894 dev_err_probe(dev, ret, "Failed to register clkout\n"); 895 goto err_gpiochip_remove; 896 } 897 898 ret = ub913_subdev_init(priv); 899 if (ret) 900 goto err_gpiochip_remove; 901 902 ret = ub913_add_i2c_adapter(priv); 903 if (ret) { 904 dev_err_probe(dev, ret, "failed to add remote i2c adapter\n"); 905 goto err_subdev_uninit; 906 } 907 908 return 0; 909 910 err_subdev_uninit: 911 ub913_subdev_uninit(priv); 912 err_gpiochip_remove: 913 ub913_gpiochip_remove(priv); 914 915 return ret; 916 } 917 918 static void ub913_remove(struct i2c_client *client) 919 { 920 struct v4l2_subdev *sd = i2c_get_clientdata(client); 921 struct ub913_data *priv = sd_to_ub913(sd); 922 923 i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port); 924 925 ub913_subdev_uninit(priv); 926 927 ub913_gpiochip_remove(priv); 928 } 929 930 static const struct i2c_device_id ub913_id[] = { 931 { "ds90ub913a-q1" }, 932 {} 933 }; 934 MODULE_DEVICE_TABLE(i2c, ub913_id); 935 936 static const struct of_device_id ub913_dt_ids[] = { 937 { .compatible = "ti,ds90ub913a-q1" }, 938 {} 939 }; 940 MODULE_DEVICE_TABLE(of, ub913_dt_ids); 941 942 static struct i2c_driver ds90ub913_driver = { 943 .probe = ub913_probe, 944 .remove = ub913_remove, 945 .id_table = ub913_id, 946 .driver = { 947 .name = "ds90ub913a", 948 .of_match_table = ub913_dt_ids, 949 }, 950 }; 951 module_i2c_driver(ds90ub913_driver); 952 953 MODULE_LICENSE("GPL"); 954 MODULE_DESCRIPTION("Texas Instruments DS90UB913 FPD-Link III Serializer Driver"); 955 MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>"); 956 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>"); 957 MODULE_IMPORT_NS("I2C_ATR"); 958