1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the Texas Instruments DS90UB913 video serializer 4 * 5 * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net> 6 * 7 * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net> 8 * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> 9 */ 10 11 #include <linux/clk-provider.h> 12 #include <linux/clk.h> 13 #include <linux/delay.h> 14 #include <linux/fwnode.h> 15 #include <linux/gpio/driver.h> 16 #include <linux/i2c-atr.h> 17 #include <linux/i2c.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/property.h> 21 #include <linux/regmap.h> 22 23 #include <media/i2c/ds90ub9xx.h> 24 #include <media/v4l2-subdev.h> 25 26 #define UB913_PAD_SINK 0 27 #define UB913_PAD_SOURCE 1 28 29 /* 30 * UB913 has 4 gpios, but gpios 3 and 4 are reserved for external oscillator 31 * mode. Thus we only support 2 gpios for now. 32 */ 33 #define UB913_NUM_GPIOS 2 34 35 #define UB913_REG_RESET_CTL 0x01 36 #define UB913_REG_RESET_CTL_DIGITAL_RESET_1 BIT(1) 37 #define UB913_REG_RESET_CTL_DIGITAL_RESET_0 BIT(0) 38 39 #define UB913_REG_GENERAL_CFG 0x03 40 #define UB913_REG_GENERAL_CFG_CRC_ERR_RESET BIT(5) 41 #define UB913_REG_GENERAL_CFG_PCLK_RISING BIT(0) 42 43 #define UB913_REG_MODE_SEL 0x05 44 #define UB913_REG_MODE_SEL_MODE_OVERRIDE BIT(5) 45 #define UB913_REG_MODE_SEL_MODE_UP_TO_DATE BIT(4) 46 #define UB913_REG_MODE_SEL_MODE_MASK GENMASK(3, 0) 47 48 #define UB913_REG_CRC_ERRORS_LSB 0x0a 49 #define UB913_REG_CRC_ERRORS_MSB 0x0b 50 51 #define UB913_REG_GENERAL_STATUS 0x0c 52 53 #define UB913_REG_GPIO_CFG(n) (0x0d + (n)) 54 #define UB913_REG_GPIO_CFG_ENABLE(n) BIT(0 + (n) * 4) 55 #define UB913_REG_GPIO_CFG_DIR_INPUT(n) BIT(1 + (n) * 4) 56 #define UB913_REG_GPIO_CFG_REMOTE_EN(n) BIT(2 + (n) * 4) 57 #define UB913_REG_GPIO_CFG_OUT_VAL(n) BIT(3 + (n) * 4) 58 #define UB913_REG_GPIO_CFG_MASK(n) (0xf << ((n) * 4)) 59 60 #define UB913_REG_SCL_HIGH_TIME 0x11 61 #define UB913_REG_SCL_LOW_TIME 0x12 62 63 #define UB913_REG_PLL_OVR 0x35 64 65 struct ub913_data { 66 struct i2c_client *client; 67 struct regmap *regmap; 68 struct clk *clkin; 69 70 struct gpio_chip gpio_chip; 71 72 struct v4l2_subdev sd; 73 struct media_pad pads[2]; 74 75 struct v4l2_async_notifier notifier; 76 77 struct v4l2_subdev *source_sd; 78 u16 source_sd_pad; 79 80 u64 enabled_source_streams; 81 82 struct clk_hw *clkout_clk_hw; 83 84 struct ds90ub9xx_platform_data *plat_data; 85 86 u32 pclk_polarity; 87 }; 88 89 static inline struct ub913_data *sd_to_ub913(struct v4l2_subdev *sd) 90 { 91 return container_of(sd, struct ub913_data, sd); 92 } 93 94 struct ub913_format_info { 95 u32 incode; 96 u32 outcode; 97 }; 98 99 static const struct ub913_format_info ub913_formats[] = { 100 /* Only RAW10 with 8-bit payload is supported at the moment */ 101 { .incode = MEDIA_BUS_FMT_YUYV8_2X8, .outcode = MEDIA_BUS_FMT_YUYV8_1X16 }, 102 { .incode = MEDIA_BUS_FMT_UYVY8_2X8, .outcode = MEDIA_BUS_FMT_UYVY8_1X16 }, 103 { .incode = MEDIA_BUS_FMT_VYUY8_2X8, .outcode = MEDIA_BUS_FMT_VYUY8_1X16 }, 104 { .incode = MEDIA_BUS_FMT_YVYU8_2X8, .outcode = MEDIA_BUS_FMT_YVYU8_1X16 }, 105 }; 106 107 static const struct ub913_format_info *ub913_find_format(u32 incode) 108 { 109 unsigned int i; 110 111 for (i = 0; i < ARRAY_SIZE(ub913_formats); i++) { 112 if (ub913_formats[i].incode == incode) 113 return &ub913_formats[i]; 114 } 115 116 return NULL; 117 } 118 119 static int ub913_read(const struct ub913_data *priv, u8 reg, u8 *val) 120 { 121 unsigned int v; 122 int ret; 123 124 ret = regmap_read(priv->regmap, reg, &v); 125 if (ret < 0) { 126 dev_err(&priv->client->dev, 127 "Cannot read register 0x%02x: %d!\n", reg, ret); 128 return ret; 129 } 130 131 *val = v; 132 return 0; 133 } 134 135 static int ub913_write(const struct ub913_data *priv, u8 reg, u8 val) 136 { 137 int ret; 138 139 ret = regmap_write(priv->regmap, reg, val); 140 if (ret < 0) 141 dev_err(&priv->client->dev, 142 "Cannot write register 0x%02x: %d!\n", reg, ret); 143 144 return ret; 145 } 146 147 /* 148 * GPIO chip 149 */ 150 static int ub913_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) 151 { 152 return GPIO_LINE_DIRECTION_OUT; 153 } 154 155 static int ub913_gpio_direction_out(struct gpio_chip *gc, unsigned int offset, 156 int value) 157 { 158 struct ub913_data *priv = gpiochip_get_data(gc); 159 unsigned int reg_idx = offset / 2; 160 unsigned int field_idx = offset % 2; 161 162 return regmap_update_bits(priv->regmap, UB913_REG_GPIO_CFG(reg_idx), 163 UB913_REG_GPIO_CFG_MASK(field_idx), 164 UB913_REG_GPIO_CFG_ENABLE(field_idx) | 165 (value ? UB913_REG_GPIO_CFG_OUT_VAL(field_idx) : 166 0)); 167 } 168 169 static void ub913_gpio_set(struct gpio_chip *gc, unsigned int offset, int value) 170 { 171 ub913_gpio_direction_out(gc, offset, value); 172 } 173 174 static int ub913_gpio_of_xlate(struct gpio_chip *gc, 175 const struct of_phandle_args *gpiospec, 176 u32 *flags) 177 { 178 if (flags) 179 *flags = gpiospec->args[1]; 180 181 return gpiospec->args[0]; 182 } 183 184 static int ub913_gpiochip_probe(struct ub913_data *priv) 185 { 186 struct device *dev = &priv->client->dev; 187 struct gpio_chip *gc = &priv->gpio_chip; 188 int ret; 189 190 /* Initialize GPIOs 0 and 1 to local control, tri-state */ 191 ub913_write(priv, UB913_REG_GPIO_CFG(0), 0); 192 193 gc->label = dev_name(dev); 194 gc->parent = dev; 195 gc->owner = THIS_MODULE; 196 gc->base = -1; 197 gc->can_sleep = true; 198 gc->ngpio = UB913_NUM_GPIOS; 199 gc->get_direction = ub913_gpio_get_direction; 200 gc->direction_output = ub913_gpio_direction_out; 201 gc->set = ub913_gpio_set; 202 gc->of_xlate = ub913_gpio_of_xlate; 203 gc->of_gpio_n_cells = 2; 204 205 ret = gpiochip_add_data(gc, priv); 206 if (ret) { 207 dev_err(dev, "Failed to add GPIOs: %d\n", ret); 208 return ret; 209 } 210 211 return 0; 212 } 213 214 static void ub913_gpiochip_remove(struct ub913_data *priv) 215 { 216 gpiochip_remove(&priv->gpio_chip); 217 } 218 219 static const struct regmap_config ub913_regmap_config = { 220 .name = "ds90ub913", 221 .reg_bits = 8, 222 .val_bits = 8, 223 .reg_format_endian = REGMAP_ENDIAN_DEFAULT, 224 .val_format_endian = REGMAP_ENDIAN_DEFAULT, 225 }; 226 227 /* 228 * V4L2 229 */ 230 231 static int ub913_enable_streams(struct v4l2_subdev *sd, 232 struct v4l2_subdev_state *state, u32 pad, 233 u64 streams_mask) 234 { 235 struct ub913_data *priv = sd_to_ub913(sd); 236 u64 sink_streams; 237 int ret; 238 239 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE, 240 UB913_PAD_SINK, 241 &streams_mask); 242 243 ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad, 244 sink_streams); 245 if (ret) 246 return ret; 247 248 priv->enabled_source_streams |= streams_mask; 249 250 return 0; 251 } 252 253 static int ub913_disable_streams(struct v4l2_subdev *sd, 254 struct v4l2_subdev_state *state, u32 pad, 255 u64 streams_mask) 256 { 257 struct ub913_data *priv = sd_to_ub913(sd); 258 u64 sink_streams; 259 int ret; 260 261 sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE, 262 UB913_PAD_SINK, 263 &streams_mask); 264 265 ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad, 266 sink_streams); 267 if (ret) 268 return ret; 269 270 priv->enabled_source_streams &= ~streams_mask; 271 272 return 0; 273 } 274 275 static int _ub913_set_routing(struct v4l2_subdev *sd, 276 struct v4l2_subdev_state *state, 277 struct v4l2_subdev_krouting *routing) 278 { 279 static const struct v4l2_mbus_framefmt in_format = { 280 .width = 640, 281 .height = 480, 282 .code = MEDIA_BUS_FMT_UYVY8_2X8, 283 .field = V4L2_FIELD_NONE, 284 .colorspace = V4L2_COLORSPACE_SRGB, 285 .ycbcr_enc = V4L2_YCBCR_ENC_601, 286 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 287 .xfer_func = V4L2_XFER_FUNC_SRGB, 288 }; 289 static const struct v4l2_mbus_framefmt out_format = { 290 .width = 640, 291 .height = 480, 292 .code = MEDIA_BUS_FMT_UYVY8_1X16, 293 .field = V4L2_FIELD_NONE, 294 .colorspace = V4L2_COLORSPACE_SRGB, 295 .ycbcr_enc = V4L2_YCBCR_ENC_601, 296 .quantization = V4L2_QUANTIZATION_LIM_RANGE, 297 .xfer_func = V4L2_XFER_FUNC_SRGB, 298 }; 299 struct v4l2_subdev_stream_configs *stream_configs; 300 unsigned int i; 301 int ret; 302 303 /* 304 * Note: we can only support up to V4L2_FRAME_DESC_ENTRY_MAX, until 305 * frame desc is made dynamically allocated. 306 */ 307 308 if (routing->num_routes > V4L2_FRAME_DESC_ENTRY_MAX) 309 return -EINVAL; 310 311 ret = v4l2_subdev_routing_validate(sd, routing, 312 V4L2_SUBDEV_ROUTING_ONLY_1_TO_1); 313 if (ret) 314 return ret; 315 316 ret = v4l2_subdev_set_routing(sd, state, routing); 317 if (ret) 318 return ret; 319 320 stream_configs = &state->stream_configs; 321 322 for (i = 0; i < stream_configs->num_configs; i++) { 323 if (stream_configs->configs[i].pad == UB913_PAD_SINK) 324 stream_configs->configs[i].fmt = in_format; 325 else 326 stream_configs->configs[i].fmt = out_format; 327 } 328 329 return 0; 330 } 331 332 static int ub913_set_routing(struct v4l2_subdev *sd, 333 struct v4l2_subdev_state *state, 334 enum v4l2_subdev_format_whence which, 335 struct v4l2_subdev_krouting *routing) 336 { 337 struct ub913_data *priv = sd_to_ub913(sd); 338 339 if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams) 340 return -EBUSY; 341 342 return _ub913_set_routing(sd, state, routing); 343 } 344 345 static int ub913_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad, 346 struct v4l2_mbus_frame_desc *fd) 347 { 348 struct ub913_data *priv = sd_to_ub913(sd); 349 const struct v4l2_subdev_krouting *routing; 350 struct v4l2_mbus_frame_desc source_fd; 351 struct v4l2_subdev_route *route; 352 struct v4l2_subdev_state *state; 353 int ret; 354 355 if (pad != UB913_PAD_SOURCE) 356 return -EINVAL; 357 358 ret = v4l2_subdev_call(priv->source_sd, pad, get_frame_desc, 359 priv->source_sd_pad, &source_fd); 360 if (ret) 361 return ret; 362 363 memset(fd, 0, sizeof(*fd)); 364 365 fd->type = V4L2_MBUS_FRAME_DESC_TYPE_PARALLEL; 366 367 state = v4l2_subdev_lock_and_get_active_state(sd); 368 369 routing = &state->routing; 370 371 for_each_active_route(routing, route) { 372 unsigned int i; 373 374 if (route->source_pad != pad) 375 continue; 376 377 for (i = 0; i < source_fd.num_entries; i++) { 378 if (source_fd.entry[i].stream == route->sink_stream) 379 break; 380 } 381 382 if (i == source_fd.num_entries) { 383 dev_err(&priv->client->dev, 384 "Failed to find stream from source frame desc\n"); 385 ret = -EPIPE; 386 goto out_unlock; 387 } 388 389 fd->entry[fd->num_entries].stream = route->source_stream; 390 fd->entry[fd->num_entries].flags = source_fd.entry[i].flags; 391 fd->entry[fd->num_entries].length = source_fd.entry[i].length; 392 fd->entry[fd->num_entries].pixelcode = 393 source_fd.entry[i].pixelcode; 394 395 fd->num_entries++; 396 } 397 398 out_unlock: 399 v4l2_subdev_unlock_state(state); 400 401 return ret; 402 } 403 404 static int ub913_set_fmt(struct v4l2_subdev *sd, 405 struct v4l2_subdev_state *state, 406 struct v4l2_subdev_format *format) 407 { 408 struct ub913_data *priv = sd_to_ub913(sd); 409 struct v4l2_mbus_framefmt *fmt; 410 const struct ub913_format_info *finfo; 411 412 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE && 413 priv->enabled_source_streams) 414 return -EBUSY; 415 416 /* Source format is fully defined by the sink format, so not settable */ 417 if (format->pad == UB913_PAD_SOURCE) 418 return v4l2_subdev_get_fmt(sd, state, format); 419 420 finfo = ub913_find_format(format->format.code); 421 if (!finfo) { 422 finfo = &ub913_formats[0]; 423 format->format.code = finfo->incode; 424 } 425 426 /* Set sink format */ 427 fmt = v4l2_subdev_state_get_stream_format(state, format->pad, 428 format->stream); 429 if (!fmt) 430 return -EINVAL; 431 432 *fmt = format->format; 433 434 /* Propagate to source format, and adjust the mbus code */ 435 fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad, 436 format->stream); 437 if (!fmt) 438 return -EINVAL; 439 440 format->format.code = finfo->outcode; 441 442 *fmt = format->format; 443 444 return 0; 445 } 446 447 static int ub913_init_cfg(struct v4l2_subdev *sd, 448 struct v4l2_subdev_state *state) 449 { 450 struct v4l2_subdev_route routes[] = { 451 { 452 .sink_pad = UB913_PAD_SINK, 453 .sink_stream = 0, 454 .source_pad = UB913_PAD_SOURCE, 455 .source_stream = 0, 456 .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE, 457 }, 458 }; 459 460 struct v4l2_subdev_krouting routing = { 461 .num_routes = ARRAY_SIZE(routes), 462 .routes = routes, 463 }; 464 465 return _ub913_set_routing(sd, state, &routing); 466 } 467 468 static int ub913_log_status(struct v4l2_subdev *sd) 469 { 470 struct ub913_data *priv = sd_to_ub913(sd); 471 struct device *dev = &priv->client->dev; 472 u8 v = 0, v1, v2; 473 474 ub913_read(priv, UB913_REG_MODE_SEL, &v); 475 dev_info(dev, "MODE_SEL %#02x\n", v); 476 477 ub913_read(priv, UB913_REG_CRC_ERRORS_LSB, &v1); 478 ub913_read(priv, UB913_REG_CRC_ERRORS_MSB, &v2); 479 dev_info(dev, "CRC errors %u\n", v1 | (v2 << 8)); 480 481 /* clear CRC errors */ 482 ub913_read(priv, UB913_REG_GENERAL_CFG, &v); 483 ub913_write(priv, UB913_REG_GENERAL_CFG, 484 v | UB913_REG_GENERAL_CFG_CRC_ERR_RESET); 485 ub913_write(priv, UB913_REG_GENERAL_CFG, v); 486 487 ub913_read(priv, UB913_REG_GENERAL_STATUS, &v); 488 dev_info(dev, "GENERAL_STATUS %#02x\n", v); 489 490 ub913_read(priv, UB913_REG_PLL_OVR, &v); 491 dev_info(dev, "PLL_OVR %#02x\n", v); 492 493 return 0; 494 } 495 496 static const struct v4l2_subdev_core_ops ub913_subdev_core_ops = { 497 .log_status = ub913_log_status, 498 }; 499 500 static const struct v4l2_subdev_pad_ops ub913_pad_ops = { 501 .enable_streams = ub913_enable_streams, 502 .disable_streams = ub913_disable_streams, 503 .set_routing = ub913_set_routing, 504 .get_frame_desc = ub913_get_frame_desc, 505 .get_fmt = v4l2_subdev_get_fmt, 506 .set_fmt = ub913_set_fmt, 507 .init_cfg = ub913_init_cfg, 508 }; 509 510 static const struct v4l2_subdev_ops ub913_subdev_ops = { 511 .core = &ub913_subdev_core_ops, 512 .pad = &ub913_pad_ops, 513 }; 514 515 static const struct media_entity_operations ub913_entity_ops = { 516 .link_validate = v4l2_subdev_link_validate, 517 }; 518 519 static int ub913_notify_bound(struct v4l2_async_notifier *notifier, 520 struct v4l2_subdev *source_subdev, 521 struct v4l2_async_subdev *asd) 522 { 523 struct ub913_data *priv = sd_to_ub913(notifier->sd); 524 struct device *dev = &priv->client->dev; 525 int ret; 526 527 ret = media_entity_get_fwnode_pad(&source_subdev->entity, 528 source_subdev->fwnode, 529 MEDIA_PAD_FL_SOURCE); 530 if (ret < 0) { 531 dev_err(dev, "Failed to find pad for %s\n", 532 source_subdev->name); 533 return ret; 534 } 535 536 priv->source_sd = source_subdev; 537 priv->source_sd_pad = ret; 538 539 ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad, 540 &priv->sd.entity, UB913_PAD_SINK, 541 MEDIA_LNK_FL_ENABLED | 542 MEDIA_LNK_FL_IMMUTABLE); 543 if (ret) { 544 dev_err(dev, "Unable to link %s:%u -> %s:0\n", 545 source_subdev->name, priv->source_sd_pad, 546 priv->sd.name); 547 return ret; 548 } 549 550 return 0; 551 } 552 553 static const struct v4l2_async_notifier_operations ub913_notify_ops = { 554 .bound = ub913_notify_bound, 555 }; 556 557 static int ub913_v4l2_notifier_register(struct ub913_data *priv) 558 { 559 struct device *dev = &priv->client->dev; 560 struct v4l2_async_subdev *asd; 561 struct fwnode_handle *ep_fwnode; 562 int ret; 563 564 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 565 UB913_PAD_SINK, 0, 0); 566 if (!ep_fwnode) { 567 dev_err(dev, "No graph endpoint\n"); 568 return -ENODEV; 569 } 570 571 v4l2_async_nf_init(&priv->notifier); 572 573 asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode, 574 struct v4l2_async_subdev); 575 576 fwnode_handle_put(ep_fwnode); 577 578 if (IS_ERR(asd)) { 579 dev_err(dev, "Failed to add subdev: %ld", PTR_ERR(asd)); 580 v4l2_async_nf_cleanup(&priv->notifier); 581 return PTR_ERR(asd); 582 } 583 584 priv->notifier.ops = &ub913_notify_ops; 585 586 ret = v4l2_async_subdev_nf_register(&priv->sd, &priv->notifier); 587 if (ret) { 588 dev_err(dev, "Failed to register subdev_notifier"); 589 v4l2_async_nf_cleanup(&priv->notifier); 590 return ret; 591 } 592 593 return 0; 594 } 595 596 static void ub913_v4l2_nf_unregister(struct ub913_data *priv) 597 { 598 v4l2_async_nf_unregister(&priv->notifier); 599 v4l2_async_nf_cleanup(&priv->notifier); 600 } 601 602 static int ub913_register_clkout(struct ub913_data *priv) 603 { 604 struct device *dev = &priv->client->dev; 605 const char *name; 606 int ret; 607 608 name = kasprintf(GFP_KERNEL, "ds90ub913.%s.clk_out", dev_name(dev)); 609 if (!name) 610 return -ENOMEM; 611 612 priv->clkout_clk_hw = devm_clk_hw_register_fixed_factor(dev, name, 613 __clk_get_name(priv->clkin), 0, 1, 2); 614 615 kfree(name); 616 617 if (IS_ERR(priv->clkout_clk_hw)) 618 return dev_err_probe(dev, PTR_ERR(priv->clkout_clk_hw), 619 "Cannot register clkout hw\n"); 620 621 ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, 622 priv->clkout_clk_hw); 623 if (ret) 624 return dev_err_probe(dev, ret, 625 "Cannot add OF clock provider\n"); 626 627 return 0; 628 } 629 630 static int ub913_i2c_master_init(struct ub913_data *priv) 631 { 632 /* i2c fast mode */ 633 u32 scl_high = 600 + 300; /* high period + rise time, ns */ 634 u32 scl_low = 1300 + 300; /* low period + fall time, ns */ 635 unsigned long ref; 636 int ret; 637 638 ref = clk_get_rate(priv->clkin) / 2; 639 640 scl_high = div64_u64((u64)scl_high * ref, 1000000000); 641 scl_low = div64_u64((u64)scl_low * ref, 1000000000); 642 643 ret = ub913_write(priv, UB913_REG_SCL_HIGH_TIME, scl_high); 644 if (ret) 645 return ret; 646 647 ret = ub913_write(priv, UB913_REG_SCL_LOW_TIME, scl_low); 648 if (ret) 649 return ret; 650 651 return 0; 652 } 653 654 static int ub913_add_i2c_adapter(struct ub913_data *priv) 655 { 656 struct device *dev = &priv->client->dev; 657 struct fwnode_handle *i2c_handle; 658 int ret; 659 660 i2c_handle = device_get_named_child_node(dev, "i2c"); 661 if (!i2c_handle) 662 return 0; 663 664 ret = i2c_atr_add_adapter(priv->plat_data->atr, priv->plat_data->port, 665 dev, i2c_handle); 666 667 fwnode_handle_put(i2c_handle); 668 669 if (ret) 670 return ret; 671 672 return 0; 673 } 674 675 static int ub913_parse_dt(struct ub913_data *priv) 676 { 677 struct device *dev = &priv->client->dev; 678 struct fwnode_handle *ep_fwnode; 679 int ret; 680 681 ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 682 UB913_PAD_SINK, 0, 0); 683 if (!ep_fwnode) { 684 dev_err_probe(dev, -ENOENT, "No sink endpoint\n"); 685 return -ENOENT; 686 } 687 688 ret = fwnode_property_read_u32(ep_fwnode, "pclk-sample", 689 &priv->pclk_polarity); 690 691 fwnode_handle_put(ep_fwnode); 692 693 if (ret) { 694 dev_err_probe(dev, ret, "failed to parse 'pclk-sample'\n"); 695 return ret; 696 } 697 698 return 0; 699 } 700 701 static int ub913_hw_init(struct ub913_data *priv) 702 { 703 struct device *dev = &priv->client->dev; 704 bool mode_override; 705 u8 mode; 706 int ret; 707 u8 v; 708 709 ret = ub913_read(priv, UB913_REG_MODE_SEL, &v); 710 if (ret) 711 return ret; 712 713 if (!(v & UB913_REG_MODE_SEL_MODE_UP_TO_DATE)) 714 return dev_err_probe(dev, -ENODEV, 715 "Mode value not stabilized\n"); 716 717 mode_override = v & UB913_REG_MODE_SEL_MODE_OVERRIDE; 718 mode = v & UB913_REG_MODE_SEL_MODE_MASK; 719 720 dev_dbg(dev, "mode from %s: %#x\n", 721 mode_override ? "reg" : "deserializer", mode); 722 723 ret = ub913_i2c_master_init(priv); 724 if (ret) 725 return dev_err_probe(dev, ret, "i2c master init failed\n"); 726 727 ub913_read(priv, UB913_REG_GENERAL_CFG, &v); 728 v &= ~UB913_REG_GENERAL_CFG_PCLK_RISING; 729 v |= priv->pclk_polarity ? UB913_REG_GENERAL_CFG_PCLK_RISING : 0; 730 ub913_write(priv, UB913_REG_GENERAL_CFG, v); 731 732 return 0; 733 } 734 735 static int ub913_subdev_init(struct ub913_data *priv) 736 { 737 struct device *dev = &priv->client->dev; 738 int ret; 739 740 v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub913_subdev_ops); 741 priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS; 742 priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE; 743 priv->sd.entity.ops = &ub913_entity_ops; 744 745 priv->pads[0].flags = MEDIA_PAD_FL_SINK; 746 priv->pads[1].flags = MEDIA_PAD_FL_SOURCE; 747 748 ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads); 749 if (ret) 750 return dev_err_probe(dev, ret, "Failed to init pads\n"); 751 752 priv->sd.fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 753 UB913_PAD_SOURCE, 0, 754 0); 755 756 if (!priv->sd.fwnode) { 757 ret = -ENODEV; 758 dev_err_probe(dev, ret, "Missing TX endpoint\n"); 759 goto err_entity_cleanup; 760 } 761 762 ret = v4l2_subdev_init_finalize(&priv->sd); 763 if (ret) 764 goto err_fwnode_put; 765 766 ret = ub913_v4l2_notifier_register(priv); 767 if (ret) { 768 dev_err_probe(dev, ret, 769 "v4l2 subdev notifier register failed\n"); 770 goto err_subdev_cleanup; 771 } 772 773 ret = v4l2_async_register_subdev(&priv->sd); 774 if (ret) { 775 dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n"); 776 goto err_unreg_notif; 777 } 778 779 return 0; 780 781 err_unreg_notif: 782 ub913_v4l2_nf_unregister(priv); 783 err_subdev_cleanup: 784 v4l2_subdev_cleanup(&priv->sd); 785 err_fwnode_put: 786 fwnode_handle_put(priv->sd.fwnode); 787 err_entity_cleanup: 788 media_entity_cleanup(&priv->sd.entity); 789 790 return ret; 791 } 792 793 static void ub913_subdev_uninit(struct ub913_data *priv) 794 { 795 v4l2_async_unregister_subdev(&priv->sd); 796 ub913_v4l2_nf_unregister(priv); 797 v4l2_subdev_cleanup(&priv->sd); 798 fwnode_handle_put(priv->sd.fwnode); 799 media_entity_cleanup(&priv->sd.entity); 800 } 801 802 static int ub913_probe(struct i2c_client *client) 803 { 804 struct device *dev = &client->dev; 805 struct ub913_data *priv; 806 int ret; 807 808 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 809 if (!priv) 810 return -ENOMEM; 811 812 priv->client = client; 813 814 priv->plat_data = dev_get_platdata(&client->dev); 815 if (!priv->plat_data) 816 return dev_err_probe(dev, -ENODEV, "Platform data missing\n"); 817 818 priv->regmap = devm_regmap_init_i2c(client, &ub913_regmap_config); 819 if (IS_ERR(priv->regmap)) 820 return dev_err_probe(dev, PTR_ERR(priv->regmap), 821 "Failed to init regmap\n"); 822 823 /* 824 * ub913 can also work without ext clock, but that is not supported by 825 * the driver yet. 826 */ 827 priv->clkin = devm_clk_get(dev, "clkin"); 828 if (IS_ERR(priv->clkin)) 829 return dev_err_probe(dev, PTR_ERR(priv->clkin), 830 "Cannot get CLKIN\n"); 831 832 ret = ub913_parse_dt(priv); 833 if (ret) 834 return ret; 835 836 ret = ub913_hw_init(priv); 837 if (ret) 838 return ret; 839 840 ret = ub913_gpiochip_probe(priv); 841 if (ret) 842 return dev_err_probe(dev, ret, "Failed to init gpiochip\n"); 843 844 ret = ub913_register_clkout(priv); 845 if (ret) { 846 dev_err_probe(dev, ret, "Failed to register clkout\n"); 847 goto err_gpiochip_remove; 848 } 849 850 ret = ub913_subdev_init(priv); 851 if (ret) 852 goto err_gpiochip_remove; 853 854 ret = ub913_add_i2c_adapter(priv); 855 if (ret) { 856 dev_err_probe(dev, ret, "failed to add remote i2c adapter\n"); 857 goto err_subdev_uninit; 858 } 859 860 return 0; 861 862 err_subdev_uninit: 863 ub913_subdev_uninit(priv); 864 err_gpiochip_remove: 865 ub913_gpiochip_remove(priv); 866 867 return ret; 868 } 869 870 static void ub913_remove(struct i2c_client *client) 871 { 872 struct v4l2_subdev *sd = i2c_get_clientdata(client); 873 struct ub913_data *priv = sd_to_ub913(sd); 874 875 i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port); 876 877 ub913_subdev_uninit(priv); 878 879 ub913_gpiochip_remove(priv); 880 } 881 882 static const struct i2c_device_id ub913_id[] = { { "ds90ub913a-q1", 0 }, {} }; 883 MODULE_DEVICE_TABLE(i2c, ub913_id); 884 885 static const struct of_device_id ub913_dt_ids[] = { 886 { .compatible = "ti,ds90ub913a-q1" }, 887 {} 888 }; 889 MODULE_DEVICE_TABLE(of, ub913_dt_ids); 890 891 static struct i2c_driver ds90ub913_driver = { 892 .probe = ub913_probe, 893 .remove = ub913_remove, 894 .id_table = ub913_id, 895 .driver = { 896 .name = "ds90ub913a", 897 .of_match_table = ub913_dt_ids, 898 }, 899 }; 900 module_i2c_driver(ds90ub913_driver); 901 902 MODULE_LICENSE("GPL"); 903 MODULE_DESCRIPTION("Texas Instruments DS90UB913 FPD-Link III Serializer Driver"); 904 MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>"); 905 MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>"); 906 MODULE_IMPORT_NS(I2C_ATR); 907