1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Driver for Analog Devices ADV748X 8 channel analog front end (AFE) receiver 4 * with standard definition processor (SDP) 5 * 6 * Copyright (C) 2017 Renesas Electronics Corp. 7 */ 8 9 #include <linux/delay.h> 10 #include <linux/module.h> 11 #include <linux/mutex.h> 12 #include <linux/v4l2-dv-timings.h> 13 14 #include <media/v4l2-ctrls.h> 15 #include <media/v4l2-device.h> 16 #include <media/v4l2-dv-timings.h> 17 #include <media/v4l2-ioctl.h> 18 19 #include "adv748x.h" 20 21 /* ----------------------------------------------------------------------------- 22 * SDP 23 */ 24 25 #define ADV748X_AFE_STD_AD_PAL_BG_NTSC_J_SECAM 0x0 26 #define ADV748X_AFE_STD_AD_PAL_BG_NTSC_J_SECAM_PED 0x1 27 #define ADV748X_AFE_STD_AD_PAL_N_NTSC_J_SECAM 0x2 28 #define ADV748X_AFE_STD_AD_PAL_N_NTSC_M_SECAM 0x3 29 #define ADV748X_AFE_STD_NTSC_J 0x4 30 #define ADV748X_AFE_STD_NTSC_M 0x5 31 #define ADV748X_AFE_STD_PAL60 0x6 32 #define ADV748X_AFE_STD_NTSC_443 0x7 33 #define ADV748X_AFE_STD_PAL_BG 0x8 34 #define ADV748X_AFE_STD_PAL_N 0x9 35 #define ADV748X_AFE_STD_PAL_M 0xa 36 #define ADV748X_AFE_STD_PAL_M_PED 0xb 37 #define ADV748X_AFE_STD_PAL_COMB_N 0xc 38 #define ADV748X_AFE_STD_PAL_COMB_N_PED 0xd 39 #define ADV748X_AFE_STD_PAL_SECAM 0xe 40 #define ADV748X_AFE_STD_PAL_SECAM_PED 0xf 41 42 static int adv748x_afe_read_ro_map(struct adv748x_state *state, u8 reg) 43 { 44 int ret; 45 46 /* Select SDP Read-Only Main Map */ 47 ret = sdp_write(state, ADV748X_SDP_MAP_SEL, 48 ADV748X_SDP_MAP_SEL_RO_MAIN); 49 if (ret < 0) 50 return ret; 51 52 return sdp_read(state, reg); 53 } 54 55 static int adv748x_afe_status(struct adv748x_afe *afe, u32 *signal, 56 v4l2_std_id *std) 57 { 58 struct adv748x_state *state = adv748x_afe_to_state(afe); 59 int info; 60 61 /* Read status from reg 0x10 of SDP RO Map */ 62 info = adv748x_afe_read_ro_map(state, ADV748X_SDP_RO_10); 63 if (info < 0) 64 return info; 65 66 if (signal) 67 *signal = info & ADV748X_SDP_RO_10_IN_LOCK ? 68 0 : V4L2_IN_ST_NO_SIGNAL; 69 70 if (!std) 71 return 0; 72 73 /* Standard not valid if there is no signal */ 74 if (!(info & ADV748X_SDP_RO_10_IN_LOCK)) { 75 *std = V4L2_STD_UNKNOWN; 76 return 0; 77 } 78 79 switch (info & 0x70) { 80 case 0x00: 81 *std = V4L2_STD_NTSC; 82 break; 83 case 0x10: 84 *std = V4L2_STD_NTSC_443; 85 break; 86 case 0x20: 87 *std = V4L2_STD_PAL_M; 88 break; 89 case 0x30: 90 *std = V4L2_STD_PAL_60; 91 break; 92 case 0x40: 93 *std = V4L2_STD_PAL; 94 break; 95 case 0x50: 96 *std = V4L2_STD_SECAM; 97 break; 98 case 0x60: 99 *std = V4L2_STD_PAL_Nc | V4L2_STD_PAL_N; 100 break; 101 case 0x70: 102 *std = V4L2_STD_SECAM; 103 break; 104 default: 105 *std = V4L2_STD_UNKNOWN; 106 break; 107 } 108 109 return 0; 110 } 111 112 static void adv748x_afe_fill_format(struct adv748x_afe *afe, 113 struct v4l2_mbus_framefmt *fmt) 114 { 115 memset(fmt, 0, sizeof(*fmt)); 116 117 fmt->code = MEDIA_BUS_FMT_UYVY8_1X16; 118 fmt->colorspace = V4L2_COLORSPACE_SMPTE170M; 119 fmt->field = V4L2_FIELD_ALTERNATE; 120 121 fmt->width = 720; 122 fmt->height = afe->curr_norm & V4L2_STD_525_60 ? 480 : 576; 123 124 /* Field height */ 125 fmt->height /= 2; 126 } 127 128 static int adv748x_afe_std(v4l2_std_id std) 129 { 130 if (std == V4L2_STD_PAL_60) 131 return ADV748X_AFE_STD_PAL60; 132 if (std == V4L2_STD_NTSC_443) 133 return ADV748X_AFE_STD_NTSC_443; 134 if (std == V4L2_STD_PAL_N) 135 return ADV748X_AFE_STD_PAL_N; 136 if (std == V4L2_STD_PAL_M) 137 return ADV748X_AFE_STD_PAL_M; 138 if (std == V4L2_STD_PAL_Nc) 139 return ADV748X_AFE_STD_PAL_COMB_N; 140 if (std & V4L2_STD_NTSC) 141 return ADV748X_AFE_STD_NTSC_M; 142 if (std & V4L2_STD_PAL) 143 return ADV748X_AFE_STD_PAL_BG; 144 if (std & V4L2_STD_SECAM) 145 return ADV748X_AFE_STD_PAL_SECAM; 146 147 return -EINVAL; 148 } 149 150 static void adv748x_afe_set_video_standard(struct adv748x_state *state, 151 int sdpstd) 152 { 153 sdp_clrset(state, ADV748X_SDP_VID_SEL, ADV748X_SDP_VID_SEL_MASK, 154 (sdpstd & 0xf) << ADV748X_SDP_VID_SEL_SHIFT); 155 } 156 157 int adv748x_afe_s_input(struct adv748x_afe *afe, unsigned int input) 158 { 159 struct adv748x_state *state = adv748x_afe_to_state(afe); 160 161 return sdp_write(state, ADV748X_SDP_INSEL, input); 162 } 163 164 /* ----------------------------------------------------------------------------- 165 * v4l2_subdev_video_ops 166 */ 167 168 static int adv748x_afe_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm) 169 { 170 struct adv748x_afe *afe = adv748x_sd_to_afe(sd); 171 172 *norm = afe->curr_norm; 173 174 return 0; 175 } 176 177 static int adv748x_afe_s_std(struct v4l2_subdev *sd, v4l2_std_id std) 178 { 179 struct adv748x_afe *afe = adv748x_sd_to_afe(sd); 180 struct adv748x_state *state = adv748x_afe_to_state(afe); 181 int afe_std = adv748x_afe_std(std); 182 183 if (afe_std < 0) 184 return afe_std; 185 186 mutex_lock(&state->mutex); 187 188 adv748x_afe_set_video_standard(state, afe_std); 189 afe->curr_norm = std; 190 191 mutex_unlock(&state->mutex); 192 193 return 0; 194 } 195 196 static int adv748x_afe_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) 197 { 198 struct adv748x_afe *afe = adv748x_sd_to_afe(sd); 199 struct adv748x_state *state = adv748x_afe_to_state(afe); 200 int afe_std; 201 int ret; 202 203 mutex_lock(&state->mutex); 204 205 if (afe->streaming) { 206 ret = -EBUSY; 207 goto unlock; 208 } 209 210 /* Set auto detect mode */ 211 adv748x_afe_set_video_standard(state, 212 ADV748X_AFE_STD_AD_PAL_BG_NTSC_J_SECAM); 213 214 msleep(100); 215 216 /* Read detected standard */ 217 ret = adv748x_afe_status(afe, NULL, std); 218 219 afe_std = adv748x_afe_std(afe->curr_norm); 220 if (afe_std < 0) 221 goto unlock; 222 223 /* Restore original state */ 224 adv748x_afe_set_video_standard(state, afe_std); 225 226 unlock: 227 mutex_unlock(&state->mutex); 228 229 return ret; 230 } 231 232 static int adv748x_afe_g_tvnorms(struct v4l2_subdev *sd, v4l2_std_id *norm) 233 { 234 *norm = V4L2_STD_ALL; 235 236 return 0; 237 } 238 239 static int adv748x_afe_g_input_status(struct v4l2_subdev *sd, u32 *status) 240 { 241 struct adv748x_afe *afe = adv748x_sd_to_afe(sd); 242 struct adv748x_state *state = adv748x_afe_to_state(afe); 243 int ret; 244 245 mutex_lock(&state->mutex); 246 247 ret = adv748x_afe_status(afe, status, NULL); 248 249 mutex_unlock(&state->mutex); 250 251 return ret; 252 } 253 254 static int adv748x_afe_s_stream(struct v4l2_subdev *sd, int enable) 255 { 256 struct adv748x_afe *afe = adv748x_sd_to_afe(sd); 257 struct adv748x_state *state = adv748x_afe_to_state(afe); 258 u32 signal = V4L2_IN_ST_NO_SIGNAL; 259 int ret; 260 261 mutex_lock(&state->mutex); 262 263 if (enable) { 264 ret = adv748x_afe_s_input(afe, afe->input); 265 if (ret) 266 goto unlock; 267 } 268 269 ret = adv748x_tx_power(afe->tx, enable); 270 if (ret) 271 goto unlock; 272 273 afe->streaming = enable; 274 275 adv748x_afe_status(afe, &signal, NULL); 276 if (signal != V4L2_IN_ST_NO_SIGNAL) 277 adv_dbg(state, "Detected SDP signal\n"); 278 else 279 adv_dbg(state, "Couldn't detect SDP video signal\n"); 280 281 unlock: 282 mutex_unlock(&state->mutex); 283 284 return ret; 285 } 286 287 static const struct v4l2_subdev_video_ops adv748x_afe_video_ops = { 288 .g_std = adv748x_afe_g_std, 289 .s_std = adv748x_afe_s_std, 290 .querystd = adv748x_afe_querystd, 291 .g_tvnorms = adv748x_afe_g_tvnorms, 292 .g_input_status = adv748x_afe_g_input_status, 293 .s_stream = adv748x_afe_s_stream, 294 }; 295 296 /* ----------------------------------------------------------------------------- 297 * v4l2_subdev_pad_ops 298 */ 299 300 static int adv748x_afe_propagate_pixelrate(struct adv748x_afe *afe) 301 { 302 struct v4l2_subdev *tx; 303 304 tx = adv748x_get_remote_sd(&afe->pads[ADV748X_AFE_SOURCE]); 305 if (!tx) 306 return -ENOLINK; 307 308 /* 309 * The ADV748x ADC sampling frequency is twice the externally supplied 310 * clock whose frequency is required to be 28.63636 MHz. It oversamples 311 * with a factor of 4 resulting in a pixel rate of 14.3180180 MHz. 312 */ 313 return adv748x_csi2_set_pixelrate(tx, 14318180); 314 } 315 316 static int adv748x_afe_enum_mbus_code(struct v4l2_subdev *sd, 317 struct v4l2_subdev_state *sd_state, 318 struct v4l2_subdev_mbus_code_enum *code) 319 { 320 if (code->index != 0) 321 return -EINVAL; 322 323 code->code = MEDIA_BUS_FMT_UYVY8_1X16; 324 325 return 0; 326 } 327 328 static int adv748x_afe_get_format(struct v4l2_subdev *sd, 329 struct v4l2_subdev_state *sd_state, 330 struct v4l2_subdev_format *sdformat) 331 { 332 struct adv748x_afe *afe = adv748x_sd_to_afe(sd); 333 struct v4l2_mbus_framefmt *mbusformat; 334 335 /* It makes no sense to get the format of the analog sink pads */ 336 if (sdformat->pad != ADV748X_AFE_SOURCE) 337 return -EINVAL; 338 339 if (sdformat->which == V4L2_SUBDEV_FORMAT_TRY) { 340 mbusformat = v4l2_subdev_state_get_format(sd_state, 341 sdformat->pad); 342 sdformat->format = *mbusformat; 343 } else { 344 adv748x_afe_fill_format(afe, &sdformat->format); 345 adv748x_afe_propagate_pixelrate(afe); 346 } 347 348 return 0; 349 } 350 351 static int adv748x_afe_set_format(struct v4l2_subdev *sd, 352 struct v4l2_subdev_state *sd_state, 353 struct v4l2_subdev_format *sdformat) 354 { 355 struct v4l2_mbus_framefmt *mbusformat; 356 357 /* It makes no sense to get the format of the analog sink pads */ 358 if (sdformat->pad != ADV748X_AFE_SOURCE) 359 return -EINVAL; 360 361 if (sdformat->which == V4L2_SUBDEV_FORMAT_ACTIVE) 362 return adv748x_afe_get_format(sd, sd_state, sdformat); 363 364 mbusformat = v4l2_subdev_state_get_format(sd_state, sdformat->pad); 365 *mbusformat = sdformat->format; 366 367 return 0; 368 } 369 370 static const struct v4l2_subdev_pad_ops adv748x_afe_pad_ops = { 371 .enum_mbus_code = adv748x_afe_enum_mbus_code, 372 .set_fmt = adv748x_afe_set_format, 373 .get_fmt = adv748x_afe_get_format, 374 }; 375 376 /* ----------------------------------------------------------------------------- 377 * v4l2_subdev_ops 378 */ 379 380 static const struct v4l2_subdev_ops adv748x_afe_ops = { 381 .video = &adv748x_afe_video_ops, 382 .pad = &adv748x_afe_pad_ops, 383 }; 384 385 /* ----------------------------------------------------------------------------- 386 * Controls 387 */ 388 389 static const char * const afe_ctrl_frp_menu[] = { 390 "Disabled", 391 "Solid Blue", 392 "Color Bars", 393 "Grey Ramp", 394 "Cb Ramp", 395 "Cr Ramp", 396 "Boundary" 397 }; 398 399 static int adv748x_afe_s_ctrl(struct v4l2_ctrl *ctrl) 400 { 401 struct adv748x_afe *afe = adv748x_ctrl_to_afe(ctrl); 402 struct adv748x_state *state = adv748x_afe_to_state(afe); 403 bool enable; 404 int ret; 405 406 ret = sdp_write(state, 0x0e, 0x00); 407 if (ret < 0) 408 return ret; 409 410 switch (ctrl->id) { 411 case V4L2_CID_BRIGHTNESS: 412 ret = sdp_write(state, ADV748X_SDP_BRI, ctrl->val); 413 break; 414 case V4L2_CID_HUE: 415 /* Hue is inverted according to HSL chart */ 416 ret = sdp_write(state, ADV748X_SDP_HUE, -ctrl->val); 417 break; 418 case V4L2_CID_CONTRAST: 419 ret = sdp_write(state, ADV748X_SDP_CON, ctrl->val); 420 break; 421 case V4L2_CID_SATURATION: 422 ret = sdp_write(state, ADV748X_SDP_SD_SAT_U, ctrl->val); 423 if (ret) 424 break; 425 ret = sdp_write(state, ADV748X_SDP_SD_SAT_V, ctrl->val); 426 break; 427 case V4L2_CID_TEST_PATTERN: 428 enable = !!ctrl->val; 429 430 /* Enable/Disable Color bar test patterns */ 431 ret = sdp_clrset(state, ADV748X_SDP_DEF, ADV748X_SDP_DEF_VAL_EN, 432 enable); 433 if (ret) 434 break; 435 ret = sdp_clrset(state, ADV748X_SDP_FRP, ADV748X_SDP_FRP_MASK, 436 enable ? ctrl->val - 1 : 0); 437 break; 438 default: 439 return -EINVAL; 440 } 441 442 return ret; 443 } 444 445 static const struct v4l2_ctrl_ops adv748x_afe_ctrl_ops = { 446 .s_ctrl = adv748x_afe_s_ctrl, 447 }; 448 449 static int adv748x_afe_init_controls(struct adv748x_afe *afe) 450 { 451 struct adv748x_state *state = adv748x_afe_to_state(afe); 452 453 v4l2_ctrl_handler_init(&afe->ctrl_hdl, 5); 454 455 /* Use our mutex for the controls */ 456 afe->ctrl_hdl.lock = &state->mutex; 457 458 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops, 459 V4L2_CID_BRIGHTNESS, ADV748X_SDP_BRI_MIN, 460 ADV748X_SDP_BRI_MAX, 1, ADV748X_SDP_BRI_DEF); 461 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops, 462 V4L2_CID_CONTRAST, ADV748X_SDP_CON_MIN, 463 ADV748X_SDP_CON_MAX, 1, ADV748X_SDP_CON_DEF); 464 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops, 465 V4L2_CID_SATURATION, ADV748X_SDP_SAT_MIN, 466 ADV748X_SDP_SAT_MAX, 1, ADV748X_SDP_SAT_DEF); 467 v4l2_ctrl_new_std(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops, 468 V4L2_CID_HUE, ADV748X_SDP_HUE_MIN, 469 ADV748X_SDP_HUE_MAX, 1, ADV748X_SDP_HUE_DEF); 470 471 v4l2_ctrl_new_std_menu_items(&afe->ctrl_hdl, &adv748x_afe_ctrl_ops, 472 V4L2_CID_TEST_PATTERN, 473 ARRAY_SIZE(afe_ctrl_frp_menu) - 1, 474 0, 0, afe_ctrl_frp_menu); 475 476 afe->sd.ctrl_handler = &afe->ctrl_hdl; 477 if (afe->ctrl_hdl.error) { 478 v4l2_ctrl_handler_free(&afe->ctrl_hdl); 479 return afe->ctrl_hdl.error; 480 } 481 482 return v4l2_ctrl_handler_setup(&afe->ctrl_hdl); 483 } 484 485 int adv748x_afe_init(struct adv748x_afe *afe) 486 { 487 struct adv748x_state *state = adv748x_afe_to_state(afe); 488 int ret; 489 unsigned int i; 490 491 afe->input = 0; 492 afe->streaming = false; 493 afe->curr_norm = V4L2_STD_NTSC_M; 494 495 adv748x_subdev_init(&afe->sd, state, &adv748x_afe_ops, 496 MEDIA_ENT_F_ATV_DECODER, "afe"); 497 498 /* Identify the first connector found as a default input if set */ 499 for (i = ADV748X_PORT_AIN0; i <= ADV748X_PORT_AIN7; i++) { 500 /* Inputs and ports are 1-indexed to match the data sheet */ 501 if (state->endpoints[i]) { 502 afe->input = i; 503 break; 504 } 505 } 506 507 adv748x_afe_s_input(afe, afe->input); 508 509 adv_dbg(state, "AFE Default input set to %d\n", afe->input); 510 511 /* Entity pads and sinks are 0-indexed to match the pads */ 512 for (i = ADV748X_AFE_SINK_AIN0; i <= ADV748X_AFE_SINK_AIN7; i++) 513 afe->pads[i].flags = MEDIA_PAD_FL_SINK; 514 515 afe->pads[ADV748X_AFE_SOURCE].flags = MEDIA_PAD_FL_SOURCE; 516 517 ret = media_entity_pads_init(&afe->sd.entity, ADV748X_AFE_NR_PADS, 518 afe->pads); 519 if (ret) 520 return ret; 521 522 ret = adv748x_afe_init_controls(afe); 523 if (ret) 524 goto error; 525 526 return 0; 527 528 error: 529 media_entity_cleanup(&afe->sd.entity); 530 531 return ret; 532 } 533 534 void adv748x_afe_cleanup(struct adv748x_afe *afe) 535 { 536 v4l2_device_unregister_subdev(&afe->sd); 537 media_entity_cleanup(&afe->sd.entity); 538 v4l2_ctrl_handler_free(&afe->ctrl_hdl); 539 } 540