1 /* 2 * helene.c 3 * 4 * Sony HELENE DVB-S/S2 DVB-T/T2 DVB-C/C2 ISDB-T/S tuner driver (CXD2858ER) 5 * 6 * Copyright 2012 Sony Corporation 7 * Copyright (C) 2014 NetUP Inc. 8 * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 #include <linux/slab.h> 22 #include <linux/module.h> 23 #include <linux/dvb/frontend.h> 24 #include <linux/types.h> 25 #include "helene.h" 26 #include "dvb_frontend.h" 27 28 #define MAX_WRITE_REGSIZE 20 29 30 enum helene_state { 31 STATE_UNKNOWN, 32 STATE_SLEEP, 33 STATE_ACTIVE 34 }; 35 36 struct helene_priv { 37 u32 frequency; 38 u8 i2c_address; 39 struct i2c_adapter *i2c; 40 enum helene_state state; 41 void *set_tuner_data; 42 int (*set_tuner)(void *, int); 43 enum helene_xtal xtal; 44 }; 45 46 #define TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system) \ 47 (((tv_system) != SONY_HELENE_DTV_DVBC_6) && \ 48 ((tv_system) != SONY_HELENE_DTV_DVBC_8)\ 49 && ((tv_system) != SONY_HELENE_DTV_DVBC2_6) && \ 50 ((tv_system) != SONY_HELENE_DTV_DVBC2_8)) 51 52 #define HELENE_AUTO 0xff 53 #define HELENE_OFFSET(ofs) ((u8)(ofs) & 0x1F) 54 #define HELENE_BW_6 0x00 55 #define HELENE_BW_7 0x01 56 #define HELENE_BW_8 0x02 57 #define HELENE_BW_1_7 0x03 58 59 enum helene_tv_system_t { 60 SONY_HELENE_TV_SYSTEM_UNKNOWN, 61 /* Terrestrial Analog */ 62 SONY_HELENE_ATV_MN_EIAJ, 63 /**< System-M (Japan) (IF: Fp=5.75MHz in default) */ 64 SONY_HELENE_ATV_MN_SAP, 65 /**< System-M (US) (IF: Fp=5.75MHz in default) */ 66 SONY_HELENE_ATV_MN_A2, 67 /**< System-M (Korea) (IF: Fp=5.9MHz in default) */ 68 SONY_HELENE_ATV_BG, 69 /**< System-B/G (IF: Fp=7.3MHz in default) */ 70 SONY_HELENE_ATV_I, 71 /**< System-I (IF: Fp=7.85MHz in default) */ 72 SONY_HELENE_ATV_DK, 73 /**< System-D/K (IF: Fp=7.85MHz in default) */ 74 SONY_HELENE_ATV_L, 75 /**< System-L (IF: Fp=7.85MHz in default) */ 76 SONY_HELENE_ATV_L_DASH, 77 /**< System-L DASH (IF: Fp=2.2MHz in default) */ 78 /* Terrestrial/Cable Digital */ 79 SONY_HELENE_DTV_8VSB, 80 /**< ATSC 8VSB (IF: Fc=3.7MHz in default) */ 81 SONY_HELENE_DTV_QAM, 82 /**< US QAM (IF: Fc=3.7MHz in default) */ 83 SONY_HELENE_DTV_ISDBT_6, 84 /**< ISDB-T 6MHzBW (IF: Fc=3.55MHz in default) */ 85 SONY_HELENE_DTV_ISDBT_7, 86 /**< ISDB-T 7MHzBW (IF: Fc=4.15MHz in default) */ 87 SONY_HELENE_DTV_ISDBT_8, 88 /**< ISDB-T 8MHzBW (IF: Fc=4.75MHz in default) */ 89 SONY_HELENE_DTV_DVBT_5, 90 /**< DVB-T 5MHzBW (IF: Fc=3.6MHz in default) */ 91 SONY_HELENE_DTV_DVBT_6, 92 /**< DVB-T 6MHzBW (IF: Fc=3.6MHz in default) */ 93 SONY_HELENE_DTV_DVBT_7, 94 /**< DVB-T 7MHzBW (IF: Fc=4.2MHz in default) */ 95 SONY_HELENE_DTV_DVBT_8, 96 /**< DVB-T 8MHzBW (IF: Fc=4.8MHz in default) */ 97 SONY_HELENE_DTV_DVBT2_1_7, 98 /**< DVB-T2 1.7MHzBW (IF: Fc=3.5MHz in default) */ 99 SONY_HELENE_DTV_DVBT2_5, 100 /**< DVB-T2 5MHzBW (IF: Fc=3.6MHz in default) */ 101 SONY_HELENE_DTV_DVBT2_6, 102 /**< DVB-T2 6MHzBW (IF: Fc=3.6MHz in default) */ 103 SONY_HELENE_DTV_DVBT2_7, 104 /**< DVB-T2 7MHzBW (IF: Fc=4.2MHz in default) */ 105 SONY_HELENE_DTV_DVBT2_8, 106 /**< DVB-T2 8MHzBW (IF: Fc=4.8MHz in default) */ 107 SONY_HELENE_DTV_DVBC_6, 108 /**< DVB-C 6MHzBW (IF: Fc=3.7MHz in default) */ 109 SONY_HELENE_DTV_DVBC_8, 110 /**< DVB-C 8MHzBW (IF: Fc=4.9MHz in default) */ 111 SONY_HELENE_DTV_DVBC2_6, 112 /**< DVB-C2 6MHzBW (IF: Fc=3.7MHz in default) */ 113 SONY_HELENE_DTV_DVBC2_8, 114 /**< DVB-C2 8MHzBW (IF: Fc=4.9MHz in default) */ 115 SONY_HELENE_DTV_DTMB, 116 /**< DTMB (IF: Fc=5.1MHz in default) */ 117 /* Satellite */ 118 SONY_HELENE_STV_ISDBS, 119 /**< ISDB-S */ 120 SONY_HELENE_STV_DVBS, 121 /**< DVB-S */ 122 SONY_HELENE_STV_DVBS2, 123 /**< DVB-S2 */ 124 125 SONY_HELENE_ATV_MIN = SONY_HELENE_ATV_MN_EIAJ, 126 /**< Minimum analog terrestrial system */ 127 SONY_HELENE_ATV_MAX = SONY_HELENE_ATV_L_DASH, 128 /**< Maximum analog terrestrial system */ 129 SONY_HELENE_DTV_MIN = SONY_HELENE_DTV_8VSB, 130 /**< Minimum digital terrestrial system */ 131 SONY_HELENE_DTV_MAX = SONY_HELENE_DTV_DTMB, 132 /**< Maximum digital terrestrial system */ 133 SONY_HELENE_TERR_TV_SYSTEM_NUM, 134 /**< Number of supported terrestrial broadcasting system */ 135 SONY_HELENE_STV_MIN = SONY_HELENE_STV_ISDBS, 136 /**< Minimum satellite system */ 137 SONY_HELENE_STV_MAX = SONY_HELENE_STV_DVBS2 138 /**< Maximum satellite system */ 139 }; 140 141 struct helene_terr_adjust_param_t { 142 /* < Addr:0x69 Bit[6:4] : RFVGA gain. 143 * 0xFF means Auto. (RF_GAIN_SEL = 1) 144 */ 145 uint8_t RF_GAIN; 146 /* < Addr:0x69 Bit[3:0] : IF_BPF gain. 147 */ 148 uint8_t IF_BPF_GC; 149 /* < Addr:0x6B Bit[3:0] : RF overload 150 * RF input detect level. (FRF <= 172MHz) 151 */ 152 uint8_t RFOVLD_DET_LV1_VL; 153 /* < Addr:0x6B Bit[3:0] : RF overload 154 * RF input detect level. (172MHz < FRF <= 464MHz) 155 */ 156 uint8_t RFOVLD_DET_LV1_VH; 157 /* < Addr:0x6B Bit[3:0] : RF overload 158 * RF input detect level. (FRF > 464MHz) 159 */ 160 uint8_t RFOVLD_DET_LV1_U; 161 /* < Addr:0x6C Bit[2:0] : 162 * Internal RFAGC detect level. (FRF <= 172MHz) 163 */ 164 uint8_t IFOVLD_DET_LV_VL; 165 /* < Addr:0x6C Bit[2:0] : 166 * Internal RFAGC detect level. (172MHz < FRF <= 464MHz) 167 */ 168 uint8_t IFOVLD_DET_LV_VH; 169 /* < Addr:0x6C Bit[2:0] : 170 * Internal RFAGC detect level. (FRF > 464MHz) 171 */ 172 uint8_t IFOVLD_DET_LV_U; 173 /* < Addr:0x6D Bit[5:4] : 174 * IF filter center offset. 175 */ 176 uint8_t IF_BPF_F0; 177 /* < Addr:0x6D Bit[1:0] : 178 * 6MHzBW(0x00) or 7MHzBW(0x01) 179 * or 8MHzBW(0x02) or 1.7MHzBW(0x03) 180 */ 181 uint8_t BW; 182 /* < Addr:0x6E Bit[4:0] : 183 * 5bit signed. IF offset (kHz) = FIF_OFFSET x 50 184 */ 185 uint8_t FIF_OFFSET; 186 /* < Addr:0x6F Bit[4:0] : 187 * 5bit signed. BW offset (kHz) = 188 * BW_OFFSET x 50 (BW_OFFSET x 10 in 1.7MHzBW) 189 */ 190 uint8_t BW_OFFSET; 191 /* < Addr:0x9C Bit[0] : 192 * Local polarity. (0: Upper Local, 1: Lower Local) 193 */ 194 uint8_t IS_LOWERLOCAL; 195 }; 196 197 static const struct helene_terr_adjust_param_t 198 terr_params[SONY_HELENE_TERR_TV_SYSTEM_NUM] = { 199 /*< SONY_HELENE_TV_SYSTEM_UNKNOWN */ 200 {HELENE_AUTO, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 201 HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(0), 0x00}, 202 /* Analog */ 203 /**< SONY_HELENE_ATV_MN_EIAJ (System-M (Japan)) */ 204 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00, 205 HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(1), 0x00}, 206 /**< SONY_HELENE_ATV_MN_SAP (System-M (US)) */ 207 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00, 208 HELENE_BW_6, HELENE_OFFSET(0), HELENE_OFFSET(1), 0x00}, 209 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00, 210 HELENE_BW_6, HELENE_OFFSET(3), HELENE_OFFSET(1), 0x00}, 211 /**< SONY_HELENE_ATV_MN_A2 (System-M (Korea)) */ 212 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00, 213 HELENE_BW_7, HELENE_OFFSET(11), HELENE_OFFSET(5), 0x00}, 214 /**< SONY_HELENE_ATV_BG (System-B/G) */ 215 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00, 216 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00}, 217 /**< SONY_HELENE_ATV_I (System-I) */ 218 {HELENE_AUTO, 0x05, 0x03, 0x06, 0x03, 0x01, 0x01, 0x01, 0x00, 219 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00}, 220 /**< SONY_HELENE_ATV_DK (System-D/K) */ 221 {HELENE_AUTO, 0x03, 0x04, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00, 222 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(-3), 0x00}, 223 /**< SONY_HELENE_ATV_L (System-L) */ 224 {HELENE_AUTO, 0x03, 0x04, 0x0A, 0x04, 0x04, 0x04, 0x04, 0x00, 225 HELENE_BW_8, HELENE_OFFSET(-1), HELENE_OFFSET(4), 0x00}, 226 /**< SONY_HELENE_ATV_L_DASH (System-L DASH) */ 227 /* Digital */ 228 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x03, 0x03, 0x03, 0x00, 229 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-3), 0x00}, 230 /**< SONY_HELENE_DTV_8VSB (ATSC 8VSB) */ 231 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 232 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-3), 0x00}, 233 /**< SONY_HELENE_DTV_QAM (US QAM) */ 234 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 235 HELENE_BW_6, HELENE_OFFSET(-9), HELENE_OFFSET(-5), 0x00}, 236 /**< SONY_HELENE_DTV_ISDBT_6 (ISDB-T 6MHzBW) */ 237 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 238 HELENE_BW_7, HELENE_OFFSET(-7), HELENE_OFFSET(-6), 0x00}, 239 /**< SONY_HELENE_DTV_ISDBT_7 (ISDB-T 7MHzBW) */ 240 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 241 HELENE_BW_8, HELENE_OFFSET(-5), HELENE_OFFSET(-7), 0x00}, 242 /**< SONY_HELENE_DTV_ISDBT_8 (ISDB-T 8MHzBW) */ 243 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 244 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00}, 245 /**< SONY_HELENE_DTV_DVBT_5 (DVB-T 5MHzBW) */ 246 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 247 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00}, 248 /**< SONY_HELENE_DTV_DVBT_6 (DVB-T 6MHzBW) */ 249 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 250 HELENE_BW_7, HELENE_OFFSET(-6), HELENE_OFFSET(-5), 0x00}, 251 /**< SONY_HELENE_DTV_DVBT_7 (DVB-T 7MHzBW) */ 252 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 253 HELENE_BW_8, HELENE_OFFSET(-4), HELENE_OFFSET(-6), 0x00}, 254 /**< SONY_HELENE_DTV_DVBT_8 (DVB-T 8MHzBW) */ 255 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 256 HELENE_BW_1_7, HELENE_OFFSET(-10), HELENE_OFFSET(-10), 0x00}, 257 /**< SONY_HELENE_DTV_DVBT2_1_7 (DVB-T2 1.7MHzBW) */ 258 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 259 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00}, 260 /**< SONY_HELENE_DTV_DVBT2_5 (DVB-T2 5MHzBW) */ 261 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 262 HELENE_BW_6, HELENE_OFFSET(-8), HELENE_OFFSET(-3), 0x00}, 263 /**< SONY_HELENE_DTV_DVBT2_6 (DVB-T2 6MHzBW) */ 264 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 265 HELENE_BW_7, HELENE_OFFSET(-6), HELENE_OFFSET(-5), 0x00}, 266 /**< SONY_HELENE_DTV_DVBT2_7 (DVB-T2 7MHzBW) */ 267 {HELENE_AUTO, 0x09, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 268 HELENE_BW_8, HELENE_OFFSET(-4), HELENE_OFFSET(-6), 0x00}, 269 /**< SONY_HELENE_DTV_DVBT2_8 (DVB-T2 8MHzBW) */ 270 {HELENE_AUTO, 0x05, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x00, 271 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-4), 0x00}, 272 /**< SONY_HELENE_DTV_DVBC_6 (DVB-C 6MHzBW) */ 273 {HELENE_AUTO, 0x05, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01, 0x00, 274 HELENE_BW_8, HELENE_OFFSET(-2), HELENE_OFFSET(-3), 0x00}, 275 /**< SONY_HELENE_DTV_DVBC_8 (DVB-C 8MHzBW) */ 276 {HELENE_AUTO, 0x03, 0x09, 0x09, 0x09, 0x02, 0x02, 0x02, 0x00, 277 HELENE_BW_6, HELENE_OFFSET(-6), HELENE_OFFSET(-2), 0x00}, 278 /**< SONY_HELENE_DTV_DVBC2_6 (DVB-C2 6MHzBW) */ 279 {HELENE_AUTO, 0x03, 0x09, 0x09, 0x09, 0x02, 0x02, 0x02, 0x00, 280 HELENE_BW_8, HELENE_OFFSET(-2), HELENE_OFFSET(0), 0x00}, 281 /**< SONY_HELENE_DTV_DVBC2_8 (DVB-C2 8MHzBW) */ 282 {HELENE_AUTO, 0x04, 0x0B, 0x0B, 0x0B, 0x02, 0x02, 0x02, 0x00, 283 HELENE_BW_8, HELENE_OFFSET(2), HELENE_OFFSET(1), 0x00} 284 /**< SONY_HELENE_DTV_DTMB (DTMB) */ 285 }; 286 287 static void helene_i2c_debug(struct helene_priv *priv, 288 u8 reg, u8 write, const u8 *data, u32 len) 289 { 290 dev_dbg(&priv->i2c->dev, "helene: I2C %s reg 0x%02x size %d\n", 291 (write == 0 ? "read" : "write"), reg, len); 292 print_hex_dump_bytes("helene: I2C data: ", 293 DUMP_PREFIX_OFFSET, data, len); 294 } 295 296 static int helene_write_regs(struct helene_priv *priv, 297 u8 reg, const u8 *data, u32 len) 298 { 299 int ret; 300 u8 buf[MAX_WRITE_REGSIZE + 1]; 301 struct i2c_msg msg[1] = { 302 { 303 .addr = priv->i2c_address, 304 .flags = 0, 305 .len = len + 1, 306 .buf = buf, 307 } 308 }; 309 310 if (len + 1 > sizeof(buf)) { 311 dev_warn(&priv->i2c->dev, 312 "wr reg=%04x: len=%d vs %Zu is too big!\n", 313 reg, len + 1, sizeof(buf)); 314 return -E2BIG; 315 } 316 317 helene_i2c_debug(priv, reg, 1, data, len); 318 buf[0] = reg; 319 memcpy(&buf[1], data, len); 320 ret = i2c_transfer(priv->i2c, msg, 1); 321 if (ret >= 0 && ret != 1) 322 ret = -EREMOTEIO; 323 if (ret < 0) { 324 dev_warn(&priv->i2c->dev, 325 "%s: i2c wr failed=%d reg=%02x len=%d\n", 326 KBUILD_MODNAME, ret, reg, len); 327 return ret; 328 } 329 return 0; 330 } 331 332 static int helene_write_reg(struct helene_priv *priv, u8 reg, u8 val) 333 { 334 return helene_write_regs(priv, reg, &val, 1); 335 } 336 337 static int helene_read_regs(struct helene_priv *priv, 338 u8 reg, u8 *val, u32 len) 339 { 340 int ret; 341 struct i2c_msg msg[2] = { 342 { 343 .addr = priv->i2c_address, 344 .flags = 0, 345 .len = 1, 346 .buf = ®, 347 }, { 348 .addr = priv->i2c_address, 349 .flags = I2C_M_RD, 350 .len = len, 351 .buf = val, 352 } 353 }; 354 355 ret = i2c_transfer(priv->i2c, &msg[0], 1); 356 if (ret >= 0 && ret != 1) 357 ret = -EREMOTEIO; 358 if (ret < 0) { 359 dev_warn(&priv->i2c->dev, 360 "%s: I2C rw failed=%d addr=%02x reg=%02x\n", 361 KBUILD_MODNAME, ret, priv->i2c_address, reg); 362 return ret; 363 } 364 ret = i2c_transfer(priv->i2c, &msg[1], 1); 365 if (ret >= 0 && ret != 1) 366 ret = -EREMOTEIO; 367 if (ret < 0) { 368 dev_warn(&priv->i2c->dev, 369 "%s: i2c rd failed=%d addr=%02x reg=%02x\n", 370 KBUILD_MODNAME, ret, priv->i2c_address, reg); 371 return ret; 372 } 373 helene_i2c_debug(priv, reg, 0, val, len); 374 return 0; 375 } 376 377 static int helene_read_reg(struct helene_priv *priv, u8 reg, u8 *val) 378 { 379 return helene_read_regs(priv, reg, val, 1); 380 } 381 382 static int helene_set_reg_bits(struct helene_priv *priv, 383 u8 reg, u8 data, u8 mask) 384 { 385 int res; 386 u8 rdata; 387 388 if (mask != 0xff) { 389 res = helene_read_reg(priv, reg, &rdata); 390 if (res != 0) 391 return res; 392 data = ((data & mask) | (rdata & (mask ^ 0xFF))); 393 } 394 return helene_write_reg(priv, reg, data); 395 } 396 397 static int helene_enter_power_save(struct helene_priv *priv) 398 { 399 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 400 if (priv->state == STATE_SLEEP) 401 return 0; 402 403 /* Standby setting for CPU */ 404 helene_write_reg(priv, 0x88, 0x0); 405 406 /* Standby setting for internal logic block */ 407 helene_write_reg(priv, 0x87, 0xC0); 408 409 priv->state = STATE_SLEEP; 410 return 0; 411 } 412 413 static int helene_leave_power_save(struct helene_priv *priv) 414 { 415 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 416 if (priv->state == STATE_ACTIVE) 417 return 0; 418 419 /* Standby setting for internal logic block */ 420 helene_write_reg(priv, 0x87, 0xC4); 421 422 /* Standby setting for CPU */ 423 helene_write_reg(priv, 0x88, 0x40); 424 425 priv->state = STATE_ACTIVE; 426 return 0; 427 } 428 429 static int helene_init(struct dvb_frontend *fe) 430 { 431 struct helene_priv *priv = fe->tuner_priv; 432 433 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 434 return helene_leave_power_save(priv); 435 } 436 437 static int helene_release(struct dvb_frontend *fe) 438 { 439 struct helene_priv *priv = fe->tuner_priv; 440 441 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 442 kfree(fe->tuner_priv); 443 fe->tuner_priv = NULL; 444 return 0; 445 } 446 447 static int helene_sleep(struct dvb_frontend *fe) 448 { 449 struct helene_priv *priv = fe->tuner_priv; 450 451 dev_dbg(&priv->i2c->dev, "%s()\n", __func__); 452 helene_enter_power_save(priv); 453 return 0; 454 } 455 456 static enum helene_tv_system_t helene_get_tv_system(struct dvb_frontend *fe) 457 { 458 enum helene_tv_system_t system = SONY_HELENE_TV_SYSTEM_UNKNOWN; 459 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 460 struct helene_priv *priv = fe->tuner_priv; 461 462 if (p->delivery_system == SYS_DVBT) { 463 if (p->bandwidth_hz <= 5000000) 464 system = SONY_HELENE_DTV_DVBT_5; 465 else if (p->bandwidth_hz <= 6000000) 466 system = SONY_HELENE_DTV_DVBT_6; 467 else if (p->bandwidth_hz <= 7000000) 468 system = SONY_HELENE_DTV_DVBT_7; 469 else if (p->bandwidth_hz <= 8000000) 470 system = SONY_HELENE_DTV_DVBT_8; 471 else { 472 system = SONY_HELENE_DTV_DVBT_8; 473 p->bandwidth_hz = 8000000; 474 } 475 } else if (p->delivery_system == SYS_DVBT2) { 476 if (p->bandwidth_hz <= 5000000) 477 system = SONY_HELENE_DTV_DVBT2_5; 478 else if (p->bandwidth_hz <= 6000000) 479 system = SONY_HELENE_DTV_DVBT2_6; 480 else if (p->bandwidth_hz <= 7000000) 481 system = SONY_HELENE_DTV_DVBT2_7; 482 else if (p->bandwidth_hz <= 8000000) 483 system = SONY_HELENE_DTV_DVBT2_8; 484 else { 485 system = SONY_HELENE_DTV_DVBT2_8; 486 p->bandwidth_hz = 8000000; 487 } 488 } else if (p->delivery_system == SYS_DVBS) { 489 system = SONY_HELENE_STV_DVBS; 490 } else if (p->delivery_system == SYS_DVBS2) { 491 system = SONY_HELENE_STV_DVBS2; 492 } else if (p->delivery_system == SYS_ISDBS) { 493 system = SONY_HELENE_STV_ISDBS; 494 } else if (p->delivery_system == SYS_ISDBT) { 495 if (p->bandwidth_hz <= 6000000) 496 system = SONY_HELENE_DTV_ISDBT_6; 497 else if (p->bandwidth_hz <= 7000000) 498 system = SONY_HELENE_DTV_ISDBT_7; 499 else if (p->bandwidth_hz <= 8000000) 500 system = SONY_HELENE_DTV_ISDBT_8; 501 else { 502 system = SONY_HELENE_DTV_ISDBT_8; 503 p->bandwidth_hz = 8000000; 504 } 505 } else if (p->delivery_system == SYS_DVBC_ANNEX_A) { 506 if (p->bandwidth_hz <= 6000000) 507 system = SONY_HELENE_DTV_DVBC_6; 508 else if (p->bandwidth_hz <= 8000000) 509 system = SONY_HELENE_DTV_DVBC_8; 510 } 511 dev_dbg(&priv->i2c->dev, 512 "%s(): HELENE DTV system %d (delsys %d, bandwidth %d)\n", 513 __func__, (int)system, p->delivery_system, 514 p->bandwidth_hz); 515 return system; 516 } 517 518 static int helene_set_params_s(struct dvb_frontend *fe) 519 { 520 u8 data[MAX_WRITE_REGSIZE]; 521 u32 frequency; 522 enum helene_tv_system_t tv_system; 523 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 524 struct helene_priv *priv = fe->tuner_priv; 525 int frequencykHz = p->frequency; 526 uint32_t frequency4kHz = 0; 527 u32 symbol_rate = p->symbol_rate/1000; 528 529 dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz sr=%uKsps\n", 530 __func__, frequencykHz, symbol_rate); 531 tv_system = helene_get_tv_system(fe); 532 533 if (tv_system == SONY_HELENE_TV_SYSTEM_UNKNOWN) { 534 dev_err(&priv->i2c->dev, "%s(): unknown DTV system\n", 535 __func__); 536 return -EINVAL; 537 } 538 /* RF switch turn to satellite */ 539 if (priv->set_tuner) 540 priv->set_tuner(priv->set_tuner_data, 0); 541 frequency = roundup(p->frequency / 1000, 1); 542 543 /* Disable IF signal output */ 544 helene_write_reg(priv, 0x15, 0x02); 545 546 /* RFIN matching in power save (Sat) reset */ 547 helene_write_reg(priv, 0x43, 0x06); 548 549 /* Analog block setting (0x6A, 0x6B) */ 550 data[0] = 0x00; 551 data[1] = 0x00; 552 helene_write_regs(priv, 0x6A, data, 2); 553 helene_write_reg(priv, 0x75, 0x99); 554 helene_write_reg(priv, 0x9D, 0x00); 555 556 /* Tuning setting for CPU (0x61) */ 557 helene_write_reg(priv, 0x61, 0x07); 558 559 /* Satellite mode select (0x01) */ 560 helene_write_reg(priv, 0x01, 0x01); 561 562 /* Clock enable for internal logic block, CPU wake-up (0x04, 0x05) */ 563 data[0] = 0xC4; 564 data[1] = 0x40; 565 566 switch (priv->xtal) { 567 case SONY_HELENE_XTAL_16000: 568 data[2] = 0x02; 569 break; 570 case SONY_HELENE_XTAL_20500: 571 data[2] = 0x02; 572 break; 573 case SONY_HELENE_XTAL_24000: 574 data[2] = 0x03; 575 break; 576 case SONY_HELENE_XTAL_41000: 577 data[2] = 0x05; 578 break; 579 default: 580 dev_err(&priv->i2c->dev, "%s(): unknown xtal %d\n", 581 __func__, priv->xtal); 582 return -EINVAL; 583 } 584 585 /* Setting for analog block (0x07). LOOPFILTER INTERNAL */ 586 data[3] = 0x80; 587 588 /* Tuning setting for analog block 589 * (0x08, 0x09, 0x0A, 0x0B). LOOPFILTER INTERNAL 590 */ 591 if (priv->xtal == SONY_HELENE_XTAL_20500) 592 data[4] = 0x58; 593 else 594 data[4] = 0x70; 595 596 data[5] = 0x1E; 597 data[6] = 0x02; 598 data[7] = 0x24; 599 600 /* Enable for analog block (0x0C, 0x0D, 0x0E). SAT LNA ON */ 601 data[8] = 0x0F; 602 data[8] |= 0xE0; /* POWERSAVE_TERR_RF_ACTIVE */ 603 data[9] = 0x02; 604 data[10] = 0x1E; 605 606 /* Setting for LPF cutoff frequency (0x0F) */ 607 switch (tv_system) { 608 case SONY_HELENE_STV_ISDBS: 609 data[11] = 0x22; /* 22MHz */ 610 break; 611 case SONY_HELENE_STV_DVBS: 612 if (symbol_rate <= 4000) 613 data[11] = 0x05; 614 else if (symbol_rate <= 10000) 615 data[11] = (uint8_t)((symbol_rate * 47 616 + (40000-1)) / 40000); 617 else 618 data[11] = (uint8_t)((symbol_rate * 27 619 + (40000-1)) / 40000 + 5); 620 621 if (data[11] > 36) 622 data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */ 623 break; 624 case SONY_HELENE_STV_DVBS2: 625 if (symbol_rate <= 4000) 626 data[11] = 0x05; 627 else if (symbol_rate <= 10000) 628 data[11] = (uint8_t)((symbol_rate * 11 629 + (10000-1)) / 10000); 630 else 631 data[11] = (uint8_t)((symbol_rate * 3 632 + (5000-1)) / 5000 + 5); 633 634 if (data[11] > 36) 635 data[11] = 36; /* 5 <= lpf_cutoff <= 36 is valid */ 636 break; 637 default: 638 dev_err(&priv->i2c->dev, "%s(): unknown standard %d\n", 639 __func__, tv_system); 640 return -EINVAL; 641 } 642 643 /* RF tuning frequency setting (0x10, 0x11, 0x12) */ 644 frequency4kHz = (frequencykHz + 2) / 4; 645 data[12] = (uint8_t)(frequency4kHz & 0xFF); /* FRF_L */ 646 data[13] = (uint8_t)((frequency4kHz >> 8) & 0xFF); /* FRF_M */ 647 /* FRF_H (bit[3:0]) */ 648 data[14] = (uint8_t)((frequency4kHz >> 16) & 0x0F); 649 650 /* Tuning command (0x13) */ 651 data[15] = 0xFF; 652 653 /* Setting for IQOUT_LIMIT (0x14) 0.75Vpp */ 654 data[16] = 0x00; 655 656 /* Enable IQ output (0x15) */ 657 data[17] = 0x01; 658 659 helene_write_regs(priv, 0x04, data, 18); 660 661 dev_dbg(&priv->i2c->dev, "%s(): tune done\n", 662 __func__); 663 664 priv->frequency = frequency; 665 return 0; 666 } 667 668 static int helene_set_params(struct dvb_frontend *fe) 669 { 670 u8 data[MAX_WRITE_REGSIZE]; 671 u32 frequency; 672 enum helene_tv_system_t tv_system; 673 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 674 struct helene_priv *priv = fe->tuner_priv; 675 int frequencykHz = p->frequency / 1000; 676 677 dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz\n", 678 __func__, frequencykHz); 679 tv_system = helene_get_tv_system(fe); 680 681 if (tv_system == SONY_HELENE_TV_SYSTEM_UNKNOWN) { 682 dev_dbg(&priv->i2c->dev, "%s(): unknown DTV system\n", 683 __func__); 684 return -EINVAL; 685 } 686 if (priv->set_tuner) 687 priv->set_tuner(priv->set_tuner_data, 1); 688 frequency = roundup(p->frequency / 1000, 25); 689 690 /* mode select */ 691 helene_write_reg(priv, 0x01, 0x00); 692 693 /* Disable IF signal output */ 694 helene_write_reg(priv, 0x74, 0x02); 695 696 if (priv->state == STATE_SLEEP) 697 helene_leave_power_save(priv); 698 699 /* Initial setting for internal analog block (0x91, 0x92) */ 700 if ((tv_system == SONY_HELENE_DTV_DVBC_6) || 701 (tv_system == SONY_HELENE_DTV_DVBC_8)) { 702 data[0] = 0x16; 703 data[1] = 0x26; 704 } else { 705 data[0] = 0x10; 706 data[1] = 0x20; 707 } 708 helene_write_regs(priv, 0x91, data, 2); 709 710 /* Setting for analog block */ 711 if (TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system)) 712 data[0] = 0x90; 713 else 714 data[0] = 0x00; 715 716 /* Setting for local polarity (0x9D) */ 717 data[1] = (uint8_t)(terr_params[tv_system].IS_LOWERLOCAL & 0x01); 718 helene_write_regs(priv, 0x9C, data, 2); 719 720 /* Enable for analog block */ 721 data[0] = 0xEE; 722 data[1] = 0x02; 723 data[2] = 0x1E; 724 data[3] = 0x67; /* Tuning setting for CPU */ 725 726 /* Setting for PLL reference divider for xtal=24MHz */ 727 if ((tv_system == SONY_HELENE_DTV_DVBC_6) || 728 (tv_system == SONY_HELENE_DTV_DVBC_8)) 729 data[4] = 0x18; 730 else 731 data[4] = 0x03; 732 733 /* Tuning setting for analog block */ 734 if (TERR_INTERNAL_LOOPFILTER_AVAILABLE(tv_system)) { 735 data[5] = 0x38; 736 data[6] = 0x1E; 737 data[7] = 0x02; 738 data[8] = 0x24; 739 } else if ((tv_system == SONY_HELENE_DTV_DVBC_6) || 740 (tv_system == SONY_HELENE_DTV_DVBC_8)) { 741 data[5] = 0x1C; 742 data[6] = 0x78; 743 data[7] = 0x08; 744 data[8] = 0x1C; 745 } else { 746 data[5] = 0xB4; 747 data[6] = 0x78; 748 data[7] = 0x08; 749 data[8] = 0x30; 750 } 751 helene_write_regs(priv, 0x5E, data, 9); 752 753 /* LT_AMP_EN should be 0 */ 754 helene_set_reg_bits(priv, 0x67, 0x0, 0x02); 755 756 /* Setting for IFOUT_LIMIT */ 757 data[0] = 0x00; /* 1.5Vpp */ 758 759 /* RF_GAIN setting */ 760 if (terr_params[tv_system].RF_GAIN == HELENE_AUTO) 761 data[1] = 0x80; /* RF_GAIN_SEL = 1 */ 762 else 763 data[1] = (uint8_t)((terr_params[tv_system].RF_GAIN 764 << 4) & 0x70); 765 766 /* IF_BPF_GC setting */ 767 data[1] |= (uint8_t)(terr_params[tv_system].IF_BPF_GC & 0x0F); 768 769 /* Setting for internal RFAGC (0x6A, 0x6B, 0x6C) */ 770 data[2] = 0x00; 771 if (frequencykHz <= 172000) { 772 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VL 773 & 0x0F); 774 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VL 775 & 0x07); 776 } else if (frequencykHz <= 464000) { 777 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_VH 778 & 0x0F); 779 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_VH 780 & 0x07); 781 } else { 782 data[3] = (uint8_t)(terr_params[tv_system].RFOVLD_DET_LV1_U 783 & 0x0F); 784 data[4] = (uint8_t)(terr_params[tv_system].IFOVLD_DET_LV_U 785 & 0x07); 786 } 787 data[4] |= 0x20; 788 789 /* Setting for IF frequency and bandwidth */ 790 791 /* IF filter center frequency offset (IF_BPF_F0) (0x6D) */ 792 data[5] = (uint8_t)((terr_params[tv_system].IF_BPF_F0 << 4) & 0x30); 793 794 /* IF filter band width (BW) (0x6D) */ 795 data[5] |= (uint8_t)(terr_params[tv_system].BW & 0x03); 796 797 /* IF frequency offset value (FIF_OFFSET) (0x6E) */ 798 data[6] = (uint8_t)(terr_params[tv_system].FIF_OFFSET & 0x1F); 799 800 /* IF band width offset value (BW_OFFSET) (0x6F) */ 801 data[7] = (uint8_t)(terr_params[tv_system].BW_OFFSET & 0x1F); 802 803 /* RF tuning frequency setting (0x70, 0x71, 0x72) */ 804 data[8] = (uint8_t)(frequencykHz & 0xFF); /* FRF_L */ 805 data[9] = (uint8_t)((frequencykHz >> 8) & 0xFF); /* FRF_M */ 806 data[10] = (uint8_t)((frequencykHz >> 16) 807 & 0x0F); /* FRF_H (bit[3:0]) */ 808 809 /* Tuning command */ 810 data[11] = 0xFF; 811 812 /* Enable IF output, AGC and IFOUT pin selection (0x74) */ 813 data[12] = 0x01; 814 815 if ((tv_system == SONY_HELENE_DTV_DVBC_6) || 816 (tv_system == SONY_HELENE_DTV_DVBC_8)) { 817 data[13] = 0xD9; 818 data[14] = 0x0F; 819 data[15] = 0x24; 820 data[16] = 0x87; 821 } else { 822 data[13] = 0x99; 823 data[14] = 0x00; 824 data[15] = 0x24; 825 data[16] = 0x87; 826 } 827 828 helene_write_regs(priv, 0x68, data, 17); 829 830 dev_dbg(&priv->i2c->dev, "%s(): tune done\n", 831 __func__); 832 833 priv->frequency = frequency; 834 return 0; 835 } 836 837 static int helene_get_frequency(struct dvb_frontend *fe, u32 *frequency) 838 { 839 struct helene_priv *priv = fe->tuner_priv; 840 841 *frequency = priv->frequency * 1000; 842 return 0; 843 } 844 845 static struct dvb_tuner_ops helene_tuner_ops = { 846 .info = { 847 .name = "Sony HELENE Ter tuner", 848 .frequency_min = 1000000, 849 .frequency_max = 1200000000, 850 .frequency_step = 25000, 851 }, 852 .init = helene_init, 853 .release = helene_release, 854 .sleep = helene_sleep, 855 .set_params = helene_set_params, 856 .get_frequency = helene_get_frequency, 857 }; 858 859 static struct dvb_tuner_ops helene_tuner_ops_s = { 860 .info = { 861 .name = "Sony HELENE Sat tuner", 862 .frequency_min = 500000, 863 .frequency_max = 2500000, 864 .frequency_step = 1000, 865 }, 866 .init = helene_init, 867 .release = helene_release, 868 .sleep = helene_sleep, 869 .set_params = helene_set_params_s, 870 .get_frequency = helene_get_frequency, 871 }; 872 873 /* power-on tuner 874 * call once after reset 875 */ 876 static int helene_x_pon(struct helene_priv *priv) 877 { 878 /* RFIN matching in power save (terrestrial) = ACTIVE */ 879 /* RFIN matching in power save (satellite) = ACTIVE */ 880 u8 dataT[] = { 0x06, 0x00, 0x02, 0x00 }; 881 /* SAT_RF_ACTIVE = true, lnaOff = false, terrRfActive = true */ 882 u8 dataS[] = { 0x05, 0x06 }; 883 u8 cdata[] = {0x7A, 0x01}; 884 u8 data[20]; 885 u8 rdata[2]; 886 887 /* mode select */ 888 helene_write_reg(priv, 0x01, 0x00); 889 890 helene_write_reg(priv, 0x67, dataT[3]); 891 helene_write_reg(priv, 0x43, dataS[1]); 892 helene_write_regs(priv, 0x5E, dataT, 3); 893 helene_write_reg(priv, 0x0C, dataS[0]); 894 895 /* Initial setting for internal logic block */ 896 helene_write_regs(priv, 0x99, cdata, sizeof(cdata)); 897 898 /* 0x81 - 0x94 */ 899 data[0] = 0x18; /* xtal 24 MHz */ 900 data[1] = (uint8_t)(0x80 | (0x04 & 0x1F)); /* 4 x 25 = 100uA */ 901 data[2] = (uint8_t)(0x80 | (0x26 & 0x7F)); /* 38 x 0.25 = 9.5pF */ 902 data[3] = 0x80; /* REFOUT signal output 500mVpp */ 903 data[4] = 0x00; /* GPIO settings */ 904 data[5] = 0x00; /* GPIO settings */ 905 data[6] = 0xC4; /* Clock enable for internal logic block */ 906 data[7] = 0x40; /* Start CPU boot-up */ 907 data[8] = 0x10; /* For burst-write */ 908 909 /* Setting for internal RFAGC */ 910 data[9] = 0x00; 911 data[10] = 0x45; 912 data[11] = 0x75; 913 914 data[12] = 0x07; /* Setting for analog block */ 915 916 /* Initial setting for internal analog block */ 917 data[13] = 0x1C; 918 data[14] = 0x3F; 919 data[15] = 0x02; 920 data[16] = 0x10; 921 data[17] = 0x20; 922 data[18] = 0x0A; 923 data[19] = 0x00; 924 925 helene_write_regs(priv, 0x81, data, sizeof(data)); 926 927 /* Setting for internal RFAGC */ 928 helene_write_reg(priv, 0x9B, 0x00); 929 930 msleep(20); 931 932 /* Check CPU_STT/CPU_ERR */ 933 helene_read_regs(priv, 0x1A, rdata, sizeof(rdata)); 934 935 if (rdata[0] != 0x00) { 936 dev_err(&priv->i2c->dev, 937 "HELENE tuner CPU error 0x%x\n", rdata[0]); 938 return -EIO; 939 } 940 941 /* VCO current setting */ 942 cdata[0] = 0x90; 943 cdata[1] = 0x06; 944 helene_write_regs(priv, 0x17, cdata, sizeof(cdata)); 945 msleep(20); 946 helene_read_reg(priv, 0x19, data); 947 helene_write_reg(priv, 0x95, (uint8_t)((data[0] >> 4) & 0x0F)); 948 949 /* Disable IF signal output */ 950 helene_write_reg(priv, 0x74, 0x02); 951 952 /* Standby setting for CPU */ 953 helene_write_reg(priv, 0x88, 0x00); 954 955 /* Standby setting for internal logic block */ 956 helene_write_reg(priv, 0x87, 0xC0); 957 958 /* Load capacitance control setting for crystal oscillator */ 959 helene_write_reg(priv, 0x80, 0x01); 960 961 /* Satellite initial setting */ 962 cdata[0] = 0x07; 963 cdata[1] = 0x00; 964 helene_write_regs(priv, 0x41, cdata, sizeof(cdata)); 965 966 dev_info(&priv->i2c->dev, 967 "HELENE tuner x_pon done\n"); 968 969 return 0; 970 } 971 972 struct dvb_frontend *helene_attach_s(struct dvb_frontend *fe, 973 const struct helene_config *config, 974 struct i2c_adapter *i2c) 975 { 976 struct helene_priv *priv = NULL; 977 978 priv = kzalloc(sizeof(struct helene_priv), GFP_KERNEL); 979 if (priv == NULL) 980 return NULL; 981 priv->i2c_address = (config->i2c_address >> 1); 982 priv->i2c = i2c; 983 priv->set_tuner_data = config->set_tuner_priv; 984 priv->set_tuner = config->set_tuner_callback; 985 priv->xtal = config->xtal; 986 987 if (fe->ops.i2c_gate_ctrl) 988 fe->ops.i2c_gate_ctrl(fe, 1); 989 990 if (helene_x_pon(priv) != 0) 991 return NULL; 992 993 if (fe->ops.i2c_gate_ctrl) 994 fe->ops.i2c_gate_ctrl(fe, 0); 995 996 memcpy(&fe->ops.tuner_ops, &helene_tuner_ops_s, 997 sizeof(struct dvb_tuner_ops)); 998 fe->tuner_priv = priv; 999 dev_info(&priv->i2c->dev, 1000 "Sony HELENE Sat attached on addr=%x at I2C adapter %p\n", 1001 priv->i2c_address, priv->i2c); 1002 return fe; 1003 } 1004 EXPORT_SYMBOL(helene_attach_s); 1005 1006 struct dvb_frontend *helene_attach(struct dvb_frontend *fe, 1007 const struct helene_config *config, 1008 struct i2c_adapter *i2c) 1009 { 1010 struct helene_priv *priv = NULL; 1011 1012 priv = kzalloc(sizeof(struct helene_priv), GFP_KERNEL); 1013 if (priv == NULL) 1014 return NULL; 1015 priv->i2c_address = (config->i2c_address >> 1); 1016 priv->i2c = i2c; 1017 priv->set_tuner_data = config->set_tuner_priv; 1018 priv->set_tuner = config->set_tuner_callback; 1019 priv->xtal = config->xtal; 1020 1021 if (fe->ops.i2c_gate_ctrl) 1022 fe->ops.i2c_gate_ctrl(fe, 1); 1023 1024 if (helene_x_pon(priv) != 0) 1025 return NULL; 1026 1027 if (fe->ops.i2c_gate_ctrl) 1028 fe->ops.i2c_gate_ctrl(fe, 0); 1029 1030 memcpy(&fe->ops.tuner_ops, &helene_tuner_ops, 1031 sizeof(struct dvb_tuner_ops)); 1032 fe->tuner_priv = priv; 1033 dev_info(&priv->i2c->dev, 1034 "Sony HELENE Ter attached on addr=%x at I2C adapter %p\n", 1035 priv->i2c_address, priv->i2c); 1036 return fe; 1037 } 1038 EXPORT_SYMBOL(helene_attach); 1039 1040 MODULE_DESCRIPTION("Sony HELENE Sat/Ter tuner driver"); 1041 MODULE_AUTHOR("Abylay Ospan <aospan@netup.ru>"); 1042 MODULE_LICENSE("GPL"); 1043