1 /* 2 Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver 3 4 Copyright (C) 2013 Luis Alves <ljalvs@gmail.com> 5 July, 6th 2013 6 First release based on cx24116 driver by: 7 Steven Toth and Georg Acher, Darron Broad, Igor Liplianin 8 Cards currently supported: 9 TBS6980 - Dual DVBS/S2 PCIe card 10 TBS6981 - Dual DVBS/S2 PCIe card 11 12 This program is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 2 of the License, or 15 (at your option) any later version. 16 17 This program is distributed in the hope that it will be useful, 18 but WITHOUT ANY WARRANTY; without even the implied warranty of 19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 GNU General Public License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software 24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 25 */ 26 27 #include <linux/slab.h> 28 #include <linux/kernel.h> 29 #include <linux/module.h> 30 #include <linux/moduleparam.h> 31 #include <linux/init.h> 32 #include <linux/firmware.h> 33 34 #include "tuner-i2c.h" 35 #include "dvb_frontend.h" 36 #include "cx24117.h" 37 38 39 #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw" 40 #define CX24117_SEARCH_RANGE_KHZ 5000 41 42 /* known registers */ 43 #define CX24117_REG_COMMAND (0x00) /* command buffer */ 44 #define CX24117_REG_EXECUTE (0x1f) /* execute command */ 45 46 #define CX24117_REG_FREQ3_0 (0x34) /* frequency */ 47 #define CX24117_REG_FREQ2_0 (0x35) 48 #define CX24117_REG_FREQ1_0 (0x36) 49 #define CX24117_REG_STATE0 (0x39) 50 #define CX24117_REG_SSTATUS0 (0x3a) /* demod0 signal high / status */ 51 #define CX24117_REG_SIGNAL0 (0x3b) 52 #define CX24117_REG_FREQ5_0 (0x3c) /* +-freq */ 53 #define CX24117_REG_FREQ6_0 (0x3d) 54 #define CX24117_REG_SRATE2_0 (0x3e) /* +- 1000 * srate */ 55 #define CX24117_REG_SRATE1_0 (0x3f) 56 #define CX24117_REG_QUALITY2_0 (0x40) 57 #define CX24117_REG_QUALITY1_0 (0x41) 58 59 #define CX24117_REG_BER4_0 (0x47) 60 #define CX24117_REG_BER3_0 (0x48) 61 #define CX24117_REG_BER2_0 (0x49) 62 #define CX24117_REG_BER1_0 (0x4a) 63 #define CX24117_REG_DVBS_UCB2_0 (0x4b) 64 #define CX24117_REG_DVBS_UCB1_0 (0x4c) 65 #define CX24117_REG_DVBS2_UCB2_0 (0x50) 66 #define CX24117_REG_DVBS2_UCB1_0 (0x51) 67 #define CX24117_REG_QSTATUS0 (0x93) 68 #define CX24117_REG_CLKDIV0 (0xe6) 69 #define CX24117_REG_RATEDIV0 (0xf0) 70 71 72 #define CX24117_REG_FREQ3_1 (0x55) /* frequency */ 73 #define CX24117_REG_FREQ2_1 (0x56) 74 #define CX24117_REG_FREQ1_1 (0x57) 75 #define CX24117_REG_STATE1 (0x5a) 76 #define CX24117_REG_SSTATUS1 (0x5b) /* demod1 signal high / status */ 77 #define CX24117_REG_SIGNAL1 (0x5c) 78 #define CX24117_REG_FREQ5_1 (0x5d) /* +- freq */ 79 #define CX24117_REG_FREQ4_1 (0x5e) 80 #define CX24117_REG_SRATE2_1 (0x5f) 81 #define CX24117_REG_SRATE1_1 (0x60) 82 #define CX24117_REG_QUALITY2_1 (0x61) 83 #define CX24117_REG_QUALITY1_1 (0x62) 84 #define CX24117_REG_BER4_1 (0x68) 85 #define CX24117_REG_BER3_1 (0x69) 86 #define CX24117_REG_BER2_1 (0x6a) 87 #define CX24117_REG_BER1_1 (0x6b) 88 #define CX24117_REG_DVBS_UCB2_1 (0x6c) 89 #define CX24117_REG_DVBS_UCB1_1 (0x6d) 90 #define CX24117_REG_DVBS2_UCB2_1 (0x71) 91 #define CX24117_REG_DVBS2_UCB1_1 (0x72) 92 #define CX24117_REG_QSTATUS1 (0x9f) 93 #define CX24117_REG_CLKDIV1 (0xe7) 94 #define CX24117_REG_RATEDIV1 (0xf1) 95 96 97 /* arg buffer size */ 98 #define CX24117_ARGLEN (0x1e) 99 100 /* rolloff */ 101 #define CX24117_ROLLOFF_020 (0x00) 102 #define CX24117_ROLLOFF_025 (0x01) 103 #define CX24117_ROLLOFF_035 (0x02) 104 105 /* pilot bit */ 106 #define CX24117_PILOT_OFF (0x00) 107 #define CX24117_PILOT_ON (0x40) 108 #define CX24117_PILOT_AUTO (0x80) 109 110 /* signal status */ 111 #define CX24117_HAS_SIGNAL (0x01) 112 #define CX24117_HAS_CARRIER (0x02) 113 #define CX24117_HAS_VITERBI (0x04) 114 #define CX24117_HAS_SYNCLOCK (0x08) 115 #define CX24117_STATUS_MASK (0x0f) 116 #define CX24117_SIGNAL_MASK (0xc0) 117 118 119 /* arg offset for DiSEqC */ 120 #define CX24117_DISEQC_DEMOD (1) 121 #define CX24117_DISEQC_BURST (2) 122 #define CX24117_DISEQC_ARG3_2 (3) /* unknown value=2 */ 123 #define CX24117_DISEQC_ARG4_0 (4) /* unknown value=0 */ 124 #define CX24117_DISEQC_ARG5_0 (5) /* unknown value=0 */ 125 #define CX24117_DISEQC_MSGLEN (6) 126 #define CX24117_DISEQC_MSGOFS (7) 127 128 /* DiSEqC burst */ 129 #define CX24117_DISEQC_MINI_A (0) 130 #define CX24117_DISEQC_MINI_B (1) 131 132 133 #define CX24117_PNE (0) /* 0 disabled / 2 enabled */ 134 #define CX24117_OCC (1) /* 0 disabled / 1 enabled */ 135 136 137 enum cmds { 138 CMD_SET_VCO = 0x10, 139 CMD_TUNEREQUEST = 0x11, 140 CMD_MPEGCONFIG = 0x13, 141 CMD_TUNERINIT = 0x14, 142 CMD_LNBSEND = 0x21, /* Formerly CMD_SEND_DISEQC */ 143 CMD_LNBDCLEVEL = 0x22, 144 CMD_SET_TONE = 0x23, 145 CMD_UPDFWVERS = 0x35, 146 CMD_TUNERSLEEP = 0x36, 147 }; 148 149 static LIST_HEAD(hybrid_tuner_instance_list); 150 static DEFINE_MUTEX(cx24117_list_mutex); 151 152 /* The Demod/Tuner can't easily provide these, we cache them */ 153 struct cx24117_tuning { 154 u32 frequency; 155 u32 symbol_rate; 156 fe_spectral_inversion_t inversion; 157 fe_code_rate_t fec; 158 159 fe_delivery_system_t delsys; 160 fe_modulation_t modulation; 161 fe_pilot_t pilot; 162 fe_rolloff_t rolloff; 163 164 /* Demod values */ 165 u8 fec_val; 166 u8 fec_mask; 167 u8 inversion_val; 168 u8 pilot_val; 169 u8 rolloff_val; 170 }; 171 172 /* Basic commands that are sent to the firmware */ 173 struct cx24117_cmd { 174 u8 len; 175 u8 args[CX24117_ARGLEN]; 176 }; 177 178 /* common to both fe's */ 179 struct cx24117_priv { 180 u8 demod_address; 181 struct i2c_adapter *i2c; 182 u8 skip_fw_load; 183 struct mutex fe_lock; 184 185 /* Used for sharing this struct between demods */ 186 struct tuner_i2c_props i2c_props; 187 struct list_head hybrid_tuner_instance_list; 188 }; 189 190 /* one per each fe */ 191 struct cx24117_state { 192 struct cx24117_priv *priv; 193 struct dvb_frontend frontend; 194 195 struct cx24117_tuning dcur; 196 struct cx24117_tuning dnxt; 197 struct cx24117_cmd dsec_cmd; 198 199 int demod; 200 }; 201 202 /* modfec (modulation and FEC) lookup table */ 203 /* Check cx24116.c for a detailed description of each field */ 204 static struct cx24117_modfec { 205 fe_delivery_system_t delivery_system; 206 fe_modulation_t modulation; 207 fe_code_rate_t fec; 208 u8 mask; /* In DVBS mode this is used to autodetect */ 209 u8 val; /* Passed to the firmware to indicate mode selection */ 210 } cx24117_modfec_modes[] = { 211 /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ 212 213 /*mod fec mask val */ 214 { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, 215 { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ 216 { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ 217 { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ 218 { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ 219 { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ 220 { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ 221 { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ 222 { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ 223 { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, 224 /* NBC-QPSK */ 225 { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 }, 226 { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, 227 { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, 228 { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, 229 { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, 230 { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, 231 { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, 232 { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, 233 { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, 234 { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 }, 235 /* 8PSK */ 236 { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 }, 237 { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, 238 { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, 239 { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, 240 { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, 241 { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, 242 { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, 243 { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 }, 244 /* 245 * 'val' can be found in the FECSTATUS register when tuning. 246 * FECSTATUS will give the actual FEC in use if tuning was successful. 247 */ 248 }; 249 250 251 static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data) 252 { 253 u8 buf[] = { reg, data }; 254 struct i2c_msg msg = { .addr = state->priv->demod_address, 255 .flags = 0, .buf = buf, .len = 2 }; 256 int ret; 257 258 dev_dbg(&state->priv->i2c->dev, 259 "%s() demod%d i2c wr @0x%02x=0x%02x\n", 260 __func__, state->demod, reg, data); 261 262 ret = i2c_transfer(state->priv->i2c, &msg, 1); 263 if (ret < 0) { 264 dev_warn(&state->priv->i2c->dev, 265 "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n", 266 KBUILD_MODNAME, state->demod, ret, reg, data); 267 return ret; 268 } 269 return 0; 270 } 271 272 static int cx24117_writecmd(struct cx24117_state *state, 273 struct cx24117_cmd *cmd) 274 { 275 struct i2c_msg msg; 276 u8 buf[CX24117_ARGLEN+1]; 277 int ret; 278 279 dev_dbg(&state->priv->i2c->dev, 280 "%s() demod%d i2c wr cmd len=%d\n", 281 __func__, state->demod, cmd->len); 282 283 buf[0] = CX24117_REG_COMMAND; 284 memcpy(&buf[1], cmd->args, cmd->len); 285 286 msg.addr = state->priv->demod_address; 287 msg.flags = 0; 288 msg.len = cmd->len+1; 289 msg.buf = buf; 290 ret = i2c_transfer(state->priv->i2c, &msg, 1); 291 if (ret < 0) { 292 dev_warn(&state->priv->i2c->dev, 293 "%s: demod%d i2c wr cmd err(%i) len=%d\n", 294 KBUILD_MODNAME, state->demod, ret, cmd->len); 295 return ret; 296 } 297 return 0; 298 } 299 300 static int cx24117_readreg(struct cx24117_state *state, u8 reg) 301 { 302 int ret; 303 u8 recv = 0; 304 struct i2c_msg msg[] = { 305 { .addr = state->priv->demod_address, .flags = 0, 306 .buf = ®, .len = 1 }, 307 { .addr = state->priv->demod_address, .flags = I2C_M_RD, 308 .buf = &recv, .len = 1 } 309 }; 310 311 ret = i2c_transfer(state->priv->i2c, msg, 2); 312 if (ret < 0) { 313 dev_warn(&state->priv->i2c->dev, 314 "%s: demod%d i2c rd err(%d) @0x%x\n", 315 KBUILD_MODNAME, state->demod, ret, reg); 316 return ret; 317 } 318 319 dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n", 320 __func__, state->demod, reg, recv); 321 322 return recv; 323 } 324 325 static int cx24117_readregN(struct cx24117_state *state, 326 u8 reg, u8 *buf, int len) 327 { 328 int ret; 329 struct i2c_msg msg[] = { 330 { .addr = state->priv->demod_address, .flags = 0, 331 .buf = ®, .len = 1 }, 332 { .addr = state->priv->demod_address, .flags = I2C_M_RD, 333 .buf = buf, .len = len } 334 }; 335 336 ret = i2c_transfer(state->priv->i2c, msg, 2); 337 if (ret < 0) { 338 dev_warn(&state->priv->i2c->dev, 339 "%s: demod%d i2c rd err(%d) @0x%x\n", 340 KBUILD_MODNAME, state->demod, ret, reg); 341 return ret; 342 } 343 return 0; 344 } 345 346 static int cx24117_set_inversion(struct cx24117_state *state, 347 fe_spectral_inversion_t inversion) 348 { 349 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", 350 __func__, inversion, state->demod); 351 352 switch (inversion) { 353 case INVERSION_OFF: 354 state->dnxt.inversion_val = 0x00; 355 break; 356 case INVERSION_ON: 357 state->dnxt.inversion_val = 0x04; 358 break; 359 case INVERSION_AUTO: 360 state->dnxt.inversion_val = 0x0C; 361 break; 362 default: 363 return -EINVAL; 364 } 365 366 state->dnxt.inversion = inversion; 367 368 return 0; 369 } 370 371 static int cx24117_lookup_fecmod(struct cx24117_state *state, 372 fe_delivery_system_t d, fe_modulation_t m, fe_code_rate_t f) 373 { 374 int i, ret = -EINVAL; 375 376 dev_dbg(&state->priv->i2c->dev, 377 "%s(demod(0x%02x,0x%02x) demod%d\n", 378 __func__, m, f, state->demod); 379 380 for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) { 381 if ((d == cx24117_modfec_modes[i].delivery_system) && 382 (m == cx24117_modfec_modes[i].modulation) && 383 (f == cx24117_modfec_modes[i].fec)) { 384 ret = i; 385 break; 386 } 387 } 388 389 return ret; 390 } 391 392 static int cx24117_set_fec(struct cx24117_state *state, 393 fe_delivery_system_t delsys, fe_modulation_t mod, fe_code_rate_t fec) 394 { 395 int ret; 396 397 dev_dbg(&state->priv->i2c->dev, 398 "%s(0x%02x,0x%02x) demod%d\n", 399 __func__, mod, fec, state->demod); 400 401 ret = cx24117_lookup_fecmod(state, delsys, mod, fec); 402 if (ret < 0) 403 return ret; 404 405 state->dnxt.fec = fec; 406 state->dnxt.fec_val = cx24117_modfec_modes[ret].val; 407 state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask; 408 dev_dbg(&state->priv->i2c->dev, 409 "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__, 410 state->demod, state->dnxt.fec_mask, state->dnxt.fec_val); 411 412 return 0; 413 } 414 415 static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate) 416 { 417 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", 418 __func__, rate, state->demod); 419 420 state->dnxt.symbol_rate = rate; 421 422 dev_dbg(&state->priv->i2c->dev, 423 "%s() demod%d symbol_rate = %d\n", 424 __func__, state->demod, rate); 425 426 return 0; 427 } 428 429 static int cx24117_load_firmware(struct dvb_frontend *fe, 430 const struct firmware *fw); 431 432 static int cx24117_firmware_ondemand(struct dvb_frontend *fe) 433 { 434 struct cx24117_state *state = fe->demodulator_priv; 435 const struct firmware *fw; 436 int ret = 0; 437 438 dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n", 439 __func__, state->demod, state->priv->skip_fw_load); 440 441 if (state->priv->skip_fw_load) 442 return 0; 443 444 /* check if firmware if already running */ 445 if (cx24117_readreg(state, 0xeb) != 0xa) { 446 /* Load firmware */ 447 /* request the firmware, this will block until loaded */ 448 dev_dbg(&state->priv->i2c->dev, 449 "%s: Waiting for firmware upload (%s)...\n", 450 __func__, CX24117_DEFAULT_FIRMWARE); 451 ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE, 452 state->priv->i2c->dev.parent); 453 dev_dbg(&state->priv->i2c->dev, 454 "%s: Waiting for firmware upload(2)...\n", __func__); 455 if (ret) { 456 dev_err(&state->priv->i2c->dev, 457 "%s: No firmware uploaded " 458 "(timeout or file not found?)\n", __func__); 459 return ret; 460 } 461 462 /* Make sure we don't recurse back through here 463 * during loading */ 464 state->priv->skip_fw_load = 1; 465 466 ret = cx24117_load_firmware(fe, fw); 467 if (ret) 468 dev_err(&state->priv->i2c->dev, 469 "%s: Writing firmware failed\n", __func__); 470 release_firmware(fw); 471 472 dev_info(&state->priv->i2c->dev, 473 "%s: Firmware upload %s\n", __func__, 474 ret == 0 ? "complete" : "failed"); 475 476 /* Ensure firmware is always loaded if required */ 477 state->priv->skip_fw_load = 0; 478 } 479 480 return ret; 481 } 482 483 /* Take a basic firmware command structure, format it 484 * and forward it for processing 485 */ 486 static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe, 487 struct cx24117_cmd *cmd) 488 { 489 struct cx24117_state *state = fe->demodulator_priv; 490 int i, ret; 491 492 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 493 __func__, state->demod); 494 495 /* Load the firmware if required */ 496 ret = cx24117_firmware_ondemand(fe); 497 if (ret != 0) 498 return ret; 499 500 /* Write the command */ 501 cx24117_writecmd(state, cmd); 502 503 /* Start execution and wait for cmd to terminate */ 504 cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01); 505 i = 0; 506 while (cx24117_readreg(state, CX24117_REG_EXECUTE)) { 507 msleep(20); 508 if (i++ > 40) { 509 /* Avoid looping forever if the firmware does 510 not respond */ 511 dev_warn(&state->priv->i2c->dev, 512 "%s() Firmware not responding\n", __func__); 513 return -EIO; 514 } 515 } 516 return 0; 517 } 518 519 static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd) 520 { 521 struct cx24117_state *state = fe->demodulator_priv; 522 int ret; 523 524 mutex_lock(&state->priv->fe_lock); 525 ret = cx24117_cmd_execute_nolock(fe, cmd); 526 mutex_unlock(&state->priv->fe_lock); 527 528 return ret; 529 } 530 531 static int cx24117_load_firmware(struct dvb_frontend *fe, 532 const struct firmware *fw) 533 { 534 struct cx24117_state *state = fe->demodulator_priv; 535 struct cx24117_cmd cmd; 536 int i, ret; 537 unsigned char vers[4]; 538 539 struct i2c_msg msg; 540 u8 *buf; 541 542 dev_dbg(&state->priv->i2c->dev, 543 "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n", 544 __func__, state->demod, fw->size, fw->data[0], fw->data[1], 545 fw->data[fw->size - 2], fw->data[fw->size - 1]); 546 547 cx24117_writereg(state, 0xea, 0x00); 548 cx24117_writereg(state, 0xea, 0x01); 549 cx24117_writereg(state, 0xea, 0x00); 550 551 cx24117_writereg(state, 0xce, 0x92); 552 553 cx24117_writereg(state, 0xfb, 0x00); 554 cx24117_writereg(state, 0xfc, 0x00); 555 556 cx24117_writereg(state, 0xc3, 0x04); 557 cx24117_writereg(state, 0xc4, 0x04); 558 559 cx24117_writereg(state, 0xce, 0x00); 560 cx24117_writereg(state, 0xcf, 0x00); 561 562 cx24117_writereg(state, 0xea, 0x00); 563 cx24117_writereg(state, 0xeb, 0x0c); 564 cx24117_writereg(state, 0xec, 0x06); 565 cx24117_writereg(state, 0xed, 0x05); 566 cx24117_writereg(state, 0xee, 0x03); 567 cx24117_writereg(state, 0xef, 0x05); 568 569 cx24117_writereg(state, 0xf3, 0x03); 570 cx24117_writereg(state, 0xf4, 0x44); 571 572 cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04); 573 cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02); 574 575 cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04); 576 cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02); 577 578 cx24117_writereg(state, 0xf2, 0x04); 579 cx24117_writereg(state, 0xe8, 0x02); 580 cx24117_writereg(state, 0xea, 0x01); 581 cx24117_writereg(state, 0xc8, 0x00); 582 cx24117_writereg(state, 0xc9, 0x00); 583 cx24117_writereg(state, 0xca, 0x00); 584 cx24117_writereg(state, 0xcb, 0x00); 585 cx24117_writereg(state, 0xcc, 0x00); 586 cx24117_writereg(state, 0xcd, 0x00); 587 cx24117_writereg(state, 0xe4, 0x03); 588 cx24117_writereg(state, 0xeb, 0x0a); 589 590 cx24117_writereg(state, 0xfb, 0x00); 591 cx24117_writereg(state, 0xe0, 0x76); 592 cx24117_writereg(state, 0xf7, 0x81); 593 cx24117_writereg(state, 0xf8, 0x00); 594 cx24117_writereg(state, 0xf9, 0x00); 595 596 buf = kmalloc(fw->size + 1, GFP_KERNEL); 597 if (buf == NULL) { 598 state->priv->skip_fw_load = 0; 599 return -ENOMEM; 600 } 601 602 /* fw upload reg */ 603 buf[0] = 0xfa; 604 memcpy(&buf[1], fw->data, fw->size); 605 606 /* prepare i2c message to send */ 607 msg.addr = state->priv->demod_address; 608 msg.flags = 0; 609 msg.len = fw->size + 1; 610 msg.buf = buf; 611 612 /* send fw */ 613 ret = i2c_transfer(state->priv->i2c, &msg, 1); 614 if (ret < 0) 615 return ret; 616 617 kfree(buf); 618 619 cx24117_writereg(state, 0xf7, 0x0c); 620 cx24117_writereg(state, 0xe0, 0x00); 621 622 /* CMD 1B */ 623 cmd.args[0] = 0x1b; 624 cmd.args[1] = 0x00; 625 cmd.args[2] = 0x01; 626 cmd.args[3] = 0x00; 627 cmd.len = 4; 628 ret = cx24117_cmd_execute_nolock(fe, &cmd); 629 if (ret != 0) 630 goto error; 631 632 /* CMD 10 */ 633 cmd.args[0] = CMD_SET_VCO; 634 cmd.args[1] = 0x06; 635 cmd.args[2] = 0x2b; 636 cmd.args[3] = 0xd8; 637 cmd.args[4] = 0xa5; 638 cmd.args[5] = 0xee; 639 cmd.args[6] = 0x03; 640 cmd.args[7] = 0x9d; 641 cmd.args[8] = 0xfc; 642 cmd.args[9] = 0x06; 643 cmd.args[10] = 0x02; 644 cmd.args[11] = 0x9d; 645 cmd.args[12] = 0xfc; 646 cmd.len = 13; 647 ret = cx24117_cmd_execute_nolock(fe, &cmd); 648 if (ret != 0) 649 goto error; 650 651 /* CMD 15 */ 652 cmd.args[0] = 0x15; 653 cmd.args[1] = 0x00; 654 cmd.args[2] = 0x01; 655 cmd.args[3] = 0x00; 656 cmd.args[4] = 0x00; 657 cmd.args[5] = 0x01; 658 cmd.args[6] = 0x01; 659 cmd.args[7] = 0x01; 660 cmd.args[8] = 0x00; 661 cmd.args[9] = 0x05; 662 cmd.args[10] = 0x02; 663 cmd.args[11] = 0x02; 664 cmd.args[12] = 0x00; 665 cmd.len = 13; 666 ret = cx24117_cmd_execute_nolock(fe, &cmd); 667 if (ret != 0) 668 goto error; 669 670 /* CMD 13 */ 671 cmd.args[0] = CMD_MPEGCONFIG; 672 cmd.args[1] = 0x00; 673 cmd.args[2] = 0x00; 674 cmd.args[3] = 0x00; 675 cmd.args[4] = 0x01; 676 cmd.args[5] = 0x00; 677 cmd.len = 6; 678 ret = cx24117_cmd_execute_nolock(fe, &cmd); 679 if (ret != 0) 680 goto error; 681 682 /* CMD 14 */ 683 for (i = 0; i < 2; i++) { 684 cmd.args[0] = CMD_TUNERINIT; 685 cmd.args[1] = (u8) i; 686 cmd.args[2] = 0x00; 687 cmd.args[3] = 0x05; 688 cmd.args[4] = 0x00; 689 cmd.args[5] = 0x00; 690 cmd.args[6] = 0x55; 691 cmd.args[7] = 0x00; 692 cmd.len = 8; 693 ret = cx24117_cmd_execute_nolock(fe, &cmd); 694 if (ret != 0) 695 goto error; 696 } 697 698 cx24117_writereg(state, 0xce, 0xc0); 699 cx24117_writereg(state, 0xcf, 0x00); 700 cx24117_writereg(state, 0xe5, 0x04); 701 702 /* Firmware CMD 35: Get firmware version */ 703 cmd.args[0] = CMD_UPDFWVERS; 704 cmd.len = 2; 705 for (i = 0; i < 4; i++) { 706 cmd.args[1] = i; 707 ret = cx24117_cmd_execute_nolock(fe, &cmd); 708 if (ret != 0) 709 goto error; 710 vers[i] = cx24117_readreg(state, 0x33); 711 } 712 dev_info(&state->priv->i2c->dev, 713 "%s: FW version %i.%i.%i.%i\n", __func__, 714 vers[0], vers[1], vers[2], vers[3]); 715 return 0; 716 error: 717 state->priv->skip_fw_load = 0; 718 dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__); 719 return ret; 720 } 721 722 static int cx24117_read_status(struct dvb_frontend *fe, fe_status_t *status) 723 { 724 struct cx24117_state *state = fe->demodulator_priv; 725 int lock; 726 727 lock = cx24117_readreg(state, 728 (state->demod == 0) ? CX24117_REG_SSTATUS0 : 729 CX24117_REG_SSTATUS1) & 730 CX24117_STATUS_MASK; 731 732 dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n", 733 __func__, state->demod, lock); 734 735 *status = 0; 736 737 if (lock & CX24117_HAS_SIGNAL) 738 *status |= FE_HAS_SIGNAL; 739 if (lock & CX24117_HAS_CARRIER) 740 *status |= FE_HAS_CARRIER; 741 if (lock & CX24117_HAS_VITERBI) 742 *status |= FE_HAS_VITERBI; 743 if (lock & CX24117_HAS_SYNCLOCK) 744 *status |= FE_HAS_SYNC | FE_HAS_LOCK; 745 746 return 0; 747 } 748 749 static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber) 750 { 751 struct cx24117_state *state = fe->demodulator_priv; 752 int ret; 753 u8 buf[4]; 754 u8 base_reg = (state->demod == 0) ? 755 CX24117_REG_BER4_0 : 756 CX24117_REG_BER4_1; 757 758 ret = cx24117_readregN(state, base_reg, buf, 4); 759 if (ret != 0) 760 return ret; 761 762 *ber = (buf[0] << 24) | (buf[1] << 16) | 763 (buf[1] << 8) | buf[0]; 764 765 dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n", 766 __func__, state->demod, *ber); 767 768 return 0; 769 } 770 771 static int cx24117_read_signal_strength(struct dvb_frontend *fe, 772 u16 *signal_strength) 773 { 774 struct cx24117_state *state = fe->demodulator_priv; 775 struct cx24117_cmd cmd; 776 int ret; 777 u16 sig_reading; 778 u8 buf[2]; 779 u8 reg = (state->demod == 0) ? 780 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1; 781 782 /* Firmware CMD 1A */ 783 cmd.args[0] = 0x1a; 784 cmd.args[1] = (u8) state->demod; 785 cmd.len = 2; 786 ret = cx24117_cmd_execute(fe, &cmd); 787 if (ret != 0) 788 return ret; 789 790 ret = cx24117_readregN(state, reg, buf, 2); 791 if (ret != 0) 792 return ret; 793 sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1]; 794 795 *signal_strength = -100 * sig_reading + 94324; 796 797 dev_dbg(&state->priv->i2c->dev, 798 "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n", 799 __func__, state->demod, sig_reading, *signal_strength); 800 801 return 0; 802 } 803 804 static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr) 805 { 806 struct cx24117_state *state = fe->demodulator_priv; 807 int ret; 808 u8 buf[2]; 809 u8 reg = (state->demod == 0) ? 810 CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1; 811 812 ret = cx24117_readregN(state, reg, buf, 2); 813 if (ret != 0) 814 return ret; 815 816 *snr = (buf[0] << 8) | buf[1]; 817 818 dev_dbg(&state->priv->i2c->dev, 819 "%s() demod%d snr = 0x%04x\n", 820 __func__, state->demod, *snr); 821 822 return ret; 823 } 824 825 static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) 826 { 827 struct cx24117_state *state = fe->demodulator_priv; 828 fe_delivery_system_t delsys = fe->dtv_property_cache.delivery_system; 829 int ret; 830 u8 buf[2]; 831 u8 reg = (state->demod == 0) ? 832 CX24117_REG_DVBS_UCB2_0 : 833 CX24117_REG_DVBS_UCB2_1; 834 835 switch (delsys) { 836 case SYS_DVBS: 837 break; 838 case SYS_DVBS2: 839 reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0); 840 break; 841 default: 842 return -EINVAL; 843 } 844 845 ret = cx24117_readregN(state, reg, buf, 2); 846 if (ret != 0) 847 return ret; 848 *ucblocks = (buf[0] << 8) | buf[1]; 849 850 dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n", 851 __func__, state->demod, *ucblocks); 852 853 return 0; 854 } 855 856 /* Overwrite the current tuning params, we are about to tune */ 857 static void cx24117_clone_params(struct dvb_frontend *fe) 858 { 859 struct cx24117_state *state = fe->demodulator_priv; 860 state->dcur = state->dnxt; 861 } 862 863 /* Wait for LNB */ 864 static int cx24117_wait_for_lnb(struct dvb_frontend *fe) 865 { 866 struct cx24117_state *state = fe->demodulator_priv; 867 int i; 868 u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 : 869 CX24117_REG_QSTATUS1; 870 871 dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n", 872 __func__, state->demod, cx24117_readreg(state, reg)); 873 874 /* Wait for up to 300 ms */ 875 for (i = 0; i < 10; i++) { 876 val = cx24117_readreg(state, reg) & 0x01; 877 if (val != 0) 878 return 0; 879 msleep(30); 880 } 881 882 dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n", 883 KBUILD_MODNAME, state->demod); 884 885 return -ETIMEDOUT; /* -EBUSY ? */ 886 } 887 888 static int cx24117_set_voltage(struct dvb_frontend *fe, 889 fe_sec_voltage_t voltage) 890 { 891 struct cx24117_state *state = fe->demodulator_priv; 892 struct cx24117_cmd cmd; 893 int ret; 894 u8 reg = (state->demod == 0) ? 0x10 : 0x20; 895 896 dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n", 897 __func__, state->demod, 898 voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : 899 voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : 900 "SEC_VOLTAGE_OFF"); 901 902 /* CMD 32 */ 903 cmd.args[0] = 0x32; 904 cmd.args[1] = reg; 905 cmd.args[2] = reg; 906 cmd.len = 3; 907 ret = cx24117_cmd_execute(fe, &cmd); 908 if (ret) 909 return ret; 910 911 if ((voltage == SEC_VOLTAGE_13) || 912 (voltage == SEC_VOLTAGE_18)) { 913 /* CMD 33 */ 914 cmd.args[0] = 0x33; 915 cmd.args[1] = reg; 916 cmd.args[2] = reg; 917 cmd.len = 3; 918 ret = cx24117_cmd_execute(fe, &cmd); 919 if (ret != 0) 920 return ret; 921 922 ret = cx24117_wait_for_lnb(fe); 923 if (ret != 0) 924 return ret; 925 926 /* Wait for voltage/min repeat delay */ 927 msleep(100); 928 929 /* CMD 22 - CMD_LNBDCLEVEL */ 930 cmd.args[0] = CMD_LNBDCLEVEL; 931 cmd.args[1] = state->demod ? 0 : 1; 932 cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); 933 cmd.len = 3; 934 935 /* Min delay time before DiSEqC send */ 936 msleep(20); 937 } else { 938 cmd.args[0] = 0x33; 939 cmd.args[1] = 0x00; 940 cmd.args[2] = reg; 941 cmd.len = 3; 942 } 943 944 return cx24117_cmd_execute(fe, &cmd); 945 } 946 947 static int cx24117_set_tone(struct dvb_frontend *fe, 948 fe_sec_tone_mode_t tone) 949 { 950 struct cx24117_state *state = fe->demodulator_priv; 951 struct cx24117_cmd cmd; 952 int ret; 953 954 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", 955 __func__, state->demod, tone); 956 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { 957 dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n", 958 KBUILD_MODNAME, state->demod, tone); 959 return -EINVAL; 960 } 961 962 /* Wait for LNB ready */ 963 ret = cx24117_wait_for_lnb(fe); 964 if (ret != 0) 965 return ret; 966 967 /* Min delay time after DiSEqC send */ 968 msleep(20); 969 970 /* Set the tone */ 971 /* CMD 23 - CMD_SET_TONE */ 972 cmd.args[0] = CMD_SET_TONE; 973 cmd.args[1] = (state->demod ? 0 : 1); 974 cmd.args[2] = 0x00; 975 cmd.args[3] = 0x00; 976 cmd.len = 5; 977 switch (tone) { 978 case SEC_TONE_ON: 979 cmd.args[4] = 0x01; 980 break; 981 case SEC_TONE_OFF: 982 cmd.args[4] = 0x00; 983 break; 984 } 985 986 msleep(20); 987 988 return cx24117_cmd_execute(fe, &cmd); 989 } 990 991 /* Initialise DiSEqC */ 992 static int cx24117_diseqc_init(struct dvb_frontend *fe) 993 { 994 struct cx24117_state *state = fe->demodulator_priv; 995 996 /* Prepare a DiSEqC command */ 997 state->dsec_cmd.args[0] = CMD_LNBSEND; 998 999 /* demod */ 1000 state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1; 1001 1002 /* DiSEqC burst */ 1003 state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A; 1004 1005 /* Unknown */ 1006 state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02; 1007 state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00; 1008 1009 /* Continuation flag? */ 1010 state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00; 1011 1012 /* DiSEqC message length */ 1013 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00; 1014 1015 /* Command length */ 1016 state->dsec_cmd.len = 7; 1017 1018 return 0; 1019 } 1020 1021 /* Send DiSEqC message */ 1022 static int cx24117_send_diseqc_msg(struct dvb_frontend *fe, 1023 struct dvb_diseqc_master_cmd *d) 1024 { 1025 struct cx24117_state *state = fe->demodulator_priv; 1026 int i, ret; 1027 1028 /* Dump DiSEqC message */ 1029 dev_dbg(&state->priv->i2c->dev, "%s: demod %d (", 1030 __func__, state->demod); 1031 for (i = 0; i < d->msg_len; i++) 1032 dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]); 1033 dev_dbg(&state->priv->i2c->dev, ")\n"); 1034 1035 /* Validate length */ 1036 if (d->msg_len > 15) 1037 return -EINVAL; 1038 1039 /* DiSEqC message */ 1040 for (i = 0; i < d->msg_len; i++) 1041 state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i]; 1042 1043 /* DiSEqC message length */ 1044 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len; 1045 1046 /* Command length */ 1047 state->dsec_cmd.len = CX24117_DISEQC_MSGOFS + 1048 state->dsec_cmd.args[CX24117_DISEQC_MSGLEN]; 1049 1050 /* 1051 * Message is sent with derived else cached burst 1052 * 1053 * WRITE PORT GROUP COMMAND 38 1054 * 1055 * 0/A/A: E0 10 38 F0..F3 1056 * 1/B/B: E0 10 38 F4..F7 1057 * 2/C/A: E0 10 38 F8..FB 1058 * 3/D/B: E0 10 38 FC..FF 1059 * 1060 * databyte[3]= 8421:8421 1061 * ABCD:WXYZ 1062 * CLR :SET 1063 * 1064 * WX= PORT SELECT 0..3 (X=TONEBURST) 1065 * Y = VOLTAGE (0=13V, 1=18V) 1066 * Z = BAND (0=LOW, 1=HIGH(22K)) 1067 */ 1068 if (d->msg_len >= 4 && d->msg[2] == 0x38) 1069 state->dsec_cmd.args[CX24117_DISEQC_BURST] = 1070 ((d->msg[3] & 4) >> 2); 1071 1072 dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n", 1073 __func__, state->demod, 1074 state->dsec_cmd.args[CX24117_DISEQC_BURST]); 1075 1076 /* Wait for LNB ready */ 1077 ret = cx24117_wait_for_lnb(fe); 1078 if (ret != 0) 1079 return ret; 1080 1081 /* Wait for voltage/min repeat delay */ 1082 msleep(100); 1083 1084 /* Command */ 1085 ret = cx24117_cmd_execute(fe, &state->dsec_cmd); 1086 if (ret != 0) 1087 return ret; 1088 /* 1089 * Wait for send 1090 * 1091 * Eutelsat spec: 1092 * >15ms delay + (XXX determine if FW does this, see set_tone) 1093 * 13.5ms per byte + 1094 * >15ms delay + 1095 * 12.5ms burst + 1096 * >15ms delay (XXX determine if FW does this, see set_tone) 1097 */ 1098 msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60); 1099 1100 return 0; 1101 } 1102 1103 /* Send DiSEqC burst */ 1104 static int cx24117_diseqc_send_burst(struct dvb_frontend *fe, 1105 fe_sec_mini_cmd_t burst) 1106 { 1107 struct cx24117_state *state = fe->demodulator_priv; 1108 1109 dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n", 1110 __func__, burst, state->demod); 1111 1112 /* DiSEqC burst */ 1113 if (burst == SEC_MINI_A) 1114 state->dsec_cmd.args[CX24117_DISEQC_BURST] = 1115 CX24117_DISEQC_MINI_A; 1116 else if (burst == SEC_MINI_B) 1117 state->dsec_cmd.args[CX24117_DISEQC_BURST] = 1118 CX24117_DISEQC_MINI_B; 1119 else 1120 return -EINVAL; 1121 1122 return 0; 1123 } 1124 1125 static int cx24117_get_priv(struct cx24117_priv **priv, 1126 struct i2c_adapter *i2c, u8 client_address) 1127 { 1128 int ret; 1129 1130 mutex_lock(&cx24117_list_mutex); 1131 ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv), 1132 hybrid_tuner_instance_list, i2c, client_address, "cx24117"); 1133 mutex_unlock(&cx24117_list_mutex); 1134 1135 return ret; 1136 } 1137 1138 static void cx24117_release_priv(struct cx24117_priv *priv) 1139 { 1140 mutex_lock(&cx24117_list_mutex); 1141 if (priv != NULL) 1142 hybrid_tuner_release_state(priv); 1143 mutex_unlock(&cx24117_list_mutex); 1144 } 1145 1146 static void cx24117_release(struct dvb_frontend *fe) 1147 { 1148 struct cx24117_state *state = fe->demodulator_priv; 1149 dev_dbg(&state->priv->i2c->dev, "%s demod%d\n", 1150 __func__, state->demod); 1151 cx24117_release_priv(state->priv); 1152 kfree(state); 1153 } 1154 1155 static struct dvb_frontend_ops cx24117_ops; 1156 1157 struct dvb_frontend *cx24117_attach(const struct cx24117_config *config, 1158 struct i2c_adapter *i2c) 1159 { 1160 struct cx24117_state *state = NULL; 1161 struct cx24117_priv *priv = NULL; 1162 int demod = 0; 1163 1164 /* get the common data struct for both demods */ 1165 demod = cx24117_get_priv(&priv, i2c, config->demod_address); 1166 1167 switch (demod) { 1168 case 0: 1169 dev_err(&state->priv->i2c->dev, 1170 "%s: Error attaching frontend %d\n", 1171 KBUILD_MODNAME, demod); 1172 goto error1; 1173 break; 1174 case 1: 1175 /* new priv instance */ 1176 priv->i2c = i2c; 1177 priv->demod_address = config->demod_address; 1178 mutex_init(&priv->fe_lock); 1179 break; 1180 default: 1181 /* existing priv instance */ 1182 break; 1183 } 1184 1185 /* allocate memory for the internal state */ 1186 state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL); 1187 if (state == NULL) 1188 goto error2; 1189 1190 state->demod = demod - 1; 1191 state->priv = priv; 1192 1193 /* test i2c bus for ack */ 1194 if (demod == 0) { 1195 if (cx24117_readreg(state, 0x00) < 0) 1196 goto error3; 1197 } 1198 1199 dev_info(&state->priv->i2c->dev, 1200 "%s: Attaching frontend %d\n", 1201 KBUILD_MODNAME, state->demod); 1202 1203 /* create dvb_frontend */ 1204 memcpy(&state->frontend.ops, &cx24117_ops, 1205 sizeof(struct dvb_frontend_ops)); 1206 state->frontend.demodulator_priv = state; 1207 return &state->frontend; 1208 1209 error3: 1210 kfree(state); 1211 error2: 1212 cx24117_release_priv(priv); 1213 error1: 1214 return NULL; 1215 } 1216 EXPORT_SYMBOL_GPL(cx24117_attach); 1217 1218 /* 1219 * Initialise or wake up device 1220 * 1221 * Power config will reset and load initial firmware if required 1222 */ 1223 static int cx24117_initfe(struct dvb_frontend *fe) 1224 { 1225 struct cx24117_state *state = fe->demodulator_priv; 1226 struct cx24117_cmd cmd; 1227 int ret; 1228 1229 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1230 __func__, state->demod); 1231 1232 mutex_lock(&state->priv->fe_lock); 1233 1234 /* Firmware CMD 36: Power config */ 1235 cmd.args[0] = CMD_TUNERSLEEP; 1236 cmd.args[1] = (state->demod ? 1 : 0); 1237 cmd.args[2] = 0; 1238 cmd.len = 3; 1239 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1240 if (ret != 0) 1241 goto exit; 1242 1243 ret = cx24117_diseqc_init(fe); 1244 if (ret != 0) 1245 goto exit; 1246 1247 /* CMD 3C */ 1248 cmd.args[0] = 0x3c; 1249 cmd.args[1] = (state->demod ? 1 : 0); 1250 cmd.args[2] = 0x10; 1251 cmd.args[3] = 0x10; 1252 cmd.len = 4; 1253 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1254 if (ret != 0) 1255 goto exit; 1256 1257 /* CMD 34 */ 1258 cmd.args[0] = 0x34; 1259 cmd.args[1] = (state->demod ? 1 : 0); 1260 cmd.args[2] = CX24117_OCC; 1261 cmd.len = 3; 1262 ret = cx24117_cmd_execute_nolock(fe, &cmd); 1263 1264 exit: 1265 mutex_unlock(&state->priv->fe_lock); 1266 1267 return ret; 1268 } 1269 1270 /* 1271 * Put device to sleep 1272 */ 1273 static int cx24117_sleep(struct dvb_frontend *fe) 1274 { 1275 struct cx24117_state *state = fe->demodulator_priv; 1276 struct cx24117_cmd cmd; 1277 1278 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1279 __func__, state->demod); 1280 1281 /* Firmware CMD 36: Power config */ 1282 cmd.args[0] = CMD_TUNERSLEEP; 1283 cmd.args[1] = (state->demod ? 1 : 0); 1284 cmd.args[2] = 1; 1285 cmd.len = 3; 1286 return cx24117_cmd_execute(fe, &cmd); 1287 } 1288 1289 /* dvb-core told us to tune, the tv property cache will be complete, 1290 * it's safe for is to pull values and use them for tuning purposes. 1291 */ 1292 static int cx24117_set_frontend(struct dvb_frontend *fe) 1293 { 1294 struct cx24117_state *state = fe->demodulator_priv; 1295 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1296 struct cx24117_cmd cmd; 1297 fe_status_t tunerstat; 1298 int i, status, ret, retune = 1; 1299 u8 reg_clkdiv, reg_ratediv; 1300 1301 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1302 __func__, state->demod); 1303 1304 switch (c->delivery_system) { 1305 case SYS_DVBS: 1306 dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n", 1307 __func__, state->demod); 1308 1309 /* Only QPSK is supported for DVB-S */ 1310 if (c->modulation != QPSK) { 1311 dev_dbg(&state->priv->i2c->dev, 1312 "%s() demod%d unsupported modulation (%d)\n", 1313 __func__, state->demod, c->modulation); 1314 return -EINVAL; 1315 } 1316 1317 /* Pilot doesn't exist in DVB-S, turn bit off */ 1318 state->dnxt.pilot_val = CX24117_PILOT_OFF; 1319 1320 /* DVB-S only supports 0.35 */ 1321 state->dnxt.rolloff_val = CX24117_ROLLOFF_035; 1322 break; 1323 1324 case SYS_DVBS2: 1325 dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n", 1326 __func__, state->demod); 1327 1328 /* 1329 * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, 1330 * but not hardware auto detection 1331 */ 1332 if (c->modulation != PSK_8 && c->modulation != QPSK) { 1333 dev_dbg(&state->priv->i2c->dev, 1334 "%s() demod%d unsupported modulation (%d)\n", 1335 __func__, state->demod, c->modulation); 1336 return -EOPNOTSUPP; 1337 } 1338 1339 switch (c->pilot) { 1340 case PILOT_AUTO: 1341 state->dnxt.pilot_val = CX24117_PILOT_AUTO; 1342 break; 1343 case PILOT_OFF: 1344 state->dnxt.pilot_val = CX24117_PILOT_OFF; 1345 break; 1346 case PILOT_ON: 1347 state->dnxt.pilot_val = CX24117_PILOT_ON; 1348 break; 1349 default: 1350 dev_dbg(&state->priv->i2c->dev, 1351 "%s() demod%d unsupported pilot mode (%d)\n", 1352 __func__, state->demod, c->pilot); 1353 return -EOPNOTSUPP; 1354 } 1355 1356 switch (c->rolloff) { 1357 case ROLLOFF_20: 1358 state->dnxt.rolloff_val = CX24117_ROLLOFF_020; 1359 break; 1360 case ROLLOFF_25: 1361 state->dnxt.rolloff_val = CX24117_ROLLOFF_025; 1362 break; 1363 case ROLLOFF_35: 1364 state->dnxt.rolloff_val = CX24117_ROLLOFF_035; 1365 break; 1366 case ROLLOFF_AUTO: 1367 state->dnxt.rolloff_val = CX24117_ROLLOFF_035; 1368 /* soft-auto rolloff */ 1369 retune = 3; 1370 break; 1371 default: 1372 dev_warn(&state->priv->i2c->dev, 1373 "%s: demod%d unsupported rolloff (%d)\n", 1374 KBUILD_MODNAME, state->demod, c->rolloff); 1375 return -EOPNOTSUPP; 1376 } 1377 break; 1378 1379 default: 1380 dev_warn(&state->priv->i2c->dev, 1381 "%s: demod %d unsupported delivery system (%d)\n", 1382 KBUILD_MODNAME, state->demod, c->delivery_system); 1383 return -EINVAL; 1384 } 1385 1386 state->dnxt.delsys = c->delivery_system; 1387 state->dnxt.modulation = c->modulation; 1388 state->dnxt.frequency = c->frequency; 1389 state->dnxt.pilot = c->pilot; 1390 state->dnxt.rolloff = c->rolloff; 1391 1392 ret = cx24117_set_inversion(state, c->inversion); 1393 if (ret != 0) 1394 return ret; 1395 1396 ret = cx24117_set_fec(state, 1397 c->delivery_system, c->modulation, c->fec_inner); 1398 if (ret != 0) 1399 return ret; 1400 1401 ret = cx24117_set_symbolrate(state, c->symbol_rate); 1402 if (ret != 0) 1403 return ret; 1404 1405 /* discard the 'current' tuning parameters and prepare to tune */ 1406 cx24117_clone_params(fe); 1407 1408 dev_dbg(&state->priv->i2c->dev, 1409 "%s: delsys = %d\n", __func__, state->dcur.delsys); 1410 dev_dbg(&state->priv->i2c->dev, 1411 "%s: modulation = %d\n", __func__, state->dcur.modulation); 1412 dev_dbg(&state->priv->i2c->dev, 1413 "%s: frequency = %d\n", __func__, state->dcur.frequency); 1414 dev_dbg(&state->priv->i2c->dev, 1415 "%s: pilot = %d (val = 0x%02x)\n", __func__, 1416 state->dcur.pilot, state->dcur.pilot_val); 1417 dev_dbg(&state->priv->i2c->dev, 1418 "%s: retune = %d\n", __func__, retune); 1419 dev_dbg(&state->priv->i2c->dev, 1420 "%s: rolloff = %d (val = 0x%02x)\n", __func__, 1421 state->dcur.rolloff, state->dcur.rolloff_val); 1422 dev_dbg(&state->priv->i2c->dev, 1423 "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); 1424 dev_dbg(&state->priv->i2c->dev, 1425 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, 1426 state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); 1427 dev_dbg(&state->priv->i2c->dev, 1428 "%s: Inversion = %d (val = 0x%02x)\n", __func__, 1429 state->dcur.inversion, state->dcur.inversion_val); 1430 1431 /* Prepare a tune request */ 1432 cmd.args[0] = CMD_TUNEREQUEST; 1433 1434 /* demod */ 1435 cmd.args[1] = state->demod; 1436 1437 /* Frequency */ 1438 cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16; 1439 cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8; 1440 cmd.args[4] = (state->dcur.frequency & 0x0000ff); 1441 1442 /* Symbol Rate */ 1443 cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; 1444 cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff); 1445 1446 /* Automatic Inversion */ 1447 cmd.args[7] = state->dcur.inversion_val; 1448 1449 /* Modulation / FEC / Pilot */ 1450 cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val; 1451 1452 cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8; 1453 cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff; 1454 1455 cmd.args[11] = state->dcur.rolloff_val; 1456 cmd.args[12] = state->dcur.fec_mask; 1457 1458 if (state->dcur.symbol_rate > 30000000) { 1459 reg_ratediv = 0x04; 1460 reg_clkdiv = 0x02; 1461 } else if (state->dcur.symbol_rate > 10000000) { 1462 reg_ratediv = 0x06; 1463 reg_clkdiv = 0x03; 1464 } else { 1465 reg_ratediv = 0x0a; 1466 reg_clkdiv = 0x05; 1467 } 1468 1469 cmd.args[13] = reg_ratediv; 1470 cmd.args[14] = reg_clkdiv; 1471 1472 cx24117_writereg(state, (state->demod == 0) ? 1473 CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv); 1474 cx24117_writereg(state, (state->demod == 0) ? 1475 CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv); 1476 1477 cmd.args[15] = CX24117_PNE; 1478 cmd.len = 16; 1479 1480 do { 1481 /* Reset status register */ 1482 status = cx24117_readreg(state, (state->demod == 0) ? 1483 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) & 1484 CX24117_SIGNAL_MASK; 1485 1486 dev_dbg(&state->priv->i2c->dev, 1487 "%s() demod%d status_setfe = %02x\n", 1488 __func__, state->demod, status); 1489 1490 cx24117_writereg(state, (state->demod == 0) ? 1491 CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status); 1492 1493 /* Tune */ 1494 ret = cx24117_cmd_execute(fe, &cmd); 1495 if (ret != 0) 1496 break; 1497 1498 /* 1499 * Wait for up to 500 ms before retrying 1500 * 1501 * If we are able to tune then generally it occurs within 100ms. 1502 * If it takes longer, try a different rolloff setting. 1503 */ 1504 for (i = 0; i < 50; i++) { 1505 cx24117_read_status(fe, &tunerstat); 1506 status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); 1507 if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { 1508 dev_dbg(&state->priv->i2c->dev, 1509 "%s() demod%d tuned\n", 1510 __func__, state->demod); 1511 return 0; 1512 } 1513 msleep(20); 1514 } 1515 1516 dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n", 1517 __func__, state->demod); 1518 1519 /* try next rolloff value */ 1520 if (state->dcur.rolloff == 3) 1521 cmd.args[11]--; 1522 1523 } while (--retune); 1524 return -EINVAL; 1525 } 1526 1527 static int cx24117_tune(struct dvb_frontend *fe, bool re_tune, 1528 unsigned int mode_flags, unsigned int *delay, fe_status_t *status) 1529 { 1530 struct cx24117_state *state = fe->demodulator_priv; 1531 1532 dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", 1533 __func__, state->demod); 1534 1535 *delay = HZ / 5; 1536 if (re_tune) { 1537 int ret = cx24117_set_frontend(fe); 1538 if (ret) 1539 return ret; 1540 } 1541 return cx24117_read_status(fe, status); 1542 } 1543 1544 static int cx24117_get_algo(struct dvb_frontend *fe) 1545 { 1546 return DVBFE_ALGO_HW; 1547 } 1548 1549 static int cx24117_get_frontend(struct dvb_frontend *fe) 1550 { 1551 struct cx24117_state *state = fe->demodulator_priv; 1552 struct dtv_frontend_properties *c = &fe->dtv_property_cache; 1553 struct cx24117_cmd cmd; 1554 u8 reg, st, inv; 1555 int ret, idx; 1556 unsigned int freq; 1557 short srate_os, freq_os; 1558 1559 u8 buf[0x1f-4]; 1560 1561 cmd.args[0] = 0x1c; 1562 cmd.args[1] = (u8) state->demod; 1563 cmd.len = 2; 1564 ret = cx24117_cmd_execute(fe, &cmd); 1565 if (ret != 0) 1566 return ret; 1567 1568 /* read all required regs at once */ 1569 reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1; 1570 ret = cx24117_readregN(state, reg, buf, 0x1f-4); 1571 if (ret != 0) 1572 return ret; 1573 1574 st = buf[5]; 1575 1576 /* get spectral inversion */ 1577 inv = (((state->demod == 0) ? ~st : st) >> 6) & 1; 1578 if (inv == 0) 1579 c->inversion = INVERSION_OFF; 1580 else 1581 c->inversion = INVERSION_ON; 1582 1583 /* modulation and fec */ 1584 idx = st & 0x3f; 1585 if (c->delivery_system == SYS_DVBS2) { 1586 if (idx > 11) 1587 idx += 9; 1588 else 1589 idx += 7; 1590 } 1591 1592 c->modulation = cx24117_modfec_modes[idx].modulation; 1593 c->fec_inner = cx24117_modfec_modes[idx].fec; 1594 1595 /* frequency */ 1596 freq = (buf[0] << 16) | (buf[1] << 8) | buf[2]; 1597 freq_os = (buf[8] << 8) | buf[9]; 1598 c->frequency = freq + freq_os; 1599 1600 /* symbol rate */ 1601 srate_os = (buf[10] << 8) | buf[11]; 1602 c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate; 1603 return 0; 1604 } 1605 1606 static struct dvb_frontend_ops cx24117_ops = { 1607 .delsys = { SYS_DVBS, SYS_DVBS2 }, 1608 .info = { 1609 .name = "Conexant CX24117/CX24132", 1610 .frequency_min = 950000, 1611 .frequency_max = 2150000, 1612 .frequency_stepsize = 1011, /* kHz for QPSK frontends */ 1613 .frequency_tolerance = 5000, 1614 .symbol_rate_min = 1000000, 1615 .symbol_rate_max = 45000000, 1616 .caps = FE_CAN_INVERSION_AUTO | 1617 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 1618 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 1619 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 1620 FE_CAN_2G_MODULATION | 1621 FE_CAN_QPSK | FE_CAN_RECOVER 1622 }, 1623 1624 .release = cx24117_release, 1625 1626 .init = cx24117_initfe, 1627 .sleep = cx24117_sleep, 1628 .read_status = cx24117_read_status, 1629 .read_ber = cx24117_read_ber, 1630 .read_signal_strength = cx24117_read_signal_strength, 1631 .read_snr = cx24117_read_snr, 1632 .read_ucblocks = cx24117_read_ucblocks, 1633 .set_tone = cx24117_set_tone, 1634 .set_voltage = cx24117_set_voltage, 1635 .diseqc_send_master_cmd = cx24117_send_diseqc_msg, 1636 .diseqc_send_burst = cx24117_diseqc_send_burst, 1637 .get_frontend_algo = cx24117_get_algo, 1638 .tune = cx24117_tune, 1639 1640 .set_frontend = cx24117_set_frontend, 1641 .get_frontend = cx24117_get_frontend, 1642 }; 1643 1644 1645 MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware"); 1646 MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)"); 1647 MODULE_LICENSE("GPL"); 1648 MODULE_VERSION("1.1"); 1649 MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE); 1650 1651