19a0bf528SMauro Carvalho Chehab /*
29a0bf528SMauro Carvalho Chehab * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
39a0bf528SMauro Carvalho Chehab *
49a0bf528SMauro Carvalho Chehab * Copyright (C) 2001-5, B2C2 inc.
59a0bf528SMauro Carvalho Chehab *
699e44da7SPatrick Boettcher * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@posteo.de>
79a0bf528SMauro Carvalho Chehab *
89a0bf528SMauro Carvalho Chehab * This driver is "hard-coded" to be used with the 1st generation of
99a0bf528SMauro Carvalho Chehab * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
109a0bf528SMauro Carvalho Chehab * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
119a0bf528SMauro Carvalho Chehab * another device with a BCM3510, this is no problem.
129a0bf528SMauro Carvalho Chehab *
139a0bf528SMauro Carvalho Chehab * The driver works also with QAM64 DVB-C, but had an unreasonable high
149a0bf528SMauro Carvalho Chehab * UNC. (Tested with the Air2PC ATSC 1st generation)
159a0bf528SMauro Carvalho Chehab *
169a0bf528SMauro Carvalho Chehab * You'll need a firmware for this driver in order to get it running. It is
179a0bf528SMauro Carvalho Chehab * called "dvb-fe-bcm3510-01.fw".
189a0bf528SMauro Carvalho Chehab *
199a0bf528SMauro Carvalho Chehab * This program is free software; you can redistribute it and/or modify it
209a0bf528SMauro Carvalho Chehab * under the terms of the GNU General Public License as published by the Free
219a0bf528SMauro Carvalho Chehab * Software Foundation; either version 2 of the License, or (at your option)
229a0bf528SMauro Carvalho Chehab * any later version.
239a0bf528SMauro Carvalho Chehab *
249a0bf528SMauro Carvalho Chehab * This program is distributed in the hope that it will be useful, but WITHOUT
259a0bf528SMauro Carvalho Chehab * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
269a0bf528SMauro Carvalho Chehab * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
279a0bf528SMauro Carvalho Chehab * more details.
289a0bf528SMauro Carvalho Chehab *
299a0bf528SMauro Carvalho Chehab * You should have received a copy of the GNU General Public License along with
309a0bf528SMauro Carvalho Chehab * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
319a0bf528SMauro Carvalho Chehab * Ave, Cambridge, MA 02139, USA.
329a0bf528SMauro Carvalho Chehab */
339a0bf528SMauro Carvalho Chehab
349a0bf528SMauro Carvalho Chehab #include <linux/init.h>
359a0bf528SMauro Carvalho Chehab #include <linux/module.h>
369a0bf528SMauro Carvalho Chehab #include <linux/device.h>
379a0bf528SMauro Carvalho Chehab #include <linux/firmware.h>
389a0bf528SMauro Carvalho Chehab #include <linux/jiffies.h>
399a0bf528SMauro Carvalho Chehab #include <linux/string.h>
409a0bf528SMauro Carvalho Chehab #include <linux/slab.h>
419a0bf528SMauro Carvalho Chehab #include <linux/mutex.h>
429a0bf528SMauro Carvalho Chehab
43fada1935SMauro Carvalho Chehab #include <media/dvb_frontend.h>
449a0bf528SMauro Carvalho Chehab #include "bcm3510.h"
459a0bf528SMauro Carvalho Chehab #include "bcm3510_priv.h"
469a0bf528SMauro Carvalho Chehab
478393796dSMauro Carvalho Chehab /* Max transfer size done by bcm3510_do_hab_cmd() function */
488393796dSMauro Carvalho Chehab #define MAX_XFER_SIZE 128
498393796dSMauro Carvalho Chehab
509a0bf528SMauro Carvalho Chehab struct bcm3510_state {
519a0bf528SMauro Carvalho Chehab
529a0bf528SMauro Carvalho Chehab struct i2c_adapter* i2c;
539a0bf528SMauro Carvalho Chehab const struct bcm3510_config* config;
549a0bf528SMauro Carvalho Chehab struct dvb_frontend frontend;
559a0bf528SMauro Carvalho Chehab
569a0bf528SMauro Carvalho Chehab /* demodulator private data */
579a0bf528SMauro Carvalho Chehab struct mutex hab_mutex;
589a0bf528SMauro Carvalho Chehab u8 firmware_loaded:1;
599a0bf528SMauro Carvalho Chehab
609a0bf528SMauro Carvalho Chehab unsigned long next_status_check;
619a0bf528SMauro Carvalho Chehab unsigned long status_check_interval;
629a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_status1 status1;
639a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_status2 status2;
649a0bf528SMauro Carvalho Chehab };
659a0bf528SMauro Carvalho Chehab
669a0bf528SMauro Carvalho Chehab static int debug;
679a0bf528SMauro Carvalho Chehab module_param(debug, int, 0644);
689a0bf528SMauro Carvalho Chehab MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
699a0bf528SMauro Carvalho Chehab
709a0bf528SMauro Carvalho Chehab #define dprintk(level,x...) if (level & debug) printk(x)
719a0bf528SMauro Carvalho Chehab #define dbufout(b,l,m) {\
729a0bf528SMauro Carvalho Chehab int i; \
739a0bf528SMauro Carvalho Chehab for (i = 0; i < l; i++) \
749a0bf528SMauro Carvalho Chehab m("%02x ",b[i]); \
759a0bf528SMauro Carvalho Chehab }
769a0bf528SMauro Carvalho Chehab #define deb_info(args...) dprintk(0x01,args)
779a0bf528SMauro Carvalho Chehab #define deb_i2c(args...) dprintk(0x02,args)
789a0bf528SMauro Carvalho Chehab #define deb_hab(args...) dprintk(0x04,args)
799a0bf528SMauro Carvalho Chehab
809a0bf528SMauro Carvalho Chehab /* transfer functions */
bcm3510_writebytes(struct bcm3510_state * state,u8 reg,u8 * buf,u8 len)819a0bf528SMauro Carvalho Chehab static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
829a0bf528SMauro Carvalho Chehab {
839a0bf528SMauro Carvalho Chehab u8 b[256];
849a0bf528SMauro Carvalho Chehab int err;
859a0bf528SMauro Carvalho Chehab struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
869a0bf528SMauro Carvalho Chehab
879a0bf528SMauro Carvalho Chehab b[0] = reg;
889a0bf528SMauro Carvalho Chehab memcpy(&b[1],buf,len);
899a0bf528SMauro Carvalho Chehab
909a0bf528SMauro Carvalho Chehab deb_i2c("i2c wr %02x: ",reg);
919a0bf528SMauro Carvalho Chehab dbufout(buf,len,deb_i2c);
929a0bf528SMauro Carvalho Chehab deb_i2c("\n");
939a0bf528SMauro Carvalho Chehab
949a0bf528SMauro Carvalho Chehab if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
959a0bf528SMauro Carvalho Chehab
969a0bf528SMauro Carvalho Chehab deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
979a0bf528SMauro Carvalho Chehab __func__, state->config->demod_address, reg, err);
989a0bf528SMauro Carvalho Chehab return -EREMOTEIO;
999a0bf528SMauro Carvalho Chehab }
1009a0bf528SMauro Carvalho Chehab
1019a0bf528SMauro Carvalho Chehab return 0;
1029a0bf528SMauro Carvalho Chehab }
1039a0bf528SMauro Carvalho Chehab
bcm3510_readbytes(struct bcm3510_state * state,u8 reg,u8 * buf,u8 len)1049a0bf528SMauro Carvalho Chehab static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
1059a0bf528SMauro Carvalho Chehab {
1069a0bf528SMauro Carvalho Chehab struct i2c_msg msg[] = {
1079a0bf528SMauro Carvalho Chehab { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 },
1089a0bf528SMauro Carvalho Chehab { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
1099a0bf528SMauro Carvalho Chehab };
1109a0bf528SMauro Carvalho Chehab int err;
1119a0bf528SMauro Carvalho Chehab
1129a0bf528SMauro Carvalho Chehab memset(buf,0,len);
1139a0bf528SMauro Carvalho Chehab
1149a0bf528SMauro Carvalho Chehab if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
1159a0bf528SMauro Carvalho Chehab deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
1169a0bf528SMauro Carvalho Chehab __func__, state->config->demod_address, reg, err);
1179a0bf528SMauro Carvalho Chehab return -EREMOTEIO;
1189a0bf528SMauro Carvalho Chehab }
1199a0bf528SMauro Carvalho Chehab deb_i2c("i2c rd %02x: ",reg);
1209a0bf528SMauro Carvalho Chehab dbufout(buf,len,deb_i2c);
1219a0bf528SMauro Carvalho Chehab deb_i2c("\n");
1229a0bf528SMauro Carvalho Chehab
1239a0bf528SMauro Carvalho Chehab return 0;
1249a0bf528SMauro Carvalho Chehab }
1259a0bf528SMauro Carvalho Chehab
bcm3510_writeB(struct bcm3510_state * state,u8 reg,bcm3510_register_value v)1269a0bf528SMauro Carvalho Chehab static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
1279a0bf528SMauro Carvalho Chehab {
1289a0bf528SMauro Carvalho Chehab return bcm3510_writebytes(state,reg,&v.raw,1);
1299a0bf528SMauro Carvalho Chehab }
1309a0bf528SMauro Carvalho Chehab
bcm3510_readB(struct bcm3510_state * state,u8 reg,bcm3510_register_value * v)1319a0bf528SMauro Carvalho Chehab static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
1329a0bf528SMauro Carvalho Chehab {
1339a0bf528SMauro Carvalho Chehab return bcm3510_readbytes(state,reg,&v->raw,1);
1349a0bf528SMauro Carvalho Chehab }
1359a0bf528SMauro Carvalho Chehab
1369a0bf528SMauro Carvalho Chehab /* Host Access Buffer transfers */
bcm3510_hab_get_response(struct bcm3510_state * st,u8 * buf,int len)1379a0bf528SMauro Carvalho Chehab static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
1389a0bf528SMauro Carvalho Chehab {
1399a0bf528SMauro Carvalho Chehab bcm3510_register_value v;
1409a0bf528SMauro Carvalho Chehab int ret,i;
1419a0bf528SMauro Carvalho Chehab
1429a0bf528SMauro Carvalho Chehab v.HABADR_a6.HABADR = 0;
1439a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
1449a0bf528SMauro Carvalho Chehab return ret;
1459a0bf528SMauro Carvalho Chehab
1469a0bf528SMauro Carvalho Chehab for (i = 0; i < len; i++) {
1479a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
1489a0bf528SMauro Carvalho Chehab return ret;
1499a0bf528SMauro Carvalho Chehab buf[i] = v.HABDATA_a7;
1509a0bf528SMauro Carvalho Chehab }
1519a0bf528SMauro Carvalho Chehab return 0;
1529a0bf528SMauro Carvalho Chehab }
1539a0bf528SMauro Carvalho Chehab
bcm3510_hab_send_request(struct bcm3510_state * st,u8 * buf,int len)1549a0bf528SMauro Carvalho Chehab static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
1559a0bf528SMauro Carvalho Chehab {
1569a0bf528SMauro Carvalho Chehab bcm3510_register_value v,hab;
1579a0bf528SMauro Carvalho Chehab int ret,i;
1589a0bf528SMauro Carvalho Chehab unsigned long t;
1599a0bf528SMauro Carvalho Chehab
1609a0bf528SMauro Carvalho Chehab /* Check if any previous HAB request still needs to be serviced by the
1619a0bf528SMauro Carvalho Chehab * Acquisition Processor before sending new request */
1629a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
1639a0bf528SMauro Carvalho Chehab return ret;
1649a0bf528SMauro Carvalho Chehab if (v.HABSTAT_a8.HABR) {
1659a0bf528SMauro Carvalho Chehab deb_info("HAB is running already - clearing it.\n");
1669a0bf528SMauro Carvalho Chehab v.HABSTAT_a8.HABR = 0;
1679a0bf528SMauro Carvalho Chehab bcm3510_writeB(st,0xa8,v);
1689a0bf528SMauro Carvalho Chehab // return -EBUSY;
1699a0bf528SMauro Carvalho Chehab }
1709a0bf528SMauro Carvalho Chehab
1719a0bf528SMauro Carvalho Chehab /* Send the start HAB Address (automatically incremented after write of
1729a0bf528SMauro Carvalho Chehab * HABDATA) and write the HAB Data */
1739a0bf528SMauro Carvalho Chehab hab.HABADR_a6.HABADR = 0;
1749a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
1759a0bf528SMauro Carvalho Chehab return ret;
1769a0bf528SMauro Carvalho Chehab
1779a0bf528SMauro Carvalho Chehab for (i = 0; i < len; i++) {
1789a0bf528SMauro Carvalho Chehab hab.HABDATA_a7 = buf[i];
1799a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
1809a0bf528SMauro Carvalho Chehab return ret;
1819a0bf528SMauro Carvalho Chehab }
1829a0bf528SMauro Carvalho Chehab
1839a0bf528SMauro Carvalho Chehab /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
1849a0bf528SMauro Carvalho Chehab * be written) */
1859a0bf528SMauro Carvalho Chehab v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
1869a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
1879a0bf528SMauro Carvalho Chehab return ret;
1889a0bf528SMauro Carvalho Chehab
1899a0bf528SMauro Carvalho Chehab /* Polling method: Wait until the AP finishes processing the HAB request */
1909a0bf528SMauro Carvalho Chehab t = jiffies + 1*HZ;
1919a0bf528SMauro Carvalho Chehab while (time_before(jiffies, t)) {
1929a0bf528SMauro Carvalho Chehab deb_info("waiting for HAB to complete\n");
1939a0bf528SMauro Carvalho Chehab msleep(10);
1949a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
1959a0bf528SMauro Carvalho Chehab return ret;
1969a0bf528SMauro Carvalho Chehab
1979a0bf528SMauro Carvalho Chehab if (!v.HABSTAT_a8.HABR)
1989a0bf528SMauro Carvalho Chehab return 0;
1999a0bf528SMauro Carvalho Chehab }
2009a0bf528SMauro Carvalho Chehab
2019a0bf528SMauro Carvalho Chehab deb_info("send_request execution timed out.\n");
2029a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
2039a0bf528SMauro Carvalho Chehab }
2049a0bf528SMauro Carvalho Chehab
bcm3510_do_hab_cmd(struct bcm3510_state * st,u8 cmd,u8 msgid,u8 * obuf,u8 olen,u8 * ibuf,u8 ilen)2059a0bf528SMauro Carvalho Chehab static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
2069a0bf528SMauro Carvalho Chehab {
2078393796dSMauro Carvalho Chehab u8 ob[MAX_XFER_SIZE], ib[MAX_XFER_SIZE];
2089a0bf528SMauro Carvalho Chehab int ret = 0;
2099a0bf528SMauro Carvalho Chehab
2108393796dSMauro Carvalho Chehab if (ilen + 2 > sizeof(ib)) {
2118393796dSMauro Carvalho Chehab deb_hab("do_hab_cmd: ilen=%d is too big!\n", ilen);
2128393796dSMauro Carvalho Chehab return -EINVAL;
2138393796dSMauro Carvalho Chehab }
2148393796dSMauro Carvalho Chehab
2158393796dSMauro Carvalho Chehab if (olen + 2 > sizeof(ob)) {
2168393796dSMauro Carvalho Chehab deb_hab("do_hab_cmd: olen=%d is too big!\n", olen);
2178393796dSMauro Carvalho Chehab return -EINVAL;
2188393796dSMauro Carvalho Chehab }
2198393796dSMauro Carvalho Chehab
2209a0bf528SMauro Carvalho Chehab ob[0] = cmd;
2219a0bf528SMauro Carvalho Chehab ob[1] = msgid;
2229a0bf528SMauro Carvalho Chehab memcpy(&ob[2],obuf,olen);
2239a0bf528SMauro Carvalho Chehab
2249a0bf528SMauro Carvalho Chehab deb_hab("hab snd: ");
2259a0bf528SMauro Carvalho Chehab dbufout(ob,olen+2,deb_hab);
2269a0bf528SMauro Carvalho Chehab deb_hab("\n");
2279a0bf528SMauro Carvalho Chehab
2289a0bf528SMauro Carvalho Chehab if (mutex_lock_interruptible(&st->hab_mutex) < 0)
2299a0bf528SMauro Carvalho Chehab return -EAGAIN;
2309a0bf528SMauro Carvalho Chehab
2319a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
2329a0bf528SMauro Carvalho Chehab (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
2339a0bf528SMauro Carvalho Chehab goto error;
2349a0bf528SMauro Carvalho Chehab
2359a0bf528SMauro Carvalho Chehab deb_hab("hab get: ");
2369a0bf528SMauro Carvalho Chehab dbufout(ib,ilen+2,deb_hab);
2379a0bf528SMauro Carvalho Chehab deb_hab("\n");
2389a0bf528SMauro Carvalho Chehab
2399a0bf528SMauro Carvalho Chehab memcpy(ibuf,&ib[2],ilen);
2409a0bf528SMauro Carvalho Chehab error:
2419a0bf528SMauro Carvalho Chehab mutex_unlock(&st->hab_mutex);
2429a0bf528SMauro Carvalho Chehab return ret;
2439a0bf528SMauro Carvalho Chehab }
2449a0bf528SMauro Carvalho Chehab
2459a0bf528SMauro Carvalho Chehab #if 0
2469a0bf528SMauro Carvalho Chehab /* not needed, we use a semaphore to prevent HAB races */
2479a0bf528SMauro Carvalho Chehab static int bcm3510_is_ap_ready(struct bcm3510_state *st)
2489a0bf528SMauro Carvalho Chehab {
2499a0bf528SMauro Carvalho Chehab bcm3510_register_value ap,hab;
2509a0bf528SMauro Carvalho Chehab int ret;
2519a0bf528SMauro Carvalho Chehab
2529a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
2539a0bf528SMauro Carvalho Chehab (ret = bcm3510_readB(st,0xa2,&ap) < 0))
2549a0bf528SMauro Carvalho Chehab return ret;
2559a0bf528SMauro Carvalho Chehab
2569a0bf528SMauro Carvalho Chehab if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
2579a0bf528SMauro Carvalho Chehab deb_info("AP is busy\n");
2589a0bf528SMauro Carvalho Chehab return -EBUSY;
2599a0bf528SMauro Carvalho Chehab }
2609a0bf528SMauro Carvalho Chehab
2619a0bf528SMauro Carvalho Chehab return 0;
2629a0bf528SMauro Carvalho Chehab }
2639a0bf528SMauro Carvalho Chehab #endif
2649a0bf528SMauro Carvalho Chehab
bcm3510_bert_reset(struct bcm3510_state * st)2659a0bf528SMauro Carvalho Chehab static int bcm3510_bert_reset(struct bcm3510_state *st)
2669a0bf528SMauro Carvalho Chehab {
2679a0bf528SMauro Carvalho Chehab bcm3510_register_value b;
2689a0bf528SMauro Carvalho Chehab int ret;
2699a0bf528SMauro Carvalho Chehab
2709a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xfa,&b)) < 0)
2719a0bf528SMauro Carvalho Chehab return ret;
2729a0bf528SMauro Carvalho Chehab
2739a0bf528SMauro Carvalho Chehab b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
2749a0bf528SMauro Carvalho Chehab b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
2759a0bf528SMauro Carvalho Chehab b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
2769a0bf528SMauro Carvalho Chehab b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
2779a0bf528SMauro Carvalho Chehab
2789a0bf528SMauro Carvalho Chehab /* clear residual bit counter TODO */
2799a0bf528SMauro Carvalho Chehab return 0;
2809a0bf528SMauro Carvalho Chehab }
2819a0bf528SMauro Carvalho Chehab
bcm3510_refresh_state(struct bcm3510_state * st)2829a0bf528SMauro Carvalho Chehab static int bcm3510_refresh_state(struct bcm3510_state *st)
2839a0bf528SMauro Carvalho Chehab {
2849a0bf528SMauro Carvalho Chehab if (time_after(jiffies,st->next_status_check)) {
2859a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
2869a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
2879a0bf528SMauro Carvalho Chehab st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
2889a0bf528SMauro Carvalho Chehab }
2899a0bf528SMauro Carvalho Chehab return 0;
2909a0bf528SMauro Carvalho Chehab }
2919a0bf528SMauro Carvalho Chehab
bcm3510_read_status(struct dvb_frontend * fe,enum fe_status * status)2920df289a2SMauro Carvalho Chehab static int bcm3510_read_status(struct dvb_frontend *fe, enum fe_status *status)
2939a0bf528SMauro Carvalho Chehab {
2949a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
2959a0bf528SMauro Carvalho Chehab bcm3510_refresh_state(st);
2969a0bf528SMauro Carvalho Chehab
2979a0bf528SMauro Carvalho Chehab *status = 0;
2989a0bf528SMauro Carvalho Chehab if (st->status1.STATUS1.RECEIVER_LOCK)
2999a0bf528SMauro Carvalho Chehab *status |= FE_HAS_LOCK | FE_HAS_SYNC;
3009a0bf528SMauro Carvalho Chehab
3019a0bf528SMauro Carvalho Chehab if (st->status1.STATUS1.FEC_LOCK)
3029a0bf528SMauro Carvalho Chehab *status |= FE_HAS_VITERBI;
3039a0bf528SMauro Carvalho Chehab
3049a0bf528SMauro Carvalho Chehab if (st->status1.STATUS1.OUT_PLL_LOCK)
3059a0bf528SMauro Carvalho Chehab *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
3069a0bf528SMauro Carvalho Chehab
3079a0bf528SMauro Carvalho Chehab if (*status & FE_HAS_LOCK)
3089a0bf528SMauro Carvalho Chehab st->status_check_interval = 1500;
3099a0bf528SMauro Carvalho Chehab else /* more frequently checks if no lock has been achieved yet */
3109a0bf528SMauro Carvalho Chehab st->status_check_interval = 500;
3119a0bf528SMauro Carvalho Chehab
3129a0bf528SMauro Carvalho Chehab deb_info("real_status: %02x\n",*status);
3139a0bf528SMauro Carvalho Chehab return 0;
3149a0bf528SMauro Carvalho Chehab }
3159a0bf528SMauro Carvalho Chehab
bcm3510_read_ber(struct dvb_frontend * fe,u32 * ber)3169a0bf528SMauro Carvalho Chehab static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
3179a0bf528SMauro Carvalho Chehab {
3189a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
3199a0bf528SMauro Carvalho Chehab bcm3510_refresh_state(st);
3209a0bf528SMauro Carvalho Chehab
3219a0bf528SMauro Carvalho Chehab *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
3229a0bf528SMauro Carvalho Chehab return 0;
3239a0bf528SMauro Carvalho Chehab }
3249a0bf528SMauro Carvalho Chehab
bcm3510_read_unc(struct dvb_frontend * fe,u32 * unc)3259a0bf528SMauro Carvalho Chehab static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
3269a0bf528SMauro Carvalho Chehab {
3279a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
3289a0bf528SMauro Carvalho Chehab bcm3510_refresh_state(st);
3299a0bf528SMauro Carvalho Chehab *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
3309a0bf528SMauro Carvalho Chehab return 0;
3319a0bf528SMauro Carvalho Chehab }
3329a0bf528SMauro Carvalho Chehab
bcm3510_read_signal_strength(struct dvb_frontend * fe,u16 * strength)3339a0bf528SMauro Carvalho Chehab static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
3349a0bf528SMauro Carvalho Chehab {
3359a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
3369a0bf528SMauro Carvalho Chehab s32 t;
3379a0bf528SMauro Carvalho Chehab
3389a0bf528SMauro Carvalho Chehab bcm3510_refresh_state(st);
3399a0bf528SMauro Carvalho Chehab t = st->status2.SIGNAL;
3409a0bf528SMauro Carvalho Chehab
3419a0bf528SMauro Carvalho Chehab if (t > 190)
3429a0bf528SMauro Carvalho Chehab t = 190;
3439a0bf528SMauro Carvalho Chehab if (t < 90)
3449a0bf528SMauro Carvalho Chehab t = 90;
3459a0bf528SMauro Carvalho Chehab
3469a0bf528SMauro Carvalho Chehab t -= 90;
3479a0bf528SMauro Carvalho Chehab t = t * 0xff / 100;
3489a0bf528SMauro Carvalho Chehab /* normalize if necessary */
3499a0bf528SMauro Carvalho Chehab *strength = (t << 8) | t;
3509a0bf528SMauro Carvalho Chehab return 0;
3519a0bf528SMauro Carvalho Chehab }
3529a0bf528SMauro Carvalho Chehab
bcm3510_read_snr(struct dvb_frontend * fe,u16 * snr)3539a0bf528SMauro Carvalho Chehab static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
3549a0bf528SMauro Carvalho Chehab {
3559a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
3569a0bf528SMauro Carvalho Chehab bcm3510_refresh_state(st);
3579a0bf528SMauro Carvalho Chehab
3589a0bf528SMauro Carvalho Chehab *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
3599a0bf528SMauro Carvalho Chehab return 0;
3609a0bf528SMauro Carvalho Chehab }
3619a0bf528SMauro Carvalho Chehab
3629a0bf528SMauro Carvalho Chehab /* tuner frontend programming */
bcm3510_tuner_cmd(struct bcm3510_state * st,u8 bc,u16 n,u8 a)3639a0bf528SMauro Carvalho Chehab static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
3649a0bf528SMauro Carvalho Chehab {
3659a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_tune c;
3669a0bf528SMauro Carvalho Chehab memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
3679a0bf528SMauro Carvalho Chehab
3689a0bf528SMauro Carvalho Chehab /* I2C Mode disabled, set 16 control / Data pairs */
3699a0bf528SMauro Carvalho Chehab c.length = 0x10;
3709a0bf528SMauro Carvalho Chehab c.clock_width = 0;
3719a0bf528SMauro Carvalho Chehab /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
3729a0bf528SMauro Carvalho Chehab * logic high (as Configuration) */
3739a0bf528SMauro Carvalho Chehab c.misc = 0x10;
3749a0bf528SMauro Carvalho Chehab /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
3759a0bf528SMauro Carvalho Chehab c.TUNCTL_state = 0x40;
3769a0bf528SMauro Carvalho Chehab
3779a0bf528SMauro Carvalho Chehab /* PRESCALER DIVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
3789a0bf528SMauro Carvalho Chehab c.ctl_dat[0].ctrl.size = BITS_8;
3799a0bf528SMauro Carvalho Chehab c.ctl_dat[0].data = 0x80 | bc;
3809a0bf528SMauro Carvalho Chehab
3819a0bf528SMauro Carvalho Chehab /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
3829a0bf528SMauro Carvalho Chehab c.ctl_dat[1].ctrl.size = BITS_8;
3839a0bf528SMauro Carvalho Chehab c.ctl_dat[1].data = 4;
3849a0bf528SMauro Carvalho Chehab
3859a0bf528SMauro Carvalho Chehab /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
3869a0bf528SMauro Carvalho Chehab c.ctl_dat[2].ctrl.size = BITS_3;
3879a0bf528SMauro Carvalho Chehab c.ctl_dat[2].data = 0x20;
3889a0bf528SMauro Carvalho Chehab
3899a0bf528SMauro Carvalho Chehab /* control CS0 pin, pulse byte ? */
3909a0bf528SMauro Carvalho Chehab c.ctl_dat[3].ctrl.size = BITS_3;
3919a0bf528SMauro Carvalho Chehab c.ctl_dat[3].ctrl.clk_off = 1;
3929a0bf528SMauro Carvalho Chehab c.ctl_dat[3].ctrl.cs0 = 1;
3939a0bf528SMauro Carvalho Chehab c.ctl_dat[3].data = 0x40;
3949a0bf528SMauro Carvalho Chehab
3959a0bf528SMauro Carvalho Chehab /* PGM_S18 to PGM_S11 */
3969a0bf528SMauro Carvalho Chehab c.ctl_dat[4].ctrl.size = BITS_8;
3979a0bf528SMauro Carvalho Chehab c.ctl_dat[4].data = n >> 3;
3989a0bf528SMauro Carvalho Chehab
3999a0bf528SMauro Carvalho Chehab /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
4009a0bf528SMauro Carvalho Chehab c.ctl_dat[5].ctrl.size = BITS_8;
4019a0bf528SMauro Carvalho Chehab c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
4029a0bf528SMauro Carvalho Chehab
4039a0bf528SMauro Carvalho Chehab /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
4049a0bf528SMauro Carvalho Chehab c.ctl_dat[6].ctrl.size = BITS_3;
4059a0bf528SMauro Carvalho Chehab c.ctl_dat[6].data = (a << 6) & 0xdf;
4069a0bf528SMauro Carvalho Chehab
4079a0bf528SMauro Carvalho Chehab /* control CS0 pin, pulse byte ? */
4089a0bf528SMauro Carvalho Chehab c.ctl_dat[7].ctrl.size = BITS_3;
4099a0bf528SMauro Carvalho Chehab c.ctl_dat[7].ctrl.clk_off = 1;
4109a0bf528SMauro Carvalho Chehab c.ctl_dat[7].ctrl.cs0 = 1;
4119a0bf528SMauro Carvalho Chehab c.ctl_dat[7].data = 0x40;
4129a0bf528SMauro Carvalho Chehab
4139a0bf528SMauro Carvalho Chehab /* PRESCALER DIVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
4149a0bf528SMauro Carvalho Chehab c.ctl_dat[8].ctrl.size = BITS_8;
4159a0bf528SMauro Carvalho Chehab c.ctl_dat[8].data = 0x80;
4169a0bf528SMauro Carvalho Chehab
4179a0bf528SMauro Carvalho Chehab /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
4189a0bf528SMauro Carvalho Chehab c.ctl_dat[9].ctrl.size = BITS_8;
4199a0bf528SMauro Carvalho Chehab c.ctl_dat[9].data = 0x10;
4209a0bf528SMauro Carvalho Chehab
4219a0bf528SMauro Carvalho Chehab /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
4229a0bf528SMauro Carvalho Chehab c.ctl_dat[10].ctrl.size = BITS_3;
4239a0bf528SMauro Carvalho Chehab c.ctl_dat[10].data = 0x20;
4249a0bf528SMauro Carvalho Chehab
4259a0bf528SMauro Carvalho Chehab /* pulse byte */
4269a0bf528SMauro Carvalho Chehab c.ctl_dat[11].ctrl.size = BITS_3;
4279a0bf528SMauro Carvalho Chehab c.ctl_dat[11].ctrl.clk_off = 1;
4289a0bf528SMauro Carvalho Chehab c.ctl_dat[11].ctrl.cs1 = 1;
4299a0bf528SMauro Carvalho Chehab c.ctl_dat[11].data = 0x40;
4309a0bf528SMauro Carvalho Chehab
4319a0bf528SMauro Carvalho Chehab /* PGM_S18 to PGM_S11 */
4329a0bf528SMauro Carvalho Chehab c.ctl_dat[12].ctrl.size = BITS_8;
4339a0bf528SMauro Carvalho Chehab c.ctl_dat[12].data = 0x2a;
4349a0bf528SMauro Carvalho Chehab
4359a0bf528SMauro Carvalho Chehab /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
4369a0bf528SMauro Carvalho Chehab c.ctl_dat[13].ctrl.size = BITS_8;
4379a0bf528SMauro Carvalho Chehab c.ctl_dat[13].data = 0x8e;
4389a0bf528SMauro Carvalho Chehab
4399a0bf528SMauro Carvalho Chehab /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
4409a0bf528SMauro Carvalho Chehab c.ctl_dat[14].ctrl.size = BITS_3;
4419a0bf528SMauro Carvalho Chehab c.ctl_dat[14].data = 0;
4429a0bf528SMauro Carvalho Chehab
4439a0bf528SMauro Carvalho Chehab /* Pulse Byte */
4449a0bf528SMauro Carvalho Chehab c.ctl_dat[15].ctrl.size = BITS_3;
4459a0bf528SMauro Carvalho Chehab c.ctl_dat[15].ctrl.clk_off = 1;
4469a0bf528SMauro Carvalho Chehab c.ctl_dat[15].ctrl.cs1 = 1;
4479a0bf528SMauro Carvalho Chehab c.ctl_dat[15].data = 0x40;
4489a0bf528SMauro Carvalho Chehab
4499a0bf528SMauro Carvalho Chehab return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
4509a0bf528SMauro Carvalho Chehab }
4519a0bf528SMauro Carvalho Chehab
bcm3510_set_freq(struct bcm3510_state * st,u32 freq)4529a0bf528SMauro Carvalho Chehab static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
4539a0bf528SMauro Carvalho Chehab {
4549a0bf528SMauro Carvalho Chehab u8 bc,a;
4559a0bf528SMauro Carvalho Chehab u16 n;
4569a0bf528SMauro Carvalho Chehab s32 YIntercept,Tfvco1;
4579a0bf528SMauro Carvalho Chehab
4589a0bf528SMauro Carvalho Chehab freq /= 1000;
4599a0bf528SMauro Carvalho Chehab
4609a0bf528SMauro Carvalho Chehab deb_info("%dkHz:",freq);
4619a0bf528SMauro Carvalho Chehab /* set Band Switch */
4629a0bf528SMauro Carvalho Chehab if (freq <= 168000)
4639a0bf528SMauro Carvalho Chehab bc = 0x1c;
4649a0bf528SMauro Carvalho Chehab else if (freq <= 378000)
4659a0bf528SMauro Carvalho Chehab bc = 0x2c;
4669a0bf528SMauro Carvalho Chehab else
4679a0bf528SMauro Carvalho Chehab bc = 0x30;
4689a0bf528SMauro Carvalho Chehab
4699a0bf528SMauro Carvalho Chehab if (freq >= 470000) {
4709a0bf528SMauro Carvalho Chehab freq -= 470001;
4719a0bf528SMauro Carvalho Chehab YIntercept = 18805;
4729a0bf528SMauro Carvalho Chehab } else if (freq >= 90000) {
4739a0bf528SMauro Carvalho Chehab freq -= 90001;
4749a0bf528SMauro Carvalho Chehab YIntercept = 15005;
4759a0bf528SMauro Carvalho Chehab } else if (freq >= 76000){
4769a0bf528SMauro Carvalho Chehab freq -= 76001;
4779a0bf528SMauro Carvalho Chehab YIntercept = 14865;
4789a0bf528SMauro Carvalho Chehab } else {
4799a0bf528SMauro Carvalho Chehab freq -= 54001;
4809a0bf528SMauro Carvalho Chehab YIntercept = 14645;
4819a0bf528SMauro Carvalho Chehab }
4829a0bf528SMauro Carvalho Chehab
4839a0bf528SMauro Carvalho Chehab Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
4849a0bf528SMauro Carvalho Chehab
4859a0bf528SMauro Carvalho Chehab n = Tfvco1 >> 6;
4869a0bf528SMauro Carvalho Chehab a = Tfvco1 & 0x3f;
4879a0bf528SMauro Carvalho Chehab
4889a0bf528SMauro Carvalho Chehab deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
4899a0bf528SMauro Carvalho Chehab if (n >= 16 && n <= 2047)
4909a0bf528SMauro Carvalho Chehab return bcm3510_tuner_cmd(st,bc,n,a);
4919a0bf528SMauro Carvalho Chehab
4929a0bf528SMauro Carvalho Chehab return -EINVAL;
4939a0bf528SMauro Carvalho Chehab }
4949a0bf528SMauro Carvalho Chehab
bcm3510_set_frontend(struct dvb_frontend * fe)4959a0bf528SMauro Carvalho Chehab static int bcm3510_set_frontend(struct dvb_frontend *fe)
4969a0bf528SMauro Carvalho Chehab {
4979a0bf528SMauro Carvalho Chehab struct dtv_frontend_properties *c = &fe->dtv_property_cache;
4989a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
4999a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_ext_acquire cmd;
5009a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_bert_control bert;
5019a0bf528SMauro Carvalho Chehab int ret;
5029a0bf528SMauro Carvalho Chehab
5039a0bf528SMauro Carvalho Chehab memset(&cmd,0,sizeof(cmd));
5049a0bf528SMauro Carvalho Chehab switch (c->modulation) {
5059a0bf528SMauro Carvalho Chehab case QAM_256:
5069a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x1;
5079a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.SYM_RATE = 0x1;
5089a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.IF_FREQ = 0x1;
5099a0bf528SMauro Carvalho Chehab break;
5109a0bf528SMauro Carvalho Chehab case QAM_64:
5119a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x2;
5129a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.SYM_RATE = 0x2;
5139a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.IF_FREQ = 0x1;
5149a0bf528SMauro Carvalho Chehab break;
5159a0bf528SMauro Carvalho Chehab #if 0
5169a0bf528SMauro Carvalho Chehab case QAM_256:
5179a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x3;
5189a0bf528SMauro Carvalho Chehab break;
5199a0bf528SMauro Carvalho Chehab case QAM_128:
5209a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x4;
5219a0bf528SMauro Carvalho Chehab break;
5229a0bf528SMauro Carvalho Chehab case QAM_64:
5239a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x5;
5249a0bf528SMauro Carvalho Chehab break;
5259a0bf528SMauro Carvalho Chehab case QAM_32:
5269a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x6;
5279a0bf528SMauro Carvalho Chehab break;
5289a0bf528SMauro Carvalho Chehab case QAM_16:
5299a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x7;
5309a0bf528SMauro Carvalho Chehab break;
5319a0bf528SMauro Carvalho Chehab #endif
5329a0bf528SMauro Carvalho Chehab case VSB_8:
5339a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x8;
5349a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.SYM_RATE = 0x0;
5359a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.IF_FREQ = 0x0;
5369a0bf528SMauro Carvalho Chehab break;
5379a0bf528SMauro Carvalho Chehab case VSB_16:
5389a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.MODE = 0x9;
5399a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.SYM_RATE = 0x0;
5409a0bf528SMauro Carvalho Chehab cmd.ACQUIRE1.IF_FREQ = 0x0;
54117992979SMauro Carvalho Chehab break;
5429a0bf528SMauro Carvalho Chehab default:
5439a0bf528SMauro Carvalho Chehab return -EINVAL;
544c2c1b415SPeter Senna Tschudin }
5459a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.OFFSET = 0;
5469a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.NTSCSWEEP = 1;
5479a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.FA = 1;
5489a0bf528SMauro Carvalho Chehab cmd.ACQUIRE0.BW = 0;
5499a0bf528SMauro Carvalho Chehab
5509a0bf528SMauro Carvalho Chehab /* if (enableOffset) {
5519a0bf528SMauro Carvalho Chehab cmd.IF_OFFSET0 = xx;
5529a0bf528SMauro Carvalho Chehab cmd.IF_OFFSET1 = xx;
5539a0bf528SMauro Carvalho Chehab
5549a0bf528SMauro Carvalho Chehab cmd.SYM_OFFSET0 = xx;
5559a0bf528SMauro Carvalho Chehab cmd.SYM_OFFSET1 = xx;
5569a0bf528SMauro Carvalho Chehab if (enableNtscSweep) {
5579a0bf528SMauro Carvalho Chehab cmd.NTSC_OFFSET0;
5589a0bf528SMauro Carvalho Chehab cmd.NTSC_OFFSET1;
5599a0bf528SMauro Carvalho Chehab }
5609a0bf528SMauro Carvalho Chehab } */
5619a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
5629a0bf528SMauro Carvalho Chehab
5639a0bf528SMauro Carvalho Chehab /* doing it with different MSGIDs, data book and source differs */
5649a0bf528SMauro Carvalho Chehab bert.BE = 0;
5659a0bf528SMauro Carvalho Chehab bert.unused = 0;
5669a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
5679a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
5689a0bf528SMauro Carvalho Chehab
5699a0bf528SMauro Carvalho Chehab bcm3510_bert_reset(st);
5709a0bf528SMauro Carvalho Chehab
5719a0bf528SMauro Carvalho Chehab ret = bcm3510_set_freq(st, c->frequency);
5729a0bf528SMauro Carvalho Chehab if (ret < 0)
5739a0bf528SMauro Carvalho Chehab return ret;
5749a0bf528SMauro Carvalho Chehab
5759a0bf528SMauro Carvalho Chehab memset(&st->status1,0,sizeof(st->status1));
5769a0bf528SMauro Carvalho Chehab memset(&st->status2,0,sizeof(st->status2));
5779a0bf528SMauro Carvalho Chehab st->status_check_interval = 500;
5789a0bf528SMauro Carvalho Chehab
5799a0bf528SMauro Carvalho Chehab /* Give the AP some time */
5809a0bf528SMauro Carvalho Chehab msleep(200);
5819a0bf528SMauro Carvalho Chehab
5829a0bf528SMauro Carvalho Chehab return 0;
5839a0bf528SMauro Carvalho Chehab }
5849a0bf528SMauro Carvalho Chehab
bcm3510_sleep(struct dvb_frontend * fe)5859a0bf528SMauro Carvalho Chehab static int bcm3510_sleep(struct dvb_frontend* fe)
5869a0bf528SMauro Carvalho Chehab {
5879a0bf528SMauro Carvalho Chehab return 0;
5889a0bf528SMauro Carvalho Chehab }
5899a0bf528SMauro Carvalho Chehab
bcm3510_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * s)5909a0bf528SMauro Carvalho Chehab static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
5919a0bf528SMauro Carvalho Chehab {
5929a0bf528SMauro Carvalho Chehab s->min_delay_ms = 1000;
5939a0bf528SMauro Carvalho Chehab s->step_size = 0;
5949a0bf528SMauro Carvalho Chehab s->max_drift = 0;
5959a0bf528SMauro Carvalho Chehab return 0;
5969a0bf528SMauro Carvalho Chehab }
5979a0bf528SMauro Carvalho Chehab
bcm3510_release(struct dvb_frontend * fe)5989a0bf528SMauro Carvalho Chehab static void bcm3510_release(struct dvb_frontend* fe)
5999a0bf528SMauro Carvalho Chehab {
6009a0bf528SMauro Carvalho Chehab struct bcm3510_state* state = fe->demodulator_priv;
6019a0bf528SMauro Carvalho Chehab kfree(state);
6029a0bf528SMauro Carvalho Chehab }
6039a0bf528SMauro Carvalho Chehab
6049a0bf528SMauro Carvalho Chehab /* firmware download:
6059a0bf528SMauro Carvalho Chehab * firmware file is build up like this:
6069a0bf528SMauro Carvalho Chehab * 16bit addr, 16bit length, 8byte of length
6079a0bf528SMauro Carvalho Chehab */
6089a0bf528SMauro Carvalho Chehab #define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
6099a0bf528SMauro Carvalho Chehab
bcm3510_write_ram(struct bcm3510_state * st,u16 addr,const u8 * b,u16 len)6109a0bf528SMauro Carvalho Chehab static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, const u8 *b,
6119a0bf528SMauro Carvalho Chehab u16 len)
6129a0bf528SMauro Carvalho Chehab {
6139a0bf528SMauro Carvalho Chehab int ret = 0,i;
6149a0bf528SMauro Carvalho Chehab bcm3510_register_value vH, vL,vD;
6159a0bf528SMauro Carvalho Chehab
6169a0bf528SMauro Carvalho Chehab vH.MADRH_a9 = addr >> 8;
6179a0bf528SMauro Carvalho Chehab vL.MADRL_aa = addr;
6189a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
6199a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
6209a0bf528SMauro Carvalho Chehab
6219a0bf528SMauro Carvalho Chehab for (i = 0; i < len; i++) {
6229a0bf528SMauro Carvalho Chehab vD.MDATA_ab = b[i];
6239a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
6249a0bf528SMauro Carvalho Chehab return ret;
6259a0bf528SMauro Carvalho Chehab }
6269a0bf528SMauro Carvalho Chehab
6279a0bf528SMauro Carvalho Chehab return 0;
6289a0bf528SMauro Carvalho Chehab }
6299a0bf528SMauro Carvalho Chehab
bcm3510_download_firmware(struct dvb_frontend * fe)6309a0bf528SMauro Carvalho Chehab static int bcm3510_download_firmware(struct dvb_frontend* fe)
6319a0bf528SMauro Carvalho Chehab {
6329a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
6339a0bf528SMauro Carvalho Chehab const struct firmware *fw;
6349a0bf528SMauro Carvalho Chehab u16 addr,len;
6359a0bf528SMauro Carvalho Chehab const u8 *b;
6369a0bf528SMauro Carvalho Chehab int ret,i;
6379a0bf528SMauro Carvalho Chehab
6389a0bf528SMauro Carvalho Chehab deb_info("requesting firmware\n");
6399a0bf528SMauro Carvalho Chehab if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
6409a0bf528SMauro Carvalho Chehab err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
6419a0bf528SMauro Carvalho Chehab return ret;
6429a0bf528SMauro Carvalho Chehab }
64335f30f36SMauro Carvalho Chehab deb_info("got firmware: %zu\n", fw->size);
6449a0bf528SMauro Carvalho Chehab
6459a0bf528SMauro Carvalho Chehab b = fw->data;
6469a0bf528SMauro Carvalho Chehab for (i = 0; i < fw->size;) {
647fba16a1eSHans Verkuil addr = le16_to_cpu(*((__le16 *)&b[i]));
648fba16a1eSHans Verkuil len = le16_to_cpu(*((__le16 *)&b[i+2]));
6499a0bf528SMauro Carvalho Chehab deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
6509a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
6519a0bf528SMauro Carvalho Chehab err("firmware download failed: %d\n",ret);
652a15fe8d9SYan Lei release_firmware(fw);
6539a0bf528SMauro Carvalho Chehab return ret;
6549a0bf528SMauro Carvalho Chehab }
6559a0bf528SMauro Carvalho Chehab i += 4 + len;
6569a0bf528SMauro Carvalho Chehab }
6579a0bf528SMauro Carvalho Chehab release_firmware(fw);
6589a0bf528SMauro Carvalho Chehab deb_info("firmware download successfully completed\n");
6599a0bf528SMauro Carvalho Chehab return 0;
6609a0bf528SMauro Carvalho Chehab }
6619a0bf528SMauro Carvalho Chehab
bcm3510_check_firmware_version(struct bcm3510_state * st)6629a0bf528SMauro Carvalho Chehab static int bcm3510_check_firmware_version(struct bcm3510_state *st)
6639a0bf528SMauro Carvalho Chehab {
6649a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_get_version_info ver;
6659a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
6669a0bf528SMauro Carvalho Chehab
6679a0bf528SMauro Carvalho Chehab deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
6689a0bf528SMauro Carvalho Chehab ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
6699a0bf528SMauro Carvalho Chehab
6709a0bf528SMauro Carvalho Chehab if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
6719a0bf528SMauro Carvalho Chehab ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
6729a0bf528SMauro Carvalho Chehab ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
6739a0bf528SMauro Carvalho Chehab return 0;
6749a0bf528SMauro Carvalho Chehab
6759a0bf528SMauro Carvalho Chehab deb_info("version check failed\n");
6769a0bf528SMauro Carvalho Chehab return -ENODEV;
6779a0bf528SMauro Carvalho Chehab }
6789a0bf528SMauro Carvalho Chehab
6799a0bf528SMauro Carvalho Chehab /* (un)resetting the AP */
bcm3510_reset(struct bcm3510_state * st)6809a0bf528SMauro Carvalho Chehab static int bcm3510_reset(struct bcm3510_state *st)
6819a0bf528SMauro Carvalho Chehab {
6829a0bf528SMauro Carvalho Chehab int ret;
6839a0bf528SMauro Carvalho Chehab unsigned long t;
6849a0bf528SMauro Carvalho Chehab bcm3510_register_value v;
6859a0bf528SMauro Carvalho Chehab
6869a0bf528SMauro Carvalho Chehab bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
6879a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
6889a0bf528SMauro Carvalho Chehab return ret;
6899a0bf528SMauro Carvalho Chehab
6909a0bf528SMauro Carvalho Chehab t = jiffies + 3*HZ;
6919a0bf528SMauro Carvalho Chehab while (time_before(jiffies, t)) {
6929a0bf528SMauro Carvalho Chehab msleep(10);
6939a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
6949a0bf528SMauro Carvalho Chehab return ret;
6959a0bf528SMauro Carvalho Chehab
6969a0bf528SMauro Carvalho Chehab if (v.APSTAT1_a2.RESET)
6979a0bf528SMauro Carvalho Chehab return 0;
6989a0bf528SMauro Carvalho Chehab }
6999a0bf528SMauro Carvalho Chehab deb_info("reset timed out\n");
7009a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7019a0bf528SMauro Carvalho Chehab }
7029a0bf528SMauro Carvalho Chehab
bcm3510_clear_reset(struct bcm3510_state * st)7039a0bf528SMauro Carvalho Chehab static int bcm3510_clear_reset(struct bcm3510_state *st)
7049a0bf528SMauro Carvalho Chehab {
7059a0bf528SMauro Carvalho Chehab bcm3510_register_value v;
7069a0bf528SMauro Carvalho Chehab int ret;
7079a0bf528SMauro Carvalho Chehab unsigned long t;
7089a0bf528SMauro Carvalho Chehab
7099a0bf528SMauro Carvalho Chehab v.raw = 0;
7109a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
7119a0bf528SMauro Carvalho Chehab return ret;
7129a0bf528SMauro Carvalho Chehab
7139a0bf528SMauro Carvalho Chehab t = jiffies + 3*HZ;
7149a0bf528SMauro Carvalho Chehab while (time_before(jiffies, t)) {
7159a0bf528SMauro Carvalho Chehab msleep(10);
7169a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
7179a0bf528SMauro Carvalho Chehab return ret;
7189a0bf528SMauro Carvalho Chehab
7199a0bf528SMauro Carvalho Chehab /* verify that reset is cleared */
7209a0bf528SMauro Carvalho Chehab if (!v.APSTAT1_a2.RESET)
7219a0bf528SMauro Carvalho Chehab return 0;
7229a0bf528SMauro Carvalho Chehab }
7239a0bf528SMauro Carvalho Chehab deb_info("reset clear timed out\n");
7249a0bf528SMauro Carvalho Chehab return -ETIMEDOUT;
7259a0bf528SMauro Carvalho Chehab }
7269a0bf528SMauro Carvalho Chehab
bcm3510_init_cold(struct bcm3510_state * st)7279a0bf528SMauro Carvalho Chehab static int bcm3510_init_cold(struct bcm3510_state *st)
7289a0bf528SMauro Carvalho Chehab {
7299a0bf528SMauro Carvalho Chehab int ret;
7309a0bf528SMauro Carvalho Chehab bcm3510_register_value v;
7319a0bf528SMauro Carvalho Chehab
7329a0bf528SMauro Carvalho Chehab /* read Acquisation Processor status register and check it is not in RUN mode */
7339a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
7349a0bf528SMauro Carvalho Chehab return ret;
7359a0bf528SMauro Carvalho Chehab if (v.APSTAT1_a2.RUN) {
7369a0bf528SMauro Carvalho Chehab deb_info("AP is already running - firmware already loaded.\n");
7379a0bf528SMauro Carvalho Chehab return 0;
7389a0bf528SMauro Carvalho Chehab }
7399a0bf528SMauro Carvalho Chehab
7409a0bf528SMauro Carvalho Chehab deb_info("reset?\n");
7419a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_reset(st)) < 0)
7429a0bf528SMauro Carvalho Chehab return ret;
7439a0bf528SMauro Carvalho Chehab
7449a0bf528SMauro Carvalho Chehab deb_info("tristate?\n");
7459a0bf528SMauro Carvalho Chehab /* tri-state */
7469a0bf528SMauro Carvalho Chehab v.TSTCTL_2e.CTL = 0;
7479a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
7489a0bf528SMauro Carvalho Chehab return ret;
7499a0bf528SMauro Carvalho Chehab
7509a0bf528SMauro Carvalho Chehab deb_info("firmware?\n");
7519a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
7529a0bf528SMauro Carvalho Chehab (ret = bcm3510_clear_reset(st)) < 0)
7539a0bf528SMauro Carvalho Chehab return ret;
7549a0bf528SMauro Carvalho Chehab
7559a0bf528SMauro Carvalho Chehab /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
7569a0bf528SMauro Carvalho Chehab
7579a0bf528SMauro Carvalho Chehab return 0;
7589a0bf528SMauro Carvalho Chehab }
7599a0bf528SMauro Carvalho Chehab
bcm3510_init(struct dvb_frontend * fe)7609a0bf528SMauro Carvalho Chehab static int bcm3510_init(struct dvb_frontend* fe)
7619a0bf528SMauro Carvalho Chehab {
7629a0bf528SMauro Carvalho Chehab struct bcm3510_state* st = fe->demodulator_priv;
7639a0bf528SMauro Carvalho Chehab bcm3510_register_value j;
7649a0bf528SMauro Carvalho Chehab struct bcm3510_hab_cmd_set_agc c;
7659a0bf528SMauro Carvalho Chehab int ret;
7669a0bf528SMauro Carvalho Chehab
7679a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
7689a0bf528SMauro Carvalho Chehab return ret;
7699a0bf528SMauro Carvalho Chehab
7709a0bf528SMauro Carvalho Chehab deb_info("JDEC: %02x\n",j.raw);
7719a0bf528SMauro Carvalho Chehab
7729a0bf528SMauro Carvalho Chehab switch (j.JDEC_ca.JDEC) {
7739a0bf528SMauro Carvalho Chehab case JDEC_WAIT_AT_RAM:
7749a0bf528SMauro Carvalho Chehab deb_info("attempting to download firmware\n");
7759a0bf528SMauro Carvalho Chehab if ((ret = bcm3510_init_cold(st)) < 0)
7769a0bf528SMauro Carvalho Chehab return ret;
777df561f66SGustavo A. R. Silva fallthrough;
77806eeefe8SMauro Carvalho Chehab case JDEC_EEPROM_LOAD_WAIT:
7799a0bf528SMauro Carvalho Chehab deb_info("firmware is loaded\n");
7809a0bf528SMauro Carvalho Chehab bcm3510_check_firmware_version(st);
7819a0bf528SMauro Carvalho Chehab break;
7829a0bf528SMauro Carvalho Chehab default:
7839a0bf528SMauro Carvalho Chehab return -ENODEV;
7849a0bf528SMauro Carvalho Chehab }
7859a0bf528SMauro Carvalho Chehab
7869a0bf528SMauro Carvalho Chehab memset(&c,0,1);
7879a0bf528SMauro Carvalho Chehab c.SEL = 1;
7889a0bf528SMauro Carvalho Chehab bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
7899a0bf528SMauro Carvalho Chehab
7909a0bf528SMauro Carvalho Chehab return 0;
7919a0bf528SMauro Carvalho Chehab }
7929a0bf528SMauro Carvalho Chehab
7939a0bf528SMauro Carvalho Chehab
794bd336e63SMax Kellermann static const struct dvb_frontend_ops bcm3510_ops;
7959a0bf528SMauro Carvalho Chehab
bcm3510_attach(const struct bcm3510_config * config,struct i2c_adapter * i2c)7969a0bf528SMauro Carvalho Chehab struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
7979a0bf528SMauro Carvalho Chehab struct i2c_adapter *i2c)
7989a0bf528SMauro Carvalho Chehab {
7999a0bf528SMauro Carvalho Chehab struct bcm3510_state* state = NULL;
8009a0bf528SMauro Carvalho Chehab bcm3510_register_value v;
8019a0bf528SMauro Carvalho Chehab
8029a0bf528SMauro Carvalho Chehab /* allocate memory for the internal state */
8039a0bf528SMauro Carvalho Chehab state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
8049a0bf528SMauro Carvalho Chehab if (state == NULL)
8059a0bf528SMauro Carvalho Chehab goto error;
8069a0bf528SMauro Carvalho Chehab
8079a0bf528SMauro Carvalho Chehab /* setup the state */
8089a0bf528SMauro Carvalho Chehab
8099a0bf528SMauro Carvalho Chehab state->config = config;
8109a0bf528SMauro Carvalho Chehab state->i2c = i2c;
8119a0bf528SMauro Carvalho Chehab
8129a0bf528SMauro Carvalho Chehab /* create dvb_frontend */
8139a0bf528SMauro Carvalho Chehab memcpy(&state->frontend.ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
8149a0bf528SMauro Carvalho Chehab state->frontend.demodulator_priv = state;
8159a0bf528SMauro Carvalho Chehab
8169a0bf528SMauro Carvalho Chehab mutex_init(&state->hab_mutex);
8179a0bf528SMauro Carvalho Chehab
818*2386ae06SColin Ian King if (bcm3510_readB(state, 0xe0, &v) < 0)
8199a0bf528SMauro Carvalho Chehab goto error;
8209a0bf528SMauro Carvalho Chehab
8219a0bf528SMauro Carvalho Chehab deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
8229a0bf528SMauro Carvalho Chehab
8239a0bf528SMauro Carvalho Chehab if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
8249a0bf528SMauro Carvalho Chehab (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
8259a0bf528SMauro Carvalho Chehab goto error;
8269a0bf528SMauro Carvalho Chehab
8279a0bf528SMauro Carvalho Chehab info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
8289a0bf528SMauro Carvalho Chehab
8299a0bf528SMauro Carvalho Chehab bcm3510_reset(state);
8309a0bf528SMauro Carvalho Chehab
8319a0bf528SMauro Carvalho Chehab return &state->frontend;
8329a0bf528SMauro Carvalho Chehab
8339a0bf528SMauro Carvalho Chehab error:
8349a0bf528SMauro Carvalho Chehab kfree(state);
8359a0bf528SMauro Carvalho Chehab return NULL;
8369a0bf528SMauro Carvalho Chehab }
83786495af1SGreg Kroah-Hartman EXPORT_SYMBOL_GPL(bcm3510_attach);
8389a0bf528SMauro Carvalho Chehab
839bd336e63SMax Kellermann static const struct dvb_frontend_ops bcm3510_ops = {
8409a0bf528SMauro Carvalho Chehab .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
8419a0bf528SMauro Carvalho Chehab .info = {
8429a0bf528SMauro Carvalho Chehab .name = "Broadcom BCM3510 VSB/QAM frontend",
843f1b1eabfSMauro Carvalho Chehab .frequency_min_hz = 54 * MHz,
844f1b1eabfSMauro Carvalho Chehab .frequency_max_hz = 803 * MHz,
8459a0bf528SMauro Carvalho Chehab .caps =
8469a0bf528SMauro Carvalho Chehab FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
8479a0bf528SMauro Carvalho Chehab FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
8489a0bf528SMauro Carvalho Chehab FE_CAN_8VSB | FE_CAN_16VSB |
8499a0bf528SMauro Carvalho Chehab FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
8509a0bf528SMauro Carvalho Chehab },
8519a0bf528SMauro Carvalho Chehab
8529a0bf528SMauro Carvalho Chehab .release = bcm3510_release,
8539a0bf528SMauro Carvalho Chehab
8549a0bf528SMauro Carvalho Chehab .init = bcm3510_init,
8559a0bf528SMauro Carvalho Chehab .sleep = bcm3510_sleep,
8569a0bf528SMauro Carvalho Chehab
8579a0bf528SMauro Carvalho Chehab .set_frontend = bcm3510_set_frontend,
8589a0bf528SMauro Carvalho Chehab .get_tune_settings = bcm3510_get_tune_settings,
8599a0bf528SMauro Carvalho Chehab
8609a0bf528SMauro Carvalho Chehab .read_status = bcm3510_read_status,
8619a0bf528SMauro Carvalho Chehab .read_ber = bcm3510_read_ber,
8629a0bf528SMauro Carvalho Chehab .read_signal_strength = bcm3510_read_signal_strength,
8639a0bf528SMauro Carvalho Chehab .read_snr = bcm3510_read_snr,
8649a0bf528SMauro Carvalho Chehab .read_ucblocks = bcm3510_read_unc,
8659a0bf528SMauro Carvalho Chehab };
8669a0bf528SMauro Carvalho Chehab
8679a0bf528SMauro Carvalho Chehab MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
86899e44da7SPatrick Boettcher MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@posteo.de>");
8699a0bf528SMauro Carvalho Chehab MODULE_LICENSE("GPL");
870