xref: /linux/drivers/media/dvb-frontends/af9013.c (revision e9f0878c4b2004ac19581274c1ae4c61ae3ca70e)
1 /*
2  * Afatech AF9013 demodulator driver
3  *
4  * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
5  * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
6  *
7  * Thanks to Afatech who kindly provided information.
8  *
9  *    This program is free software; you can redistribute it and/or modify
10  *    it under the terms of the GNU General Public License as published by
11  *    the Free Software Foundation; either version 2 of the License, or
12  *    (at your option) any later version.
13  *
14  *    This program is distributed in the hope that it will be useful,
15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *    GNU General Public License for more details.
18  *
19  */
20 
21 #include "af9013_priv.h"
22 
23 struct af9013_state {
24 	struct i2c_client *client;
25 	struct regmap *regmap;
26 	struct i2c_mux_core *muxc;
27 	struct dvb_frontend fe;
28 	u32 clk;
29 	u8 tuner;
30 	u32 if_frequency;
31 	u8 ts_mode;
32 	u8 ts_output_pin;
33 	bool spec_inv;
34 	u8 api_version[4];
35 	u8 gpio[4];
36 
37 	u32 bandwidth_hz;
38 	enum fe_status fe_status;
39 	/* RF and IF AGC limits used for signal strength calc */
40 	u8 strength_en, rf_agc_50, rf_agc_80, if_agc_50, if_agc_80;
41 	unsigned long set_frontend_jiffies;
42 	unsigned long read_status_jiffies;
43 	unsigned long strength_jiffies;
44 	unsigned long cnr_jiffies;
45 	unsigned long ber_ucb_jiffies;
46 	u16 dvbv3_snr;
47 	u16 dvbv3_strength;
48 	u32 dvbv3_ber;
49 	u32 dvbv3_ucblocks;
50 	bool first_tune;
51 };
52 
53 static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
54 {
55 	struct i2c_client *client = state->client;
56 	int ret;
57 	u8 pos;
58 	u16 addr;
59 
60 	dev_dbg(&client->dev, "gpio %u, gpioval %02x\n", gpio, gpioval);
61 
62 	/*
63 	 * GPIO0 & GPIO1 0xd735
64 	 * GPIO2 & GPIO3 0xd736
65 	 */
66 
67 	switch (gpio) {
68 	case 0:
69 	case 1:
70 		addr = 0xd735;
71 		break;
72 	case 2:
73 	case 3:
74 		addr = 0xd736;
75 		break;
76 
77 	default:
78 		ret = -EINVAL;
79 		goto err;
80 	}
81 
82 	switch (gpio) {
83 	case 0:
84 	case 2:
85 		pos = 0;
86 		break;
87 	case 1:
88 	case 3:
89 	default:
90 		pos = 4;
91 		break;
92 	}
93 
94 	ret = regmap_update_bits(state->regmap, addr, 0x0f << pos,
95 				 gpioval << pos);
96 	if (ret)
97 		goto err;
98 
99 	return 0;
100 err:
101 	dev_dbg(&client->dev, "failed %d\n", ret);
102 	return ret;
103 }
104 
105 static int af9013_get_tune_settings(struct dvb_frontend *fe,
106 	struct dvb_frontend_tune_settings *fesettings)
107 {
108 	fesettings->min_delay_ms = 800;
109 	fesettings->step_size = 0;
110 	fesettings->max_drift = 0;
111 
112 	return 0;
113 }
114 
115 static int af9013_set_frontend(struct dvb_frontend *fe)
116 {
117 	struct af9013_state *state = fe->demodulator_priv;
118 	struct i2c_client *client = state->client;
119 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
120 	int ret, i, sampling_freq;
121 	bool auto_mode, spec_inv;
122 	u8 buf[6];
123 	u32 if_frequency, freq_cw;
124 
125 	dev_dbg(&client->dev, "frequency %u, bandwidth_hz %u\n",
126 		c->frequency, c->bandwidth_hz);
127 
128 	/* program tuner */
129 	if (fe->ops.tuner_ops.set_params) {
130 		ret = fe->ops.tuner_ops.set_params(fe);
131 		if (ret)
132 			goto err;
133 	}
134 
135 	/* program CFOE coefficients */
136 	if (c->bandwidth_hz != state->bandwidth_hz) {
137 		for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
138 			if (coeff_lut[i].clock == state->clk &&
139 				coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
140 				break;
141 			}
142 		}
143 
144 		/* Return an error if can't find bandwidth or the right clock */
145 		if (i == ARRAY_SIZE(coeff_lut)) {
146 			ret = -EINVAL;
147 			goto err;
148 		}
149 
150 		ret = regmap_bulk_write(state->regmap, 0xae00, coeff_lut[i].val,
151 					sizeof(coeff_lut[i].val));
152 		if (ret)
153 			goto err;
154 	}
155 
156 	/* program frequency control */
157 	if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
158 		/* get used IF frequency */
159 		if (fe->ops.tuner_ops.get_if_frequency) {
160 			ret = fe->ops.tuner_ops.get_if_frequency(fe,
161 								 &if_frequency);
162 			if (ret)
163 				goto err;
164 		} else {
165 			if_frequency = state->if_frequency;
166 		}
167 
168 		dev_dbg(&client->dev, "if_frequency %u\n", if_frequency);
169 
170 		sampling_freq = if_frequency;
171 
172 		while (sampling_freq > (state->clk / 2))
173 			sampling_freq -= state->clk;
174 
175 		if (sampling_freq < 0) {
176 			sampling_freq *= -1;
177 			spec_inv = state->spec_inv;
178 		} else {
179 			spec_inv = !state->spec_inv;
180 		}
181 
182 		freq_cw = DIV_ROUND_CLOSEST_ULL((u64)sampling_freq * 0x800000,
183 						state->clk);
184 
185 		if (spec_inv)
186 			freq_cw = 0x800000 - freq_cw;
187 
188 		buf[0] = (freq_cw >>  0) & 0xff;
189 		buf[1] = (freq_cw >>  8) & 0xff;
190 		buf[2] = (freq_cw >> 16) & 0x7f;
191 
192 		freq_cw = 0x800000 - freq_cw;
193 
194 		buf[3] = (freq_cw >>  0) & 0xff;
195 		buf[4] = (freq_cw >>  8) & 0xff;
196 		buf[5] = (freq_cw >> 16) & 0x7f;
197 
198 		ret = regmap_bulk_write(state->regmap, 0xd140, buf, 3);
199 		if (ret)
200 			goto err;
201 
202 		ret = regmap_bulk_write(state->regmap, 0x9be7, buf, 6);
203 		if (ret)
204 			goto err;
205 	}
206 
207 	/* clear TPS lock flag */
208 	ret = regmap_update_bits(state->regmap, 0xd330, 0x08, 0x08);
209 	if (ret)
210 		goto err;
211 
212 	/* clear MPEG2 lock flag */
213 	ret = regmap_update_bits(state->regmap, 0xd507, 0x40, 0x00);
214 	if (ret)
215 		goto err;
216 
217 	/* empty channel function */
218 	ret = regmap_update_bits(state->regmap, 0x9bfe, 0x01, 0x00);
219 	if (ret)
220 		goto err;
221 
222 	/* empty DVB-T channel function */
223 	ret = regmap_update_bits(state->regmap, 0x9bc2, 0x01, 0x00);
224 	if (ret)
225 		goto err;
226 
227 	/* transmission parameters */
228 	auto_mode = false;
229 	memset(buf, 0, 3);
230 
231 	switch (c->transmission_mode) {
232 	case TRANSMISSION_MODE_AUTO:
233 		auto_mode = true;
234 		break;
235 	case TRANSMISSION_MODE_2K:
236 		break;
237 	case TRANSMISSION_MODE_8K:
238 		buf[0] |= (1 << 0);
239 		break;
240 	default:
241 		dev_dbg(&client->dev, "invalid transmission_mode\n");
242 		auto_mode = true;
243 	}
244 
245 	switch (c->guard_interval) {
246 	case GUARD_INTERVAL_AUTO:
247 		auto_mode = true;
248 		break;
249 	case GUARD_INTERVAL_1_32:
250 		break;
251 	case GUARD_INTERVAL_1_16:
252 		buf[0] |= (1 << 2);
253 		break;
254 	case GUARD_INTERVAL_1_8:
255 		buf[0] |= (2 << 2);
256 		break;
257 	case GUARD_INTERVAL_1_4:
258 		buf[0] |= (3 << 2);
259 		break;
260 	default:
261 		dev_dbg(&client->dev, "invalid guard_interval\n");
262 		auto_mode = true;
263 	}
264 
265 	switch (c->hierarchy) {
266 	case HIERARCHY_AUTO:
267 		auto_mode = true;
268 		break;
269 	case HIERARCHY_NONE:
270 		break;
271 	case HIERARCHY_1:
272 		buf[0] |= (1 << 4);
273 		break;
274 	case HIERARCHY_2:
275 		buf[0] |= (2 << 4);
276 		break;
277 	case HIERARCHY_4:
278 		buf[0] |= (3 << 4);
279 		break;
280 	default:
281 		dev_dbg(&client->dev, "invalid hierarchy\n");
282 		auto_mode = true;
283 	}
284 
285 	switch (c->modulation) {
286 	case QAM_AUTO:
287 		auto_mode = true;
288 		break;
289 	case QPSK:
290 		break;
291 	case QAM_16:
292 		buf[1] |= (1 << 6);
293 		break;
294 	case QAM_64:
295 		buf[1] |= (2 << 6);
296 		break;
297 	default:
298 		dev_dbg(&client->dev, "invalid modulation\n");
299 		auto_mode = true;
300 	}
301 
302 	/* Use HP. How and which case we can switch to LP? */
303 	buf[1] |= (1 << 4);
304 
305 	switch (c->code_rate_HP) {
306 	case FEC_AUTO:
307 		auto_mode = true;
308 		break;
309 	case FEC_1_2:
310 		break;
311 	case FEC_2_3:
312 		buf[2] |= (1 << 0);
313 		break;
314 	case FEC_3_4:
315 		buf[2] |= (2 << 0);
316 		break;
317 	case FEC_5_6:
318 		buf[2] |= (3 << 0);
319 		break;
320 	case FEC_7_8:
321 		buf[2] |= (4 << 0);
322 		break;
323 	default:
324 		dev_dbg(&client->dev, "invalid code_rate_HP\n");
325 		auto_mode = true;
326 	}
327 
328 	switch (c->code_rate_LP) {
329 	case FEC_AUTO:
330 		auto_mode = true;
331 		break;
332 	case FEC_1_2:
333 		break;
334 	case FEC_2_3:
335 		buf[2] |= (1 << 3);
336 		break;
337 	case FEC_3_4:
338 		buf[2] |= (2 << 3);
339 		break;
340 	case FEC_5_6:
341 		buf[2] |= (3 << 3);
342 		break;
343 	case FEC_7_8:
344 		buf[2] |= (4 << 3);
345 		break;
346 	case FEC_NONE:
347 		break;
348 	default:
349 		dev_dbg(&client->dev, "invalid code_rate_LP\n");
350 		auto_mode = true;
351 	}
352 
353 	switch (c->bandwidth_hz) {
354 	case 6000000:
355 		break;
356 	case 7000000:
357 		buf[1] |= (1 << 2);
358 		break;
359 	case 8000000:
360 		buf[1] |= (2 << 2);
361 		break;
362 	default:
363 		dev_dbg(&client->dev, "invalid bandwidth_hz\n");
364 		ret = -EINVAL;
365 		goto err;
366 	}
367 
368 	ret = regmap_bulk_write(state->regmap, 0xd3c0, buf, 3);
369 	if (ret)
370 		goto err;
371 
372 	if (auto_mode) {
373 		/* clear easy mode flag */
374 		ret = regmap_write(state->regmap, 0xaefd, 0x00);
375 		if (ret)
376 			goto err;
377 
378 		dev_dbg(&client->dev, "auto params\n");
379 	} else {
380 		/* set easy mode flag */
381 		ret = regmap_write(state->regmap, 0xaefd, 0x01);
382 		if (ret)
383 			goto err;
384 
385 		ret = regmap_write(state->regmap, 0xaefe, 0x00);
386 		if (ret)
387 			goto err;
388 
389 		dev_dbg(&client->dev, "manual params\n");
390 	}
391 
392 	/* Reset FSM */
393 	ret = regmap_write(state->regmap, 0xffff, 0x00);
394 	if (ret)
395 		goto err;
396 
397 	state->bandwidth_hz = c->bandwidth_hz;
398 	state->set_frontend_jiffies = jiffies;
399 	state->first_tune = false;
400 
401 	return 0;
402 err:
403 	dev_dbg(&client->dev, "failed %d\n", ret);
404 	return ret;
405 }
406 
407 static int af9013_get_frontend(struct dvb_frontend *fe,
408 			       struct dtv_frontend_properties *c)
409 {
410 	struct af9013_state *state = fe->demodulator_priv;
411 	struct i2c_client *client = state->client;
412 	int ret;
413 	u8 buf[3];
414 
415 	dev_dbg(&client->dev, "\n");
416 
417 	ret = regmap_bulk_read(state->regmap, 0xd3c0, buf, 3);
418 	if (ret)
419 		goto err;
420 
421 	switch ((buf[1] >> 6) & 3) {
422 	case 0:
423 		c->modulation = QPSK;
424 		break;
425 	case 1:
426 		c->modulation = QAM_16;
427 		break;
428 	case 2:
429 		c->modulation = QAM_64;
430 		break;
431 	}
432 
433 	switch ((buf[0] >> 0) & 3) {
434 	case 0:
435 		c->transmission_mode = TRANSMISSION_MODE_2K;
436 		break;
437 	case 1:
438 		c->transmission_mode = TRANSMISSION_MODE_8K;
439 	}
440 
441 	switch ((buf[0] >> 2) & 3) {
442 	case 0:
443 		c->guard_interval = GUARD_INTERVAL_1_32;
444 		break;
445 	case 1:
446 		c->guard_interval = GUARD_INTERVAL_1_16;
447 		break;
448 	case 2:
449 		c->guard_interval = GUARD_INTERVAL_1_8;
450 		break;
451 	case 3:
452 		c->guard_interval = GUARD_INTERVAL_1_4;
453 		break;
454 	}
455 
456 	switch ((buf[0] >> 4) & 7) {
457 	case 0:
458 		c->hierarchy = HIERARCHY_NONE;
459 		break;
460 	case 1:
461 		c->hierarchy = HIERARCHY_1;
462 		break;
463 	case 2:
464 		c->hierarchy = HIERARCHY_2;
465 		break;
466 	case 3:
467 		c->hierarchy = HIERARCHY_4;
468 		break;
469 	}
470 
471 	switch ((buf[2] >> 0) & 7) {
472 	case 0:
473 		c->code_rate_HP = FEC_1_2;
474 		break;
475 	case 1:
476 		c->code_rate_HP = FEC_2_3;
477 		break;
478 	case 2:
479 		c->code_rate_HP = FEC_3_4;
480 		break;
481 	case 3:
482 		c->code_rate_HP = FEC_5_6;
483 		break;
484 	case 4:
485 		c->code_rate_HP = FEC_7_8;
486 		break;
487 	}
488 
489 	switch ((buf[2] >> 3) & 7) {
490 	case 0:
491 		c->code_rate_LP = FEC_1_2;
492 		break;
493 	case 1:
494 		c->code_rate_LP = FEC_2_3;
495 		break;
496 	case 2:
497 		c->code_rate_LP = FEC_3_4;
498 		break;
499 	case 3:
500 		c->code_rate_LP = FEC_5_6;
501 		break;
502 	case 4:
503 		c->code_rate_LP = FEC_7_8;
504 		break;
505 	}
506 
507 	switch ((buf[1] >> 2) & 3) {
508 	case 0:
509 		c->bandwidth_hz = 6000000;
510 		break;
511 	case 1:
512 		c->bandwidth_hz = 7000000;
513 		break;
514 	case 2:
515 		c->bandwidth_hz = 8000000;
516 		break;
517 	}
518 
519 	return 0;
520 err:
521 	dev_dbg(&client->dev, "failed %d\n", ret);
522 	return ret;
523 }
524 
525 static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
526 {
527 	struct af9013_state *state = fe->demodulator_priv;
528 	struct i2c_client *client = state->client;
529 	struct dtv_frontend_properties *c = &fe->dtv_property_cache;
530 	int ret, stmp1;
531 	unsigned int utmp, utmp1, utmp2, utmp3, utmp4;
532 	u8 buf[7];
533 
534 	dev_dbg(&client->dev, "\n");
535 
536 	/*
537 	 * Return status from the cache if it is younger than 2000ms with the
538 	 * exception of last tune is done during 4000ms.
539 	 */
540 	if (time_is_after_jiffies(state->read_status_jiffies + msecs_to_jiffies(2000)) &&
541 	    time_is_before_jiffies(state->set_frontend_jiffies + msecs_to_jiffies(4000))) {
542 		*status = state->fe_status;
543 	} else {
544 		/* MPEG2 lock */
545 		ret = regmap_read(state->regmap, 0xd507, &utmp);
546 		if (ret)
547 			goto err;
548 
549 		if ((utmp >> 6) & 0x01) {
550 			utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
551 				FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
552 		} else {
553 			/* TPS lock */
554 			ret = regmap_read(state->regmap, 0xd330, &utmp);
555 			if (ret)
556 				goto err;
557 
558 			if ((utmp >> 3) & 0x01)
559 				utmp1 = FE_HAS_SIGNAL | FE_HAS_CARRIER |
560 					FE_HAS_VITERBI;
561 			else
562 				utmp1 = 0;
563 		}
564 
565 		dev_dbg(&client->dev, "fe_status %02x\n", utmp1);
566 
567 		state->read_status_jiffies = jiffies;
568 
569 		state->fe_status = utmp1;
570 		*status = utmp1;
571 	}
572 
573 	/* Signal strength */
574 	switch (state->strength_en) {
575 	case 0:
576 		/* Check if we support signal strength */
577 		ret = regmap_read(state->regmap, 0x9bee, &utmp);
578 		if (ret)
579 			goto err;
580 
581 		if ((utmp >> 0) & 0x01) {
582 			/* Read agc values for signal strength estimation */
583 			ret = regmap_read(state->regmap, 0x9bbd, &utmp1);
584 			if (ret)
585 				goto err;
586 			ret = regmap_read(state->regmap, 0x9bd0, &utmp2);
587 			if (ret)
588 				goto err;
589 			ret = regmap_read(state->regmap, 0x9be2, &utmp3);
590 			if (ret)
591 				goto err;
592 			ret = regmap_read(state->regmap, 0x9be4, &utmp4);
593 			if (ret)
594 				goto err;
595 
596 			state->rf_agc_50 = utmp1;
597 			state->rf_agc_80 = utmp2;
598 			state->if_agc_50 = utmp3;
599 			state->if_agc_80 = utmp4;
600 			dev_dbg(&client->dev,
601 				"rf_agc_50 %u, rf_agc_80 %u, if_agc_50 %u, if_agc_80 %u\n",
602 				utmp1, utmp2, utmp3, utmp4);
603 
604 			state->strength_en = 1;
605 		} else {
606 			/* Signal strength is not supported */
607 			state->strength_en = 2;
608 			break;
609 		}
610 		/* Fall through */
611 	case 1:
612 		if (time_is_after_jiffies(state->strength_jiffies + msecs_to_jiffies(2000)))
613 			break;
614 
615 		/* Read value */
616 		ret = regmap_bulk_read(state->regmap, 0xd07c, buf, 2);
617 		if (ret)
618 			goto err;
619 
620 		/*
621 		 * Construct line equation from tuner dependent -80/-50 dBm agc
622 		 * limits and use it to map current agc value to dBm estimate
623 		 */
624 		#define agc_gain (buf[0] + buf[1])
625 		#define agc_gain_50dbm (state->rf_agc_50 + state->if_agc_50)
626 		#define agc_gain_80dbm (state->rf_agc_80 + state->if_agc_80)
627 		stmp1 = 30000 * (agc_gain - agc_gain_80dbm) /
628 			(agc_gain_50dbm - agc_gain_80dbm) - 80000;
629 
630 		dev_dbg(&client->dev,
631 			"strength %d, agc_gain %d, agc_gain_50dbm %d, agc_gain_80dbm %d\n",
632 			stmp1, agc_gain, agc_gain_50dbm, agc_gain_80dbm);
633 
634 		state->strength_jiffies = jiffies;
635 		/* Convert [-90, -30] dBm to [0x0000, 0xffff] for dvbv3 */
636 		utmp1 = clamp(stmp1 + 90000, 0, 60000);
637 		state->dvbv3_strength = div_u64((u64)utmp1 * 0xffff, 60000);
638 
639 		c->strength.stat[0].scale = FE_SCALE_DECIBEL;
640 		c->strength.stat[0].svalue = stmp1;
641 		break;
642 	default:
643 		c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
644 		break;
645 	}
646 
647 	/* CNR */
648 	switch (state->fe_status & FE_HAS_VITERBI) {
649 	case FE_HAS_VITERBI:
650 		if (time_is_after_jiffies(state->cnr_jiffies + msecs_to_jiffies(2000)))
651 			break;
652 
653 		/* Check if cnr ready */
654 		ret = regmap_read(state->regmap, 0xd2e1, &utmp);
655 		if (ret)
656 			goto err;
657 
658 		if (!((utmp >> 3) & 0x01)) {
659 			dev_dbg(&client->dev, "cnr not ready\n");
660 			break;
661 		}
662 
663 		/* Read value */
664 		ret = regmap_bulk_read(state->regmap, 0xd2e3, buf, 3);
665 		if (ret)
666 			goto err;
667 
668 		utmp1 = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
669 
670 		/* Read current modulation */
671 		ret = regmap_read(state->regmap, 0xd3c1, &utmp);
672 		if (ret)
673 			goto err;
674 
675 		switch ((utmp >> 6) & 3) {
676 		case 0:
677 			/*
678 			 * QPSK
679 			 * CNR[dB] 13 * -log10((1690000 - value) / value) + 2.6
680 			 * value [653799, 1689999], 2.6 / 13 = 3355443
681 			 */
682 			utmp1 = clamp(utmp1, 653799U, 1689999U);
683 			utmp1 = ((u64)(intlog10(utmp1)
684 				- intlog10(1690000 - utmp1)
685 				+ 3355443) * 13 * 1000) >> 24;
686 			break;
687 		case 1:
688 			/*
689 			 * QAM-16
690 			 * CNR[dB] 6 * log10((value - 370000) / (828000 - value)) + 15.7
691 			 * value [371105, 827999], 15.7 / 6 = 43900382
692 			 */
693 			utmp1 = clamp(utmp1, 371105U, 827999U);
694 			utmp1 = ((u64)(intlog10(utmp1 - 370000)
695 				- intlog10(828000 - utmp1)
696 				+ 43900382) * 6 * 1000) >> 24;
697 			break;
698 		case 2:
699 			/*
700 			 * QAM-64
701 			 * CNR[dB] 8 * log10((value - 193000) / (425000 - value)) + 23.8
702 			 * value [193246, 424999], 23.8 / 8 = 49912218
703 			 */
704 			utmp1 = clamp(utmp1, 193246U, 424999U);
705 			utmp1 = ((u64)(intlog10(utmp1 - 193000)
706 				- intlog10(425000 - utmp1)
707 				+ 49912218) * 8 * 1000) >> 24;
708 			break;
709 		default:
710 			dev_dbg(&client->dev, "invalid modulation %u\n",
711 				(utmp >> 6) & 3);
712 			utmp1 = 0;
713 			break;
714 		}
715 
716 		dev_dbg(&client->dev, "cnr %u\n", utmp1);
717 
718 		state->cnr_jiffies = jiffies;
719 		state->dvbv3_snr = utmp1 / 100;
720 
721 		c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
722 		c->cnr.stat[0].svalue = utmp1;
723 		break;
724 	default:
725 		c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
726 		break;
727 	}
728 
729 	/* BER / PER */
730 	switch (state->fe_status & FE_HAS_SYNC) {
731 	case FE_HAS_SYNC:
732 		if (time_is_after_jiffies(state->ber_ucb_jiffies + msecs_to_jiffies(2000)))
733 			break;
734 
735 		/* Check if ber / ucb is ready */
736 		ret = regmap_read(state->regmap, 0xd391, &utmp);
737 		if (ret)
738 			goto err;
739 
740 		if (!((utmp >> 4) & 0x01)) {
741 			dev_dbg(&client->dev, "ber not ready\n");
742 			break;
743 		}
744 
745 		/* Read value */
746 		ret = regmap_bulk_read(state->regmap, 0xd385, buf, 7);
747 		if (ret)
748 			goto err;
749 
750 		utmp1 = buf[4] << 16 | buf[3] << 8 | buf[2] << 0;
751 		utmp2 = (buf[1] << 8 | buf[0] << 0) * 204 * 8;
752 		utmp3 = buf[6] << 8 | buf[5] << 0;
753 		utmp4 = buf[1] << 8 | buf[0] << 0;
754 
755 		/* Use 10000 TS packets for measure */
756 		if (utmp4 != 10000) {
757 			buf[0] = (10000 >> 0) & 0xff;
758 			buf[1] = (10000 >> 8) & 0xff;
759 			ret = regmap_bulk_write(state->regmap, 0xd385, buf, 2);
760 			if (ret)
761 				goto err;
762 		}
763 
764 		/* Reset ber / ucb counter */
765 		ret = regmap_update_bits(state->regmap, 0xd391, 0x20, 0x20);
766 		if (ret)
767 			goto err;
768 
769 		dev_dbg(&client->dev, "post_bit_error %u, post_bit_count %u\n",
770 			utmp1, utmp2);
771 		dev_dbg(&client->dev, "block_error %u, block_count %u\n",
772 			utmp3, utmp4);
773 
774 		state->ber_ucb_jiffies = jiffies;
775 		state->dvbv3_ber = utmp1;
776 		state->dvbv3_ucblocks += utmp3;
777 
778 		c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
779 		c->post_bit_error.stat[0].uvalue += utmp1;
780 		c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
781 		c->post_bit_count.stat[0].uvalue += utmp2;
782 
783 		c->block_error.stat[0].scale = FE_SCALE_COUNTER;
784 		c->block_error.stat[0].uvalue += utmp3;
785 		c->block_count.stat[0].scale = FE_SCALE_COUNTER;
786 		c->block_count.stat[0].uvalue += utmp4;
787 		break;
788 	default:
789 		c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
790 		c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
791 
792 		c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
793 		c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
794 		break;
795 	}
796 
797 	return 0;
798 err:
799 	dev_dbg(&client->dev, "failed %d\n", ret);
800 	return ret;
801 }
802 
803 static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
804 {
805 	struct af9013_state *state = fe->demodulator_priv;
806 
807 	*snr = state->dvbv3_snr;
808 
809 	return 0;
810 }
811 
812 static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
813 {
814 	struct af9013_state *state = fe->demodulator_priv;
815 
816 	*strength = state->dvbv3_strength;
817 
818 	return 0;
819 }
820 
821 static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
822 {
823 	struct af9013_state *state = fe->demodulator_priv;
824 
825 	*ber = state->dvbv3_ber;
826 
827 	return 0;
828 }
829 
830 static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
831 {
832 	struct af9013_state *state = fe->demodulator_priv;
833 
834 	*ucblocks = state->dvbv3_ucblocks;
835 
836 	return 0;
837 }
838 
839 static int af9013_init(struct dvb_frontend *fe)
840 {
841 	struct af9013_state *state = fe->demodulator_priv;
842 	struct i2c_client *client = state->client;
843 	int ret, i, len;
844 	unsigned int utmp;
845 	u8 buf[3];
846 	const struct af9013_reg_mask_val *tab;
847 
848 	dev_dbg(&client->dev, "\n");
849 
850 	/* ADC on */
851 	ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x00);
852 	if (ret)
853 		goto err;
854 
855 	/* Clear reset */
856 	ret = regmap_update_bits(state->regmap, 0xd417, 0x02, 0x00);
857 	if (ret)
858 		goto err;
859 
860 	/* Disable reset */
861 	ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x00);
862 	if (ret)
863 		goto err;
864 
865 	/* write API version to firmware */
866 	ret = regmap_bulk_write(state->regmap, 0x9bf2, state->api_version, 4);
867 	if (ret)
868 		goto err;
869 
870 	/* program ADC control */
871 	switch (state->clk) {
872 	case 28800000: /* 28.800 MHz */
873 		utmp = 0;
874 		break;
875 	case 20480000: /* 20.480 MHz */
876 		utmp = 1;
877 		break;
878 	case 28000000: /* 28.000 MHz */
879 		utmp = 2;
880 		break;
881 	case 25000000: /* 25.000 MHz */
882 		utmp = 3;
883 		break;
884 	default:
885 		ret = -EINVAL;
886 		goto err;
887 	}
888 
889 	ret = regmap_update_bits(state->regmap, 0x9bd2, 0x0f, utmp);
890 	if (ret)
891 		goto err;
892 
893 	utmp = div_u64((u64)state->clk * 0x80000, 1000000);
894 	buf[0] = (utmp >>  0) & 0xff;
895 	buf[1] = (utmp >>  8) & 0xff;
896 	buf[2] = (utmp >> 16) & 0xff;
897 	ret = regmap_bulk_write(state->regmap, 0xd180, buf, 3);
898 	if (ret)
899 		goto err;
900 
901 	/* Demod core settings */
902 	dev_dbg(&client->dev, "load demod core settings\n");
903 	len = ARRAY_SIZE(demod_init_tab);
904 	tab = demod_init_tab;
905 	for (i = 0; i < len; i++) {
906 		ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
907 					 tab[i].val);
908 		if (ret)
909 			goto err;
910 	}
911 
912 	/* Demod tuner specific settings */
913 	dev_dbg(&client->dev, "load tuner specific settings\n");
914 	switch (state->tuner) {
915 	case AF9013_TUNER_MXL5003D:
916 		len = ARRAY_SIZE(tuner_init_tab_mxl5003d);
917 		tab = tuner_init_tab_mxl5003d;
918 		break;
919 	case AF9013_TUNER_MXL5005D:
920 	case AF9013_TUNER_MXL5005R:
921 	case AF9013_TUNER_MXL5007T:
922 		len = ARRAY_SIZE(tuner_init_tab_mxl5005);
923 		tab = tuner_init_tab_mxl5005;
924 		break;
925 	case AF9013_TUNER_ENV77H11D5:
926 		len = ARRAY_SIZE(tuner_init_tab_env77h11d5);
927 		tab = tuner_init_tab_env77h11d5;
928 		break;
929 	case AF9013_TUNER_MT2060:
930 		len = ARRAY_SIZE(tuner_init_tab_mt2060);
931 		tab = tuner_init_tab_mt2060;
932 		break;
933 	case AF9013_TUNER_MC44S803:
934 		len = ARRAY_SIZE(tuner_init_tab_mc44s803);
935 		tab = tuner_init_tab_mc44s803;
936 		break;
937 	case AF9013_TUNER_QT1010:
938 	case AF9013_TUNER_QT1010A:
939 		len = ARRAY_SIZE(tuner_init_tab_qt1010);
940 		tab = tuner_init_tab_qt1010;
941 		break;
942 	case AF9013_TUNER_MT2060_2:
943 		len = ARRAY_SIZE(tuner_init_tab_mt2060_2);
944 		tab = tuner_init_tab_mt2060_2;
945 		break;
946 	case AF9013_TUNER_TDA18271:
947 	case AF9013_TUNER_TDA18218:
948 		len = ARRAY_SIZE(tuner_init_tab_tda18271);
949 		tab = tuner_init_tab_tda18271;
950 		break;
951 	case AF9013_TUNER_UNKNOWN:
952 	default:
953 		len = ARRAY_SIZE(tuner_init_tab_unknown);
954 		tab = tuner_init_tab_unknown;
955 		break;
956 	}
957 
958 	for (i = 0; i < len; i++) {
959 		ret = regmap_update_bits(state->regmap, tab[i].reg, tab[i].mask,
960 					 tab[i].val);
961 		if (ret)
962 			goto err;
963 	}
964 
965 	/* TS interface */
966 	if (state->ts_output_pin == 7)
967 		utmp = 1 << 3 | state->ts_mode << 1;
968 	else
969 		utmp = 0 << 3 | state->ts_mode << 1;
970 	ret = regmap_update_bits(state->regmap, 0xd500, 0x0e, utmp);
971 	if (ret)
972 		goto err;
973 
974 	/* enable lock led */
975 	ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x01);
976 	if (ret)
977 		goto err;
978 
979 	state->first_tune = true;
980 
981 	return 0;
982 err:
983 	dev_dbg(&client->dev, "failed %d\n", ret);
984 	return ret;
985 }
986 
987 static int af9013_sleep(struct dvb_frontend *fe)
988 {
989 	struct af9013_state *state = fe->demodulator_priv;
990 	struct i2c_client *client = state->client;
991 	int ret;
992 	unsigned int utmp;
993 
994 	dev_dbg(&client->dev, "\n");
995 
996 	/* disable lock led */
997 	ret = regmap_update_bits(state->regmap, 0xd730, 0x01, 0x00);
998 	if (ret)
999 		goto err;
1000 
1001 	/* Enable reset */
1002 	ret = regmap_update_bits(state->regmap, 0xd417, 0x10, 0x10);
1003 	if (ret)
1004 		goto err;
1005 
1006 	/* Start reset execution */
1007 	ret = regmap_write(state->regmap, 0xaeff, 0x01);
1008 	if (ret)
1009 		goto err;
1010 
1011 	/* Wait reset performs */
1012 	ret = regmap_read_poll_timeout(state->regmap, 0xd417, utmp,
1013 				       (utmp >> 1) & 0x01, 5000, 1000000);
1014 	if (ret)
1015 		goto err;
1016 
1017 	if (!((utmp >> 1) & 0x01)) {
1018 		ret = -ETIMEDOUT;
1019 		goto err;
1020 	}
1021 
1022 	/* ADC off */
1023 	ret = regmap_update_bits(state->regmap, 0xd73a, 0x08, 0x08);
1024 	if (ret)
1025 		goto err;
1026 
1027 	return 0;
1028 err:
1029 	dev_dbg(&client->dev, "failed %d\n", ret);
1030 	return ret;
1031 }
1032 
1033 static const struct dvb_frontend_ops af9013_ops;
1034 
1035 static int af9013_download_firmware(struct af9013_state *state)
1036 {
1037 	struct i2c_client *client = state->client;
1038 	int ret, i, len, rem;
1039 	unsigned int utmp;
1040 	u8 buf[4];
1041 	u16 checksum = 0;
1042 	const struct firmware *firmware;
1043 	const char *name = AF9013_FIRMWARE;
1044 
1045 	dev_dbg(&client->dev, "\n");
1046 
1047 	/* Check whether firmware is already running */
1048 	ret = regmap_read(state->regmap, 0x98be, &utmp);
1049 	if (ret)
1050 		goto err;
1051 
1052 	dev_dbg(&client->dev, "firmware status %02x\n", utmp);
1053 
1054 	if (utmp == 0x0c)
1055 		return 0;
1056 
1057 	dev_info(&client->dev, "found a '%s' in cold state, will try to load a firmware\n",
1058 		 af9013_ops.info.name);
1059 
1060 	/* Request the firmware, will block and timeout */
1061 	ret = request_firmware(&firmware, name, &client->dev);
1062 	if (ret) {
1063 		dev_info(&client->dev, "firmware file '%s' not found %d\n",
1064 			 name, ret);
1065 		goto err;
1066 	}
1067 
1068 	dev_info(&client->dev, "downloading firmware from file '%s'\n",
1069 		 name);
1070 
1071 	/* Write firmware checksum & size */
1072 	for (i = 0; i < firmware->size; i++)
1073 		checksum += firmware->data[i];
1074 
1075 	buf[0] = (checksum >> 8) & 0xff;
1076 	buf[1] = (checksum >> 0) & 0xff;
1077 	buf[2] = (firmware->size >> 8) & 0xff;
1078 	buf[3] = (firmware->size >> 0) & 0xff;
1079 	ret = regmap_bulk_write(state->regmap, 0x50fc, buf, 4);
1080 	if (ret)
1081 		goto err_release_firmware;
1082 
1083 	/* Download firmware */
1084 	#define LEN_MAX 16
1085 	for (rem = firmware->size; rem > 0; rem -= LEN_MAX) {
1086 		len = min(LEN_MAX, rem);
1087 		ret = regmap_bulk_write(state->regmap,
1088 					0x5100 + firmware->size - rem,
1089 					&firmware->data[firmware->size - rem],
1090 					len);
1091 		if (ret) {
1092 			dev_err(&client->dev, "firmware download failed %d\n",
1093 				ret);
1094 			goto err_release_firmware;
1095 		}
1096 	}
1097 
1098 	release_firmware(firmware);
1099 
1100 	/* Boot firmware */
1101 	ret = regmap_write(state->regmap, 0xe205, 0x01);
1102 	if (ret)
1103 		goto err;
1104 
1105 	/* Check firmware status. 0c=OK, 04=fail */
1106 	ret = regmap_read_poll_timeout(state->regmap, 0x98be, utmp,
1107 				       (utmp == 0x0c || utmp == 0x04),
1108 				       5000, 1000000);
1109 	if (ret)
1110 		goto err;
1111 
1112 	dev_dbg(&client->dev, "firmware status %02x\n", utmp);
1113 
1114 	if (utmp == 0x04) {
1115 		ret = -ENODEV;
1116 		dev_err(&client->dev, "firmware did not run\n");
1117 		goto err;
1118 	} else if (utmp != 0x0c) {
1119 		ret = -ENODEV;
1120 		dev_err(&client->dev, "firmware boot timeout\n");
1121 		goto err;
1122 	}
1123 
1124 	dev_info(&client->dev, "found a '%s' in warm state\n",
1125 		 af9013_ops.info.name);
1126 
1127 	return 0;
1128 err_release_firmware:
1129 	release_firmware(firmware);
1130 err:
1131 	dev_dbg(&client->dev, "failed %d\n", ret);
1132 	return ret;
1133 }
1134 
1135 static const struct dvb_frontend_ops af9013_ops = {
1136 	.delsys = { SYS_DVBT },
1137 	.info = {
1138 		.name = "Afatech AF9013",
1139 		.frequency_min_hz = 174 * MHz,
1140 		.frequency_max_hz = 862 * MHz,
1141 		.frequency_stepsize_hz = 250 * kHz,
1142 		.caps =	FE_CAN_FEC_1_2 |
1143 			FE_CAN_FEC_2_3 |
1144 			FE_CAN_FEC_3_4 |
1145 			FE_CAN_FEC_5_6 |
1146 			FE_CAN_FEC_7_8 |
1147 			FE_CAN_FEC_AUTO |
1148 			FE_CAN_QPSK |
1149 			FE_CAN_QAM_16 |
1150 			FE_CAN_QAM_64 |
1151 			FE_CAN_QAM_AUTO |
1152 			FE_CAN_TRANSMISSION_MODE_AUTO |
1153 			FE_CAN_GUARD_INTERVAL_AUTO |
1154 			FE_CAN_HIERARCHY_AUTO |
1155 			FE_CAN_RECOVER |
1156 			FE_CAN_MUTE_TS
1157 	},
1158 
1159 	.init = af9013_init,
1160 	.sleep = af9013_sleep,
1161 
1162 	.get_tune_settings = af9013_get_tune_settings,
1163 	.set_frontend = af9013_set_frontend,
1164 	.get_frontend = af9013_get_frontend,
1165 
1166 	.read_status = af9013_read_status,
1167 	.read_snr = af9013_read_snr,
1168 	.read_signal_strength = af9013_read_signal_strength,
1169 	.read_ber = af9013_read_ber,
1170 	.read_ucblocks = af9013_read_ucblocks,
1171 };
1172 
1173 static int af9013_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
1174 {
1175 	struct af9013_state *state = fe->demodulator_priv;
1176 	struct i2c_client *client = state->client;
1177 	int ret;
1178 
1179 	dev_dbg(&client->dev, "onoff %d\n", onoff);
1180 
1181 	ret = regmap_update_bits(state->regmap, 0xd503, 0x01, onoff);
1182 	if (ret)
1183 		goto err;
1184 
1185 	return 0;
1186 err:
1187 	dev_dbg(&client->dev, "failed %d\n", ret);
1188 	return ret;
1189 }
1190 
1191 static int af9013_pid_filter(struct dvb_frontend *fe, u8 index, u16 pid,
1192 			     int onoff)
1193 {
1194 	struct af9013_state *state = fe->demodulator_priv;
1195 	struct i2c_client *client = state->client;
1196 	int ret;
1197 	u8 buf[2];
1198 
1199 	dev_dbg(&client->dev, "index %d, pid %04x, onoff %d\n",
1200 		index, pid, onoff);
1201 
1202 	if (pid > 0x1fff) {
1203 		/* 0x2000 is kernel virtual pid for whole ts (all pids) */
1204 		ret = 0;
1205 		goto err;
1206 	}
1207 
1208 	buf[0] = (pid >> 0) & 0xff;
1209 	buf[1] = (pid >> 8) & 0xff;
1210 	ret = regmap_bulk_write(state->regmap, 0xd505, buf, 2);
1211 	if (ret)
1212 		goto err;
1213 	ret = regmap_write(state->regmap, 0xd504, onoff << 5 | index << 0);
1214 	if (ret)
1215 		goto err;
1216 
1217 	return 0;
1218 err:
1219 	dev_dbg(&client->dev, "failed %d\n", ret);
1220 	return ret;
1221 }
1222 
1223 static struct dvb_frontend *af9013_get_dvb_frontend(struct i2c_client *client)
1224 {
1225 	struct af9013_state *state = i2c_get_clientdata(client);
1226 
1227 	dev_dbg(&client->dev, "\n");
1228 
1229 	return &state->fe;
1230 }
1231 
1232 static struct i2c_adapter *af9013_get_i2c_adapter(struct i2c_client *client)
1233 {
1234 	struct af9013_state *state = i2c_get_clientdata(client);
1235 
1236 	dev_dbg(&client->dev, "\n");
1237 
1238 	return state->muxc->adapter[0];
1239 }
1240 
1241 /*
1242  * XXX: Hackish solution. We use virtual register, reg bit 16, to carry info
1243  * about i2c adapter locking. Own locking is needed because i2c mux call has
1244  * already locked i2c adapter.
1245  */
1246 static int af9013_select(struct i2c_mux_core *muxc, u32 chan)
1247 {
1248 	struct af9013_state *state = i2c_mux_priv(muxc);
1249 	struct i2c_client *client = state->client;
1250 	int ret;
1251 
1252 	dev_dbg(&client->dev, "\n");
1253 
1254 	if (state->ts_mode == AF9013_TS_MODE_USB)
1255 		ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x08);
1256 	else
1257 		ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x04);
1258 	if (ret)
1259 		goto err;
1260 
1261 	return 0;
1262 err:
1263 	dev_dbg(&client->dev, "failed %d\n", ret);
1264 	return ret;
1265 }
1266 
1267 static int af9013_deselect(struct i2c_mux_core *muxc, u32 chan)
1268 {
1269 	struct af9013_state *state = i2c_mux_priv(muxc);
1270 	struct i2c_client *client = state->client;
1271 	int ret;
1272 
1273 	dev_dbg(&client->dev, "\n");
1274 
1275 	if (state->ts_mode == AF9013_TS_MODE_USB)
1276 		ret = regmap_update_bits(state->regmap, 0x1d417, 0x08, 0x00);
1277 	else
1278 		ret = regmap_update_bits(state->regmap, 0x1d607, 0x04, 0x00);
1279 	if (ret)
1280 		goto err;
1281 
1282 	return 0;
1283 err:
1284 	dev_dbg(&client->dev, "failed %d\n", ret);
1285 	return ret;
1286 }
1287 
1288 /* Own I2C access routines needed for regmap as chip uses extra command byte */
1289 static int af9013_wregs(struct i2c_client *client, u8 cmd, u16 reg,
1290 			const u8 *val, int len, u8 lock)
1291 {
1292 	int ret;
1293 	u8 buf[21];
1294 	struct i2c_msg msg[1] = {
1295 		{
1296 			.addr = client->addr,
1297 			.flags = 0,
1298 			.len = 3 + len,
1299 			.buf = buf,
1300 		}
1301 	};
1302 
1303 	if (3 + len > sizeof(buf)) {
1304 		ret = -EINVAL;
1305 		goto err;
1306 	}
1307 
1308 	buf[0] = (reg >> 8) & 0xff;
1309 	buf[1] = (reg >> 0) & 0xff;
1310 	buf[2] = cmd;
1311 	memcpy(&buf[3], val, len);
1312 
1313 	if (lock)
1314 		i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
1315 	ret = __i2c_transfer(client->adapter, msg, 1);
1316 	if (lock)
1317 		i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
1318 	if (ret < 0) {
1319 		goto err;
1320 	} else if (ret != 1) {
1321 		ret = -EREMOTEIO;
1322 		goto err;
1323 	}
1324 
1325 	return 0;
1326 err:
1327 	dev_dbg(&client->dev, "failed %d\n", ret);
1328 	return ret;
1329 }
1330 
1331 static int af9013_rregs(struct i2c_client *client, u8 cmd, u16 reg,
1332 			u8 *val, int len, u8 lock)
1333 {
1334 	int ret;
1335 	u8 buf[3];
1336 	struct i2c_msg msg[2] = {
1337 		{
1338 			.addr = client->addr,
1339 			.flags = 0,
1340 			.len = 3,
1341 			.buf = buf,
1342 		}, {
1343 			.addr = client->addr,
1344 			.flags = I2C_M_RD,
1345 			.len = len,
1346 			.buf = val,
1347 		}
1348 	};
1349 
1350 	buf[0] = (reg >> 8) & 0xff;
1351 	buf[1] = (reg >> 0) & 0xff;
1352 	buf[2] = cmd;
1353 
1354 	if (lock)
1355 		i2c_lock_bus(client->adapter, I2C_LOCK_SEGMENT);
1356 	ret = __i2c_transfer(client->adapter, msg, 2);
1357 	if (lock)
1358 		i2c_unlock_bus(client->adapter, I2C_LOCK_SEGMENT);
1359 	if (ret < 0) {
1360 		goto err;
1361 	} else if (ret != 2) {
1362 		ret = -EREMOTEIO;
1363 		goto err;
1364 	}
1365 
1366 	return 0;
1367 err:
1368 	dev_dbg(&client->dev, "failed %d\n", ret);
1369 	return ret;
1370 }
1371 
1372 static int af9013_regmap_write(void *context, const void *data, size_t count)
1373 {
1374 	struct i2c_client *client = context;
1375 	struct af9013_state *state = i2c_get_clientdata(client);
1376 	int ret, i;
1377 	u8 cmd;
1378 	u8 lock = !((u8 *)data)[0];
1379 	u16 reg = ((u8 *)data)[1] << 8 | ((u8 *)data)[2] << 0;
1380 	u8 *val = &((u8 *)data)[3];
1381 	const unsigned int len = count - 3;
1382 
1383 	if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
1384 		cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|1 << 0;
1385 		ret = af9013_wregs(client, cmd, reg, val, len, lock);
1386 		if (ret)
1387 			goto err;
1388 	} else if (reg >= 0x5100 && reg < 0x8fff) {
1389 		/* Firmware download */
1390 		cmd = 1 << 7|1 << 6|(len - 1) << 2|1 << 1|1 << 0;
1391 		ret = af9013_wregs(client, cmd, reg, val, len, lock);
1392 		if (ret)
1393 			goto err;
1394 	} else {
1395 		cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|1 << 0;
1396 		for (i = 0; i < len; i++) {
1397 			ret = af9013_wregs(client, cmd, reg + i, val + i, 1,
1398 					   lock);
1399 			if (ret)
1400 				goto err;
1401 		}
1402 	}
1403 
1404 	return 0;
1405 err:
1406 	dev_dbg(&client->dev, "failed %d\n", ret);
1407 	return ret;
1408 }
1409 
1410 static int af9013_regmap_read(void *context, const void *reg_buf,
1411 			      size_t reg_size, void *val_buf, size_t val_size)
1412 {
1413 	struct i2c_client *client = context;
1414 	struct af9013_state *state = i2c_get_clientdata(client);
1415 	int ret, i;
1416 	u8 cmd;
1417 	u8 lock = !((u8 *)reg_buf)[0];
1418 	u16 reg = ((u8 *)reg_buf)[1] << 8 | ((u8 *)reg_buf)[2] << 0;
1419 	u8 *val = &((u8 *)val_buf)[0];
1420 	const unsigned int len = val_size;
1421 
1422 	if (state->ts_mode == AF9013_TS_MODE_USB && (reg & 0xff00) != 0xae00) {
1423 		cmd = 0 << 7|0 << 6|(len - 1) << 2|1 << 1|0 << 0;
1424 		ret = af9013_rregs(client, cmd, reg, val_buf, len, lock);
1425 		if (ret)
1426 			goto err;
1427 	} else {
1428 		cmd = 0 << 7|0 << 6|(1 - 1) << 2|1 << 1|0 << 0;
1429 		for (i = 0; i < len; i++) {
1430 			ret = af9013_rregs(client, cmd, reg + i, val + i, 1,
1431 					   lock);
1432 			if (ret)
1433 				goto err;
1434 		}
1435 	}
1436 
1437 	return 0;
1438 err:
1439 	dev_dbg(&client->dev, "failed %d\n", ret);
1440 	return ret;
1441 }
1442 
1443 static int af9013_probe(struct i2c_client *client,
1444 			const struct i2c_device_id *id)
1445 {
1446 	struct af9013_state *state;
1447 	struct af9013_platform_data *pdata = client->dev.platform_data;
1448 	struct dtv_frontend_properties *c;
1449 	int ret, i;
1450 	u8 firmware_version[4];
1451 	static const struct regmap_bus regmap_bus = {
1452 		.read = af9013_regmap_read,
1453 		.write = af9013_regmap_write,
1454 	};
1455 	static const struct regmap_config regmap_config = {
1456 		/* Actual reg is 16 bits, see i2c adapter lock */
1457 		.reg_bits = 24,
1458 		.val_bits = 8,
1459 	};
1460 
1461 	state = kzalloc(sizeof(*state), GFP_KERNEL);
1462 	if (!state) {
1463 		ret = -ENOMEM;
1464 		goto err;
1465 	}
1466 
1467 	dev_dbg(&client->dev, "\n");
1468 
1469 	/* Setup the state */
1470 	state->client = client;
1471 	i2c_set_clientdata(client, state);
1472 	state->clk = pdata->clk;
1473 	state->tuner = pdata->tuner;
1474 	state->if_frequency = pdata->if_frequency;
1475 	state->ts_mode = pdata->ts_mode;
1476 	state->ts_output_pin = pdata->ts_output_pin;
1477 	state->spec_inv = pdata->spec_inv;
1478 	memcpy(&state->api_version, pdata->api_version, sizeof(state->api_version));
1479 	memcpy(&state->gpio, pdata->gpio, sizeof(state->gpio));
1480 	state->regmap = regmap_init(&client->dev, &regmap_bus, client,
1481 				  &regmap_config);
1482 	if (IS_ERR(state->regmap)) {
1483 		ret = PTR_ERR(state->regmap);
1484 		goto err_kfree;
1485 	}
1486 	/* Create mux i2c adapter */
1487 	state->muxc = i2c_mux_alloc(client->adapter, &client->dev, 1, 0, 0,
1488 				    af9013_select, af9013_deselect);
1489 	if (!state->muxc) {
1490 		ret = -ENOMEM;
1491 		goto err_regmap_exit;
1492 	}
1493 	state->muxc->priv = state;
1494 	ret = i2c_mux_add_adapter(state->muxc, 0, 0, 0);
1495 	if (ret)
1496 		goto err_regmap_exit;
1497 
1498 	/* Download firmware */
1499 	if (state->ts_mode != AF9013_TS_MODE_USB) {
1500 		ret = af9013_download_firmware(state);
1501 		if (ret)
1502 			goto err_i2c_mux_del_adapters;
1503 	}
1504 
1505 	/* Firmware version */
1506 	ret = regmap_bulk_read(state->regmap, 0x5103, firmware_version,
1507 			       sizeof(firmware_version));
1508 	if (ret)
1509 		goto err_i2c_mux_del_adapters;
1510 
1511 	/* Set GPIOs */
1512 	for (i = 0; i < sizeof(state->gpio); i++) {
1513 		ret = af9013_set_gpio(state, i, state->gpio[i]);
1514 		if (ret)
1515 			goto err_i2c_mux_del_adapters;
1516 	}
1517 
1518 	/* Create dvb frontend */
1519 	memcpy(&state->fe.ops, &af9013_ops, sizeof(state->fe.ops));
1520 	state->fe.demodulator_priv = state;
1521 
1522 	/* Setup callbacks */
1523 	pdata->get_dvb_frontend = af9013_get_dvb_frontend;
1524 	pdata->get_i2c_adapter = af9013_get_i2c_adapter;
1525 	pdata->pid_filter = af9013_pid_filter;
1526 	pdata->pid_filter_ctrl = af9013_pid_filter_ctrl;
1527 
1528 	/* Init stats to indicate which stats are supported */
1529 	c = &state->fe.dtv_property_cache;
1530 	c->strength.len = 1;
1531 	c->cnr.len = 1;
1532 	c->post_bit_error.len = 1;
1533 	c->post_bit_count.len = 1;
1534 	c->block_error.len = 1;
1535 	c->block_count.len = 1;
1536 
1537 	dev_info(&client->dev, "Afatech AF9013 successfully attached\n");
1538 	dev_info(&client->dev, "firmware version: %d.%d.%d.%d\n",
1539 		 firmware_version[0], firmware_version[1],
1540 		 firmware_version[2], firmware_version[3]);
1541 	return 0;
1542 err_i2c_mux_del_adapters:
1543 	i2c_mux_del_adapters(state->muxc);
1544 err_regmap_exit:
1545 	regmap_exit(state->regmap);
1546 err_kfree:
1547 	kfree(state);
1548 err:
1549 	dev_dbg(&client->dev, "failed %d\n", ret);
1550 	return ret;
1551 }
1552 
1553 static int af9013_remove(struct i2c_client *client)
1554 {
1555 	struct af9013_state *state = i2c_get_clientdata(client);
1556 
1557 	dev_dbg(&client->dev, "\n");
1558 
1559 	i2c_mux_del_adapters(state->muxc);
1560 
1561 	regmap_exit(state->regmap);
1562 
1563 	kfree(state);
1564 
1565 	return 0;
1566 }
1567 
1568 static const struct i2c_device_id af9013_id_table[] = {
1569 	{"af9013", 0},
1570 	{}
1571 };
1572 MODULE_DEVICE_TABLE(i2c, af9013_id_table);
1573 
1574 static struct i2c_driver af9013_driver = {
1575 	.driver = {
1576 		.name	= "af9013",
1577 		.suppress_bind_attrs = true,
1578 	},
1579 	.probe		= af9013_probe,
1580 	.remove		= af9013_remove,
1581 	.id_table	= af9013_id_table,
1582 };
1583 
1584 module_i2c_driver(af9013_driver);
1585 
1586 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1587 MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1588 MODULE_LICENSE("GPL");
1589 MODULE_FIRMWARE(AF9013_FIRMWARE);
1590