xref: /linux/drivers/media/common/b2c2/flexcop-reg.h (revision 5afc9a25be8d4e627cf07aa8a7500eafe3664b94)
13785bc17SMauro Carvalho Chehab /*
23785bc17SMauro Carvalho Chehab  * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
33785bc17SMauro Carvalho Chehab  * flexcop-reg.h - register abstraction for FlexCopII, FlexCopIIb and FlexCopIII
43785bc17SMauro Carvalho Chehab  * see flexcop.c for copyright information
53785bc17SMauro Carvalho Chehab  */
63785bc17SMauro Carvalho Chehab #ifndef __FLEXCOP_REG_H__
73785bc17SMauro Carvalho Chehab #define __FLEXCOP_REG_H__
83785bc17SMauro Carvalho Chehab 
93785bc17SMauro Carvalho Chehab typedef enum {
103785bc17SMauro Carvalho Chehab 	FLEXCOP_UNK = 0,
113785bc17SMauro Carvalho Chehab 	FLEXCOP_II,
123785bc17SMauro Carvalho Chehab 	FLEXCOP_IIB,
133785bc17SMauro Carvalho Chehab 	FLEXCOP_III,
143785bc17SMauro Carvalho Chehab } flexcop_revision_t;
153785bc17SMauro Carvalho Chehab 
163785bc17SMauro Carvalho Chehab typedef enum {
173785bc17SMauro Carvalho Chehab 	FC_UNK = 0,
183785bc17SMauro Carvalho Chehab 	FC_CABLE,
193785bc17SMauro Carvalho Chehab 	FC_AIR_DVBT,
203785bc17SMauro Carvalho Chehab 	FC_AIR_ATSC1,
213785bc17SMauro Carvalho Chehab 	FC_AIR_ATSC2,
223785bc17SMauro Carvalho Chehab 	FC_AIR_ATSC3,
233785bc17SMauro Carvalho Chehab 	FC_SKY_REV23,
243785bc17SMauro Carvalho Chehab 	FC_SKY_REV26,
253785bc17SMauro Carvalho Chehab 	FC_SKY_REV27,
263785bc17SMauro Carvalho Chehab 	FC_SKY_REV28,
27*5afc9a25SJemma Denson 	FC_SKYS2_REV33,
283785bc17SMauro Carvalho Chehab } flexcop_device_type_t;
293785bc17SMauro Carvalho Chehab 
303785bc17SMauro Carvalho Chehab typedef enum {
313785bc17SMauro Carvalho Chehab 	FC_USB = 0,
323785bc17SMauro Carvalho Chehab 	FC_PCI,
333785bc17SMauro Carvalho Chehab } flexcop_bus_t;
343785bc17SMauro Carvalho Chehab 
353785bc17SMauro Carvalho Chehab /* FlexCop IBI Registers */
363785bc17SMauro Carvalho Chehab #if defined(__LITTLE_ENDIAN)
373785bc17SMauro Carvalho Chehab #include "flexcop_ibi_value_le.h"
383785bc17SMauro Carvalho Chehab #else
393785bc17SMauro Carvalho Chehab #if defined(__BIG_ENDIAN)
403785bc17SMauro Carvalho Chehab #include "flexcop_ibi_value_be.h"
413785bc17SMauro Carvalho Chehab #else
423785bc17SMauro Carvalho Chehab #error no endian defined
433785bc17SMauro Carvalho Chehab #endif
443785bc17SMauro Carvalho Chehab #endif
453785bc17SMauro Carvalho Chehab 
463785bc17SMauro Carvalho Chehab #define fc_data_Tag_ID_DVB  0x3e
473785bc17SMauro Carvalho Chehab #define fc_data_Tag_ID_ATSC 0x3f
483785bc17SMauro Carvalho Chehab #define fc_data_Tag_ID_IDSB 0x8b
493785bc17SMauro Carvalho Chehab 
503785bc17SMauro Carvalho Chehab #define fc_key_code_default 0x1
513785bc17SMauro Carvalho Chehab #define fc_key_code_even    0x2
523785bc17SMauro Carvalho Chehab #define fc_key_code_odd     0x3
533785bc17SMauro Carvalho Chehab 
543785bc17SMauro Carvalho Chehab extern flexcop_ibi_value ibi_zero;
553785bc17SMauro Carvalho Chehab 
563785bc17SMauro Carvalho Chehab typedef enum {
573785bc17SMauro Carvalho Chehab 	FC_I2C_PORT_DEMOD  = 1,
583785bc17SMauro Carvalho Chehab 	FC_I2C_PORT_EEPROM = 2,
593785bc17SMauro Carvalho Chehab 	FC_I2C_PORT_TUNER  = 3,
603785bc17SMauro Carvalho Chehab } flexcop_i2c_port_t;
613785bc17SMauro Carvalho Chehab 
623785bc17SMauro Carvalho Chehab typedef enum {
633785bc17SMauro Carvalho Chehab 	FC_WRITE = 0,
643785bc17SMauro Carvalho Chehab 	FC_READ  = 1,
653785bc17SMauro Carvalho Chehab } flexcop_access_op_t;
663785bc17SMauro Carvalho Chehab 
673785bc17SMauro Carvalho Chehab typedef enum {
683785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_NET   = 1,
693785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_CAI   = 2,
703785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_CAO   = 4,
713785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_MEDIA = 8
723785bc17SMauro Carvalho Chehab } flexcop_sram_dest_t;
733785bc17SMauro Carvalho Chehab 
743785bc17SMauro Carvalho Chehab typedef enum {
753785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_TARGET_WAN_USB = 0,
763785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_TARGET_DMA1    = 1,
773785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_TARGET_DMA2    = 2,
783785bc17SMauro Carvalho Chehab 	FC_SRAM_DEST_TARGET_FC3_CA  = 3
793785bc17SMauro Carvalho Chehab } flexcop_sram_dest_target_t;
803785bc17SMauro Carvalho Chehab 
813785bc17SMauro Carvalho Chehab typedef enum {
823785bc17SMauro Carvalho Chehab 	FC_SRAM_2_32KB  = 0, /*  64KB */
833785bc17SMauro Carvalho Chehab 	FC_SRAM_1_32KB  = 1, /*  32KB - default fow FCII */
843785bc17SMauro Carvalho Chehab 	FC_SRAM_1_128KB = 2, /* 128KB */
853785bc17SMauro Carvalho Chehab 	FC_SRAM_1_48KB  = 3, /*  48KB - default for FCIII */
863785bc17SMauro Carvalho Chehab } flexcop_sram_type_t;
873785bc17SMauro Carvalho Chehab 
883785bc17SMauro Carvalho Chehab typedef enum {
893785bc17SMauro Carvalho Chehab 	FC_WAN_SPEED_4MBITS  = 0,
903785bc17SMauro Carvalho Chehab 	FC_WAN_SPEED_8MBITS  = 1,
913785bc17SMauro Carvalho Chehab 	FC_WAN_SPEED_12MBITS = 2,
923785bc17SMauro Carvalho Chehab 	FC_WAN_SPEED_16MBITS = 3,
933785bc17SMauro Carvalho Chehab } flexcop_wan_speed_t;
943785bc17SMauro Carvalho Chehab 
953785bc17SMauro Carvalho Chehab typedef enum {
963785bc17SMauro Carvalho Chehab 	FC_DMA_1 = 1,
973785bc17SMauro Carvalho Chehab 	FC_DMA_2 = 2,
983785bc17SMauro Carvalho Chehab } flexcop_dma_index_t;
993785bc17SMauro Carvalho Chehab 
1003785bc17SMauro Carvalho Chehab typedef enum {
1013785bc17SMauro Carvalho Chehab 	FC_DMA_SUBADDR_0 = 1,
1023785bc17SMauro Carvalho Chehab 	FC_DMA_SUBADDR_1 = 2,
1033785bc17SMauro Carvalho Chehab } flexcop_dma_addr_index_t;
1043785bc17SMauro Carvalho Chehab 
1053785bc17SMauro Carvalho Chehab /* names of the particular registers */
1063785bc17SMauro Carvalho Chehab typedef enum {
1073785bc17SMauro Carvalho Chehab 	dma1_000            = 0x000,
1083785bc17SMauro Carvalho Chehab 	dma1_004            = 0x004,
1093785bc17SMauro Carvalho Chehab 	dma1_008            = 0x008,
1103785bc17SMauro Carvalho Chehab 	dma1_00c            = 0x00c,
1113785bc17SMauro Carvalho Chehab 	dma2_010            = 0x010,
1123785bc17SMauro Carvalho Chehab 	dma2_014            = 0x014,
1133785bc17SMauro Carvalho Chehab 	dma2_018            = 0x018,
1143785bc17SMauro Carvalho Chehab 	dma2_01c            = 0x01c,
1153785bc17SMauro Carvalho Chehab 
1163785bc17SMauro Carvalho Chehab 	tw_sm_c_100         = 0x100,
1173785bc17SMauro Carvalho Chehab 	tw_sm_c_104         = 0x104,
1183785bc17SMauro Carvalho Chehab 	tw_sm_c_108         = 0x108,
1193785bc17SMauro Carvalho Chehab 	tw_sm_c_10c         = 0x10c,
1203785bc17SMauro Carvalho Chehab 	tw_sm_c_110         = 0x110,
1213785bc17SMauro Carvalho Chehab 
1223785bc17SMauro Carvalho Chehab 	lnb_switch_freq_200 = 0x200,
1233785bc17SMauro Carvalho Chehab 	misc_204            = 0x204,
1243785bc17SMauro Carvalho Chehab 	ctrl_208            = 0x208,
1253785bc17SMauro Carvalho Chehab 	irq_20c             = 0x20c,
1263785bc17SMauro Carvalho Chehab 	sw_reset_210        = 0x210,
1273785bc17SMauro Carvalho Chehab 	misc_214            = 0x214,
1283785bc17SMauro Carvalho Chehab 	mbox_v8_to_host_218 = 0x218,
1293785bc17SMauro Carvalho Chehab 	mbox_host_to_v8_21c = 0x21c,
1303785bc17SMauro Carvalho Chehab 
1313785bc17SMauro Carvalho Chehab 	pid_filter_300      = 0x300,
1323785bc17SMauro Carvalho Chehab 	pid_filter_304      = 0x304,
1333785bc17SMauro Carvalho Chehab 	pid_filter_308      = 0x308,
1343785bc17SMauro Carvalho Chehab 	pid_filter_30c      = 0x30c,
1353785bc17SMauro Carvalho Chehab 	index_reg_310       = 0x310,
1363785bc17SMauro Carvalho Chehab 	pid_n_reg_314       = 0x314,
1373785bc17SMauro Carvalho Chehab 	mac_low_reg_318     = 0x318,
1383785bc17SMauro Carvalho Chehab 	mac_high_reg_31c    = 0x31c,
1393785bc17SMauro Carvalho Chehab 
1403785bc17SMauro Carvalho Chehab 	data_tag_400        = 0x400,
1413785bc17SMauro Carvalho Chehab 	card_id_408         = 0x408,
1423785bc17SMauro Carvalho Chehab 	card_id_40c         = 0x40c,
1433785bc17SMauro Carvalho Chehab 	mac_address_418     = 0x418,
1443785bc17SMauro Carvalho Chehab 	mac_address_41c     = 0x41c,
1453785bc17SMauro Carvalho Chehab 
1463785bc17SMauro Carvalho Chehab 	ci_600              = 0x600,
1473785bc17SMauro Carvalho Chehab 	pi_604              = 0x604,
1483785bc17SMauro Carvalho Chehab 	pi_608              = 0x608,
1493785bc17SMauro Carvalho Chehab 	dvb_reg_60c         = 0x60c,
1503785bc17SMauro Carvalho Chehab 
1513785bc17SMauro Carvalho Chehab 	sram_ctrl_reg_700   = 0x700,
1523785bc17SMauro Carvalho Chehab 	net_buf_reg_704     = 0x704,
1533785bc17SMauro Carvalho Chehab 	cai_buf_reg_708     = 0x708,
1543785bc17SMauro Carvalho Chehab 	cao_buf_reg_70c     = 0x70c,
1553785bc17SMauro Carvalho Chehab 	media_buf_reg_710   = 0x710,
1563785bc17SMauro Carvalho Chehab 	sram_dest_reg_714   = 0x714,
1573785bc17SMauro Carvalho Chehab 	net_buf_reg_718     = 0x718,
1583785bc17SMauro Carvalho Chehab 	wan_ctrl_reg_71c    = 0x71c,
1593785bc17SMauro Carvalho Chehab } flexcop_ibi_register;
1603785bc17SMauro Carvalho Chehab 
1613785bc17SMauro Carvalho Chehab #define flexcop_set_ibi_value(reg,attr,val) { \
1623785bc17SMauro Carvalho Chehab 	flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \
1633785bc17SMauro Carvalho Chehab 	v.reg.attr = val; \
1643785bc17SMauro Carvalho Chehab 	fc->write_ibi_reg(fc,reg,v); \
1653785bc17SMauro Carvalho Chehab }
1663785bc17SMauro Carvalho Chehab 
1673785bc17SMauro Carvalho Chehab #endif
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