1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Texas Instruments' Message Manager Driver 4 * 5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/ 6 * Nishanth Menon 7 */ 8 9 #define pr_fmt(fmt) "%s: " fmt, __func__ 10 11 #include <linux/device.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/iopoll.h> 15 #include <linux/kernel.h> 16 #include <linux/mailbox_controller.h> 17 #include <linux/module.h> 18 #include <linux/of.h> 19 #include <linux/of_irq.h> 20 #include <linux/platform_device.h> 21 #include <linux/property.h> 22 #include <linux/soc/ti/ti-msgmgr.h> 23 #include <linux/string.h> 24 25 #define Q_DATA_OFFSET(proxy, queue, reg) \ 26 ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4)) 27 #define Q_STATE_OFFSET(queue) ((queue) * 0x4) 28 #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000) 29 30 #define SPROXY_THREAD_OFFSET(tid) (0x1000 * (tid)) 31 #define SPROXY_THREAD_DATA_OFFSET(tid, reg) \ 32 (SPROXY_THREAD_OFFSET(tid) + ((reg) * 0x4) + 0x4) 33 34 #define SPROXY_THREAD_STATUS_OFFSET(tid) (SPROXY_THREAD_OFFSET(tid)) 35 36 #define SPROXY_THREAD_STATUS_COUNT_MASK (0xFF) 37 38 #define SPROXY_THREAD_CTRL_OFFSET(tid) (0x1000 + SPROXY_THREAD_OFFSET(tid)) 39 #define SPROXY_THREAD_CTRL_DIR_MASK (0x1 << 31) 40 41 /** 42 * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor 43 * @queue_id: Queue Number for this path 44 * @proxy_id: Proxy ID representing the processor in SoC 45 * @is_tx: Is this a receive path? 46 */ 47 struct ti_msgmgr_valid_queue_desc { 48 u16 queue_id; 49 u16 proxy_id; 50 bool is_tx; 51 }; 52 53 /** 54 * struct ti_msgmgr_desc - Description of message manager integration 55 * @queue_count: Number of Queues 56 * @max_message_size: Message size in bytes 57 * @max_messages: Number of messages 58 * @data_first_reg: First data register for proxy data region 59 * @data_last_reg: Last data register for proxy data region 60 * @status_cnt_mask: Mask for getting the status value 61 * @status_err_mask: Mask for getting the error value, if applicable 62 * @tx_polled: Do I need to use polled mechanism for tx 63 * @tx_poll_timeout_ms: Timeout in ms if polled 64 * @valid_queues: List of Valid queues that the processor can access 65 * @data_region_name: Name of the proxy data region 66 * @status_region_name: Name of the proxy status region 67 * @ctrl_region_name: Name of the proxy control region 68 * @num_valid_queues: Number of valid queues 69 * @is_sproxy: Is this an Secure Proxy instance? 70 * 71 * This structure is used in of match data to describe how integration 72 * for a specific compatible SoC is done. 73 */ 74 struct ti_msgmgr_desc { 75 u16 queue_count; 76 u8 max_message_size; 77 u8 max_messages; 78 u8 data_first_reg; 79 u8 data_last_reg; 80 u32 status_cnt_mask; 81 u32 status_err_mask; 82 bool tx_polled; 83 int tx_poll_timeout_ms; 84 const struct ti_msgmgr_valid_queue_desc *valid_queues; 85 const char *data_region_name; 86 const char *status_region_name; 87 const char *ctrl_region_name; 88 int num_valid_queues; 89 bool is_sproxy; 90 }; 91 92 /** 93 * struct ti_queue_inst - Description of a queue instance 94 * @name: Queue Name 95 * @queue_id: Queue Identifier as mapped on SoC 96 * @proxy_id: Proxy Identifier as mapped on SoC 97 * @irq: IRQ for Rx Queue 98 * @is_tx: 'true' if transmit queue, else, 'false' 99 * @queue_buff_start: First register of Data Buffer 100 * @queue_buff_end: Last (or confirmation) register of Data buffer 101 * @queue_state: Queue status register 102 * @queue_ctrl: Queue Control register 103 * @chan: Mailbox channel 104 * @rx_buff: Receive buffer pointer allocated at probe, max_message_size 105 * @polled_rx_mode: Use polling for rx instead of interrupts 106 */ 107 struct ti_queue_inst { 108 char name[30]; 109 u16 queue_id; 110 u16 proxy_id; 111 int irq; 112 bool is_tx; 113 void __iomem *queue_buff_start; 114 void __iomem *queue_buff_end; 115 void __iomem *queue_state; 116 void __iomem *queue_ctrl; 117 struct mbox_chan *chan; 118 u32 *rx_buff; 119 bool polled_rx_mode; 120 }; 121 122 /** 123 * struct ti_msgmgr_inst - Description of a Message Manager Instance 124 * @dev: device pointer corresponding to the Message Manager instance 125 * @desc: Description of the SoC integration 126 * @queue_proxy_region: Queue proxy region where queue buffers are located 127 * @queue_state_debug_region: Queue status register regions 128 * @queue_ctrl_region: Queue Control register regions 129 * @num_valid_queues: Number of valid queues defined for the processor 130 * Note: other queues are probably reserved for other processors 131 * in the SoC. 132 * @qinsts: Array of valid Queue Instances for the Processor 133 * @mbox: Mailbox Controller 134 * @chans: Array for channels corresponding to the Queue Instances. 135 */ 136 struct ti_msgmgr_inst { 137 struct device *dev; 138 const struct ti_msgmgr_desc *desc; 139 void __iomem *queue_proxy_region; 140 void __iomem *queue_state_debug_region; 141 void __iomem *queue_ctrl_region; 142 u16 num_valid_queues; 143 struct ti_queue_inst *qinsts; 144 struct mbox_controller mbox; 145 struct mbox_chan *chans; 146 }; 147 148 /** 149 * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages 150 * @d: Description of message manager 151 * @qinst: Queue instance for which we check the number of pending messages 152 * 153 * Return: number of messages pending in the queue (0 == no pending messages) 154 */ 155 static inline int 156 ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d, 157 struct ti_queue_inst *qinst) 158 { 159 u32 val; 160 u32 status_cnt_mask = d->status_cnt_mask; 161 162 /* 163 * We cannot use relaxed operation here - update may happen 164 * real-time. 165 */ 166 val = readl(qinst->queue_state) & status_cnt_mask; 167 val >>= __ffs(status_cnt_mask); 168 169 return val; 170 } 171 172 /** 173 * ti_msgmgr_queue_is_error() - Check to see if there is queue error 174 * @d: Description of message manager 175 * @qinst: Queue instance for which we check the number of pending messages 176 * 177 * Return: true if error, else false 178 */ 179 static inline bool ti_msgmgr_queue_is_error(const struct ti_msgmgr_desc *d, 180 struct ti_queue_inst *qinst) 181 { 182 u32 val; 183 184 /* Msgmgr has no error detection */ 185 if (!d->is_sproxy) 186 return false; 187 188 /* 189 * We cannot use relaxed operation here - update may happen 190 * real-time. 191 */ 192 val = readl(qinst->queue_state) & d->status_err_mask; 193 194 return val ? true : false; 195 } 196 197 static int ti_msgmgr_queue_rx_data(struct mbox_chan *chan, struct ti_queue_inst *qinst, 198 const struct ti_msgmgr_desc *desc) 199 { 200 int num_words; 201 struct ti_msgmgr_message message; 202 void __iomem *data_reg; 203 u32 *word_data; 204 205 /* 206 * I have no idea about the protocol being used to communicate with the 207 * remote producer - 0 could be valid data, so I wont make a judgement 208 * of how many bytes I should be reading. Let the client figure this 209 * out.. I just read the full message and pass it on.. 210 */ 211 message.len = desc->max_message_size; 212 message.buf = (u8 *)qinst->rx_buff; 213 214 /* 215 * NOTE about register access involved here: 216 * the hardware block is implemented with 32bit access operations and no 217 * support for data splitting. We don't want the hardware to misbehave 218 * with sub 32bit access - For example: if the last register read is 219 * split into byte wise access, it can result in the queue getting 220 * stuck or indeterminate behavior. An out of order read operation may 221 * result in weird data results as well. 222 * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead 223 * we depend on readl for the purpose. 224 * 225 * Also note that the final register read automatically marks the 226 * queue message as read. 227 */ 228 for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff, 229 num_words = (desc->max_message_size / sizeof(u32)); 230 num_words; num_words--, data_reg += sizeof(u32), word_data++) 231 *word_data = readl(data_reg); 232 233 /* 234 * Last register read automatically clears the IRQ if only 1 message 235 * is pending - so send the data up the stack.. 236 * NOTE: Client is expected to be as optimal as possible, since 237 * we invoke the handler in IRQ context. 238 */ 239 mbox_chan_received_data(chan, (void *)&message); 240 241 return 0; 242 } 243 244 static int ti_msgmgr_queue_rx_poll_timeout(struct mbox_chan *chan, int timeout_us) 245 { 246 struct device *dev = chan->mbox->dev; 247 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 248 struct ti_queue_inst *qinst = chan->con_priv; 249 const struct ti_msgmgr_desc *desc = inst->desc; 250 int msg_count; 251 int ret; 252 253 ret = readl_poll_timeout_atomic(qinst->queue_state, msg_count, 254 (msg_count & desc->status_cnt_mask), 255 10, timeout_us); 256 if (ret != 0) 257 return ret; 258 259 ti_msgmgr_queue_rx_data(chan, qinst, desc); 260 261 return 0; 262 } 263 264 /** 265 * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue 266 * @irq: Interrupt number 267 * @p: Channel Pointer 268 * 269 * Return: -EINVAL if there is no instance 270 * IRQ_NONE if the interrupt is not ours. 271 * IRQ_HANDLED if the rx interrupt was successfully handled. 272 */ 273 static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) 274 { 275 struct mbox_chan *chan = p; 276 struct device *dev = chan->mbox->dev; 277 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 278 struct ti_queue_inst *qinst = chan->con_priv; 279 const struct ti_msgmgr_desc *desc; 280 int msg_count; 281 282 if (WARN_ON(!inst)) { 283 dev_err(dev, "no platform drv data??\n"); 284 return -EINVAL; 285 } 286 287 /* Do I have an invalid interrupt source? */ 288 if (qinst->is_tx) { 289 dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n", 290 qinst->name); 291 return IRQ_NONE; 292 } 293 294 desc = inst->desc; 295 if (ti_msgmgr_queue_is_error(desc, qinst)) { 296 dev_err(dev, "Error on Rx channel %s\n", qinst->name); 297 return IRQ_NONE; 298 } 299 300 /* Do I actually have messages to read? */ 301 msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 302 if (!msg_count) { 303 /* Shared IRQ? */ 304 dev_dbg(dev, "Spurious event - 0 pending data!\n"); 305 return IRQ_NONE; 306 } 307 308 ti_msgmgr_queue_rx_data(chan, qinst, desc); 309 310 return IRQ_HANDLED; 311 } 312 313 /** 314 * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages. 315 * @chan: Channel Pointer 316 * 317 * Return: 'true' if there is pending rx data, 'false' if there is none. 318 */ 319 static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) 320 { 321 struct ti_queue_inst *qinst = chan->con_priv; 322 struct device *dev = chan->mbox->dev; 323 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 324 const struct ti_msgmgr_desc *desc = inst->desc; 325 int msg_count; 326 327 if (qinst->is_tx) 328 return false; 329 330 if (ti_msgmgr_queue_is_error(desc, qinst)) { 331 dev_err(dev, "Error on channel %s\n", qinst->name); 332 return false; 333 } 334 335 msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 336 337 return msg_count ? true : false; 338 } 339 340 /** 341 * ti_msgmgr_last_tx_done() - See if all the tx messages are sent 342 * @chan: Channel pointer 343 * 344 * Return: 'true' is no pending tx data, 'false' if there are any. 345 */ 346 static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan) 347 { 348 struct ti_queue_inst *qinst = chan->con_priv; 349 struct device *dev = chan->mbox->dev; 350 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 351 const struct ti_msgmgr_desc *desc = inst->desc; 352 int msg_count; 353 354 if (!qinst->is_tx) 355 return false; 356 357 if (ti_msgmgr_queue_is_error(desc, qinst)) { 358 dev_err(dev, "Error on channel %s\n", qinst->name); 359 return false; 360 } 361 362 msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 363 364 if (desc->is_sproxy) { 365 /* In secure proxy, msg_count indicates how many we can send */ 366 return msg_count ? true : false; 367 } 368 369 /* if we have any messages pending.. */ 370 return msg_count ? false : true; 371 } 372 373 static bool ti_msgmgr_chan_has_polled_queue_rx(struct mbox_chan *chan) 374 { 375 struct ti_queue_inst *qinst; 376 377 if (!chan) 378 return false; 379 380 qinst = chan->con_priv; 381 return qinst->polled_rx_mode; 382 } 383 384 /** 385 * ti_msgmgr_send_data() - Send data 386 * @chan: Channel Pointer 387 * @data: ti_msgmgr_message * Message Pointer 388 * 389 * Return: 0 if all goes good, else appropriate error messages. 390 */ 391 static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) 392 { 393 struct device *dev = chan->mbox->dev; 394 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 395 const struct ti_msgmgr_desc *desc; 396 struct ti_queue_inst *qinst = chan->con_priv; 397 int num_words, trail_bytes; 398 struct ti_msgmgr_message *message = data; 399 void __iomem *data_reg; 400 u32 *word_data; 401 int ret = 0; 402 403 if (WARN_ON(!inst)) { 404 dev_err(dev, "no platform drv data??\n"); 405 return -EINVAL; 406 } 407 desc = inst->desc; 408 409 if (ti_msgmgr_queue_is_error(desc, qinst)) { 410 dev_err(dev, "Error on channel %s\n", qinst->name); 411 return false; 412 } 413 414 if (desc->max_message_size < message->len) { 415 dev_err(dev, "Queue %s message length %zu > max %d\n", 416 qinst->name, message->len, desc->max_message_size); 417 return -EINVAL; 418 } 419 420 /* NOTE: Constraints similar to rx path exists here as well */ 421 for (data_reg = qinst->queue_buff_start, 422 num_words = message->len / sizeof(u32), 423 word_data = (u32 *)message->buf; 424 num_words; num_words--, data_reg += sizeof(u32), word_data++) 425 writel(*word_data, data_reg); 426 427 trail_bytes = message->len % sizeof(u32); 428 if (trail_bytes) { 429 /* 430 * Copy only the trailing bytes instead of reading a full u32, 431 * as the message buffer may end right after them and a u32 432 * read would go past the end of it. This also leaves all 433 * unused data as 0. 434 */ 435 u32 data_trail = 0; 436 437 memcpy(&data_trail, word_data, trail_bytes); 438 writel(data_trail, data_reg); 439 data_reg += sizeof(u32); 440 } 441 442 /* 443 * 'data_reg' indicates next register to write. If we did not already 444 * write on tx complete reg(last reg), we must do so for transmit 445 * In addition, we also need to make sure all intermediate data 446 * registers(if any required), are reset to 0 for TISCI backward 447 * compatibility to be maintained. 448 */ 449 while (data_reg <= qinst->queue_buff_end) { 450 writel(0, data_reg); 451 data_reg += sizeof(u32); 452 } 453 454 /* 455 * If we are in polled mode, wait for a response before proceeding. 456 * 457 * The message has already been transmitted at this point, so do not 458 * report a missing response as a send failure. Doing so would make 459 * the mailbox core keep the message queued and submit it again later, 460 * after the client has possibly given up on it. The client detects the 461 * missing response by itself timing out. 462 */ 463 if (ti_msgmgr_chan_has_polled_queue_rx(message->chan_rx)) { 464 ret = ti_msgmgr_queue_rx_poll_timeout(message->chan_rx, 465 message->timeout_rx_ms * 1000); 466 if (ret) 467 dev_err(dev, "Queue %s timed out waiting for response: %d\n", 468 qinst->name, ret); 469 } 470 471 return 0; 472 } 473 474 /** 475 * ti_msgmgr_queue_rx_irq_req() - RX IRQ request 476 * @dev: device pointer 477 * @d: descriptor for ti_msgmgr 478 * @qinst: Queue instance 479 * @chan: Channel pointer 480 */ 481 static int ti_msgmgr_queue_rx_irq_req(struct device *dev, 482 const struct ti_msgmgr_desc *d, 483 struct ti_queue_inst *qinst, 484 struct mbox_chan *chan) 485 { 486 int ret = 0; 487 /* 488 * To keep compiler happy about u16 proxy_id: 489 * "rx_" + up to 5 digits of u16 id + NULL 490 */ 491 char of_rx_irq_name[9]; 492 struct device_node *np; 493 494 snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), 495 "rx_%03d", d->is_sproxy ? qinst->proxy_id : qinst->queue_id); 496 497 /* Get the IRQ if not found */ 498 if (qinst->irq < 0) { 499 np = of_node_get(dev->of_node); 500 if (!np) 501 return -ENODATA; 502 qinst->irq = of_irq_get_byname(np, of_rx_irq_name); 503 of_node_put(np); 504 505 if (qinst->irq < 0) { 506 dev_err(dev, 507 "QID %d PID %d:No IRQ[%s]: %d\n", 508 qinst->queue_id, qinst->proxy_id, 509 of_rx_irq_name, qinst->irq); 510 return qinst->irq; 511 } 512 } 513 514 /* With the expectation that the IRQ might be shared in SoC */ 515 ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt, 516 IRQF_SHARED, qinst->name, chan); 517 if (ret) { 518 dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n", 519 qinst->irq, qinst->name, ret); 520 } 521 522 return ret; 523 } 524 525 /** 526 * ti_msgmgr_queue_startup() - Startup queue 527 * @chan: Channel pointer 528 * 529 * Return: 0 if all goes good, else return corresponding error message 530 */ 531 static int ti_msgmgr_queue_startup(struct mbox_chan *chan) 532 { 533 struct device *dev = chan->mbox->dev; 534 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 535 struct ti_queue_inst *qinst = chan->con_priv; 536 const struct ti_msgmgr_desc *d = inst->desc; 537 int ret; 538 int msg_count; 539 540 /* 541 * If sproxy is starting and can send messages, we are a Tx thread, 542 * else Rx 543 */ 544 if (d->is_sproxy) { 545 qinst->is_tx = (readl(qinst->queue_ctrl) & 546 SPROXY_THREAD_CTRL_DIR_MASK) ? false : true; 547 548 msg_count = ti_msgmgr_queue_get_num_messages(d, qinst); 549 550 if (!msg_count && qinst->is_tx) { 551 dev_err(dev, "%s: Cannot transmit with 0 credits!\n", 552 qinst->name); 553 return -EINVAL; 554 } 555 } 556 557 if (!qinst->is_tx) { 558 /* Allocate usage buffer for rx */ 559 qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL); 560 if (!qinst->rx_buff) 561 return -ENOMEM; 562 /* Request IRQ */ 563 ret = ti_msgmgr_queue_rx_irq_req(dev, d, qinst, chan); 564 if (ret) { 565 kfree(qinst->rx_buff); 566 return ret; 567 } 568 } 569 570 return 0; 571 } 572 573 /** 574 * ti_msgmgr_queue_shutdown() - Shutdown the queue 575 * @chan: Channel pointer 576 */ 577 static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan) 578 { 579 struct ti_queue_inst *qinst = chan->con_priv; 580 581 if (!qinst->is_tx) { 582 free_irq(qinst->irq, chan); 583 kfree(qinst->rx_buff); 584 } 585 } 586 587 /** 588 * ti_msgmgr_of_xlate() - Translation of phandle to queue 589 * @mbox: Mailbox controller 590 * @p: phandle pointer 591 * 592 * Return: Mailbox channel corresponding to the queue, else return error 593 * pointer. 594 */ 595 static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox, 596 const struct of_phandle_args *p) 597 { 598 struct ti_msgmgr_inst *inst; 599 int req_qid, req_pid; 600 struct ti_queue_inst *qinst; 601 const struct ti_msgmgr_desc *d; 602 int i, ncells; 603 604 inst = container_of(mbox, struct ti_msgmgr_inst, mbox); 605 if (WARN_ON(!inst)) 606 return ERR_PTR(-EINVAL); 607 608 d = inst->desc; 609 610 if (d->is_sproxy) 611 ncells = 1; 612 else 613 ncells = 2; 614 if (p->args_count != ncells) { 615 dev_err(inst->dev, "Invalid arguments in dt[%d]. Must be %d\n", 616 p->args_count, ncells); 617 return ERR_PTR(-EINVAL); 618 } 619 if (ncells == 1) { 620 req_qid = 0; 621 req_pid = p->args[0]; 622 } else { 623 req_qid = p->args[0]; 624 req_pid = p->args[1]; 625 } 626 627 if (d->is_sproxy) { 628 if (req_pid >= d->num_valid_queues) 629 goto err; 630 qinst = &inst->qinsts[req_pid]; 631 return qinst->chan; 632 } 633 634 for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; 635 i++, qinst++) { 636 if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id) 637 return qinst->chan; 638 } 639 640 err: 641 dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %pOFn\n", 642 req_qid, req_pid, p->np); 643 return ERR_PTR(-ENOENT); 644 } 645 646 /** 647 * ti_msgmgr_queue_setup() - Setup data structures for each queue instance 648 * @idx: index of the queue 649 * @dev: pointer to the message manager device 650 * @np: pointer to the of node 651 * @inst: Queue instance pointer 652 * @d: Message Manager instance description data 653 * @qd: Queue description data 654 * @qinst: Queue instance pointer 655 * @chan: pointer to mailbox channel 656 * 657 * Return: 0 if all went well, else return corresponding error 658 */ 659 static int ti_msgmgr_queue_setup(int idx, struct device *dev, 660 struct device_node *np, 661 struct ti_msgmgr_inst *inst, 662 const struct ti_msgmgr_desc *d, 663 const struct ti_msgmgr_valid_queue_desc *qd, 664 struct ti_queue_inst *qinst, 665 struct mbox_chan *chan) 666 { 667 char *dir; 668 669 qinst->proxy_id = qd->proxy_id; 670 qinst->queue_id = qd->queue_id; 671 672 if (qinst->queue_id > d->queue_count) { 673 dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n", 674 idx, qinst->queue_id, d->queue_count); 675 return -ERANGE; 676 } 677 678 if (d->is_sproxy) { 679 qinst->queue_buff_start = inst->queue_proxy_region + 680 SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id, 681 d->data_first_reg); 682 qinst->queue_buff_end = inst->queue_proxy_region + 683 SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id, 684 d->data_last_reg); 685 qinst->queue_state = inst->queue_state_debug_region + 686 SPROXY_THREAD_STATUS_OFFSET(qinst->proxy_id); 687 qinst->queue_ctrl = inst->queue_ctrl_region + 688 SPROXY_THREAD_CTRL_OFFSET(qinst->proxy_id); 689 690 /* XXX: DONOT read registers here!.. Some may be unusable */ 691 dir = "thr"; 692 snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d", 693 dev_name(dev), dir, qinst->proxy_id); 694 } else { 695 qinst->queue_buff_start = inst->queue_proxy_region + 696 Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, 697 d->data_first_reg); 698 qinst->queue_buff_end = inst->queue_proxy_region + 699 Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, 700 d->data_last_reg); 701 qinst->queue_state = 702 inst->queue_state_debug_region + 703 Q_STATE_OFFSET(qinst->queue_id); 704 qinst->is_tx = qd->is_tx; 705 dir = qinst->is_tx ? "tx" : "rx"; 706 snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d", 707 dev_name(dev), dir, qinst->queue_id, qinst->proxy_id); 708 } 709 710 qinst->chan = chan; 711 712 /* Setup an error value for IRQ - Lazy allocation */ 713 qinst->irq = -EINVAL; 714 715 chan->con_priv = qinst; 716 717 dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n", 718 idx, qinst->queue_id, qinst->proxy_id, qinst->irq, 719 qinst->queue_buff_start, qinst->queue_buff_end); 720 return 0; 721 } 722 723 static int ti_msgmgr_queue_rx_set_polled_mode(struct ti_queue_inst *qinst, bool enable) 724 { 725 if (enable) { 726 disable_irq(qinst->irq); 727 qinst->polled_rx_mode = true; 728 } else { 729 enable_irq(qinst->irq); 730 qinst->polled_rx_mode = false; 731 } 732 733 return 0; 734 } 735 736 static int ti_msgmgr_suspend(struct device *dev) 737 { 738 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 739 struct ti_queue_inst *qinst; 740 int i; 741 742 /* 743 * We must switch operation to polled mode now as drivers and the genpd 744 * layer may make late TI SCI calls to change clock and device states 745 * from the noirq phase of suspend. 746 */ 747 for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; qinst++, i++) { 748 if (!qinst->is_tx) 749 ti_msgmgr_queue_rx_set_polled_mode(qinst, true); 750 } 751 752 return 0; 753 } 754 755 static int ti_msgmgr_resume(struct device *dev) 756 { 757 struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 758 struct ti_queue_inst *qinst; 759 int i; 760 761 for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; qinst++, i++) { 762 if (!qinst->is_tx) 763 ti_msgmgr_queue_rx_set_polled_mode(qinst, false); 764 } 765 766 return 0; 767 } 768 769 static DEFINE_SIMPLE_DEV_PM_OPS(ti_msgmgr_pm_ops, ti_msgmgr_suspend, ti_msgmgr_resume); 770 771 /* Queue operations */ 772 static const struct mbox_chan_ops ti_msgmgr_chan_ops = { 773 .startup = ti_msgmgr_queue_startup, 774 .shutdown = ti_msgmgr_queue_shutdown, 775 .peek_data = ti_msgmgr_queue_peek_data, 776 .last_tx_done = ti_msgmgr_last_tx_done, 777 .send_data = ti_msgmgr_send_data, 778 }; 779 780 /* Keystone K2G SoC integration details */ 781 static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = { 782 {.queue_id = 0, .proxy_id = 0, .is_tx = true,}, 783 {.queue_id = 1, .proxy_id = 0, .is_tx = true,}, 784 {.queue_id = 2, .proxy_id = 0, .is_tx = true,}, 785 {.queue_id = 3, .proxy_id = 0, .is_tx = true,}, 786 {.queue_id = 5, .proxy_id = 2, .is_tx = false,}, 787 {.queue_id = 56, .proxy_id = 1, .is_tx = true,}, 788 {.queue_id = 57, .proxy_id = 2, .is_tx = false,}, 789 {.queue_id = 58, .proxy_id = 3, .is_tx = true,}, 790 {.queue_id = 59, .proxy_id = 4, .is_tx = true,}, 791 {.queue_id = 60, .proxy_id = 5, .is_tx = true,}, 792 {.queue_id = 61, .proxy_id = 6, .is_tx = true,}, 793 }; 794 795 static const struct ti_msgmgr_desc k2g_desc = { 796 .queue_count = 64, 797 .max_message_size = 64, 798 .max_messages = 128, 799 .data_region_name = "queue_proxy_region", 800 .status_region_name = "queue_state_debug_region", 801 .data_first_reg = 16, 802 .data_last_reg = 31, 803 .status_cnt_mask = Q_STATE_ENTRY_COUNT_MASK, 804 .tx_polled = false, 805 .valid_queues = k2g_valid_queues, 806 .num_valid_queues = ARRAY_SIZE(k2g_valid_queues), 807 .is_sproxy = false, 808 }; 809 810 static const struct ti_msgmgr_desc am654_desc = { 811 .queue_count = 190, 812 .num_valid_queues = 190, 813 .max_message_size = 60, 814 .data_region_name = "target_data", 815 .status_region_name = "rt", 816 .ctrl_region_name = "scfg", 817 .data_first_reg = 0, 818 .data_last_reg = 14, 819 .status_cnt_mask = SPROXY_THREAD_STATUS_COUNT_MASK, 820 .tx_polled = false, 821 .is_sproxy = true, 822 }; 823 824 static const struct ti_msgmgr_desc tda54_main_desc = { 825 .queue_count = 444, 826 .num_valid_queues = 444, 827 .max_message_size = 60, 828 .data_region_name = "target_data", 829 .status_region_name = "rt", 830 .ctrl_region_name = "scfg", 831 .data_first_reg = 0, 832 .data_last_reg = 14, 833 .status_cnt_mask = SPROXY_THREAD_STATUS_COUNT_MASK, 834 .tx_polled = false, 835 .is_sproxy = true, 836 }; 837 838 static const struct of_device_id ti_msgmgr_of_match[] = { 839 {.compatible = "ti,k2g-message-manager", .data = &k2g_desc}, 840 {.compatible = "ti,am654-secure-proxy", .data = &am654_desc}, 841 {.compatible = "ti,tda54-main-secure-proxy", .data = &tda54_main_desc}, 842 { /* Sentinel */ } 843 }; 844 845 MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match); 846 847 static int ti_msgmgr_probe(struct platform_device *pdev) 848 { 849 struct device *dev = &pdev->dev; 850 struct device_node *np; 851 const struct ti_msgmgr_desc *desc; 852 struct ti_msgmgr_inst *inst; 853 struct ti_queue_inst *qinst; 854 struct mbox_controller *mbox; 855 struct mbox_chan *chans; 856 int queue_count; 857 int i; 858 int ret = -EINVAL; 859 const struct ti_msgmgr_valid_queue_desc *queue_desc; 860 861 if (!dev->of_node) { 862 dev_err(dev, "no OF information\n"); 863 return -EINVAL; 864 } 865 np = dev->of_node; 866 867 inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL); 868 if (!inst) 869 return -ENOMEM; 870 871 inst->dev = dev; 872 inst->desc = desc = device_get_match_data(dev); 873 874 inst->queue_proxy_region = 875 devm_platform_ioremap_resource_byname(pdev, desc->data_region_name); 876 if (IS_ERR(inst->queue_proxy_region)) 877 return PTR_ERR(inst->queue_proxy_region); 878 879 inst->queue_state_debug_region = 880 devm_platform_ioremap_resource_byname(pdev, desc->status_region_name); 881 if (IS_ERR(inst->queue_state_debug_region)) 882 return PTR_ERR(inst->queue_state_debug_region); 883 884 if (desc->is_sproxy) { 885 inst->queue_ctrl_region = 886 devm_platform_ioremap_resource_byname(pdev, desc->ctrl_region_name); 887 if (IS_ERR(inst->queue_ctrl_region)) 888 return PTR_ERR(inst->queue_ctrl_region); 889 } 890 891 dev_dbg(dev, "proxy region=%p, queue_state=%p\n", 892 inst->queue_proxy_region, inst->queue_state_debug_region); 893 894 queue_count = desc->num_valid_queues; 895 if (!queue_count || queue_count > desc->queue_count) { 896 dev_crit(dev, "Invalid Number of queues %d. Max %d\n", 897 queue_count, desc->queue_count); 898 return -ERANGE; 899 } 900 inst->num_valid_queues = queue_count; 901 902 qinst = devm_kcalloc(dev, queue_count, sizeof(*qinst), GFP_KERNEL); 903 if (!qinst) 904 return -ENOMEM; 905 inst->qinsts = qinst; 906 907 chans = devm_kcalloc(dev, queue_count, sizeof(*chans), GFP_KERNEL); 908 if (!chans) 909 return -ENOMEM; 910 inst->chans = chans; 911 912 if (desc->is_sproxy) { 913 struct ti_msgmgr_valid_queue_desc sproxy_desc; 914 915 /* All proxies may be valid in Secure Proxy instance */ 916 for (i = 0; i < queue_count; i++, qinst++, chans++) { 917 sproxy_desc.queue_id = 0; 918 sproxy_desc.proxy_id = i; 919 ret = ti_msgmgr_queue_setup(i, dev, np, inst, 920 desc, &sproxy_desc, qinst, 921 chans); 922 if (ret) 923 return ret; 924 } 925 } else { 926 /* Only Some proxies are valid in Message Manager */ 927 for (i = 0, queue_desc = desc->valid_queues; 928 i < queue_count; i++, qinst++, chans++, queue_desc++) { 929 ret = ti_msgmgr_queue_setup(i, dev, np, inst, 930 desc, queue_desc, qinst, 931 chans); 932 if (ret) 933 return ret; 934 } 935 } 936 937 mbox = &inst->mbox; 938 mbox->dev = dev; 939 mbox->ops = &ti_msgmgr_chan_ops; 940 mbox->chans = inst->chans; 941 mbox->num_chans = inst->num_valid_queues; 942 mbox->txdone_irq = false; 943 mbox->txdone_poll = desc->tx_polled; 944 if (desc->tx_polled) 945 mbox->txpoll_period = desc->tx_poll_timeout_ms; 946 mbox->of_xlate = ti_msgmgr_of_xlate; 947 948 platform_set_drvdata(pdev, inst); 949 ret = devm_mbox_controller_register(dev, mbox); 950 if (ret) 951 dev_err(dev, "Failed to register mbox_controller(%d)\n", ret); 952 953 return ret; 954 } 955 956 static struct platform_driver ti_msgmgr_driver = { 957 .probe = ti_msgmgr_probe, 958 .driver = { 959 .name = "ti-msgmgr", 960 .of_match_table = ti_msgmgr_of_match, 961 .pm = &ti_msgmgr_pm_ops, 962 }, 963 }; 964 module_platform_driver(ti_msgmgr_driver); 965 966 MODULE_LICENSE("GPL v2"); 967 MODULE_DESCRIPTION("TI message manager driver"); 968 MODULE_AUTHOR("Nishanth Menon"); 969 MODULE_ALIAS("platform:ti-msgmgr"); 970