14f0ceb87SNishanth Menon // SPDX-License-Identifier: GPL-2.0 2aace66b1SNishanth Menon /* 3aace66b1SNishanth Menon * Texas Instruments' Message Manager Driver 4aace66b1SNishanth Menon * 5df227dc8SDave Gerlach * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/ 6aace66b1SNishanth Menon * Nishanth Menon 7aace66b1SNishanth Menon */ 8aace66b1SNishanth Menon 9aace66b1SNishanth Menon #define pr_fmt(fmt) "%s: " fmt, __func__ 10aace66b1SNishanth Menon 11aace66b1SNishanth Menon #include <linux/device.h> 12aace66b1SNishanth Menon #include <linux/interrupt.h> 13aace66b1SNishanth Menon #include <linux/io.h> 14df227dc8SDave Gerlach #include <linux/iopoll.h> 15aace66b1SNishanth Menon #include <linux/kernel.h> 16aace66b1SNishanth Menon #include <linux/mailbox_controller.h> 17aace66b1SNishanth Menon #include <linux/module.h> 18aace66b1SNishanth Menon #include <linux/of_device.h> 19aace66b1SNishanth Menon #include <linux/of.h> 20aace66b1SNishanth Menon #include <linux/of_irq.h> 21aace66b1SNishanth Menon #include <linux/platform_device.h> 22aace66b1SNishanth Menon #include <linux/soc/ti/ti-msgmgr.h> 23aace66b1SNishanth Menon 24aace66b1SNishanth Menon #define Q_DATA_OFFSET(proxy, queue, reg) \ 25aace66b1SNishanth Menon ((0x10000 * (proxy)) + (0x80 * (queue)) + ((reg) * 4)) 26aace66b1SNishanth Menon #define Q_STATE_OFFSET(queue) ((queue) * 0x4) 27aace66b1SNishanth Menon #define Q_STATE_ENTRY_COUNT_MASK (0xFFF000) 28aace66b1SNishanth Menon 29a2b79838SNishanth Menon #define SPROXY_THREAD_OFFSET(tid) (0x1000 * (tid)) 30a2b79838SNishanth Menon #define SPROXY_THREAD_DATA_OFFSET(tid, reg) \ 31a2b79838SNishanth Menon (SPROXY_THREAD_OFFSET(tid) + ((reg) * 0x4) + 0x4) 32a2b79838SNishanth Menon 33a2b79838SNishanth Menon #define SPROXY_THREAD_STATUS_OFFSET(tid) (SPROXY_THREAD_OFFSET(tid)) 34a2b79838SNishanth Menon 35a2b79838SNishanth Menon #define SPROXY_THREAD_STATUS_COUNT_MASK (0xFF) 36a2b79838SNishanth Menon 37a2b79838SNishanth Menon #define SPROXY_THREAD_CTRL_OFFSET(tid) (0x1000 + SPROXY_THREAD_OFFSET(tid)) 38a2b79838SNishanth Menon #define SPROXY_THREAD_CTRL_DIR_MASK (0x1 << 31) 39a2b79838SNishanth Menon 40aace66b1SNishanth Menon /** 41aace66b1SNishanth Menon * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor 42aace66b1SNishanth Menon * @queue_id: Queue Number for this path 43aace66b1SNishanth Menon * @proxy_id: Proxy ID representing the processor in SoC 44aace66b1SNishanth Menon * @is_tx: Is this a receive path? 45aace66b1SNishanth Menon */ 46aace66b1SNishanth Menon struct ti_msgmgr_valid_queue_desc { 47aace66b1SNishanth Menon u8 queue_id; 48aace66b1SNishanth Menon u8 proxy_id; 49aace66b1SNishanth Menon bool is_tx; 50aace66b1SNishanth Menon }; 51aace66b1SNishanth Menon 52aace66b1SNishanth Menon /** 53aace66b1SNishanth Menon * struct ti_msgmgr_desc - Description of message manager integration 54aace66b1SNishanth Menon * @queue_count: Number of Queues 55aace66b1SNishanth Menon * @max_message_size: Message size in bytes 56aace66b1SNishanth Menon * @max_messages: Number of messages 57aace66b1SNishanth Menon * @data_first_reg: First data register for proxy data region 58aace66b1SNishanth Menon * @data_last_reg: Last data register for proxy data region 598e560862SNishanth Menon * @status_cnt_mask: Mask for getting the status value 60a2b79838SNishanth Menon * @status_err_mask: Mask for getting the error value, if applicable 61aace66b1SNishanth Menon * @tx_polled: Do I need to use polled mechanism for tx 62aace66b1SNishanth Menon * @tx_poll_timeout_ms: Timeout in ms if polled 63aace66b1SNishanth Menon * @valid_queues: List of Valid queues that the processor can access 6489c976c2SNishanth Menon * @data_region_name: Name of the proxy data region 6589c976c2SNishanth Menon * @status_region_name: Name of the proxy status region 66a2b79838SNishanth Menon * @ctrl_region_name: Name of the proxy control region 67aace66b1SNishanth Menon * @num_valid_queues: Number of valid queues 68a2b79838SNishanth Menon * @is_sproxy: Is this an Secure Proxy instance? 69aace66b1SNishanth Menon * 70aace66b1SNishanth Menon * This structure is used in of match data to describe how integration 71aace66b1SNishanth Menon * for a specific compatible SoC is done. 72aace66b1SNishanth Menon */ 73aace66b1SNishanth Menon struct ti_msgmgr_desc { 74aace66b1SNishanth Menon u8 queue_count; 75aace66b1SNishanth Menon u8 max_message_size; 76aace66b1SNishanth Menon u8 max_messages; 77aace66b1SNishanth Menon u8 data_first_reg; 78aace66b1SNishanth Menon u8 data_last_reg; 798e560862SNishanth Menon u32 status_cnt_mask; 80a2b79838SNishanth Menon u32 status_err_mask; 81aace66b1SNishanth Menon bool tx_polled; 82aace66b1SNishanth Menon int tx_poll_timeout_ms; 83aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *valid_queues; 8489c976c2SNishanth Menon const char *data_region_name; 8589c976c2SNishanth Menon const char *status_region_name; 86a2b79838SNishanth Menon const char *ctrl_region_name; 87aace66b1SNishanth Menon int num_valid_queues; 88a2b79838SNishanth Menon bool is_sproxy; 89aace66b1SNishanth Menon }; 90aace66b1SNishanth Menon 91aace66b1SNishanth Menon /** 92aace66b1SNishanth Menon * struct ti_queue_inst - Description of a queue instance 93aace66b1SNishanth Menon * @name: Queue Name 94aace66b1SNishanth Menon * @queue_id: Queue Identifier as mapped on SoC 95aace66b1SNishanth Menon * @proxy_id: Proxy Identifier as mapped on SoC 96aace66b1SNishanth Menon * @irq: IRQ for Rx Queue 97aace66b1SNishanth Menon * @is_tx: 'true' if transmit queue, else, 'false' 98aace66b1SNishanth Menon * @queue_buff_start: First register of Data Buffer 99aace66b1SNishanth Menon * @queue_buff_end: Last (or confirmation) register of Data buffer 100aace66b1SNishanth Menon * @queue_state: Queue status register 101a2b79838SNishanth Menon * @queue_ctrl: Queue Control register 102aace66b1SNishanth Menon * @chan: Mailbox channel 103aace66b1SNishanth Menon * @rx_buff: Receive buffer pointer allocated at probe, max_message_size 104df227dc8SDave Gerlach * @polled_rx_mode: Use polling for rx instead of interrupts 105aace66b1SNishanth Menon */ 106aace66b1SNishanth Menon struct ti_queue_inst { 107aace66b1SNishanth Menon char name[30]; 108aace66b1SNishanth Menon u8 queue_id; 109aace66b1SNishanth Menon u8 proxy_id; 110aace66b1SNishanth Menon int irq; 111aace66b1SNishanth Menon bool is_tx; 112aace66b1SNishanth Menon void __iomem *queue_buff_start; 113aace66b1SNishanth Menon void __iomem *queue_buff_end; 114aace66b1SNishanth Menon void __iomem *queue_state; 115a2b79838SNishanth Menon void __iomem *queue_ctrl; 116aace66b1SNishanth Menon struct mbox_chan *chan; 117aace66b1SNishanth Menon u32 *rx_buff; 118df227dc8SDave Gerlach bool polled_rx_mode; 119aace66b1SNishanth Menon }; 120aace66b1SNishanth Menon 121aace66b1SNishanth Menon /** 122aace66b1SNishanth Menon * struct ti_msgmgr_inst - Description of a Message Manager Instance 123aace66b1SNishanth Menon * @dev: device pointer corresponding to the Message Manager instance 124aace66b1SNishanth Menon * @desc: Description of the SoC integration 125aace66b1SNishanth Menon * @queue_proxy_region: Queue proxy region where queue buffers are located 126aace66b1SNishanth Menon * @queue_state_debug_region: Queue status register regions 127a2b79838SNishanth Menon * @queue_ctrl_region: Queue Control register regions 128aace66b1SNishanth Menon * @num_valid_queues: Number of valid queues defined for the processor 129aace66b1SNishanth Menon * Note: other queues are probably reserved for other processors 130aace66b1SNishanth Menon * in the SoC. 131aace66b1SNishanth Menon * @qinsts: Array of valid Queue Instances for the Processor 132aace66b1SNishanth Menon * @mbox: Mailbox Controller 133aace66b1SNishanth Menon * @chans: Array for channels corresponding to the Queue Instances. 134aace66b1SNishanth Menon */ 135aace66b1SNishanth Menon struct ti_msgmgr_inst { 136aace66b1SNishanth Menon struct device *dev; 137aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 138aace66b1SNishanth Menon void __iomem *queue_proxy_region; 139aace66b1SNishanth Menon void __iomem *queue_state_debug_region; 140a2b79838SNishanth Menon void __iomem *queue_ctrl_region; 141aace66b1SNishanth Menon u8 num_valid_queues; 142aace66b1SNishanth Menon struct ti_queue_inst *qinsts; 143aace66b1SNishanth Menon struct mbox_controller mbox; 144aace66b1SNishanth Menon struct mbox_chan *chans; 145aace66b1SNishanth Menon }; 146aace66b1SNishanth Menon 147aace66b1SNishanth Menon /** 148aace66b1SNishanth Menon * ti_msgmgr_queue_get_num_messages() - Get the number of pending messages 1498e560862SNishanth Menon * @d: Description of message manager 150aace66b1SNishanth Menon * @qinst: Queue instance for which we check the number of pending messages 151aace66b1SNishanth Menon * 152aace66b1SNishanth Menon * Return: number of messages pending in the queue (0 == no pending messages) 153aace66b1SNishanth Menon */ 1548e560862SNishanth Menon static inline int 1558e560862SNishanth Menon ti_msgmgr_queue_get_num_messages(const struct ti_msgmgr_desc *d, 1568e560862SNishanth Menon struct ti_queue_inst *qinst) 157aace66b1SNishanth Menon { 158aace66b1SNishanth Menon u32 val; 1598e560862SNishanth Menon u32 status_cnt_mask = d->status_cnt_mask; 160aace66b1SNishanth Menon 161aace66b1SNishanth Menon /* 162aace66b1SNishanth Menon * We cannot use relaxed operation here - update may happen 163aace66b1SNishanth Menon * real-time. 164aace66b1SNishanth Menon */ 1658e560862SNishanth Menon val = readl(qinst->queue_state) & status_cnt_mask; 1668e560862SNishanth Menon val >>= __ffs(status_cnt_mask); 167aace66b1SNishanth Menon 168aace66b1SNishanth Menon return val; 169aace66b1SNishanth Menon } 170aace66b1SNishanth Menon 171aace66b1SNishanth Menon /** 172a2b79838SNishanth Menon * ti_msgmgr_queue_is_error() - Check to see if there is queue error 173a2b79838SNishanth Menon * @d: Description of message manager 174a2b79838SNishanth Menon * @qinst: Queue instance for which we check the number of pending messages 175a2b79838SNishanth Menon * 176a2b79838SNishanth Menon * Return: true if error, else false 177a2b79838SNishanth Menon */ 178a2b79838SNishanth Menon static inline bool ti_msgmgr_queue_is_error(const struct ti_msgmgr_desc *d, 179a2b79838SNishanth Menon struct ti_queue_inst *qinst) 180a2b79838SNishanth Menon { 181a2b79838SNishanth Menon u32 val; 182a2b79838SNishanth Menon 183a2b79838SNishanth Menon /* Msgmgr has no error detection */ 184a2b79838SNishanth Menon if (!d->is_sproxy) 185a2b79838SNishanth Menon return false; 186a2b79838SNishanth Menon 187a2b79838SNishanth Menon /* 188a2b79838SNishanth Menon * We cannot use relaxed operation here - update may happen 189a2b79838SNishanth Menon * real-time. 190a2b79838SNishanth Menon */ 191a2b79838SNishanth Menon val = readl(qinst->queue_state) & d->status_err_mask; 192a2b79838SNishanth Menon 193a2b79838SNishanth Menon return val ? true : false; 194a2b79838SNishanth Menon } 195a2b79838SNishanth Menon 196cb62b8f7SDave Gerlach static int ti_msgmgr_queue_rx_data(struct mbox_chan *chan, struct ti_queue_inst *qinst, 197cb62b8f7SDave Gerlach const struct ti_msgmgr_desc *desc) 198aace66b1SNishanth Menon { 199cb62b8f7SDave Gerlach int num_words; 200aace66b1SNishanth Menon struct ti_msgmgr_message message; 201aace66b1SNishanth Menon void __iomem *data_reg; 202aace66b1SNishanth Menon u32 *word_data; 203aace66b1SNishanth Menon 204aace66b1SNishanth Menon /* 205aace66b1SNishanth Menon * I have no idea about the protocol being used to communicate with the 206cb62b8f7SDave Gerlach * remote producer - 0 could be valid data, so I wont make a judgement 207aace66b1SNishanth Menon * of how many bytes I should be reading. Let the client figure this 208aace66b1SNishanth Menon * out.. I just read the full message and pass it on.. 209aace66b1SNishanth Menon */ 210aace66b1SNishanth Menon message.len = desc->max_message_size; 211aace66b1SNishanth Menon message.buf = (u8 *)qinst->rx_buff; 212aace66b1SNishanth Menon 213aace66b1SNishanth Menon /* 214aace66b1SNishanth Menon * NOTE about register access involved here: 215aace66b1SNishanth Menon * the hardware block is implemented with 32bit access operations and no 216aace66b1SNishanth Menon * support for data splitting. We don't want the hardware to misbehave 217aace66b1SNishanth Menon * with sub 32bit access - For example: if the last register read is 218aace66b1SNishanth Menon * split into byte wise access, it can result in the queue getting 219aace66b1SNishanth Menon * stuck or indeterminate behavior. An out of order read operation may 220aace66b1SNishanth Menon * result in weird data results as well. 221aace66b1SNishanth Menon * Hence, we do not use memcpy_fromio or __ioread32_copy here, instead 222aace66b1SNishanth Menon * we depend on readl for the purpose. 223aace66b1SNishanth Menon * 224aace66b1SNishanth Menon * Also note that the final register read automatically marks the 225aace66b1SNishanth Menon * queue message as read. 226aace66b1SNishanth Menon */ 227aace66b1SNishanth Menon for (data_reg = qinst->queue_buff_start, word_data = qinst->rx_buff, 228aace66b1SNishanth Menon num_words = (desc->max_message_size / sizeof(u32)); 229aace66b1SNishanth Menon num_words; num_words--, data_reg += sizeof(u32), word_data++) 230aace66b1SNishanth Menon *word_data = readl(data_reg); 231aace66b1SNishanth Menon 232aace66b1SNishanth Menon /* 233aace66b1SNishanth Menon * Last register read automatically clears the IRQ if only 1 message 234aace66b1SNishanth Menon * is pending - so send the data up the stack.. 235aace66b1SNishanth Menon * NOTE: Client is expected to be as optimal as possible, since 236aace66b1SNishanth Menon * we invoke the handler in IRQ context. 237aace66b1SNishanth Menon */ 238aace66b1SNishanth Menon mbox_chan_received_data(chan, (void *)&message); 239aace66b1SNishanth Menon 240cb62b8f7SDave Gerlach return 0; 241cb62b8f7SDave Gerlach } 242cb62b8f7SDave Gerlach 243df227dc8SDave Gerlach static int ti_msgmgr_queue_rx_poll_timeout(struct mbox_chan *chan, int timeout_us) 244df227dc8SDave Gerlach { 245df227dc8SDave Gerlach struct device *dev = chan->mbox->dev; 246df227dc8SDave Gerlach struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 247df227dc8SDave Gerlach struct ti_queue_inst *qinst = chan->con_priv; 248df227dc8SDave Gerlach const struct ti_msgmgr_desc *desc = inst->desc; 249df227dc8SDave Gerlach int msg_count; 250df227dc8SDave Gerlach int ret; 251df227dc8SDave Gerlach 252df227dc8SDave Gerlach ret = readl_poll_timeout_atomic(qinst->queue_state, msg_count, 253df227dc8SDave Gerlach (msg_count & desc->status_cnt_mask), 254df227dc8SDave Gerlach 10, timeout_us); 255df227dc8SDave Gerlach if (ret != 0) 256df227dc8SDave Gerlach return ret; 257df227dc8SDave Gerlach 258df227dc8SDave Gerlach ti_msgmgr_queue_rx_data(chan, qinst, desc); 259df227dc8SDave Gerlach 260df227dc8SDave Gerlach return 0; 261df227dc8SDave Gerlach } 262df227dc8SDave Gerlach 263cb62b8f7SDave Gerlach /** 264cb62b8f7SDave Gerlach * ti_msgmgr_queue_rx_interrupt() - Interrupt handler for receive Queue 265cb62b8f7SDave Gerlach * @irq: Interrupt number 266cb62b8f7SDave Gerlach * @p: Channel Pointer 267cb62b8f7SDave Gerlach * 268cb62b8f7SDave Gerlach * Return: -EINVAL if there is no instance 269cb62b8f7SDave Gerlach * IRQ_NONE if the interrupt is not ours. 270cb62b8f7SDave Gerlach * IRQ_HANDLED if the rx interrupt was successfully handled. 271cb62b8f7SDave Gerlach */ 272cb62b8f7SDave Gerlach static irqreturn_t ti_msgmgr_queue_rx_interrupt(int irq, void *p) 273cb62b8f7SDave Gerlach { 274cb62b8f7SDave Gerlach struct mbox_chan *chan = p; 275cb62b8f7SDave Gerlach struct device *dev = chan->mbox->dev; 276cb62b8f7SDave Gerlach struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 277cb62b8f7SDave Gerlach struct ti_queue_inst *qinst = chan->con_priv; 278cb62b8f7SDave Gerlach const struct ti_msgmgr_desc *desc; 279cb62b8f7SDave Gerlach int msg_count; 280cb62b8f7SDave Gerlach 281cb62b8f7SDave Gerlach if (WARN_ON(!inst)) { 282cb62b8f7SDave Gerlach dev_err(dev, "no platform drv data??\n"); 283cb62b8f7SDave Gerlach return -EINVAL; 284cb62b8f7SDave Gerlach } 285cb62b8f7SDave Gerlach 286cb62b8f7SDave Gerlach /* Do I have an invalid interrupt source? */ 287cb62b8f7SDave Gerlach if (qinst->is_tx) { 288cb62b8f7SDave Gerlach dev_err(dev, "Cannot handle rx interrupt on tx channel %s\n", 289cb62b8f7SDave Gerlach qinst->name); 290cb62b8f7SDave Gerlach return IRQ_NONE; 291cb62b8f7SDave Gerlach } 292cb62b8f7SDave Gerlach 293cb62b8f7SDave Gerlach desc = inst->desc; 294cb62b8f7SDave Gerlach if (ti_msgmgr_queue_is_error(desc, qinst)) { 295cb62b8f7SDave Gerlach dev_err(dev, "Error on Rx channel %s\n", qinst->name); 296cb62b8f7SDave Gerlach return IRQ_NONE; 297cb62b8f7SDave Gerlach } 298cb62b8f7SDave Gerlach 299cb62b8f7SDave Gerlach /* Do I actually have messages to read? */ 300cb62b8f7SDave Gerlach msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 301cb62b8f7SDave Gerlach if (!msg_count) { 302cb62b8f7SDave Gerlach /* Shared IRQ? */ 303cb62b8f7SDave Gerlach dev_dbg(dev, "Spurious event - 0 pending data!\n"); 304cb62b8f7SDave Gerlach return IRQ_NONE; 305cb62b8f7SDave Gerlach } 306cb62b8f7SDave Gerlach 307cb62b8f7SDave Gerlach ti_msgmgr_queue_rx_data(chan, qinst, desc); 308cb62b8f7SDave Gerlach 309aace66b1SNishanth Menon return IRQ_HANDLED; 310aace66b1SNishanth Menon } 311aace66b1SNishanth Menon 312aace66b1SNishanth Menon /** 313aace66b1SNishanth Menon * ti_msgmgr_queue_peek_data() - Peek to see if there are any rx messages. 314aace66b1SNishanth Menon * @chan: Channel Pointer 315aace66b1SNishanth Menon * 316aace66b1SNishanth Menon * Return: 'true' if there is pending rx data, 'false' if there is none. 317aace66b1SNishanth Menon */ 318aace66b1SNishanth Menon static bool ti_msgmgr_queue_peek_data(struct mbox_chan *chan) 319aace66b1SNishanth Menon { 320aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 3218e560862SNishanth Menon struct device *dev = chan->mbox->dev; 3228e560862SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 323a2b79838SNishanth Menon const struct ti_msgmgr_desc *desc = inst->desc; 324aace66b1SNishanth Menon int msg_count; 325aace66b1SNishanth Menon 326aace66b1SNishanth Menon if (qinst->is_tx) 327aace66b1SNishanth Menon return false; 328aace66b1SNishanth Menon 329a2b79838SNishanth Menon if (ti_msgmgr_queue_is_error(desc, qinst)) { 330a2b79838SNishanth Menon dev_err(dev, "Error on channel %s\n", qinst->name); 331a2b79838SNishanth Menon return false; 332a2b79838SNishanth Menon } 333a2b79838SNishanth Menon 334a2b79838SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 335aace66b1SNishanth Menon 336aace66b1SNishanth Menon return msg_count ? true : false; 337aace66b1SNishanth Menon } 338aace66b1SNishanth Menon 339aace66b1SNishanth Menon /** 340aace66b1SNishanth Menon * ti_msgmgr_last_tx_done() - See if all the tx messages are sent 341aace66b1SNishanth Menon * @chan: Channel pointer 342aace66b1SNishanth Menon * 343aace66b1SNishanth Menon * Return: 'true' is no pending tx data, 'false' if there are any. 344aace66b1SNishanth Menon */ 345aace66b1SNishanth Menon static bool ti_msgmgr_last_tx_done(struct mbox_chan *chan) 346aace66b1SNishanth Menon { 347aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 3488e560862SNishanth Menon struct device *dev = chan->mbox->dev; 3498e560862SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 350a2b79838SNishanth Menon const struct ti_msgmgr_desc *desc = inst->desc; 351aace66b1SNishanth Menon int msg_count; 352aace66b1SNishanth Menon 353aace66b1SNishanth Menon if (!qinst->is_tx) 354aace66b1SNishanth Menon return false; 355aace66b1SNishanth Menon 356a2b79838SNishanth Menon if (ti_msgmgr_queue_is_error(desc, qinst)) { 357a2b79838SNishanth Menon dev_err(dev, "Error on channel %s\n", qinst->name); 358a2b79838SNishanth Menon return false; 359a2b79838SNishanth Menon } 360a2b79838SNishanth Menon 361a2b79838SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(desc, qinst); 362a2b79838SNishanth Menon 363a2b79838SNishanth Menon if (desc->is_sproxy) { 364a2b79838SNishanth Menon /* In secure proxy, msg_count indicates how many we can send */ 365a2b79838SNishanth Menon return msg_count ? true : false; 366a2b79838SNishanth Menon } 367aace66b1SNishanth Menon 368aace66b1SNishanth Menon /* if we have any messages pending.. */ 369aace66b1SNishanth Menon return msg_count ? false : true; 370aace66b1SNishanth Menon } 371aace66b1SNishanth Menon 372df227dc8SDave Gerlach static bool ti_msgmgr_chan_has_polled_queue_rx(struct mbox_chan *chan) 373df227dc8SDave Gerlach { 374df227dc8SDave Gerlach struct ti_queue_inst *qinst; 375df227dc8SDave Gerlach 376df227dc8SDave Gerlach if (!chan) 377df227dc8SDave Gerlach return false; 378df227dc8SDave Gerlach 379df227dc8SDave Gerlach qinst = chan->con_priv; 380df227dc8SDave Gerlach return qinst->polled_rx_mode; 381df227dc8SDave Gerlach } 382df227dc8SDave Gerlach 383aace66b1SNishanth Menon /** 384aace66b1SNishanth Menon * ti_msgmgr_send_data() - Send data 385aace66b1SNishanth Menon * @chan: Channel Pointer 386aace66b1SNishanth Menon * @data: ti_msgmgr_message * Message Pointer 387aace66b1SNishanth Menon * 388aace66b1SNishanth Menon * Return: 0 if all goes good, else appropriate error messages. 389aace66b1SNishanth Menon */ 390aace66b1SNishanth Menon static int ti_msgmgr_send_data(struct mbox_chan *chan, void *data) 391aace66b1SNishanth Menon { 392aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 393aace66b1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 394aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 395aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 396aace66b1SNishanth Menon int num_words, trail_bytes; 397aace66b1SNishanth Menon struct ti_msgmgr_message *message = data; 398aace66b1SNishanth Menon void __iomem *data_reg; 399aace66b1SNishanth Menon u32 *word_data; 400df227dc8SDave Gerlach int ret = 0; 401aace66b1SNishanth Menon 402aace66b1SNishanth Menon if (WARN_ON(!inst)) { 403aace66b1SNishanth Menon dev_err(dev, "no platform drv data??\n"); 404aace66b1SNishanth Menon return -EINVAL; 405aace66b1SNishanth Menon } 406aace66b1SNishanth Menon desc = inst->desc; 407aace66b1SNishanth Menon 408a2b79838SNishanth Menon if (ti_msgmgr_queue_is_error(desc, qinst)) { 409a2b79838SNishanth Menon dev_err(dev, "Error on channel %s\n", qinst->name); 410a2b79838SNishanth Menon return false; 411a2b79838SNishanth Menon } 412a2b79838SNishanth Menon 413aace66b1SNishanth Menon if (desc->max_message_size < message->len) { 414ca64af43SNishanth Menon dev_err(dev, "Queue %s message length %zu > max %d\n", 415aace66b1SNishanth Menon qinst->name, message->len, desc->max_message_size); 416aace66b1SNishanth Menon return -EINVAL; 417aace66b1SNishanth Menon } 418aace66b1SNishanth Menon 419aace66b1SNishanth Menon /* NOTE: Constraints similar to rx path exists here as well */ 420aace66b1SNishanth Menon for (data_reg = qinst->queue_buff_start, 421aace66b1SNishanth Menon num_words = message->len / sizeof(u32), 422aace66b1SNishanth Menon word_data = (u32 *)message->buf; 423aace66b1SNishanth Menon num_words; num_words--, data_reg += sizeof(u32), word_data++) 424aace66b1SNishanth Menon writel(*word_data, data_reg); 425aace66b1SNishanth Menon 426aace66b1SNishanth Menon trail_bytes = message->len % sizeof(u32); 427aace66b1SNishanth Menon if (trail_bytes) { 428aace66b1SNishanth Menon u32 data_trail = *word_data; 429aace66b1SNishanth Menon 430aace66b1SNishanth Menon /* Ensure all unused data is 0 */ 431aace66b1SNishanth Menon data_trail &= 0xFFFFFFFF >> (8 * (sizeof(u32) - trail_bytes)); 432aace66b1SNishanth Menon writel(data_trail, data_reg); 433*1b712f18SNishanth Menon data_reg += sizeof(u32); 434aace66b1SNishanth Menon } 435*1b712f18SNishanth Menon 436aace66b1SNishanth Menon /* 437aace66b1SNishanth Menon * 'data_reg' indicates next register to write. If we did not already 438aace66b1SNishanth Menon * write on tx complete reg(last reg), we must do so for transmit 439*1b712f18SNishanth Menon * In addition, we also need to make sure all intermediate data 440*1b712f18SNishanth Menon * registers(if any required), are reset to 0 for TISCI backward 441*1b712f18SNishanth Menon * compatibility to be maintained. 442aace66b1SNishanth Menon */ 443*1b712f18SNishanth Menon while (data_reg <= qinst->queue_buff_end) { 444*1b712f18SNishanth Menon writel(0, data_reg); 445*1b712f18SNishanth Menon data_reg += sizeof(u32); 446*1b712f18SNishanth Menon } 447aace66b1SNishanth Menon 448df227dc8SDave Gerlach /* If we are in polled mode, wait for a response before proceeding */ 449df227dc8SDave Gerlach if (ti_msgmgr_chan_has_polled_queue_rx(message->chan_rx)) 450df227dc8SDave Gerlach ret = ti_msgmgr_queue_rx_poll_timeout(message->chan_rx, 451df227dc8SDave Gerlach message->timeout_rx_ms * 1000); 452df227dc8SDave Gerlach 453df227dc8SDave Gerlach return ret; 454aace66b1SNishanth Menon } 455aace66b1SNishanth Menon 456aace66b1SNishanth Menon /** 4575ab935e1SNishanth Menon * ti_msgmgr_queue_rx_irq_req() - RX IRQ request 4585ab935e1SNishanth Menon * @dev: device pointer 459a2b79838SNishanth Menon * @d: descriptor for ti_msgmgr 4605ab935e1SNishanth Menon * @qinst: Queue instance 4615ab935e1SNishanth Menon * @chan: Channel pointer 4625ab935e1SNishanth Menon */ 4635ab935e1SNishanth Menon static int ti_msgmgr_queue_rx_irq_req(struct device *dev, 464a2b79838SNishanth Menon const struct ti_msgmgr_desc *d, 4655ab935e1SNishanth Menon struct ti_queue_inst *qinst, 4665ab935e1SNishanth Menon struct mbox_chan *chan) 4675ab935e1SNishanth Menon { 4685ab935e1SNishanth Menon int ret = 0; 4695ab935e1SNishanth Menon char of_rx_irq_name[7]; 4705ab935e1SNishanth Menon struct device_node *np; 4715ab935e1SNishanth Menon 4725ab935e1SNishanth Menon snprintf(of_rx_irq_name, sizeof(of_rx_irq_name), 473a2b79838SNishanth Menon "rx_%03d", d->is_sproxy ? qinst->proxy_id : qinst->queue_id); 4745ab935e1SNishanth Menon 4755ab935e1SNishanth Menon /* Get the IRQ if not found */ 4765ab935e1SNishanth Menon if (qinst->irq < 0) { 4775ab935e1SNishanth Menon np = of_node_get(dev->of_node); 4785ab935e1SNishanth Menon if (!np) 4795ab935e1SNishanth Menon return -ENODATA; 4805ab935e1SNishanth Menon qinst->irq = of_irq_get_byname(np, of_rx_irq_name); 4815ab935e1SNishanth Menon of_node_put(np); 4825ab935e1SNishanth Menon 4835ab935e1SNishanth Menon if (qinst->irq < 0) { 4845ab935e1SNishanth Menon dev_err(dev, 4855ab935e1SNishanth Menon "QID %d PID %d:No IRQ[%s]: %d\n", 4865ab935e1SNishanth Menon qinst->queue_id, qinst->proxy_id, 4875ab935e1SNishanth Menon of_rx_irq_name, qinst->irq); 4885ab935e1SNishanth Menon return qinst->irq; 4895ab935e1SNishanth Menon } 4905ab935e1SNishanth Menon } 4915ab935e1SNishanth Menon 4925ab935e1SNishanth Menon /* With the expectation that the IRQ might be shared in SoC */ 4935ab935e1SNishanth Menon ret = request_irq(qinst->irq, ti_msgmgr_queue_rx_interrupt, 4945ab935e1SNishanth Menon IRQF_SHARED, qinst->name, chan); 4955ab935e1SNishanth Menon if (ret) { 4965ab935e1SNishanth Menon dev_err(dev, "Unable to get IRQ %d on %s(res=%d)\n", 4975ab935e1SNishanth Menon qinst->irq, qinst->name, ret); 4985ab935e1SNishanth Menon } 4995ab935e1SNishanth Menon 5005ab935e1SNishanth Menon return ret; 5015ab935e1SNishanth Menon } 5025ab935e1SNishanth Menon 5035ab935e1SNishanth Menon /** 504aace66b1SNishanth Menon * ti_msgmgr_queue_startup() - Startup queue 505aace66b1SNishanth Menon * @chan: Channel pointer 506aace66b1SNishanth Menon * 507aace66b1SNishanth Menon * Return: 0 if all goes good, else return corresponding error message 508aace66b1SNishanth Menon */ 509aace66b1SNishanth Menon static int ti_msgmgr_queue_startup(struct mbox_chan *chan) 510aace66b1SNishanth Menon { 511aace66b1SNishanth Menon struct device *dev = chan->mbox->dev; 5125ab935e1SNishanth Menon struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 5135ab935e1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 5145ab935e1SNishanth Menon const struct ti_msgmgr_desc *d = inst->desc; 515aace66b1SNishanth Menon int ret; 516a2b79838SNishanth Menon int msg_count; 517a2b79838SNishanth Menon 518a2b79838SNishanth Menon /* 519a2b79838SNishanth Menon * If sproxy is starting and can send messages, we are a Tx thread, 520a2b79838SNishanth Menon * else Rx 521a2b79838SNishanth Menon */ 522a2b79838SNishanth Menon if (d->is_sproxy) { 523a2b79838SNishanth Menon qinst->is_tx = (readl(qinst->queue_ctrl) & 524a2b79838SNishanth Menon SPROXY_THREAD_CTRL_DIR_MASK) ? false : true; 525a2b79838SNishanth Menon 526a2b79838SNishanth Menon msg_count = ti_msgmgr_queue_get_num_messages(d, qinst); 527a2b79838SNishanth Menon 528a2b79838SNishanth Menon if (!msg_count && qinst->is_tx) { 529a2b79838SNishanth Menon dev_err(dev, "%s: Cannot transmit with 0 credits!\n", 530a2b79838SNishanth Menon qinst->name); 531a2b79838SNishanth Menon return -EINVAL; 532a2b79838SNishanth Menon } 533a2b79838SNishanth Menon } 534aace66b1SNishanth Menon 535aace66b1SNishanth Menon if (!qinst->is_tx) { 5365ab935e1SNishanth Menon /* Allocate usage buffer for rx */ 5375ab935e1SNishanth Menon qinst->rx_buff = kzalloc(d->max_message_size, GFP_KERNEL); 5385ab935e1SNishanth Menon if (!qinst->rx_buff) 5395ab935e1SNishanth Menon return -ENOMEM; 5405ab935e1SNishanth Menon /* Request IRQ */ 541a2b79838SNishanth Menon ret = ti_msgmgr_queue_rx_irq_req(dev, d, qinst, chan); 542aace66b1SNishanth Menon if (ret) { 5435ab935e1SNishanth Menon kfree(qinst->rx_buff); 544aace66b1SNishanth Menon return ret; 545aace66b1SNishanth Menon } 546aace66b1SNishanth Menon } 547aace66b1SNishanth Menon 548aace66b1SNishanth Menon return 0; 549aace66b1SNishanth Menon } 550aace66b1SNishanth Menon 551aace66b1SNishanth Menon /** 552aace66b1SNishanth Menon * ti_msgmgr_queue_shutdown() - Shutdown the queue 553aace66b1SNishanth Menon * @chan: Channel pointer 554aace66b1SNishanth Menon */ 555aace66b1SNishanth Menon static void ti_msgmgr_queue_shutdown(struct mbox_chan *chan) 556aace66b1SNishanth Menon { 557aace66b1SNishanth Menon struct ti_queue_inst *qinst = chan->con_priv; 558aace66b1SNishanth Menon 5595ab935e1SNishanth Menon if (!qinst->is_tx) { 560aace66b1SNishanth Menon free_irq(qinst->irq, chan); 5615ab935e1SNishanth Menon kfree(qinst->rx_buff); 5625ab935e1SNishanth Menon } 563aace66b1SNishanth Menon } 564aace66b1SNishanth Menon 565aace66b1SNishanth Menon /** 566aace66b1SNishanth Menon * ti_msgmgr_of_xlate() - Translation of phandle to queue 567aace66b1SNishanth Menon * @mbox: Mailbox controller 568aace66b1SNishanth Menon * @p: phandle pointer 569aace66b1SNishanth Menon * 570aace66b1SNishanth Menon * Return: Mailbox channel corresponding to the queue, else return error 571aace66b1SNishanth Menon * pointer. 572aace66b1SNishanth Menon */ 573aace66b1SNishanth Menon static struct mbox_chan *ti_msgmgr_of_xlate(struct mbox_controller *mbox, 574aace66b1SNishanth Menon const struct of_phandle_args *p) 575aace66b1SNishanth Menon { 576aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 577aace66b1SNishanth Menon int req_qid, req_pid; 578aace66b1SNishanth Menon struct ti_queue_inst *qinst; 579a2b79838SNishanth Menon const struct ti_msgmgr_desc *d; 580a2b79838SNishanth Menon int i, ncells; 581aace66b1SNishanth Menon 582aace66b1SNishanth Menon inst = container_of(mbox, struct ti_msgmgr_inst, mbox); 583aace66b1SNishanth Menon if (WARN_ON(!inst)) 584aace66b1SNishanth Menon return ERR_PTR(-EINVAL); 585aace66b1SNishanth Menon 586a2b79838SNishanth Menon d = inst->desc; 587a2b79838SNishanth Menon 588a2b79838SNishanth Menon if (d->is_sproxy) 589a2b79838SNishanth Menon ncells = 1; 590a2b79838SNishanth Menon else 591a2b79838SNishanth Menon ncells = 2; 592a2b79838SNishanth Menon if (p->args_count != ncells) { 593a2b79838SNishanth Menon dev_err(inst->dev, "Invalid arguments in dt[%d]. Must be %d\n", 594a2b79838SNishanth Menon p->args_count, ncells); 595aace66b1SNishanth Menon return ERR_PTR(-EINVAL); 596aace66b1SNishanth Menon } 597a2b79838SNishanth Menon if (ncells == 1) { 598a2b79838SNishanth Menon req_qid = 0; 599a2b79838SNishanth Menon req_pid = p->args[0]; 600a2b79838SNishanth Menon } else { 601aace66b1SNishanth Menon req_qid = p->args[0]; 602aace66b1SNishanth Menon req_pid = p->args[1]; 603a2b79838SNishanth Menon } 604a2b79838SNishanth Menon 605a2b79838SNishanth Menon if (d->is_sproxy) { 60678f3ff52SDan Carpenter if (req_pid >= d->num_valid_queues) 607a2b79838SNishanth Menon goto err; 608a2b79838SNishanth Menon qinst = &inst->qinsts[req_pid]; 609a2b79838SNishanth Menon return qinst->chan; 610a2b79838SNishanth Menon } 611aace66b1SNishanth Menon 612aace66b1SNishanth Menon for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; 613aace66b1SNishanth Menon i++, qinst++) { 614aace66b1SNishanth Menon if (req_qid == qinst->queue_id && req_pid == qinst->proxy_id) 615aace66b1SNishanth Menon return qinst->chan; 616aace66b1SNishanth Menon } 617aace66b1SNishanth Menon 618a2b79838SNishanth Menon err: 61994927676SRob Herring dev_err(inst->dev, "Queue ID %d, Proxy ID %d is wrong on %pOFn\n", 62094927676SRob Herring req_qid, req_pid, p->np); 621aace66b1SNishanth Menon return ERR_PTR(-ENOENT); 622aace66b1SNishanth Menon } 623aace66b1SNishanth Menon 624aace66b1SNishanth Menon /** 625aace66b1SNishanth Menon * ti_msgmgr_queue_setup() - Setup data structures for each queue instance 626aace66b1SNishanth Menon * @idx: index of the queue 627aace66b1SNishanth Menon * @dev: pointer to the message manager device 628aace66b1SNishanth Menon * @np: pointer to the of node 629aace66b1SNishanth Menon * @inst: Queue instance pointer 630aace66b1SNishanth Menon * @d: Message Manager instance description data 631aace66b1SNishanth Menon * @qd: Queue description data 632aace66b1SNishanth Menon * @qinst: Queue instance pointer 633aace66b1SNishanth Menon * @chan: pointer to mailbox channel 634aace66b1SNishanth Menon * 635aace66b1SNishanth Menon * Return: 0 if all went well, else return corresponding error 636aace66b1SNishanth Menon */ 637aace66b1SNishanth Menon static int ti_msgmgr_queue_setup(int idx, struct device *dev, 638aace66b1SNishanth Menon struct device_node *np, 639aace66b1SNishanth Menon struct ti_msgmgr_inst *inst, 640aace66b1SNishanth Menon const struct ti_msgmgr_desc *d, 641aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *qd, 642aace66b1SNishanth Menon struct ti_queue_inst *qinst, 643aace66b1SNishanth Menon struct mbox_chan *chan) 644aace66b1SNishanth Menon { 645a2b79838SNishanth Menon char *dir; 646a2b79838SNishanth Menon 647aace66b1SNishanth Menon qinst->proxy_id = qd->proxy_id; 648aace66b1SNishanth Menon qinst->queue_id = qd->queue_id; 649aace66b1SNishanth Menon 650aace66b1SNishanth Menon if (qinst->queue_id > d->queue_count) { 651aace66b1SNishanth Menon dev_err(dev, "Queue Data [idx=%d] queuid %d > %d\n", 652aace66b1SNishanth Menon idx, qinst->queue_id, d->queue_count); 653aace66b1SNishanth Menon return -ERANGE; 654aace66b1SNishanth Menon } 655aace66b1SNishanth Menon 656a2b79838SNishanth Menon if (d->is_sproxy) { 657aace66b1SNishanth Menon qinst->queue_buff_start = inst->queue_proxy_region + 658a2b79838SNishanth Menon SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id, 659a2b79838SNishanth Menon d->data_first_reg); 660aace66b1SNishanth Menon qinst->queue_buff_end = inst->queue_proxy_region + 661a2b79838SNishanth Menon SPROXY_THREAD_DATA_OFFSET(qinst->proxy_id, 662a2b79838SNishanth Menon d->data_last_reg); 663aace66b1SNishanth Menon qinst->queue_state = inst->queue_state_debug_region + 664a2b79838SNishanth Menon SPROXY_THREAD_STATUS_OFFSET(qinst->proxy_id); 665a2b79838SNishanth Menon qinst->queue_ctrl = inst->queue_ctrl_region + 666a2b79838SNishanth Menon SPROXY_THREAD_CTRL_OFFSET(qinst->proxy_id); 667a2b79838SNishanth Menon 668a2b79838SNishanth Menon /* XXX: DONOT read registers here!.. Some may be unusable */ 669a2b79838SNishanth Menon dir = "thr"; 670a2b79838SNishanth Menon snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d", 671a2b79838SNishanth Menon dev_name(dev), dir, qinst->proxy_id); 672a2b79838SNishanth Menon } else { 673a2b79838SNishanth Menon qinst->queue_buff_start = inst->queue_proxy_region + 674a2b79838SNishanth Menon Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, 675a2b79838SNishanth Menon d->data_first_reg); 676a2b79838SNishanth Menon qinst->queue_buff_end = inst->queue_proxy_region + 677a2b79838SNishanth Menon Q_DATA_OFFSET(qinst->proxy_id, qinst->queue_id, 678a2b79838SNishanth Menon d->data_last_reg); 679a2b79838SNishanth Menon qinst->queue_state = 680a2b79838SNishanth Menon inst->queue_state_debug_region + 681aace66b1SNishanth Menon Q_STATE_OFFSET(qinst->queue_id); 682a2b79838SNishanth Menon qinst->is_tx = qd->is_tx; 683a2b79838SNishanth Menon dir = qinst->is_tx ? "tx" : "rx"; 684a2b79838SNishanth Menon snprintf(qinst->name, sizeof(qinst->name), "%s %s_%03d_%03d", 685a2b79838SNishanth Menon dev_name(dev), dir, qinst->queue_id, qinst->proxy_id); 686a2b79838SNishanth Menon } 687a2b79838SNishanth Menon 688aace66b1SNishanth Menon qinst->chan = chan; 689aace66b1SNishanth Menon 6905ab935e1SNishanth Menon /* Setup an error value for IRQ - Lazy allocation */ 6915ab935e1SNishanth Menon qinst->irq = -EINVAL; 6925ab935e1SNishanth Menon 693aace66b1SNishanth Menon chan->con_priv = qinst; 694aace66b1SNishanth Menon 695aace66b1SNishanth Menon dev_dbg(dev, "[%d] qidx=%d pidx=%d irq=%d q_s=%p q_e = %p\n", 696aace66b1SNishanth Menon idx, qinst->queue_id, qinst->proxy_id, qinst->irq, 697aace66b1SNishanth Menon qinst->queue_buff_start, qinst->queue_buff_end); 698aace66b1SNishanth Menon return 0; 699aace66b1SNishanth Menon } 700aace66b1SNishanth Menon 701df227dc8SDave Gerlach static int ti_msgmgr_queue_rx_set_polled_mode(struct ti_queue_inst *qinst, bool enable) 702df227dc8SDave Gerlach { 703df227dc8SDave Gerlach if (enable) { 704df227dc8SDave Gerlach disable_irq(qinst->irq); 705df227dc8SDave Gerlach qinst->polled_rx_mode = true; 706df227dc8SDave Gerlach } else { 707df227dc8SDave Gerlach enable_irq(qinst->irq); 708df227dc8SDave Gerlach qinst->polled_rx_mode = false; 709df227dc8SDave Gerlach } 710df227dc8SDave Gerlach 711df227dc8SDave Gerlach return 0; 712df227dc8SDave Gerlach } 713df227dc8SDave Gerlach 714df227dc8SDave Gerlach static int ti_msgmgr_suspend(struct device *dev) 715df227dc8SDave Gerlach { 716df227dc8SDave Gerlach struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 717df227dc8SDave Gerlach struct ti_queue_inst *qinst; 718df227dc8SDave Gerlach int i; 719df227dc8SDave Gerlach 720df227dc8SDave Gerlach /* 721df227dc8SDave Gerlach * We must switch operation to polled mode now as drivers and the genpd 722df227dc8SDave Gerlach * layer may make late TI SCI calls to change clock and device states 723df227dc8SDave Gerlach * from the noirq phase of suspend. 724df227dc8SDave Gerlach */ 725df227dc8SDave Gerlach for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; qinst++, i++) { 726df227dc8SDave Gerlach if (!qinst->is_tx) 727df227dc8SDave Gerlach ti_msgmgr_queue_rx_set_polled_mode(qinst, true); 728df227dc8SDave Gerlach } 729df227dc8SDave Gerlach 730df227dc8SDave Gerlach return 0; 731df227dc8SDave Gerlach } 732df227dc8SDave Gerlach 733df227dc8SDave Gerlach static int ti_msgmgr_resume(struct device *dev) 734df227dc8SDave Gerlach { 735df227dc8SDave Gerlach struct ti_msgmgr_inst *inst = dev_get_drvdata(dev); 736df227dc8SDave Gerlach struct ti_queue_inst *qinst; 737df227dc8SDave Gerlach int i; 738df227dc8SDave Gerlach 739df227dc8SDave Gerlach for (qinst = inst->qinsts, i = 0; i < inst->num_valid_queues; qinst++, i++) { 740df227dc8SDave Gerlach if (!qinst->is_tx) 741df227dc8SDave Gerlach ti_msgmgr_queue_rx_set_polled_mode(qinst, false); 742df227dc8SDave Gerlach } 743df227dc8SDave Gerlach 744df227dc8SDave Gerlach return 0; 745df227dc8SDave Gerlach } 746df227dc8SDave Gerlach 747df227dc8SDave Gerlach static DEFINE_SIMPLE_DEV_PM_OPS(ti_msgmgr_pm_ops, ti_msgmgr_suspend, ti_msgmgr_resume); 748df227dc8SDave Gerlach 749aace66b1SNishanth Menon /* Queue operations */ 750aace66b1SNishanth Menon static const struct mbox_chan_ops ti_msgmgr_chan_ops = { 751aace66b1SNishanth Menon .startup = ti_msgmgr_queue_startup, 752aace66b1SNishanth Menon .shutdown = ti_msgmgr_queue_shutdown, 753aace66b1SNishanth Menon .peek_data = ti_msgmgr_queue_peek_data, 754aace66b1SNishanth Menon .last_tx_done = ti_msgmgr_last_tx_done, 755aace66b1SNishanth Menon .send_data = ti_msgmgr_send_data, 756aace66b1SNishanth Menon }; 757aace66b1SNishanth Menon 758aace66b1SNishanth Menon /* Keystone K2G SoC integration details */ 759aace66b1SNishanth Menon static const struct ti_msgmgr_valid_queue_desc k2g_valid_queues[] = { 760aace66b1SNishanth Menon {.queue_id = 0, .proxy_id = 0, .is_tx = true,}, 761aace66b1SNishanth Menon {.queue_id = 1, .proxy_id = 0, .is_tx = true,}, 762aace66b1SNishanth Menon {.queue_id = 2, .proxy_id = 0, .is_tx = true,}, 763aace66b1SNishanth Menon {.queue_id = 3, .proxy_id = 0, .is_tx = true,}, 764aace66b1SNishanth Menon {.queue_id = 5, .proxy_id = 2, .is_tx = false,}, 765aace66b1SNishanth Menon {.queue_id = 56, .proxy_id = 1, .is_tx = true,}, 766aace66b1SNishanth Menon {.queue_id = 57, .proxy_id = 2, .is_tx = false,}, 767aace66b1SNishanth Menon {.queue_id = 58, .proxy_id = 3, .is_tx = true,}, 768aace66b1SNishanth Menon {.queue_id = 59, .proxy_id = 4, .is_tx = true,}, 769aace66b1SNishanth Menon {.queue_id = 60, .proxy_id = 5, .is_tx = true,}, 770aace66b1SNishanth Menon {.queue_id = 61, .proxy_id = 6, .is_tx = true,}, 771aace66b1SNishanth Menon }; 772aace66b1SNishanth Menon 773aace66b1SNishanth Menon static const struct ti_msgmgr_desc k2g_desc = { 774aace66b1SNishanth Menon .queue_count = 64, 775aace66b1SNishanth Menon .max_message_size = 64, 776aace66b1SNishanth Menon .max_messages = 128, 77789c976c2SNishanth Menon .data_region_name = "queue_proxy_region", 77889c976c2SNishanth Menon .status_region_name = "queue_state_debug_region", 779aace66b1SNishanth Menon .data_first_reg = 16, 780aace66b1SNishanth Menon .data_last_reg = 31, 7818e560862SNishanth Menon .status_cnt_mask = Q_STATE_ENTRY_COUNT_MASK, 782aace66b1SNishanth Menon .tx_polled = false, 783aace66b1SNishanth Menon .valid_queues = k2g_valid_queues, 784aace66b1SNishanth Menon .num_valid_queues = ARRAY_SIZE(k2g_valid_queues), 785a2b79838SNishanth Menon .is_sproxy = false, 786a2b79838SNishanth Menon }; 787a2b79838SNishanth Menon 788a2b79838SNishanth Menon static const struct ti_msgmgr_desc am654_desc = { 789a2b79838SNishanth Menon .queue_count = 190, 790a2b79838SNishanth Menon .num_valid_queues = 190, 791a2b79838SNishanth Menon .max_message_size = 60, 792a2b79838SNishanth Menon .data_region_name = "target_data", 793a2b79838SNishanth Menon .status_region_name = "rt", 794a2b79838SNishanth Menon .ctrl_region_name = "scfg", 795a2b79838SNishanth Menon .data_first_reg = 0, 796a2b79838SNishanth Menon .data_last_reg = 14, 797a2b79838SNishanth Menon .status_cnt_mask = SPROXY_THREAD_STATUS_COUNT_MASK, 798a2b79838SNishanth Menon .tx_polled = false, 799a2b79838SNishanth Menon .is_sproxy = true, 800aace66b1SNishanth Menon }; 801aace66b1SNishanth Menon 802aace66b1SNishanth Menon static const struct of_device_id ti_msgmgr_of_match[] = { 803aace66b1SNishanth Menon {.compatible = "ti,k2g-message-manager", .data = &k2g_desc}, 804a2b79838SNishanth Menon {.compatible = "ti,am654-secure-proxy", .data = &am654_desc}, 805aace66b1SNishanth Menon { /* Sentinel */ } 806aace66b1SNishanth Menon }; 807a2b79838SNishanth Menon 808aace66b1SNishanth Menon MODULE_DEVICE_TABLE(of, ti_msgmgr_of_match); 809aace66b1SNishanth Menon 810aace66b1SNishanth Menon static int ti_msgmgr_probe(struct platform_device *pdev) 811aace66b1SNishanth Menon { 812aace66b1SNishanth Menon struct device *dev = &pdev->dev; 813aace66b1SNishanth Menon const struct of_device_id *of_id; 814aace66b1SNishanth Menon struct device_node *np; 815aace66b1SNishanth Menon struct resource *res; 816aace66b1SNishanth Menon const struct ti_msgmgr_desc *desc; 817aace66b1SNishanth Menon struct ti_msgmgr_inst *inst; 818aace66b1SNishanth Menon struct ti_queue_inst *qinst; 819aace66b1SNishanth Menon struct mbox_controller *mbox; 820aace66b1SNishanth Menon struct mbox_chan *chans; 821aace66b1SNishanth Menon int queue_count; 822aace66b1SNishanth Menon int i; 823aace66b1SNishanth Menon int ret = -EINVAL; 824aace66b1SNishanth Menon const struct ti_msgmgr_valid_queue_desc *queue_desc; 825aace66b1SNishanth Menon 826aace66b1SNishanth Menon if (!dev->of_node) { 827aace66b1SNishanth Menon dev_err(dev, "no OF information\n"); 828aace66b1SNishanth Menon return -EINVAL; 829aace66b1SNishanth Menon } 830aace66b1SNishanth Menon np = dev->of_node; 831aace66b1SNishanth Menon 832aace66b1SNishanth Menon of_id = of_match_device(ti_msgmgr_of_match, dev); 833aace66b1SNishanth Menon if (!of_id) { 834aace66b1SNishanth Menon dev_err(dev, "OF data missing\n"); 835aace66b1SNishanth Menon return -EINVAL; 836aace66b1SNishanth Menon } 837aace66b1SNishanth Menon desc = of_id->data; 838aace66b1SNishanth Menon 839aace66b1SNishanth Menon inst = devm_kzalloc(dev, sizeof(*inst), GFP_KERNEL); 840aace66b1SNishanth Menon if (!inst) 841aace66b1SNishanth Menon return -ENOMEM; 842aace66b1SNishanth Menon 843aace66b1SNishanth Menon inst->dev = dev; 844aace66b1SNishanth Menon inst->desc = desc; 845aace66b1SNishanth Menon 846aace66b1SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 84789c976c2SNishanth Menon desc->data_region_name); 848aace66b1SNishanth Menon inst->queue_proxy_region = devm_ioremap_resource(dev, res); 849aace66b1SNishanth Menon if (IS_ERR(inst->queue_proxy_region)) 850aace66b1SNishanth Menon return PTR_ERR(inst->queue_proxy_region); 851aace66b1SNishanth Menon 852aace66b1SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 85389c976c2SNishanth Menon desc->status_region_name); 854aace66b1SNishanth Menon inst->queue_state_debug_region = devm_ioremap_resource(dev, res); 855aace66b1SNishanth Menon if (IS_ERR(inst->queue_state_debug_region)) 856aace66b1SNishanth Menon return PTR_ERR(inst->queue_state_debug_region); 857aace66b1SNishanth Menon 858a2b79838SNishanth Menon if (desc->is_sproxy) { 859a2b79838SNishanth Menon res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 860a2b79838SNishanth Menon desc->ctrl_region_name); 861a2b79838SNishanth Menon inst->queue_ctrl_region = devm_ioremap_resource(dev, res); 862a2b79838SNishanth Menon if (IS_ERR(inst->queue_ctrl_region)) 863a2b79838SNishanth Menon return PTR_ERR(inst->queue_ctrl_region); 864a2b79838SNishanth Menon } 865a2b79838SNishanth Menon 866aace66b1SNishanth Menon dev_dbg(dev, "proxy region=%p, queue_state=%p\n", 867aace66b1SNishanth Menon inst->queue_proxy_region, inst->queue_state_debug_region); 868aace66b1SNishanth Menon 869aace66b1SNishanth Menon queue_count = desc->num_valid_queues; 870aace66b1SNishanth Menon if (!queue_count || queue_count > desc->queue_count) { 871aace66b1SNishanth Menon dev_crit(dev, "Invalid Number of queues %d. Max %d\n", 872aace66b1SNishanth Menon queue_count, desc->queue_count); 873aace66b1SNishanth Menon return -ERANGE; 874aace66b1SNishanth Menon } 875aace66b1SNishanth Menon inst->num_valid_queues = queue_count; 876aace66b1SNishanth Menon 877a86854d0SKees Cook qinst = devm_kcalloc(dev, queue_count, sizeof(*qinst), GFP_KERNEL); 878aace66b1SNishanth Menon if (!qinst) 879aace66b1SNishanth Menon return -ENOMEM; 880aace66b1SNishanth Menon inst->qinsts = qinst; 881aace66b1SNishanth Menon 882a86854d0SKees Cook chans = devm_kcalloc(dev, queue_count, sizeof(*chans), GFP_KERNEL); 883aace66b1SNishanth Menon if (!chans) 884aace66b1SNishanth Menon return -ENOMEM; 885aace66b1SNishanth Menon inst->chans = chans; 886aace66b1SNishanth Menon 887a2b79838SNishanth Menon if (desc->is_sproxy) { 888a2b79838SNishanth Menon struct ti_msgmgr_valid_queue_desc sproxy_desc; 889a2b79838SNishanth Menon 890a2b79838SNishanth Menon /* All proxies may be valid in Secure Proxy instance */ 891a2b79838SNishanth Menon for (i = 0; i < queue_count; i++, qinst++, chans++) { 892a2b79838SNishanth Menon sproxy_desc.queue_id = 0; 893a2b79838SNishanth Menon sproxy_desc.proxy_id = i; 894a2b79838SNishanth Menon ret = ti_msgmgr_queue_setup(i, dev, np, inst, 895a2b79838SNishanth Menon desc, &sproxy_desc, qinst, 896a2b79838SNishanth Menon chans); 897a2b79838SNishanth Menon if (ret) 898a2b79838SNishanth Menon return ret; 899a2b79838SNishanth Menon } 900a2b79838SNishanth Menon } else { 901a2b79838SNishanth Menon /* Only Some proxies are valid in Message Manager */ 902aace66b1SNishanth Menon for (i = 0, queue_desc = desc->valid_queues; 903aace66b1SNishanth Menon i < queue_count; i++, qinst++, chans++, queue_desc++) { 904aace66b1SNishanth Menon ret = ti_msgmgr_queue_setup(i, dev, np, inst, 905a2b79838SNishanth Menon desc, queue_desc, qinst, 906a2b79838SNishanth Menon chans); 907aace66b1SNishanth Menon if (ret) 908aace66b1SNishanth Menon return ret; 909aace66b1SNishanth Menon } 910a2b79838SNishanth Menon } 911aace66b1SNishanth Menon 912aace66b1SNishanth Menon mbox = &inst->mbox; 913aace66b1SNishanth Menon mbox->dev = dev; 914aace66b1SNishanth Menon mbox->ops = &ti_msgmgr_chan_ops; 915aace66b1SNishanth Menon mbox->chans = inst->chans; 916aace66b1SNishanth Menon mbox->num_chans = inst->num_valid_queues; 917aace66b1SNishanth Menon mbox->txdone_irq = false; 918aace66b1SNishanth Menon mbox->txdone_poll = desc->tx_polled; 919aace66b1SNishanth Menon if (desc->tx_polled) 920aace66b1SNishanth Menon mbox->txpoll_period = desc->tx_poll_timeout_ms; 921aace66b1SNishanth Menon mbox->of_xlate = ti_msgmgr_of_xlate; 922aace66b1SNishanth Menon 923aace66b1SNishanth Menon platform_set_drvdata(pdev, inst); 9242298a6f0SThierry Reding ret = devm_mbox_controller_register(dev, mbox); 925aace66b1SNishanth Menon if (ret) 926aace66b1SNishanth Menon dev_err(dev, "Failed to register mbox_controller(%d)\n", ret); 927aace66b1SNishanth Menon 928aace66b1SNishanth Menon return ret; 929aace66b1SNishanth Menon } 930aace66b1SNishanth Menon 931aace66b1SNishanth Menon static struct platform_driver ti_msgmgr_driver = { 932aace66b1SNishanth Menon .probe = ti_msgmgr_probe, 933aace66b1SNishanth Menon .driver = { 934aace66b1SNishanth Menon .name = "ti-msgmgr", 935aace66b1SNishanth Menon .of_match_table = of_match_ptr(ti_msgmgr_of_match), 936df227dc8SDave Gerlach .pm = &ti_msgmgr_pm_ops, 937aace66b1SNishanth Menon }, 938aace66b1SNishanth Menon }; 939aace66b1SNishanth Menon module_platform_driver(ti_msgmgr_driver); 940aace66b1SNishanth Menon 941aace66b1SNishanth Menon MODULE_LICENSE("GPL v2"); 942aace66b1SNishanth Menon MODULE_DESCRIPTION("TI message manager driver"); 943aace66b1SNishanth Menon MODULE_AUTHOR("Nishanth Menon"); 944aace66b1SNishanth Menon MODULE_ALIAS("platform:ti-msgmgr"); 945