1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2014 Linaro Ltd. 4 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org> 5 * 6 * PCC (Platform Communication Channel) is defined in the ACPI 5.0+ 7 * specification. It is a mailbox like mechanism to allow clients 8 * such as CPPC (Collaborative Processor Performance Control), RAS 9 * (Reliability, Availability and Serviceability) and MPST (Memory 10 * Node Power State Table) to talk to the platform (e.g. BMC) through 11 * shared memory regions as defined in the PCC table entries. The PCC 12 * specification supports a Doorbell mechanism for the PCC clients 13 * to notify the platform about new data. This Doorbell information 14 * is also specified in each PCC table entry. 15 * 16 * Typical high level flow of operation is: 17 * 18 * PCC Reads: 19 * * Client tries to acquire a channel lock. 20 * * After it is acquired it writes READ cmd in communication region cmd 21 * address. 22 * * Client issues mbox_send_message() which rings the PCC doorbell 23 * for its PCC channel. 24 * * If command completes, then client has control over channel and 25 * it can proceed with its reads. 26 * * Client releases lock. 27 * 28 * PCC Writes: 29 * * Client tries to acquire channel lock. 30 * * Client writes to its communication region after it acquires a 31 * channel lock. 32 * * Client writes WRITE cmd in communication region cmd address. 33 * * Client issues mbox_send_message() which rings the PCC doorbell 34 * for its PCC channel. 35 * * If command completes, then writes have succeeded and it can release 36 * the channel lock. 37 * 38 * There is a Nominal latency defined for each channel which indicates 39 * how long to wait until a command completes. If command is not complete 40 * the client needs to retry or assume failure. 41 * 42 * For more details about PCC, please see the ACPI specification from 43 * http://www.uefi.org/ACPIv5.1 Section 14. 44 * 45 * This file implements PCC as a Mailbox controller and allows for PCC 46 * clients to be implemented as its Mailbox Client Channels. 47 */ 48 49 #include <linux/acpi.h> 50 #include <linux/delay.h> 51 #include <linux/io.h> 52 #include <linux/init.h> 53 #include <linux/interrupt.h> 54 #include <linux/list.h> 55 #include <linux/log2.h> 56 #include <linux/mutex.h> 57 #include <linux/platform_device.h> 58 #include <linux/mailbox_controller.h> 59 #include <linux/mailbox_client.h> 60 #include <linux/io-64-nonatomic-lo-hi.h> 61 #include <acpi/pcc.h> 62 63 #define MBOX_IRQ_NAME "pcc-mbox" 64 65 /** 66 * struct pcc_chan_reg - PCC register bundle 67 * 68 * @vaddr: cached virtual address for this register 69 * @gas: pointer to the generic address structure for this register 70 * @preserve_mask: bitmask to preserve when writing to this register 71 * @set_mask: bitmask to set when writing to this register 72 * @status_mask: bitmask to determine and/or update the status for this register 73 */ 74 struct pcc_chan_reg { 75 void __iomem *vaddr; 76 struct acpi_generic_address *gas; 77 u64 preserve_mask; 78 u64 set_mask; 79 u64 status_mask; 80 }; 81 82 /** 83 * struct pcc_chan_info - PCC channel specific information 84 * 85 * @chan: PCC channel information with Shared Memory Region info 86 * @db: PCC register bundle for the doorbell register 87 * @plat_irq_ack: PCC register bundle for the platform interrupt acknowledge 88 * register 89 * @cmd_complete: PCC register bundle for the command complete check register 90 * @cmd_update: PCC register bundle for the command complete update register 91 * @error: PCC register bundle for the error status register 92 * @plat_irq: platform interrupt 93 * @type: PCC subspace type 94 * @plat_irq_flags: platform interrupt flags 95 * @chan_in_use: lockless flag used by type 3 initiator subspaces to filter 96 * platform interrupts. Only one transfer can occur at a time, but 97 * the interrupt handler may sample the flag on another CPU, so all 98 * accesses must use READ_ONCE() or WRITE_ONCE(). Other subspace 99 * types do not test it. 100 */ 101 struct pcc_chan_info { 102 struct pcc_mbox_chan chan; 103 struct pcc_chan_reg db; 104 struct pcc_chan_reg plat_irq_ack; 105 struct pcc_chan_reg cmd_complete; 106 struct pcc_chan_reg cmd_update; 107 struct pcc_chan_reg error; 108 int plat_irq; 109 u8 type; 110 unsigned int plat_irq_flags; 111 bool chan_in_use; 112 }; 113 114 #define to_pcc_chan_info(c) container_of(c, struct pcc_chan_info, chan) 115 static struct pcc_chan_info *chan_info; 116 static int pcc_chan_count; 117 static DEFINE_MUTEX(pcc_chan_mutex); 118 119 /* 120 * PCC can be used with perf critical drivers such as CPPC 121 * So it makes sense to locally cache the virtual address and 122 * use it to read/write to PCC registers such as doorbell register 123 * 124 * The below read_register and write_registers are used to read and 125 * write from perf critical registers such as PCC doorbell register 126 */ 127 static void read_register(void __iomem *vaddr, u64 *val, unsigned int bit_width) 128 { 129 switch (bit_width) { 130 case 8: 131 *val = readb(vaddr); 132 break; 133 case 16: 134 *val = readw(vaddr); 135 break; 136 case 32: 137 *val = readl(vaddr); 138 break; 139 case 64: 140 *val = readq(vaddr); 141 break; 142 } 143 } 144 145 static void write_register(void __iomem *vaddr, u64 val, unsigned int bit_width) 146 { 147 switch (bit_width) { 148 case 8: 149 writeb(val, vaddr); 150 break; 151 case 16: 152 writew(val, vaddr); 153 break; 154 case 32: 155 writel(val, vaddr); 156 break; 157 case 64: 158 writeq(val, vaddr); 159 break; 160 } 161 } 162 163 static int pcc_chan_reg_read(struct pcc_chan_reg *reg, u64 *val) 164 { 165 int ret = 0; 166 167 if (!reg->gas) { 168 *val = 0; 169 return 0; 170 } 171 172 if (reg->vaddr) 173 read_register(reg->vaddr, val, reg->gas->bit_width); 174 else 175 ret = acpi_read(val, reg->gas); 176 177 return ret; 178 } 179 180 static int pcc_chan_reg_write(struct pcc_chan_reg *reg, u64 val) 181 { 182 int ret = 0; 183 184 if (!reg->gas) 185 return 0; 186 187 if (reg->vaddr) 188 write_register(reg->vaddr, val, reg->gas->bit_width); 189 else 190 ret = acpi_write(val, reg->gas); 191 192 return ret; 193 } 194 195 static int pcc_chan_reg_read_modify_write(struct pcc_chan_reg *reg) 196 { 197 int ret = 0; 198 u64 val; 199 200 ret = pcc_chan_reg_read(reg, &val); 201 if (ret) 202 return ret; 203 204 val &= reg->preserve_mask; 205 val |= reg->set_mask; 206 207 return pcc_chan_reg_write(reg, val); 208 } 209 210 /** 211 * pcc_map_interrupt - Map a PCC subspace GSI to a linux IRQ number 212 * @interrupt: GSI number. 213 * @flags: interrupt flags 214 * 215 * Returns: a valid linux IRQ number on success 216 * 0 or -EINVAL on failure 217 */ 218 static int pcc_map_interrupt(u32 interrupt, u32 flags) 219 { 220 int trigger, polarity; 221 222 if (!interrupt) 223 return 0; 224 225 trigger = (flags & ACPI_PCCT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE 226 : ACPI_LEVEL_SENSITIVE; 227 228 polarity = (flags & ACPI_PCCT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW 229 : ACPI_ACTIVE_HIGH; 230 231 return acpi_register_gsi(NULL, interrupt, trigger, polarity); 232 } 233 234 static bool pcc_chan_plat_irq_can_be_shared(struct pcc_chan_info *pchan) 235 { 236 return (pchan->plat_irq_flags & ACPI_PCCT_INTERRUPT_MODE) == 237 ACPI_LEVEL_SENSITIVE; 238 } 239 240 static bool pcc_mbox_cmd_complete_check(struct pcc_chan_info *pchan) 241 { 242 u64 val; 243 int ret; 244 245 if (!pchan->cmd_complete.gas) 246 return true; 247 248 ret = pcc_chan_reg_read(&pchan->cmd_complete, &val); 249 if (ret) 250 return false; 251 252 /* 253 * Judge if the channel respond the interrupt based on the value of 254 * command complete. 255 */ 256 val &= pchan->cmd_complete.status_mask; 257 258 /* 259 * If this is PCC slave subspace channel, and the command complete 260 * bit 0 indicates that Platform is sending a notification and OSPM 261 * needs to respond this interrupt to process this command. 262 */ 263 if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) 264 return !val; 265 266 return !!val; 267 } 268 269 static int pcc_mbox_error_check_and_clear(struct pcc_chan_info *pchan) 270 { 271 u64 val; 272 int ret; 273 274 ret = pcc_chan_reg_read(&pchan->error, &val); 275 if (ret) 276 return ret; 277 278 if (val & pchan->error.status_mask) { 279 val &= pchan->error.preserve_mask; 280 pcc_chan_reg_write(&pchan->error, val); 281 return -EIO; 282 } 283 284 return 0; 285 } 286 287 static void pcc_chan_acknowledge(struct pcc_chan_info *pchan) 288 { 289 struct acpi_pcct_ext_pcc_shared_memory __iomem *pcc_hdr; 290 291 if (pchan->type != ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) 292 return; 293 294 pcc_chan_reg_read_modify_write(&pchan->cmd_update); 295 296 pcc_hdr = pchan->chan.shmem; 297 298 /* 299 * The PCC slave subspace channel needs to set the command 300 * complete bit after processing message. If the PCC_ACK_FLAG 301 * is set, it should also ring the doorbell. 302 */ 303 if (ioread32(&pcc_hdr->flags) & PCC_CMD_COMPLETION_NOTIFY) 304 pcc_chan_reg_read_modify_write(&pchan->db); 305 } 306 307 /** 308 * pcc_mbox_irq - PCC mailbox interrupt handler 309 * @irq: interrupt number 310 * @p: data/cookie passed from the caller to identify the channel 311 * 312 * Returns: IRQ_HANDLED if interrupt is handled or IRQ_NONE if not 313 */ 314 static irqreturn_t pcc_mbox_irq(int irq, void *p) 315 { 316 struct pcc_chan_info *pchan; 317 struct mbox_chan *chan = p; 318 319 pchan = chan->con_priv; 320 321 if (pcc_chan_reg_read_modify_write(&pchan->plat_irq_ack)) 322 return IRQ_NONE; 323 324 /* 325 * Initiator subspaces use this flag to filter shared interrupts. Use 326 * READ_ONCE() to sample the lockless flag written by pcc_send_data() 327 * on another CPU. 328 */ 329 if (pchan->type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE && 330 !READ_ONCE(pchan->chan_in_use)) 331 return IRQ_NONE; 332 333 if (!pcc_mbox_cmd_complete_check(pchan)) 334 return IRQ_NONE; 335 336 if (pcc_mbox_error_check_and_clear(pchan)) 337 return IRQ_NONE; 338 339 /* 340 * Clear this flag after updating the interrupt ack register and before 341 * notifying the client and mailbox core. mbox_chan_txdone() may submit 342 * the next queued transfer and set the flag again. Use WRITE_ONCE() for 343 * the lockless update observed by the send and interrupt paths. 344 */ 345 WRITE_ONCE(pchan->chan_in_use, false); 346 mbox_chan_received_data(chan, NULL); 347 mbox_chan_txdone(chan, 0); 348 349 pcc_chan_acknowledge(pchan); 350 351 return IRQ_HANDLED; 352 } 353 354 static int pcc_mbox_validate_signature(struct pcc_mbox_chan *pcc_mchan, 355 int subspace_id) 356 { 357 u32 expected_signature = PCC_SIGNATURE | subspace_id; 358 u32 signature; 359 360 if (pcc_mchan->shmem_size < sizeof(signature)) { 361 pr_err("PCC subspace %d shared memory is too small\n", 362 subspace_id); 363 return -EINVAL; 364 } 365 366 signature = ioread32(pcc_mchan->shmem); 367 if (signature != expected_signature) 368 pr_warn("PCC subspace %d invalid signature %#x expected %#x\n", 369 subspace_id, signature, expected_signature); 370 371 return 0; 372 } 373 374 /** 375 * pcc_mbox_request_channel - PCC clients call this function to 376 * request a pointer to their PCC subspace, from which they 377 * can get the details of communicating with the remote. 378 * @cl: Pointer to Mailbox client, so we know where to bind the 379 * Channel. 380 * @subspace_id: The PCC Subspace index as parsed in the PCC client 381 * ACPI package. This is used to lookup the array of PCC 382 * subspaces as parsed by the PCC Mailbox controller. 383 * 384 * Return: Pointer to the PCC Mailbox Channel if successful or ERR_PTR. 385 */ 386 struct pcc_mbox_chan * 387 pcc_mbox_request_channel(struct mbox_client *cl, int subspace_id) 388 { 389 struct pcc_mbox_chan *pcc_mchan; 390 struct pcc_chan_info *pchan; 391 struct mbox_chan *chan; 392 int rc; 393 394 if (subspace_id < 0 || subspace_id >= pcc_chan_count) 395 return ERR_PTR(-ENOENT); 396 397 guard(mutex)(&pcc_chan_mutex); 398 399 pchan = chan_info + subspace_id; 400 chan = pchan->chan.mchan; 401 if (IS_ERR(chan) || chan->cl) { 402 pr_err("Channel not found for idx: %d\n", subspace_id); 403 return ERR_PTR(-EBUSY); 404 } 405 406 pcc_mchan = &pchan->chan; 407 pcc_mchan->shmem = acpi_os_ioremap(pcc_mchan->shmem_base_addr, 408 pcc_mchan->shmem_size); 409 if (!pcc_mchan->shmem) 410 return ERR_PTR(-ENXIO); 411 412 rc = pcc_mbox_validate_signature(pcc_mchan, subspace_id); 413 if (rc) 414 goto err_unmap_shmem; 415 416 rc = mbox_bind_client(chan, cl); 417 if (rc) 418 goto err_unmap_shmem; 419 420 return pcc_mchan; 421 422 err_unmap_shmem: 423 iounmap(pcc_mchan->shmem); 424 pcc_mchan->shmem = NULL; 425 return ERR_PTR(rc); 426 } 427 EXPORT_SYMBOL_GPL(pcc_mbox_request_channel); 428 429 /** 430 * pcc_mbox_free_channel - Clients call this to free their Channel. 431 * 432 * @pchan: Pointer to the PCC mailbox channel as returned by 433 * pcc_mbox_request_channel() 434 */ 435 void pcc_mbox_free_channel(struct pcc_mbox_chan *pchan) 436 { 437 struct mbox_chan *chan = pchan->mchan; 438 struct pcc_chan_info *pchan_info; 439 struct pcc_mbox_chan *pcc_mbox_chan; 440 441 guard(mutex)(&pcc_chan_mutex); 442 443 if (!chan || !chan->cl) 444 return; 445 pchan_info = chan->con_priv; 446 pcc_mbox_chan = &pchan_info->chan; 447 448 mbox_free_channel(chan); 449 450 if (pcc_mbox_chan->shmem) { 451 iounmap(pcc_mbox_chan->shmem); 452 pcc_mbox_chan->shmem = NULL; 453 } 454 } 455 EXPORT_SYMBOL_GPL(pcc_mbox_free_channel); 456 457 /** 458 * pcc_send_data - Called from Mailbox Controller code. Used 459 * here only to ring the channel doorbell. The PCC client 460 * specific read/write is done in the client driver in 461 * order to maintain atomicity over PCC channel once 462 * OS has control over it. See above for flow of operations. 463 * @chan: Pointer to Mailbox channel over which to send data. 464 * @data: Client specific data written over channel. Used here 465 * only for debug after PCC transaction completes. 466 * 467 * Return: Err if something failed else 0 for success. 468 */ 469 static int pcc_send_data(struct mbox_chan *chan, void *data) 470 { 471 int ret; 472 struct pcc_chan_info *pchan = chan->con_priv; 473 474 ret = pcc_chan_reg_read_modify_write(&pchan->cmd_update); 475 if (ret) 476 return ret; 477 478 /* 479 * Set chan_in_use before ringing the doorbell so a fast completion 480 * interrupt is not mistaken for a shared interrupt from another 481 * subspace. Use WRITE_ONCE() for the lockless flag update. The 482 * ordered I/O accessor used to ring the doorbell orders this store 483 * before the platform is notified. 484 */ 485 if (pchan->plat_irq > 0) 486 WRITE_ONCE(pchan->chan_in_use, true); 487 ret = pcc_chan_reg_read_modify_write(&pchan->db); 488 if (ret && pchan->plat_irq > 0) 489 WRITE_ONCE(pchan->chan_in_use, false); 490 491 return ret; 492 } 493 494 static bool pcc_last_tx_done(struct mbox_chan *chan) 495 { 496 struct pcc_chan_info *pchan = chan->con_priv; 497 498 if (!(chan->txdone_method & MBOX_TXDONE_BY_POLL)) 499 return false; 500 501 if (!pcc_mbox_cmd_complete_check(pchan)) 502 return false; 503 504 mbox_chan_received_data(chan, NULL); 505 506 return true; 507 } 508 509 /** 510 * pcc_startup - Called from Mailbox Controller code. Used here 511 * to request the interrupt. 512 * @chan: Pointer to Mailbox channel to startup. 513 * 514 * Return: Err if something failed else 0 for success. 515 */ 516 static int pcc_startup(struct mbox_chan *chan) 517 { 518 struct pcc_chan_info *pchan = chan->con_priv; 519 unsigned long irqflags; 520 int rc; 521 522 /* 523 * Clear and acknowledge any pending interrupts on responder channel 524 * before enabling the interrupt 525 */ 526 pcc_chan_acknowledge(pchan); 527 528 if (pchan->plat_irq > 0) { 529 irqflags = pcc_chan_plat_irq_can_be_shared(pchan) ? 530 IRQF_SHARED : 0; 531 rc = devm_request_irq(chan->mbox->dev, pchan->plat_irq, pcc_mbox_irq, 532 irqflags, MBOX_IRQ_NAME, chan); 533 if (unlikely(rc)) { 534 dev_err(chan->mbox->dev, "failed to register PCC interrupt %d\n", 535 pchan->plat_irq); 536 return rc; 537 } 538 } 539 540 return 0; 541 } 542 543 /** 544 * pcc_shutdown - Called from Mailbox Controller code. Used here 545 * to free the interrupt. 546 * @chan: Pointer to Mailbox channel to shutdown. 547 */ 548 static void pcc_shutdown(struct mbox_chan *chan) 549 { 550 struct pcc_chan_info *pchan = chan->con_priv; 551 552 if (pchan->plat_irq > 0) 553 devm_free_irq(chan->mbox->dev, pchan->plat_irq, chan); 554 } 555 556 static const struct mbox_chan_ops pcc_chan_ops = { 557 .send_data = pcc_send_data, 558 .startup = pcc_startup, 559 .shutdown = pcc_shutdown, 560 .last_tx_done = pcc_last_tx_done, 561 }; 562 563 /** 564 * parse_pcc_subspace - Count PCC subspaces defined 565 * @header: Pointer to the ACPI subtable header under the PCCT. 566 * @end: End of subtable entry. 567 * 568 * Return: If we find a PCC subspace entry of a valid type, return 0. 569 * Otherwise, return -EINVAL. 570 * 571 * This gets called for each entry in the PCC table. 572 */ 573 static int parse_pcc_subspace(union acpi_subtable_headers *header, 574 const unsigned long end) 575 { 576 struct acpi_pcct_subspace *ss = (struct acpi_pcct_subspace *) header; 577 578 if (ss->header.type < ACPI_PCCT_TYPE_RESERVED) 579 return 0; 580 581 return -EINVAL; 582 } 583 584 static int 585 pcc_chan_reg_init(struct pcc_chan_reg *reg, struct acpi_generic_address *gas, 586 u64 preserve_mask, u64 set_mask, u64 status_mask, char *name) 587 { 588 if (gas->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { 589 if (!(gas->bit_width >= 8 && gas->bit_width <= 64 && 590 is_power_of_2(gas->bit_width))) { 591 pr_err("Error: Cannot access register of %u bit width", 592 gas->bit_width); 593 return -EFAULT; 594 } 595 596 reg->vaddr = acpi_os_ioremap(gas->address, gas->bit_width / 8); 597 if (!reg->vaddr) { 598 pr_err("Failed to ioremap PCC %s register\n", name); 599 return -ENOMEM; 600 } 601 } 602 reg->gas = gas; 603 reg->preserve_mask = preserve_mask; 604 reg->set_mask = set_mask; 605 reg->status_mask = status_mask; 606 return 0; 607 } 608 609 /** 610 * pcc_parse_subspace_irq - Parse the PCC IRQ and PCC ACK register 611 * 612 * @pchan: Pointer to the PCC channel info structure. 613 * @pcct_entry: Pointer to the ACPI subtable header. 614 * 615 * Return: 0 for Success, else errno. 616 * 617 * There should be one entry per PCC channel. This gets called for each 618 * entry in the PCC table. This uses PCCY Type1 structure for all applicable 619 * types(Type 1-4) to fetch irq 620 */ 621 static int pcc_parse_subspace_irq(struct pcc_chan_info *pchan, 622 struct acpi_subtable_header *pcct_entry) 623 { 624 int ret = 0; 625 struct acpi_pcct_hw_reduced *pcct_ss; 626 627 if (pcct_entry->type < ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE || 628 pcct_entry->type > ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) 629 return 0; 630 631 pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry; 632 pchan->plat_irq = pcc_map_interrupt(pcct_ss->platform_interrupt, 633 (u32)pcct_ss->flags); 634 if (pchan->plat_irq <= 0) { 635 pr_err("PCC GSI %d not registered\n", 636 pcct_ss->platform_interrupt); 637 return -EINVAL; 638 } 639 pchan->plat_irq_flags = pcct_ss->flags; 640 641 if (pcct_ss->header.type == ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { 642 struct acpi_pcct_hw_reduced_type2 *pcct2_ss = (void *)pcct_ss; 643 644 ret = pcc_chan_reg_init(&pchan->plat_irq_ack, 645 &pcct2_ss->platform_ack_register, 646 pcct2_ss->ack_preserve_mask, 647 pcct2_ss->ack_write_mask, 0, 648 "PLAT IRQ ACK"); 649 650 } else if (pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE || 651 pcct_ss->header.type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE) { 652 struct acpi_pcct_ext_pcc_master *pcct_ext = (void *)pcct_ss; 653 654 ret = pcc_chan_reg_init(&pchan->plat_irq_ack, 655 &pcct_ext->platform_ack_register, 656 pcct_ext->ack_preserve_mask, 657 pcct_ext->ack_set_mask, 0, 658 "PLAT IRQ ACK"); 659 } 660 661 if (pcc_chan_plat_irq_can_be_shared(pchan) && 662 !pchan->plat_irq_ack.gas) { 663 pr_err("PCC subspace has level IRQ with no ACK register\n"); 664 return -EINVAL; 665 } 666 667 return ret; 668 } 669 670 /** 671 * pcc_parse_subspace_db_reg - Parse the PCC doorbell register 672 * 673 * @pchan: Pointer to the PCC channel info structure. 674 * @pcct_entry: Pointer to the ACPI subtable header. 675 * 676 * Return: 0 for Success, else errno. 677 */ 678 static int pcc_parse_subspace_db_reg(struct pcc_chan_info *pchan, 679 struct acpi_subtable_header *pcct_entry) 680 { 681 int ret = 0; 682 683 if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { 684 struct acpi_pcct_subspace *pcct_ss; 685 686 pcct_ss = (struct acpi_pcct_subspace *)pcct_entry; 687 688 ret = pcc_chan_reg_init(&pchan->db, 689 &pcct_ss->doorbell_register, 690 pcct_ss->preserve_mask, 691 pcct_ss->write_mask, 0, "Doorbell"); 692 693 } else { 694 struct acpi_pcct_ext_pcc_master *pcct_ext; 695 696 pcct_ext = (struct acpi_pcct_ext_pcc_master *)pcct_entry; 697 698 ret = pcc_chan_reg_init(&pchan->db, 699 &pcct_ext->doorbell_register, 700 pcct_ext->preserve_mask, 701 pcct_ext->write_mask, 0, "Doorbell"); 702 if (ret) 703 return ret; 704 705 ret = pcc_chan_reg_init(&pchan->cmd_complete, 706 &pcct_ext->cmd_complete_register, 707 0, 0, pcct_ext->cmd_complete_mask, 708 "Command Complete Check"); 709 if (ret) 710 return ret; 711 712 ret = pcc_chan_reg_init(&pchan->cmd_update, 713 &pcct_ext->cmd_update_register, 714 pcct_ext->cmd_update_preserve_mask, 715 pcct_ext->cmd_update_set_mask, 0, 716 "Command Complete Update"); 717 if (ret) 718 return ret; 719 720 ret = pcc_chan_reg_init(&pchan->error, 721 &pcct_ext->error_status_register, 722 ~pcct_ext->error_status_mask, 0, 723 pcct_ext->error_status_mask, 724 "Error Status"); 725 } 726 return ret; 727 } 728 729 /** 730 * pcc_parse_subspace_shmem - Parse the PCC Shared Memory Region information 731 * 732 * @pchan: Pointer to the PCC channel info structure. 733 * @pcct_entry: Pointer to the ACPI subtable header. 734 * 735 */ 736 static void pcc_parse_subspace_shmem(struct pcc_chan_info *pchan, 737 struct acpi_subtable_header *pcct_entry) 738 { 739 if (pcct_entry->type <= ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2) { 740 struct acpi_pcct_subspace *pcct_ss = 741 (struct acpi_pcct_subspace *)pcct_entry; 742 743 pchan->chan.shmem_base_addr = pcct_ss->base_address; 744 pchan->chan.shmem_size = pcct_ss->length; 745 pchan->chan.latency = pcct_ss->latency; 746 pchan->chan.max_access_rate = pcct_ss->max_access_rate; 747 pchan->chan.min_turnaround_time = pcct_ss->min_turnaround_time; 748 } else { 749 struct acpi_pcct_ext_pcc_master *pcct_ext = 750 (struct acpi_pcct_ext_pcc_master *)pcct_entry; 751 752 pchan->chan.shmem_base_addr = pcct_ext->base_address; 753 pchan->chan.shmem_size = pcct_ext->length; 754 pchan->chan.latency = pcct_ext->latency; 755 pchan->chan.max_access_rate = pcct_ext->max_access_rate; 756 pchan->chan.min_turnaround_time = pcct_ext->min_turnaround_time; 757 } 758 } 759 760 /** 761 * acpi_pcc_probe - Parse the ACPI tree for the PCCT. 762 * 763 * Return: 0 for Success, else errno. 764 */ 765 static int __init acpi_pcc_probe(void) 766 { 767 int count, i, rc = 0; 768 acpi_status status; 769 struct acpi_table_header *pcct_tbl; 770 struct acpi_subtable_proc proc[ACPI_PCCT_TYPE_RESERVED]; 771 772 status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl); 773 if (ACPI_FAILURE(status) || !pcct_tbl) 774 return -ENODEV; 775 776 /* Set up the subtable handlers */ 777 for (i = ACPI_PCCT_TYPE_GENERIC_SUBSPACE; 778 i < ACPI_PCCT_TYPE_RESERVED; i++) { 779 proc[i].id = i; 780 proc[i].count = 0; 781 proc[i].handler = parse_pcc_subspace; 782 } 783 784 count = acpi_table_parse_entries_array(ACPI_SIG_PCCT, 785 sizeof(struct acpi_table_pcct), proc, 786 ACPI_PCCT_TYPE_RESERVED, MAX_PCC_SUBSPACES); 787 if (count <= 0 || count > MAX_PCC_SUBSPACES) { 788 if (count < 0) 789 pr_warn("Error parsing PCC subspaces from PCCT\n"); 790 else 791 pr_warn("Invalid PCCT: %d PCC subspaces\n", count); 792 793 rc = -EINVAL; 794 } else { 795 pcc_chan_count = count; 796 } 797 798 acpi_put_table(pcct_tbl); 799 800 return rc; 801 } 802 803 /** 804 * pcc_mbox_probe - Called when we find a match for the 805 * PCCT platform device. This is purely used to represent 806 * the PCCT as a virtual device for registering with the 807 * generic Mailbox framework. 808 * 809 * @pdev: Pointer to platform device returned when a match 810 * is found. 811 * 812 * Return: 0 for Success, else errno. 813 */ 814 static int pcc_mbox_probe(struct platform_device *pdev) 815 { 816 struct device *dev = &pdev->dev; 817 struct mbox_controller *pcc_mbox_ctrl; 818 struct mbox_chan *pcc_mbox_channels; 819 struct acpi_table_header *pcct_tbl; 820 struct acpi_subtable_header *pcct_entry; 821 struct acpi_table_pcct *acpi_pcct_tbl; 822 acpi_status status = AE_OK; 823 int i, rc, count = pcc_chan_count; 824 825 /* Search for PCCT */ 826 status = acpi_get_table(ACPI_SIG_PCCT, 0, &pcct_tbl); 827 828 if (ACPI_FAILURE(status) || !pcct_tbl) 829 return -ENODEV; 830 831 pcc_mbox_channels = devm_kzalloc_objs(dev, *pcc_mbox_channels, count); 832 if (!pcc_mbox_channels) { 833 rc = -ENOMEM; 834 goto err; 835 } 836 837 chan_info = devm_kzalloc_objs(dev, *chan_info, count); 838 if (!chan_info) { 839 rc = -ENOMEM; 840 goto err; 841 } 842 843 pcc_mbox_ctrl = devm_kzalloc_obj(dev, *pcc_mbox_ctrl); 844 if (!pcc_mbox_ctrl) { 845 rc = -ENOMEM; 846 goto err; 847 } 848 849 /* Point to the first PCC subspace entry */ 850 pcct_entry = (struct acpi_subtable_header *) ( 851 (unsigned long) pcct_tbl + sizeof(struct acpi_table_pcct)); 852 853 acpi_pcct_tbl = (struct acpi_table_pcct *) pcct_tbl; 854 if (acpi_pcct_tbl->flags & ACPI_PCCT_DOORBELL) { 855 pcc_mbox_ctrl->txdone_irq = true; 856 pcc_mbox_ctrl->txdone_poll = false; 857 } else { 858 pcc_mbox_ctrl->txdone_irq = false; 859 pcc_mbox_ctrl->txdone_poll = true; 860 } 861 862 for (i = 0; i < count; i++) { 863 struct pcc_chan_info *pchan = chan_info + i; 864 865 pcc_mbox_channels[i].con_priv = pchan; 866 pchan->chan.mchan = &pcc_mbox_channels[i]; 867 868 if (pcct_entry->type == ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE && 869 !pcc_mbox_ctrl->txdone_irq) { 870 pr_err("Platform Interrupt flag must be set to 1"); 871 rc = -EINVAL; 872 goto err; 873 } 874 875 if (pcc_mbox_ctrl->txdone_irq) { 876 rc = pcc_parse_subspace_irq(pchan, pcct_entry); 877 if (rc < 0) 878 goto err; 879 } 880 rc = pcc_parse_subspace_db_reg(pchan, pcct_entry); 881 if (rc < 0) 882 goto err; 883 884 pcc_parse_subspace_shmem(pchan, pcct_entry); 885 886 pchan->type = pcct_entry->type; 887 pcct_entry = (struct acpi_subtable_header *) 888 ((unsigned long) pcct_entry + pcct_entry->length); 889 } 890 891 pcc_mbox_ctrl->num_chans = count; 892 893 pr_info("Detected %d PCC Subspaces\n", pcc_mbox_ctrl->num_chans); 894 895 pcc_mbox_ctrl->chans = pcc_mbox_channels; 896 pcc_mbox_ctrl->ops = &pcc_chan_ops; 897 pcc_mbox_ctrl->dev = dev; 898 899 pr_info("Registering PCC driver as Mailbox controller\n"); 900 rc = mbox_controller_register(pcc_mbox_ctrl); 901 if (rc) 902 pr_err("Err registering PCC as Mailbox controller: %d\n", rc); 903 else 904 return 0; 905 err: 906 acpi_put_table(pcct_tbl); 907 return rc; 908 } 909 910 static struct platform_driver pcc_mbox_driver = { 911 .probe = pcc_mbox_probe, 912 .driver = { 913 .name = "PCCT", 914 }, 915 }; 916 917 static int __init pcc_init(void) 918 { 919 int ret; 920 struct platform_device *pcc_pdev; 921 922 if (acpi_disabled) 923 return -ENODEV; 924 925 /* Check if PCC support is available. */ 926 ret = acpi_pcc_probe(); 927 928 if (ret) { 929 pr_debug("ACPI PCC probe failed.\n"); 930 return -ENODEV; 931 } 932 933 pcc_pdev = platform_create_bundle(&pcc_mbox_driver, 934 pcc_mbox_probe, NULL, 0, NULL, 0); 935 936 if (IS_ERR(pcc_pdev)) { 937 pr_debug("Err creating PCC platform bundle\n"); 938 pcc_chan_count = 0; 939 return PTR_ERR(pcc_pdev); 940 } 941 942 return 0; 943 } 944 945 /* 946 * Make PCC init postcore so that users of this mailbox 947 * such as the ACPI Processor driver have it available 948 * at their init. 949 */ 950 postcore_initcall(pcc_init); 951