1*ae524eb7SJammy Huang // SPDX-License-Identifier: GPL-2.0-only 2*ae524eb7SJammy Huang /* 3*ae524eb7SJammy Huang * Copyright Aspeed Technology Inc. (C) 2025. All rights reserved 4*ae524eb7SJammy Huang */ 5*ae524eb7SJammy Huang 6*ae524eb7SJammy Huang #include <linux/interrupt.h> 7*ae524eb7SJammy Huang #include <linux/io.h> 8*ae524eb7SJammy Huang #include <linux/iopoll.h> 9*ae524eb7SJammy Huang #include <linux/kernel.h> 10*ae524eb7SJammy Huang #include <linux/mailbox_controller.h> 11*ae524eb7SJammy Huang #include <linux/module.h> 12*ae524eb7SJammy Huang #include <linux/of.h> 13*ae524eb7SJammy Huang #include <linux/platform_device.h> 14*ae524eb7SJammy Huang #include <linux/slab.h> 15*ae524eb7SJammy Huang 16*ae524eb7SJammy Huang /* Each bit in the register represents an IPC ID */ 17*ae524eb7SJammy Huang #define IPCR_TX_TRIG 0x00 18*ae524eb7SJammy Huang #define IPCR_ENABLE 0x04 19*ae524eb7SJammy Huang #define IPCR_STATUS 0x08 20*ae524eb7SJammy Huang #define RX_IRQ(n) BIT(n) 21*ae524eb7SJammy Huang #define RX_IRQ_MASK 0xf 22*ae524eb7SJammy Huang #define IPCR_DATA 0x10 23*ae524eb7SJammy Huang 24*ae524eb7SJammy Huang struct ast2700_mbox_data { 25*ae524eb7SJammy Huang u8 num_chans; 26*ae524eb7SJammy Huang u8 msg_size; 27*ae524eb7SJammy Huang }; 28*ae524eb7SJammy Huang 29*ae524eb7SJammy Huang struct ast2700_mbox { 30*ae524eb7SJammy Huang struct mbox_controller mbox; 31*ae524eb7SJammy Huang u8 msg_size; 32*ae524eb7SJammy Huang void __iomem *tx_regs; 33*ae524eb7SJammy Huang void __iomem *rx_regs; 34*ae524eb7SJammy Huang spinlock_t lock; 35*ae524eb7SJammy Huang }; 36*ae524eb7SJammy Huang 37*ae524eb7SJammy Huang static inline int ch_num(struct mbox_chan *chan) 38*ae524eb7SJammy Huang { 39*ae524eb7SJammy Huang return chan - chan->mbox->chans; 40*ae524eb7SJammy Huang } 41*ae524eb7SJammy Huang 42*ae524eb7SJammy Huang static inline bool ast2700_mbox_tx_done(struct ast2700_mbox *mb, int idx) 43*ae524eb7SJammy Huang { 44*ae524eb7SJammy Huang return !(readl(mb->tx_regs + IPCR_STATUS) & BIT(idx)); 45*ae524eb7SJammy Huang } 46*ae524eb7SJammy Huang 47*ae524eb7SJammy Huang static irqreturn_t ast2700_mbox_irq(int irq, void *p) 48*ae524eb7SJammy Huang { 49*ae524eb7SJammy Huang struct ast2700_mbox *mb = p; 50*ae524eb7SJammy Huang void __iomem *data_reg; 51*ae524eb7SJammy Huang int num_words = mb->msg_size / sizeof(u32); 52*ae524eb7SJammy Huang u32 *word_data; 53*ae524eb7SJammy Huang u32 status; 54*ae524eb7SJammy Huang int n, i; 55*ae524eb7SJammy Huang 56*ae524eb7SJammy Huang /* Only examine channels that are currently enabled. */ 57*ae524eb7SJammy Huang status = readl(mb->rx_regs + IPCR_ENABLE) & 58*ae524eb7SJammy Huang readl(mb->rx_regs + IPCR_STATUS); 59*ae524eb7SJammy Huang 60*ae524eb7SJammy Huang if (!(status & RX_IRQ_MASK)) 61*ae524eb7SJammy Huang return IRQ_NONE; 62*ae524eb7SJammy Huang 63*ae524eb7SJammy Huang for (n = 0; n < mb->mbox.num_chans; ++n) { 64*ae524eb7SJammy Huang struct mbox_chan *chan = &mb->mbox.chans[n]; 65*ae524eb7SJammy Huang 66*ae524eb7SJammy Huang if (!(status & RX_IRQ(n))) 67*ae524eb7SJammy Huang continue; 68*ae524eb7SJammy Huang 69*ae524eb7SJammy Huang data_reg = mb->rx_regs + IPCR_DATA + mb->msg_size * n; 70*ae524eb7SJammy Huang word_data = chan->con_priv; 71*ae524eb7SJammy Huang /* Read the message data */ 72*ae524eb7SJammy Huang for (i = 0; i < num_words; i++) 73*ae524eb7SJammy Huang word_data[i] = readl(data_reg + i * sizeof(u32)); 74*ae524eb7SJammy Huang 75*ae524eb7SJammy Huang mbox_chan_received_data(chan, chan->con_priv); 76*ae524eb7SJammy Huang 77*ae524eb7SJammy Huang /* The IRQ can be cleared only once the FIFO is empty. */ 78*ae524eb7SJammy Huang writel(RX_IRQ(n), mb->rx_regs + IPCR_STATUS); 79*ae524eb7SJammy Huang } 80*ae524eb7SJammy Huang 81*ae524eb7SJammy Huang return IRQ_HANDLED; 82*ae524eb7SJammy Huang } 83*ae524eb7SJammy Huang 84*ae524eb7SJammy Huang static int ast2700_mbox_send_data(struct mbox_chan *chan, void *data) 85*ae524eb7SJammy Huang { 86*ae524eb7SJammy Huang struct ast2700_mbox *mb = dev_get_drvdata(chan->mbox->dev); 87*ae524eb7SJammy Huang int idx = ch_num(chan); 88*ae524eb7SJammy Huang void __iomem *data_reg = mb->tx_regs + IPCR_DATA + mb->msg_size * idx; 89*ae524eb7SJammy Huang u32 *word_data = data; 90*ae524eb7SJammy Huang int num_words = mb->msg_size / sizeof(u32); 91*ae524eb7SJammy Huang int i; 92*ae524eb7SJammy Huang 93*ae524eb7SJammy Huang if (!(readl(mb->tx_regs + IPCR_ENABLE) & BIT(idx))) { 94*ae524eb7SJammy Huang dev_warn(mb->mbox.dev, "%s: Ch-%d not enabled yet\n", __func__, idx); 95*ae524eb7SJammy Huang return -ENODEV; 96*ae524eb7SJammy Huang } 97*ae524eb7SJammy Huang 98*ae524eb7SJammy Huang if (!(ast2700_mbox_tx_done(mb, idx))) { 99*ae524eb7SJammy Huang dev_warn(mb->mbox.dev, "%s: Ch-%d last data has not finished\n", __func__, idx); 100*ae524eb7SJammy Huang return -EBUSY; 101*ae524eb7SJammy Huang } 102*ae524eb7SJammy Huang 103*ae524eb7SJammy Huang /* Write the message data */ 104*ae524eb7SJammy Huang for (i = 0 ; i < num_words; i++) 105*ae524eb7SJammy Huang writel(word_data[i], data_reg + i * sizeof(u32)); 106*ae524eb7SJammy Huang 107*ae524eb7SJammy Huang writel(BIT(idx), mb->tx_regs + IPCR_TX_TRIG); 108*ae524eb7SJammy Huang dev_dbg(mb->mbox.dev, "%s: Ch-%d sent\n", __func__, idx); 109*ae524eb7SJammy Huang 110*ae524eb7SJammy Huang return 0; 111*ae524eb7SJammy Huang } 112*ae524eb7SJammy Huang 113*ae524eb7SJammy Huang static int ast2700_mbox_startup(struct mbox_chan *chan) 114*ae524eb7SJammy Huang { 115*ae524eb7SJammy Huang struct ast2700_mbox *mb = dev_get_drvdata(chan->mbox->dev); 116*ae524eb7SJammy Huang int idx = ch_num(chan); 117*ae524eb7SJammy Huang void __iomem *reg = mb->rx_regs + IPCR_ENABLE; 118*ae524eb7SJammy Huang unsigned long flags; 119*ae524eb7SJammy Huang 120*ae524eb7SJammy Huang spin_lock_irqsave(&mb->lock, flags); 121*ae524eb7SJammy Huang writel(readl(reg) | BIT(idx), reg); 122*ae524eb7SJammy Huang spin_unlock_irqrestore(&mb->lock, flags); 123*ae524eb7SJammy Huang 124*ae524eb7SJammy Huang return 0; 125*ae524eb7SJammy Huang } 126*ae524eb7SJammy Huang 127*ae524eb7SJammy Huang static void ast2700_mbox_shutdown(struct mbox_chan *chan) 128*ae524eb7SJammy Huang { 129*ae524eb7SJammy Huang struct ast2700_mbox *mb = dev_get_drvdata(chan->mbox->dev); 130*ae524eb7SJammy Huang int idx = ch_num(chan); 131*ae524eb7SJammy Huang void __iomem *reg = mb->rx_regs + IPCR_ENABLE; 132*ae524eb7SJammy Huang unsigned long flags; 133*ae524eb7SJammy Huang 134*ae524eb7SJammy Huang spin_lock_irqsave(&mb->lock, flags); 135*ae524eb7SJammy Huang writel(readl(reg) & ~BIT(idx), reg); 136*ae524eb7SJammy Huang spin_unlock_irqrestore(&mb->lock, flags); 137*ae524eb7SJammy Huang } 138*ae524eb7SJammy Huang 139*ae524eb7SJammy Huang static bool ast2700_mbox_last_tx_done(struct mbox_chan *chan) 140*ae524eb7SJammy Huang { 141*ae524eb7SJammy Huang struct ast2700_mbox *mb = dev_get_drvdata(chan->mbox->dev); 142*ae524eb7SJammy Huang int idx = ch_num(chan); 143*ae524eb7SJammy Huang 144*ae524eb7SJammy Huang return ast2700_mbox_tx_done(mb, idx); 145*ae524eb7SJammy Huang } 146*ae524eb7SJammy Huang 147*ae524eb7SJammy Huang static const struct mbox_chan_ops ast2700_mbox_chan_ops = { 148*ae524eb7SJammy Huang .send_data = ast2700_mbox_send_data, 149*ae524eb7SJammy Huang .startup = ast2700_mbox_startup, 150*ae524eb7SJammy Huang .shutdown = ast2700_mbox_shutdown, 151*ae524eb7SJammy Huang .last_tx_done = ast2700_mbox_last_tx_done, 152*ae524eb7SJammy Huang }; 153*ae524eb7SJammy Huang 154*ae524eb7SJammy Huang static int ast2700_mbox_probe(struct platform_device *pdev) 155*ae524eb7SJammy Huang { 156*ae524eb7SJammy Huang struct ast2700_mbox *mb; 157*ae524eb7SJammy Huang const struct ast2700_mbox_data *dev_data; 158*ae524eb7SJammy Huang struct device *dev = &pdev->dev; 159*ae524eb7SJammy Huang int irq, ret; 160*ae524eb7SJammy Huang 161*ae524eb7SJammy Huang if (!pdev->dev.of_node) 162*ae524eb7SJammy Huang return -ENODEV; 163*ae524eb7SJammy Huang 164*ae524eb7SJammy Huang dev_data = device_get_match_data(&pdev->dev); 165*ae524eb7SJammy Huang 166*ae524eb7SJammy Huang mb = devm_kzalloc(dev, sizeof(*mb), GFP_KERNEL); 167*ae524eb7SJammy Huang if (!mb) 168*ae524eb7SJammy Huang return -ENOMEM; 169*ae524eb7SJammy Huang 170*ae524eb7SJammy Huang mb->mbox.chans = devm_kcalloc(&pdev->dev, dev_data->num_chans, 171*ae524eb7SJammy Huang sizeof(*mb->mbox.chans), GFP_KERNEL); 172*ae524eb7SJammy Huang if (!mb->mbox.chans) 173*ae524eb7SJammy Huang return -ENOMEM; 174*ae524eb7SJammy Huang 175*ae524eb7SJammy Huang /* con_priv of each channel is used to store the message received */ 176*ae524eb7SJammy Huang for (int i = 0; i < dev_data->num_chans; i++) { 177*ae524eb7SJammy Huang mb->mbox.chans[i].con_priv = devm_kcalloc(dev, dev_data->msg_size, 178*ae524eb7SJammy Huang sizeof(u8), GFP_KERNEL); 179*ae524eb7SJammy Huang if (!mb->mbox.chans[i].con_priv) 180*ae524eb7SJammy Huang return -ENOMEM; 181*ae524eb7SJammy Huang } 182*ae524eb7SJammy Huang 183*ae524eb7SJammy Huang platform_set_drvdata(pdev, mb); 184*ae524eb7SJammy Huang 185*ae524eb7SJammy Huang mb->tx_regs = devm_platform_ioremap_resource_byname(pdev, "tx"); 186*ae524eb7SJammy Huang if (IS_ERR(mb->tx_regs)) 187*ae524eb7SJammy Huang return PTR_ERR(mb->tx_regs); 188*ae524eb7SJammy Huang 189*ae524eb7SJammy Huang mb->rx_regs = devm_platform_ioremap_resource_byname(pdev, "rx"); 190*ae524eb7SJammy Huang if (IS_ERR(mb->rx_regs)) 191*ae524eb7SJammy Huang return PTR_ERR(mb->rx_regs); 192*ae524eb7SJammy Huang 193*ae524eb7SJammy Huang mb->msg_size = dev_data->msg_size; 194*ae524eb7SJammy Huang mb->mbox.dev = dev; 195*ae524eb7SJammy Huang mb->mbox.num_chans = dev_data->num_chans; 196*ae524eb7SJammy Huang mb->mbox.ops = &ast2700_mbox_chan_ops; 197*ae524eb7SJammy Huang mb->mbox.txdone_irq = false; 198*ae524eb7SJammy Huang mb->mbox.txdone_poll = true; 199*ae524eb7SJammy Huang mb->mbox.txpoll_period = 5; 200*ae524eb7SJammy Huang spin_lock_init(&mb->lock); 201*ae524eb7SJammy Huang 202*ae524eb7SJammy Huang irq = platform_get_irq(pdev, 0); 203*ae524eb7SJammy Huang if (irq < 0) 204*ae524eb7SJammy Huang return irq; 205*ae524eb7SJammy Huang 206*ae524eb7SJammy Huang ret = devm_request_irq(dev, irq, ast2700_mbox_irq, 0, dev_name(dev), mb); 207*ae524eb7SJammy Huang if (ret) 208*ae524eb7SJammy Huang return ret; 209*ae524eb7SJammy Huang 210*ae524eb7SJammy Huang return devm_mbox_controller_register(dev, &mb->mbox); 211*ae524eb7SJammy Huang } 212*ae524eb7SJammy Huang 213*ae524eb7SJammy Huang static const struct ast2700_mbox_data ast2700_dev_data = { 214*ae524eb7SJammy Huang .num_chans = 4, 215*ae524eb7SJammy Huang .msg_size = 0x20, 216*ae524eb7SJammy Huang }; 217*ae524eb7SJammy Huang 218*ae524eb7SJammy Huang static const struct of_device_id ast2700_mbox_of_match[] = { 219*ae524eb7SJammy Huang { .compatible = "aspeed,ast2700-mailbox", .data = &ast2700_dev_data }, 220*ae524eb7SJammy Huang {} 221*ae524eb7SJammy Huang }; 222*ae524eb7SJammy Huang MODULE_DEVICE_TABLE(of, ast2700_mbox_of_match); 223*ae524eb7SJammy Huang 224*ae524eb7SJammy Huang static struct platform_driver ast2700_mbox_driver = { 225*ae524eb7SJammy Huang .driver = { 226*ae524eb7SJammy Huang .name = "ast2700-mailbox", 227*ae524eb7SJammy Huang .of_match_table = ast2700_mbox_of_match, 228*ae524eb7SJammy Huang }, 229*ae524eb7SJammy Huang .probe = ast2700_mbox_probe, 230*ae524eb7SJammy Huang }; 231*ae524eb7SJammy Huang module_platform_driver(ast2700_mbox_driver); 232*ae524eb7SJammy Huang 233*ae524eb7SJammy Huang MODULE_AUTHOR("Jammy Huang <jammy_huang@aspeedtech.com>"); 234*ae524eb7SJammy Huang MODULE_DESCRIPTION("ASPEED AST2700 IPC driver"); 235*ae524eb7SJammy Huang MODULE_LICENSE("GPL"); 236