xref: /linux/drivers/mailbox/arm_mhu.c (revision 8e07e0e3964ca4e23ce7b68e2096fe660a888942)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
4  * Copyright (C) 2015 Linaro Ltd.
5  * Author: Jassi Brar <jaswinder.singh@linaro.org>
6  */
7 
8 #include <linux/amba/bus.h>
9 #include <linux/device.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/mailbox_controller.h>
14 #include <linux/module.h>
15 #include <linux/of.h>
16 
17 #define INTR_STAT_OFS	0x0
18 #define INTR_SET_OFS	0x8
19 #define INTR_CLR_OFS	0x10
20 
21 #define MHU_LP_OFFSET	0x0
22 #define MHU_HP_OFFSET	0x20
23 #define MHU_SEC_OFFSET	0x200
24 #define TX_REG_OFFSET	0x100
25 
26 #define MHU_CHANS	3
27 
28 struct mhu_link {
29 	unsigned irq;
30 	void __iomem *tx_reg;
31 	void __iomem *rx_reg;
32 };
33 
34 struct arm_mhu {
35 	void __iomem *base;
36 	struct mhu_link mlink[MHU_CHANS];
37 	struct mbox_chan chan[MHU_CHANS];
38 	struct mbox_controller mbox;
39 };
40 
41 static irqreturn_t mhu_rx_interrupt(int irq, void *p)
42 {
43 	struct mbox_chan *chan = p;
44 	struct mhu_link *mlink = chan->con_priv;
45 	u32 val;
46 
47 	val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
48 	if (!val)
49 		return IRQ_NONE;
50 
51 	mbox_chan_received_data(chan, (void *)&val);
52 
53 	writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
54 
55 	return IRQ_HANDLED;
56 }
57 
58 static bool mhu_last_tx_done(struct mbox_chan *chan)
59 {
60 	struct mhu_link *mlink = chan->con_priv;
61 	u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
62 
63 	return (val == 0);
64 }
65 
66 static int mhu_send_data(struct mbox_chan *chan, void *data)
67 {
68 	struct mhu_link *mlink = chan->con_priv;
69 	u32 *arg = data;
70 
71 	writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS);
72 
73 	return 0;
74 }
75 
76 static int mhu_startup(struct mbox_chan *chan)
77 {
78 	struct mhu_link *mlink = chan->con_priv;
79 	u32 val;
80 	int ret;
81 
82 	val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
83 	writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS);
84 
85 	ret = request_irq(mlink->irq, mhu_rx_interrupt,
86 			  IRQF_SHARED, "mhu_link", chan);
87 	if (ret) {
88 		dev_err(chan->mbox->dev,
89 			"Unable to acquire IRQ %d\n", mlink->irq);
90 		return ret;
91 	}
92 
93 	return 0;
94 }
95 
96 static void mhu_shutdown(struct mbox_chan *chan)
97 {
98 	struct mhu_link *mlink = chan->con_priv;
99 
100 	free_irq(mlink->irq, chan);
101 }
102 
103 static const struct mbox_chan_ops mhu_ops = {
104 	.send_data = mhu_send_data,
105 	.startup = mhu_startup,
106 	.shutdown = mhu_shutdown,
107 	.last_tx_done = mhu_last_tx_done,
108 };
109 
110 static int mhu_probe(struct amba_device *adev, const struct amba_id *id)
111 {
112 	int i, err;
113 	struct arm_mhu *mhu;
114 	struct device *dev = &adev->dev;
115 	int mhu_reg[MHU_CHANS] = {MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET};
116 
117 	if (!of_device_is_compatible(dev->of_node, "arm,mhu"))
118 		return -ENODEV;
119 
120 	/* Allocate memory for device */
121 	mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
122 	if (!mhu)
123 		return -ENOMEM;
124 
125 	mhu->base = devm_ioremap_resource(dev, &adev->res);
126 	if (IS_ERR(mhu->base))
127 		return PTR_ERR(mhu->base);
128 
129 	for (i = 0; i < MHU_CHANS; i++) {
130 		mhu->chan[i].con_priv = &mhu->mlink[i];
131 		mhu->mlink[i].irq = adev->irq[i];
132 		mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
133 		mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
134 	}
135 
136 	mhu->mbox.dev = dev;
137 	mhu->mbox.chans = &mhu->chan[0];
138 	mhu->mbox.num_chans = MHU_CHANS;
139 	mhu->mbox.ops = &mhu_ops;
140 	mhu->mbox.txdone_irq = false;
141 	mhu->mbox.txdone_poll = true;
142 	mhu->mbox.txpoll_period = 1;
143 
144 	amba_set_drvdata(adev, mhu);
145 
146 	err = devm_mbox_controller_register(dev, &mhu->mbox);
147 	if (err) {
148 		dev_err(dev, "Failed to register mailboxes %d\n", err);
149 		return err;
150 	}
151 
152 	dev_info(dev, "ARM MHU Mailbox registered\n");
153 	return 0;
154 }
155 
156 static struct amba_id mhu_ids[] = {
157 	{
158 		.id	= 0x1bb098,
159 		.mask	= 0xffffff,
160 	},
161 	{ 0, 0 },
162 };
163 MODULE_DEVICE_TABLE(amba, mhu_ids);
164 
165 static struct amba_driver arm_mhu_driver = {
166 	.drv = {
167 		.name	= "mhu",
168 	},
169 	.id_table	= mhu_ids,
170 	.probe		= mhu_probe,
171 };
172 module_amba_driver(arm_mhu_driver);
173 
174 MODULE_LICENSE("GPL v2");
175 MODULE_DESCRIPTION("ARM MHU Driver");
176 MODULE_AUTHOR("Jassi Brar <jassisinghbrar@gmail.com>");
177