1 /* 2 * PowerMac G5 SMU driver 3 * 4 * Copyright 2004 J. Mayer <l_indien@magic.fr> 5 * Copyright 2005 Benjamin Herrenschmidt, IBM Corp. 6 * 7 * Released under the term of the GNU GPL v2. 8 */ 9 10 /* 11 * TODO: 12 * - maybe add timeout to commands ? 13 * - blocking version of time functions 14 * - polling version of i2c commands (including timer that works with 15 * interrupts off) 16 * - maybe avoid some data copies with i2c by directly using the smu cmd 17 * buffer and a lower level internal interface 18 * - understand SMU -> CPU events and implement reception of them via 19 * the userland interface 20 */ 21 22 #include <linux/types.h> 23 #include <linux/kernel.h> 24 #include <linux/device.h> 25 #include <linux/dmapool.h> 26 #include <linux/bootmem.h> 27 #include <linux/vmalloc.h> 28 #include <linux/highmem.h> 29 #include <linux/jiffies.h> 30 #include <linux/interrupt.h> 31 #include <linux/rtc.h> 32 #include <linux/completion.h> 33 #include <linux/miscdevice.h> 34 #include <linux/delay.h> 35 #include <linux/poll.h> 36 #include <linux/mutex.h> 37 #include <linux/of_device.h> 38 #include <linux/of_irq.h> 39 #include <linux/of_platform.h> 40 #include <linux/slab.h> 41 42 #include <asm/byteorder.h> 43 #include <asm/io.h> 44 #include <asm/prom.h> 45 #include <asm/machdep.h> 46 #include <asm/pmac_feature.h> 47 #include <asm/smu.h> 48 #include <asm/sections.h> 49 #include <asm/uaccess.h> 50 51 #define VERSION "0.7" 52 #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp." 53 54 #undef DEBUG_SMU 55 56 #ifdef DEBUG_SMU 57 #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0) 58 #else 59 #define DPRINTK(fmt, args...) do { } while (0) 60 #endif 61 62 /* 63 * This is the command buffer passed to the SMU hardware 64 */ 65 #define SMU_MAX_DATA 254 66 67 struct smu_cmd_buf { 68 u8 cmd; 69 u8 length; 70 u8 data[SMU_MAX_DATA]; 71 }; 72 73 struct smu_device { 74 spinlock_t lock; 75 struct device_node *of_node; 76 struct platform_device *of_dev; 77 int doorbell; /* doorbell gpio */ 78 u32 __iomem *db_buf; /* doorbell buffer */ 79 struct device_node *db_node; 80 unsigned int db_irq; 81 int msg; 82 struct device_node *msg_node; 83 unsigned int msg_irq; 84 struct smu_cmd_buf *cmd_buf; /* command buffer virtual */ 85 u32 cmd_buf_abs; /* command buffer absolute */ 86 struct list_head cmd_list; 87 struct smu_cmd *cmd_cur; /* pending command */ 88 int broken_nap; 89 struct list_head cmd_i2c_list; 90 struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */ 91 struct timer_list i2c_timer; 92 }; 93 94 /* 95 * I don't think there will ever be more than one SMU, so 96 * for now, just hard code that 97 */ 98 static DEFINE_MUTEX(smu_mutex); 99 static struct smu_device *smu; 100 static DEFINE_MUTEX(smu_part_access); 101 static int smu_irq_inited; 102 103 static void smu_i2c_retry(unsigned long data); 104 105 /* 106 * SMU driver low level stuff 107 */ 108 109 static void smu_start_cmd(void) 110 { 111 unsigned long faddr, fend; 112 struct smu_cmd *cmd; 113 114 if (list_empty(&smu->cmd_list)) 115 return; 116 117 /* Fetch first command in queue */ 118 cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link); 119 smu->cmd_cur = cmd; 120 list_del(&cmd->link); 121 122 DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd, 123 cmd->data_len); 124 DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf); 125 126 /* Fill the SMU command buffer */ 127 smu->cmd_buf->cmd = cmd->cmd; 128 smu->cmd_buf->length = cmd->data_len; 129 memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len); 130 131 /* Flush command and data to RAM */ 132 faddr = (unsigned long)smu->cmd_buf; 133 fend = faddr + smu->cmd_buf->length + 2; 134 flush_inval_dcache_range(faddr, fend); 135 136 137 /* We also disable NAP mode for the duration of the command 138 * on U3 based machines. 139 * This is slightly racy as it can be written back to 1 by a sysctl 140 * but that never happens in practice. There seem to be an issue with 141 * U3 based machines such as the iMac G5 where napping for the 142 * whole duration of the command prevents the SMU from fetching it 143 * from memory. This might be related to the strange i2c based 144 * mechanism the SMU uses to access memory. 145 */ 146 if (smu->broken_nap) 147 powersave_nap = 0; 148 149 /* This isn't exactly a DMA mapping here, I suspect 150 * the SMU is actually communicating with us via i2c to the 151 * northbridge or the CPU to access RAM. 152 */ 153 writel(smu->cmd_buf_abs, smu->db_buf); 154 155 /* Ring the SMU doorbell */ 156 pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4); 157 } 158 159 160 static irqreturn_t smu_db_intr(int irq, void *arg) 161 { 162 unsigned long flags; 163 struct smu_cmd *cmd; 164 void (*done)(struct smu_cmd *cmd, void *misc) = NULL; 165 void *misc = NULL; 166 u8 gpio; 167 int rc = 0; 168 169 /* SMU completed the command, well, we hope, let's make sure 170 * of it 171 */ 172 spin_lock_irqsave(&smu->lock, flags); 173 174 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 175 if ((gpio & 7) != 7) { 176 spin_unlock_irqrestore(&smu->lock, flags); 177 return IRQ_HANDLED; 178 } 179 180 cmd = smu->cmd_cur; 181 smu->cmd_cur = NULL; 182 if (cmd == NULL) 183 goto bail; 184 185 if (rc == 0) { 186 unsigned long faddr; 187 int reply_len; 188 u8 ack; 189 190 /* CPU might have brought back the cache line, so we need 191 * to flush again before peeking at the SMU response. We 192 * flush the entire buffer for now as we haven't read the 193 * reply length (it's only 2 cache lines anyway) 194 */ 195 faddr = (unsigned long)smu->cmd_buf; 196 flush_inval_dcache_range(faddr, faddr + 256); 197 198 /* Now check ack */ 199 ack = (~cmd->cmd) & 0xff; 200 if (ack != smu->cmd_buf->cmd) { 201 DPRINTK("SMU: incorrect ack, want %x got %x\n", 202 ack, smu->cmd_buf->cmd); 203 rc = -EIO; 204 } 205 reply_len = rc == 0 ? smu->cmd_buf->length : 0; 206 DPRINTK("SMU: reply len: %d\n", reply_len); 207 if (reply_len > cmd->reply_len) { 208 printk(KERN_WARNING "SMU: reply buffer too small," 209 "got %d bytes for a %d bytes buffer\n", 210 reply_len, cmd->reply_len); 211 reply_len = cmd->reply_len; 212 } 213 cmd->reply_len = reply_len; 214 if (cmd->reply_buf && reply_len) 215 memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len); 216 } 217 218 /* Now complete the command. Write status last in order as we lost 219 * ownership of the command structure as soon as it's no longer -1 220 */ 221 done = cmd->done; 222 misc = cmd->misc; 223 mb(); 224 cmd->status = rc; 225 226 /* Re-enable NAP mode */ 227 if (smu->broken_nap) 228 powersave_nap = 1; 229 bail: 230 /* Start next command if any */ 231 smu_start_cmd(); 232 spin_unlock_irqrestore(&smu->lock, flags); 233 234 /* Call command completion handler if any */ 235 if (done) 236 done(cmd, misc); 237 238 /* It's an edge interrupt, nothing to do */ 239 return IRQ_HANDLED; 240 } 241 242 243 static irqreturn_t smu_msg_intr(int irq, void *arg) 244 { 245 /* I don't quite know what to do with this one, we seem to never 246 * receive it, so I suspect we have to arm it someway in the SMU 247 * to start getting events that way. 248 */ 249 250 printk(KERN_INFO "SMU: message interrupt !\n"); 251 252 /* It's an edge interrupt, nothing to do */ 253 return IRQ_HANDLED; 254 } 255 256 257 /* 258 * Queued command management. 259 * 260 */ 261 262 int smu_queue_cmd(struct smu_cmd *cmd) 263 { 264 unsigned long flags; 265 266 if (smu == NULL) 267 return -ENODEV; 268 if (cmd->data_len > SMU_MAX_DATA || 269 cmd->reply_len > SMU_MAX_DATA) 270 return -EINVAL; 271 272 cmd->status = 1; 273 spin_lock_irqsave(&smu->lock, flags); 274 list_add_tail(&cmd->link, &smu->cmd_list); 275 if (smu->cmd_cur == NULL) 276 smu_start_cmd(); 277 spin_unlock_irqrestore(&smu->lock, flags); 278 279 /* Workaround for early calls when irq isn't available */ 280 if (!smu_irq_inited || smu->db_irq == NO_IRQ) 281 smu_spinwait_cmd(cmd); 282 283 return 0; 284 } 285 EXPORT_SYMBOL(smu_queue_cmd); 286 287 288 int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, 289 unsigned int data_len, 290 void (*done)(struct smu_cmd *cmd, void *misc), 291 void *misc, ...) 292 { 293 struct smu_cmd *cmd = &scmd->cmd; 294 va_list list; 295 int i; 296 297 if (data_len > sizeof(scmd->buffer)) 298 return -EINVAL; 299 300 memset(scmd, 0, sizeof(*scmd)); 301 cmd->cmd = command; 302 cmd->data_len = data_len; 303 cmd->data_buf = scmd->buffer; 304 cmd->reply_len = sizeof(scmd->buffer); 305 cmd->reply_buf = scmd->buffer; 306 cmd->done = done; 307 cmd->misc = misc; 308 309 va_start(list, misc); 310 for (i = 0; i < data_len; ++i) 311 scmd->buffer[i] = (u8)va_arg(list, int); 312 va_end(list); 313 314 return smu_queue_cmd(cmd); 315 } 316 EXPORT_SYMBOL(smu_queue_simple); 317 318 319 void smu_poll(void) 320 { 321 u8 gpio; 322 323 if (smu == NULL) 324 return; 325 326 gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell); 327 if ((gpio & 7) == 7) 328 smu_db_intr(smu->db_irq, smu); 329 } 330 EXPORT_SYMBOL(smu_poll); 331 332 333 void smu_done_complete(struct smu_cmd *cmd, void *misc) 334 { 335 struct completion *comp = misc; 336 337 complete(comp); 338 } 339 EXPORT_SYMBOL(smu_done_complete); 340 341 342 void smu_spinwait_cmd(struct smu_cmd *cmd) 343 { 344 while(cmd->status == 1) 345 smu_poll(); 346 } 347 EXPORT_SYMBOL(smu_spinwait_cmd); 348 349 350 /* RTC low level commands */ 351 static inline int bcd2hex (int n) 352 { 353 return (((n & 0xf0) >> 4) * 10) + (n & 0xf); 354 } 355 356 357 static inline int hex2bcd (int n) 358 { 359 return ((n / 10) << 4) + (n % 10); 360 } 361 362 363 static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf, 364 struct rtc_time *time) 365 { 366 cmd_buf->cmd = 0x8e; 367 cmd_buf->length = 8; 368 cmd_buf->data[0] = 0x80; 369 cmd_buf->data[1] = hex2bcd(time->tm_sec); 370 cmd_buf->data[2] = hex2bcd(time->tm_min); 371 cmd_buf->data[3] = hex2bcd(time->tm_hour); 372 cmd_buf->data[4] = time->tm_wday; 373 cmd_buf->data[5] = hex2bcd(time->tm_mday); 374 cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1; 375 cmd_buf->data[7] = hex2bcd(time->tm_year - 100); 376 } 377 378 379 int smu_get_rtc_time(struct rtc_time *time, int spinwait) 380 { 381 struct smu_simple_cmd cmd; 382 int rc; 383 384 if (smu == NULL) 385 return -ENODEV; 386 387 memset(time, 0, sizeof(struct rtc_time)); 388 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL, 389 SMU_CMD_RTC_GET_DATETIME); 390 if (rc) 391 return rc; 392 smu_spinwait_simple(&cmd); 393 394 time->tm_sec = bcd2hex(cmd.buffer[0]); 395 time->tm_min = bcd2hex(cmd.buffer[1]); 396 time->tm_hour = bcd2hex(cmd.buffer[2]); 397 time->tm_wday = bcd2hex(cmd.buffer[3]); 398 time->tm_mday = bcd2hex(cmd.buffer[4]); 399 time->tm_mon = bcd2hex(cmd.buffer[5]) - 1; 400 time->tm_year = bcd2hex(cmd.buffer[6]) + 100; 401 402 return 0; 403 } 404 405 406 int smu_set_rtc_time(struct rtc_time *time, int spinwait) 407 { 408 struct smu_simple_cmd cmd; 409 int rc; 410 411 if (smu == NULL) 412 return -ENODEV; 413 414 rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL, 415 SMU_CMD_RTC_SET_DATETIME, 416 hex2bcd(time->tm_sec), 417 hex2bcd(time->tm_min), 418 hex2bcd(time->tm_hour), 419 time->tm_wday, 420 hex2bcd(time->tm_mday), 421 hex2bcd(time->tm_mon) + 1, 422 hex2bcd(time->tm_year - 100)); 423 if (rc) 424 return rc; 425 smu_spinwait_simple(&cmd); 426 427 return 0; 428 } 429 430 431 void smu_shutdown(void) 432 { 433 struct smu_simple_cmd cmd; 434 435 if (smu == NULL) 436 return; 437 438 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL, 439 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0)) 440 return; 441 smu_spinwait_simple(&cmd); 442 for (;;) 443 ; 444 } 445 446 447 void smu_restart(void) 448 { 449 struct smu_simple_cmd cmd; 450 451 if (smu == NULL) 452 return; 453 454 if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL, 455 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0)) 456 return; 457 smu_spinwait_simple(&cmd); 458 for (;;) 459 ; 460 } 461 462 463 int smu_present(void) 464 { 465 return smu != NULL; 466 } 467 EXPORT_SYMBOL(smu_present); 468 469 470 int __init smu_init (void) 471 { 472 struct device_node *np; 473 const u32 *data; 474 int ret = 0; 475 476 np = of_find_node_by_type(NULL, "smu"); 477 if (np == NULL) 478 return -ENODEV; 479 480 printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR); 481 482 if (smu_cmdbuf_abs == 0) { 483 printk(KERN_ERR "SMU: Command buffer not allocated !\n"); 484 ret = -EINVAL; 485 goto fail_np; 486 } 487 488 smu = alloc_bootmem(sizeof(struct smu_device)); 489 490 spin_lock_init(&smu->lock); 491 INIT_LIST_HEAD(&smu->cmd_list); 492 INIT_LIST_HEAD(&smu->cmd_i2c_list); 493 smu->of_node = np; 494 smu->db_irq = NO_IRQ; 495 smu->msg_irq = NO_IRQ; 496 497 /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a 498 * 32 bits value safely 499 */ 500 smu->cmd_buf_abs = (u32)smu_cmdbuf_abs; 501 smu->cmd_buf = __va(smu_cmdbuf_abs); 502 503 smu->db_node = of_find_node_by_name(NULL, "smu-doorbell"); 504 if (smu->db_node == NULL) { 505 printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n"); 506 ret = -ENXIO; 507 goto fail_bootmem; 508 } 509 data = of_get_property(smu->db_node, "reg", NULL); 510 if (data == NULL) { 511 printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n"); 512 ret = -ENXIO; 513 goto fail_db_node; 514 } 515 516 /* Current setup has one doorbell GPIO that does both doorbell 517 * and ack. GPIOs are at 0x50, best would be to find that out 518 * in the device-tree though. 519 */ 520 smu->doorbell = *data; 521 if (smu->doorbell < 0x50) 522 smu->doorbell += 0x50; 523 524 /* Now look for the smu-interrupt GPIO */ 525 do { 526 smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt"); 527 if (smu->msg_node == NULL) 528 break; 529 data = of_get_property(smu->msg_node, "reg", NULL); 530 if (data == NULL) { 531 of_node_put(smu->msg_node); 532 smu->msg_node = NULL; 533 break; 534 } 535 smu->msg = *data; 536 if (smu->msg < 0x50) 537 smu->msg += 0x50; 538 } while(0); 539 540 /* Doorbell buffer is currently hard-coded, I didn't find a proper 541 * device-tree entry giving the address. Best would probably to use 542 * an offset for K2 base though, but let's do it that way for now. 543 */ 544 smu->db_buf = ioremap(0x8000860c, 0x1000); 545 if (smu->db_buf == NULL) { 546 printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n"); 547 ret = -ENXIO; 548 goto fail_msg_node; 549 } 550 551 /* U3 has an issue with NAP mode when issuing SMU commands */ 552 smu->broken_nap = pmac_get_uninorth_variant() < 4; 553 if (smu->broken_nap) 554 printk(KERN_INFO "SMU: using NAP mode workaround\n"); 555 556 sys_ctrler = SYS_CTRLER_SMU; 557 return 0; 558 559 fail_msg_node: 560 of_node_put(smu->msg_node); 561 fail_db_node: 562 of_node_put(smu->db_node); 563 fail_bootmem: 564 free_bootmem(__pa(smu), sizeof(struct smu_device)); 565 smu = NULL; 566 fail_np: 567 of_node_put(np); 568 return ret; 569 } 570 571 572 static int smu_late_init(void) 573 { 574 if (!smu) 575 return 0; 576 577 init_timer(&smu->i2c_timer); 578 smu->i2c_timer.function = smu_i2c_retry; 579 smu->i2c_timer.data = (unsigned long)smu; 580 581 if (smu->db_node) { 582 smu->db_irq = irq_of_parse_and_map(smu->db_node, 0); 583 if (smu->db_irq == NO_IRQ) 584 printk(KERN_ERR "smu: failed to map irq for node %s\n", 585 smu->db_node->full_name); 586 } 587 if (smu->msg_node) { 588 smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0); 589 if (smu->msg_irq == NO_IRQ) 590 printk(KERN_ERR "smu: failed to map irq for node %s\n", 591 smu->msg_node->full_name); 592 } 593 594 /* 595 * Try to request the interrupts 596 */ 597 598 if (smu->db_irq != NO_IRQ) { 599 if (request_irq(smu->db_irq, smu_db_intr, 600 IRQF_SHARED, "SMU doorbell", smu) < 0) { 601 printk(KERN_WARNING "SMU: can't " 602 "request interrupt %d\n", 603 smu->db_irq); 604 smu->db_irq = NO_IRQ; 605 } 606 } 607 608 if (smu->msg_irq != NO_IRQ) { 609 if (request_irq(smu->msg_irq, smu_msg_intr, 610 IRQF_SHARED, "SMU message", smu) < 0) { 611 printk(KERN_WARNING "SMU: can't " 612 "request interrupt %d\n", 613 smu->msg_irq); 614 smu->msg_irq = NO_IRQ; 615 } 616 } 617 618 smu_irq_inited = 1; 619 return 0; 620 } 621 /* This has to be before arch_initcall as the low i2c stuff relies on the 622 * above having been done before we reach arch_initcalls 623 */ 624 core_initcall(smu_late_init); 625 626 /* 627 * sysfs visibility 628 */ 629 630 static void smu_expose_childs(struct work_struct *unused) 631 { 632 struct device_node *np; 633 634 for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;) 635 if (of_device_is_compatible(np, "smu-sensors")) 636 of_platform_device_create(np, "smu-sensors", 637 &smu->of_dev->dev); 638 } 639 640 static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs); 641 642 static int smu_platform_probe(struct platform_device* dev) 643 { 644 if (!smu) 645 return -ENODEV; 646 smu->of_dev = dev; 647 648 /* 649 * Ok, we are matched, now expose all i2c busses. We have to defer 650 * that unfortunately or it would deadlock inside the device model 651 */ 652 schedule_work(&smu_expose_childs_work); 653 654 return 0; 655 } 656 657 static const struct of_device_id smu_platform_match[] = 658 { 659 { 660 .type = "smu", 661 }, 662 {}, 663 }; 664 665 static struct platform_driver smu_of_platform_driver = 666 { 667 .driver = { 668 .name = "smu", 669 .of_match_table = smu_platform_match, 670 }, 671 .probe = smu_platform_probe, 672 }; 673 674 static int __init smu_init_sysfs(void) 675 { 676 /* 677 * For now, we don't power manage machines with an SMU chip, 678 * I'm a bit too far from figuring out how that works with those 679 * new chipsets, but that will come back and bite us 680 */ 681 platform_driver_register(&smu_of_platform_driver); 682 return 0; 683 } 684 685 device_initcall(smu_init_sysfs); 686 687 struct platform_device *smu_get_ofdev(void) 688 { 689 if (!smu) 690 return NULL; 691 return smu->of_dev; 692 } 693 694 EXPORT_SYMBOL_GPL(smu_get_ofdev); 695 696 /* 697 * i2c interface 698 */ 699 700 static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail) 701 { 702 void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done; 703 void *misc = cmd->misc; 704 unsigned long flags; 705 706 /* Check for read case */ 707 if (!fail && cmd->read) { 708 if (cmd->pdata[0] < 1) 709 fail = 1; 710 else 711 memcpy(cmd->info.data, &cmd->pdata[1], 712 cmd->info.datalen); 713 } 714 715 DPRINTK("SMU: completing, success: %d\n", !fail); 716 717 /* Update status and mark no pending i2c command with lock 718 * held so nobody comes in while we dequeue an eventual 719 * pending next i2c command 720 */ 721 spin_lock_irqsave(&smu->lock, flags); 722 smu->cmd_i2c_cur = NULL; 723 wmb(); 724 cmd->status = fail ? -EIO : 0; 725 726 /* Is there another i2c command waiting ? */ 727 if (!list_empty(&smu->cmd_i2c_list)) { 728 struct smu_i2c_cmd *newcmd; 729 730 /* Fetch it, new current, remove from list */ 731 newcmd = list_entry(smu->cmd_i2c_list.next, 732 struct smu_i2c_cmd, link); 733 smu->cmd_i2c_cur = newcmd; 734 list_del(&cmd->link); 735 736 /* Queue with low level smu */ 737 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 738 if (smu->cmd_cur == NULL) 739 smu_start_cmd(); 740 } 741 spin_unlock_irqrestore(&smu->lock, flags); 742 743 /* Call command completion handler if any */ 744 if (done) 745 done(cmd, misc); 746 747 } 748 749 750 static void smu_i2c_retry(unsigned long data) 751 { 752 struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur; 753 754 DPRINTK("SMU: i2c failure, requeuing...\n"); 755 756 /* requeue command simply by resetting reply_len */ 757 cmd->pdata[0] = 0xff; 758 cmd->scmd.reply_len = sizeof(cmd->pdata); 759 smu_queue_cmd(&cmd->scmd); 760 } 761 762 763 static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc) 764 { 765 struct smu_i2c_cmd *cmd = misc; 766 int fail = 0; 767 768 DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n", 769 cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len); 770 771 /* Check for possible status */ 772 if (scmd->status < 0) 773 fail = 1; 774 else if (cmd->read) { 775 if (cmd->stage == 0) 776 fail = cmd->pdata[0] != 0; 777 else 778 fail = cmd->pdata[0] >= 0x80; 779 } else { 780 fail = cmd->pdata[0] != 0; 781 } 782 783 /* Handle failures by requeuing command, after 5ms interval 784 */ 785 if (fail && --cmd->retries > 0) { 786 DPRINTK("SMU: i2c failure, starting timer...\n"); 787 BUG_ON(cmd != smu->cmd_i2c_cur); 788 if (!smu_irq_inited) { 789 mdelay(5); 790 smu_i2c_retry(0); 791 return; 792 } 793 mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5)); 794 return; 795 } 796 797 /* If failure or stage 1, command is complete */ 798 if (fail || cmd->stage != 0) { 799 smu_i2c_complete_command(cmd, fail); 800 return; 801 } 802 803 DPRINTK("SMU: going to stage 1\n"); 804 805 /* Ok, initial command complete, now poll status */ 806 scmd->reply_buf = cmd->pdata; 807 scmd->reply_len = sizeof(cmd->pdata); 808 scmd->data_buf = cmd->pdata; 809 scmd->data_len = 1; 810 cmd->pdata[0] = 0; 811 cmd->stage = 1; 812 cmd->retries = 20; 813 smu_queue_cmd(scmd); 814 } 815 816 817 int smu_queue_i2c(struct smu_i2c_cmd *cmd) 818 { 819 unsigned long flags; 820 821 if (smu == NULL) 822 return -ENODEV; 823 824 /* Fill most fields of scmd */ 825 cmd->scmd.cmd = SMU_CMD_I2C_COMMAND; 826 cmd->scmd.done = smu_i2c_low_completion; 827 cmd->scmd.misc = cmd; 828 cmd->scmd.reply_buf = cmd->pdata; 829 cmd->scmd.reply_len = sizeof(cmd->pdata); 830 cmd->scmd.data_buf = (u8 *)(char *)&cmd->info; 831 cmd->scmd.status = 1; 832 cmd->stage = 0; 833 cmd->pdata[0] = 0xff; 834 cmd->retries = 20; 835 cmd->status = 1; 836 837 /* Check transfer type, sanitize some "info" fields 838 * based on transfer type and do more checking 839 */ 840 cmd->info.caddr = cmd->info.devaddr; 841 cmd->read = cmd->info.devaddr & 0x01; 842 switch(cmd->info.type) { 843 case SMU_I2C_TRANSFER_SIMPLE: 844 memset(&cmd->info.sublen, 0, 4); 845 break; 846 case SMU_I2C_TRANSFER_COMBINED: 847 cmd->info.devaddr &= 0xfe; 848 case SMU_I2C_TRANSFER_STDSUB: 849 if (cmd->info.sublen > 3) 850 return -EINVAL; 851 break; 852 default: 853 return -EINVAL; 854 } 855 856 /* Finish setting up command based on transfer direction 857 */ 858 if (cmd->read) { 859 if (cmd->info.datalen > SMU_I2C_READ_MAX) 860 return -EINVAL; 861 memset(cmd->info.data, 0xff, cmd->info.datalen); 862 cmd->scmd.data_len = 9; 863 } else { 864 if (cmd->info.datalen > SMU_I2C_WRITE_MAX) 865 return -EINVAL; 866 cmd->scmd.data_len = 9 + cmd->info.datalen; 867 } 868 869 DPRINTK("SMU: i2c enqueuing command\n"); 870 DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n", 871 cmd->read ? "read" : "write", cmd->info.datalen, 872 cmd->info.bus, cmd->info.caddr, 873 cmd->info.subaddr[0], cmd->info.type); 874 875 876 /* Enqueue command in i2c list, and if empty, enqueue also in 877 * main command list 878 */ 879 spin_lock_irqsave(&smu->lock, flags); 880 if (smu->cmd_i2c_cur == NULL) { 881 smu->cmd_i2c_cur = cmd; 882 list_add_tail(&cmd->scmd.link, &smu->cmd_list); 883 if (smu->cmd_cur == NULL) 884 smu_start_cmd(); 885 } else 886 list_add_tail(&cmd->link, &smu->cmd_i2c_list); 887 spin_unlock_irqrestore(&smu->lock, flags); 888 889 return 0; 890 } 891 892 /* 893 * Handling of "partitions" 894 */ 895 896 static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len) 897 { 898 DECLARE_COMPLETION_ONSTACK(comp); 899 unsigned int chunk; 900 struct smu_cmd cmd; 901 int rc; 902 u8 params[8]; 903 904 /* We currently use a chunk size of 0xe. We could check the 905 * SMU firmware version and use bigger sizes though 906 */ 907 chunk = 0xe; 908 909 while (len) { 910 unsigned int clen = min(len, chunk); 911 912 cmd.cmd = SMU_CMD_MISC_ee_COMMAND; 913 cmd.data_len = 7; 914 cmd.data_buf = params; 915 cmd.reply_len = chunk; 916 cmd.reply_buf = dest; 917 cmd.done = smu_done_complete; 918 cmd.misc = ∁ 919 params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC; 920 params[1] = 0x4; 921 *((u32 *)¶ms[2]) = addr; 922 params[6] = clen; 923 924 rc = smu_queue_cmd(&cmd); 925 if (rc) 926 return rc; 927 wait_for_completion(&comp); 928 if (cmd.status != 0) 929 return rc; 930 if (cmd.reply_len != clen) { 931 printk(KERN_DEBUG "SMU: short read in " 932 "smu_read_datablock, got: %d, want: %d\n", 933 cmd.reply_len, clen); 934 return -EIO; 935 } 936 len -= clen; 937 addr += clen; 938 dest += clen; 939 } 940 return 0; 941 } 942 943 static struct smu_sdbp_header *smu_create_sdb_partition(int id) 944 { 945 DECLARE_COMPLETION_ONSTACK(comp); 946 struct smu_simple_cmd cmd; 947 unsigned int addr, len, tlen; 948 struct smu_sdbp_header *hdr; 949 struct property *prop; 950 951 /* First query the partition info */ 952 DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq); 953 smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2, 954 smu_done_complete, &comp, 955 SMU_CMD_PARTITION_LATEST, id); 956 wait_for_completion(&comp); 957 DPRINTK("SMU: done, status: %d, reply_len: %d\n", 958 cmd.cmd.status, cmd.cmd.reply_len); 959 960 /* Partition doesn't exist (or other error) */ 961 if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6) 962 return NULL; 963 964 /* Fetch address and length from reply */ 965 addr = *((u16 *)cmd.buffer); 966 len = cmd.buffer[3] << 2; 967 /* Calucluate total length to allocate, including the 17 bytes 968 * for "sdb-partition-XX" that we append at the end of the buffer 969 */ 970 tlen = sizeof(struct property) + len + 18; 971 972 prop = kzalloc(tlen, GFP_KERNEL); 973 if (prop == NULL) 974 return NULL; 975 hdr = (struct smu_sdbp_header *)(prop + 1); 976 prop->name = ((char *)prop) + tlen - 18; 977 sprintf(prop->name, "sdb-partition-%02x", id); 978 prop->length = len; 979 prop->value = hdr; 980 prop->next = NULL; 981 982 /* Read the datablock */ 983 if (smu_read_datablock((u8 *)hdr, addr, len)) { 984 printk(KERN_DEBUG "SMU: datablock read failed while reading " 985 "partition %02x !\n", id); 986 goto failure; 987 } 988 989 /* Got it, check a few things and create the property */ 990 if (hdr->id != id) { 991 printk(KERN_DEBUG "SMU: Reading partition %02x and got " 992 "%02x !\n", id, hdr->id); 993 goto failure; 994 } 995 if (of_add_property(smu->of_node, prop)) { 996 printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x " 997 "property !\n", id); 998 goto failure; 999 } 1000 1001 return hdr; 1002 failure: 1003 kfree(prop); 1004 return NULL; 1005 } 1006 1007 /* Note: Only allowed to return error code in pointers (using ERR_PTR) 1008 * when interruptible is 1 1009 */ 1010 const struct smu_sdbp_header *__smu_get_sdb_partition(int id, 1011 unsigned int *size, int interruptible) 1012 { 1013 char pname[32]; 1014 const struct smu_sdbp_header *part; 1015 1016 if (!smu) 1017 return NULL; 1018 1019 sprintf(pname, "sdb-partition-%02x", id); 1020 1021 DPRINTK("smu_get_sdb_partition(%02x)\n", id); 1022 1023 if (interruptible) { 1024 int rc; 1025 rc = mutex_lock_interruptible(&smu_part_access); 1026 if (rc) 1027 return ERR_PTR(rc); 1028 } else 1029 mutex_lock(&smu_part_access); 1030 1031 part = of_get_property(smu->of_node, pname, size); 1032 if (part == NULL) { 1033 DPRINTK("trying to extract from SMU ...\n"); 1034 part = smu_create_sdb_partition(id); 1035 if (part != NULL && size) 1036 *size = part->len << 2; 1037 } 1038 mutex_unlock(&smu_part_access); 1039 return part; 1040 } 1041 1042 const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size) 1043 { 1044 return __smu_get_sdb_partition(id, size, 0); 1045 } 1046 EXPORT_SYMBOL(smu_get_sdb_partition); 1047 1048 1049 /* 1050 * Userland driver interface 1051 */ 1052 1053 1054 static LIST_HEAD(smu_clist); 1055 static DEFINE_SPINLOCK(smu_clist_lock); 1056 1057 enum smu_file_mode { 1058 smu_file_commands, 1059 smu_file_events, 1060 smu_file_closing 1061 }; 1062 1063 struct smu_private 1064 { 1065 struct list_head list; 1066 enum smu_file_mode mode; 1067 int busy; 1068 struct smu_cmd cmd; 1069 spinlock_t lock; 1070 wait_queue_head_t wait; 1071 u8 buffer[SMU_MAX_DATA]; 1072 }; 1073 1074 1075 static int smu_open(struct inode *inode, struct file *file) 1076 { 1077 struct smu_private *pp; 1078 unsigned long flags; 1079 1080 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL); 1081 if (pp == 0) 1082 return -ENOMEM; 1083 spin_lock_init(&pp->lock); 1084 pp->mode = smu_file_commands; 1085 init_waitqueue_head(&pp->wait); 1086 1087 mutex_lock(&smu_mutex); 1088 spin_lock_irqsave(&smu_clist_lock, flags); 1089 list_add(&pp->list, &smu_clist); 1090 spin_unlock_irqrestore(&smu_clist_lock, flags); 1091 file->private_data = pp; 1092 mutex_unlock(&smu_mutex); 1093 1094 return 0; 1095 } 1096 1097 1098 static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc) 1099 { 1100 struct smu_private *pp = misc; 1101 1102 wake_up_all(&pp->wait); 1103 } 1104 1105 1106 static ssize_t smu_write(struct file *file, const char __user *buf, 1107 size_t count, loff_t *ppos) 1108 { 1109 struct smu_private *pp = file->private_data; 1110 unsigned long flags; 1111 struct smu_user_cmd_hdr hdr; 1112 int rc = 0; 1113 1114 if (pp->busy) 1115 return -EBUSY; 1116 else if (copy_from_user(&hdr, buf, sizeof(hdr))) 1117 return -EFAULT; 1118 else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) { 1119 pp->mode = smu_file_events; 1120 return 0; 1121 } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) { 1122 const struct smu_sdbp_header *part; 1123 part = __smu_get_sdb_partition(hdr.cmd, NULL, 1); 1124 if (part == NULL) 1125 return -EINVAL; 1126 else if (IS_ERR(part)) 1127 return PTR_ERR(part); 1128 return 0; 1129 } else if (hdr.cmdtype != SMU_CMDTYPE_SMU) 1130 return -EINVAL; 1131 else if (pp->mode != smu_file_commands) 1132 return -EBADFD; 1133 else if (hdr.data_len > SMU_MAX_DATA) 1134 return -EINVAL; 1135 1136 spin_lock_irqsave(&pp->lock, flags); 1137 if (pp->busy) { 1138 spin_unlock_irqrestore(&pp->lock, flags); 1139 return -EBUSY; 1140 } 1141 pp->busy = 1; 1142 pp->cmd.status = 1; 1143 spin_unlock_irqrestore(&pp->lock, flags); 1144 1145 if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) { 1146 pp->busy = 0; 1147 return -EFAULT; 1148 } 1149 1150 pp->cmd.cmd = hdr.cmd; 1151 pp->cmd.data_len = hdr.data_len; 1152 pp->cmd.reply_len = SMU_MAX_DATA; 1153 pp->cmd.data_buf = pp->buffer; 1154 pp->cmd.reply_buf = pp->buffer; 1155 pp->cmd.done = smu_user_cmd_done; 1156 pp->cmd.misc = pp; 1157 rc = smu_queue_cmd(&pp->cmd); 1158 if (rc < 0) 1159 return rc; 1160 return count; 1161 } 1162 1163 1164 static ssize_t smu_read_command(struct file *file, struct smu_private *pp, 1165 char __user *buf, size_t count) 1166 { 1167 DECLARE_WAITQUEUE(wait, current); 1168 struct smu_user_reply_hdr hdr; 1169 unsigned long flags; 1170 int size, rc = 0; 1171 1172 if (!pp->busy) 1173 return 0; 1174 if (count < sizeof(struct smu_user_reply_hdr)) 1175 return -EOVERFLOW; 1176 spin_lock_irqsave(&pp->lock, flags); 1177 if (pp->cmd.status == 1) { 1178 if (file->f_flags & O_NONBLOCK) { 1179 spin_unlock_irqrestore(&pp->lock, flags); 1180 return -EAGAIN; 1181 } 1182 add_wait_queue(&pp->wait, &wait); 1183 for (;;) { 1184 set_current_state(TASK_INTERRUPTIBLE); 1185 rc = 0; 1186 if (pp->cmd.status != 1) 1187 break; 1188 rc = -ERESTARTSYS; 1189 if (signal_pending(current)) 1190 break; 1191 spin_unlock_irqrestore(&pp->lock, flags); 1192 schedule(); 1193 spin_lock_irqsave(&pp->lock, flags); 1194 } 1195 set_current_state(TASK_RUNNING); 1196 remove_wait_queue(&pp->wait, &wait); 1197 } 1198 spin_unlock_irqrestore(&pp->lock, flags); 1199 if (rc) 1200 return rc; 1201 if (pp->cmd.status != 0) 1202 pp->cmd.reply_len = 0; 1203 size = sizeof(hdr) + pp->cmd.reply_len; 1204 if (count < size) 1205 size = count; 1206 rc = size; 1207 hdr.status = pp->cmd.status; 1208 hdr.reply_len = pp->cmd.reply_len; 1209 if (copy_to_user(buf, &hdr, sizeof(hdr))) 1210 return -EFAULT; 1211 size -= sizeof(hdr); 1212 if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size)) 1213 return -EFAULT; 1214 pp->busy = 0; 1215 1216 return rc; 1217 } 1218 1219 1220 static ssize_t smu_read_events(struct file *file, struct smu_private *pp, 1221 char __user *buf, size_t count) 1222 { 1223 /* Not implemented */ 1224 msleep_interruptible(1000); 1225 return 0; 1226 } 1227 1228 1229 static ssize_t smu_read(struct file *file, char __user *buf, 1230 size_t count, loff_t *ppos) 1231 { 1232 struct smu_private *pp = file->private_data; 1233 1234 if (pp->mode == smu_file_commands) 1235 return smu_read_command(file, pp, buf, count); 1236 if (pp->mode == smu_file_events) 1237 return smu_read_events(file, pp, buf, count); 1238 1239 return -EBADFD; 1240 } 1241 1242 static unsigned int smu_fpoll(struct file *file, poll_table *wait) 1243 { 1244 struct smu_private *pp = file->private_data; 1245 unsigned int mask = 0; 1246 unsigned long flags; 1247 1248 if (pp == 0) 1249 return 0; 1250 1251 if (pp->mode == smu_file_commands) { 1252 poll_wait(file, &pp->wait, wait); 1253 1254 spin_lock_irqsave(&pp->lock, flags); 1255 if (pp->busy && pp->cmd.status != 1) 1256 mask |= POLLIN; 1257 spin_unlock_irqrestore(&pp->lock, flags); 1258 } 1259 if (pp->mode == smu_file_events) { 1260 /* Not yet implemented */ 1261 } 1262 return mask; 1263 } 1264 1265 static int smu_release(struct inode *inode, struct file *file) 1266 { 1267 struct smu_private *pp = file->private_data; 1268 unsigned long flags; 1269 unsigned int busy; 1270 1271 if (pp == 0) 1272 return 0; 1273 1274 file->private_data = NULL; 1275 1276 /* Mark file as closing to avoid races with new request */ 1277 spin_lock_irqsave(&pp->lock, flags); 1278 pp->mode = smu_file_closing; 1279 busy = pp->busy; 1280 1281 /* Wait for any pending request to complete */ 1282 if (busy && pp->cmd.status == 1) { 1283 DECLARE_WAITQUEUE(wait, current); 1284 1285 add_wait_queue(&pp->wait, &wait); 1286 for (;;) { 1287 set_current_state(TASK_UNINTERRUPTIBLE); 1288 if (pp->cmd.status != 1) 1289 break; 1290 spin_unlock_irqrestore(&pp->lock, flags); 1291 schedule(); 1292 spin_lock_irqsave(&pp->lock, flags); 1293 } 1294 set_current_state(TASK_RUNNING); 1295 remove_wait_queue(&pp->wait, &wait); 1296 } 1297 spin_unlock_irqrestore(&pp->lock, flags); 1298 1299 spin_lock_irqsave(&smu_clist_lock, flags); 1300 list_del(&pp->list); 1301 spin_unlock_irqrestore(&smu_clist_lock, flags); 1302 kfree(pp); 1303 1304 return 0; 1305 } 1306 1307 1308 static const struct file_operations smu_device_fops = { 1309 .llseek = no_llseek, 1310 .read = smu_read, 1311 .write = smu_write, 1312 .poll = smu_fpoll, 1313 .open = smu_open, 1314 .release = smu_release, 1315 }; 1316 1317 static struct miscdevice pmu_device = { 1318 MISC_DYNAMIC_MINOR, "smu", &smu_device_fops 1319 }; 1320 1321 static int smu_device_init(void) 1322 { 1323 if (!smu) 1324 return -ENODEV; 1325 if (misc_register(&pmu_device) < 0) 1326 printk(KERN_ERR "via-pmu: cannot register misc device.\n"); 1327 return 0; 1328 } 1329 device_initcall(smu_device_init); 1330