xref: /linux/drivers/macintosh/smu.c (revision 93d90ad708b8da6efc0e487b66111aa9db7f70c7)
1 /*
2  * PowerMac G5 SMU driver
3  *
4  * Copyright 2004 J. Mayer <l_indien@magic.fr>
5  * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
6  *
7  * Released under the term of the GNU GPL v2.
8  */
9 
10 /*
11  * TODO:
12  *  - maybe add timeout to commands ?
13  *  - blocking version of time functions
14  *  - polling version of i2c commands (including timer that works with
15  *    interrupts off)
16  *  - maybe avoid some data copies with i2c by directly using the smu cmd
17  *    buffer and a lower level internal interface
18  *  - understand SMU -> CPU events and implement reception of them via
19  *    the userland interface
20  */
21 
22 #include <linux/types.h>
23 #include <linux/kernel.h>
24 #include <linux/device.h>
25 #include <linux/dmapool.h>
26 #include <linux/bootmem.h>
27 #include <linux/vmalloc.h>
28 #include <linux/highmem.h>
29 #include <linux/jiffies.h>
30 #include <linux/interrupt.h>
31 #include <linux/rtc.h>
32 #include <linux/completion.h>
33 #include <linux/miscdevice.h>
34 #include <linux/delay.h>
35 #include <linux/poll.h>
36 #include <linux/mutex.h>
37 #include <linux/of_device.h>
38 #include <linux/of_irq.h>
39 #include <linux/of_platform.h>
40 #include <linux/slab.h>
41 
42 #include <asm/byteorder.h>
43 #include <asm/io.h>
44 #include <asm/prom.h>
45 #include <asm/machdep.h>
46 #include <asm/pmac_feature.h>
47 #include <asm/smu.h>
48 #include <asm/sections.h>
49 #include <asm/uaccess.h>
50 
51 #define VERSION "0.7"
52 #define AUTHOR  "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
53 
54 #undef DEBUG_SMU
55 
56 #ifdef DEBUG_SMU
57 #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
58 #else
59 #define DPRINTK(fmt, args...) do { } while (0)
60 #endif
61 
62 /*
63  * This is the command buffer passed to the SMU hardware
64  */
65 #define SMU_MAX_DATA	254
66 
67 struct smu_cmd_buf {
68 	u8 cmd;
69 	u8 length;
70 	u8 data[SMU_MAX_DATA];
71 };
72 
73 struct smu_device {
74 	spinlock_t		lock;
75 	struct device_node	*of_node;
76 	struct platform_device	*of_dev;
77 	int			doorbell;	/* doorbell gpio */
78 	u32 __iomem		*db_buf;	/* doorbell buffer */
79 	struct device_node	*db_node;
80 	unsigned int		db_irq;
81 	int			msg;
82 	struct device_node	*msg_node;
83 	unsigned int		msg_irq;
84 	struct smu_cmd_buf	*cmd_buf;	/* command buffer virtual */
85 	u32			cmd_buf_abs;	/* command buffer absolute */
86 	struct list_head	cmd_list;
87 	struct smu_cmd		*cmd_cur;	/* pending command */
88 	int			broken_nap;
89 	struct list_head	cmd_i2c_list;
90 	struct smu_i2c_cmd	*cmd_i2c_cur;	/* pending i2c command */
91 	struct timer_list	i2c_timer;
92 };
93 
94 /*
95  * I don't think there will ever be more than one SMU, so
96  * for now, just hard code that
97  */
98 static DEFINE_MUTEX(smu_mutex);
99 static struct smu_device	*smu;
100 static DEFINE_MUTEX(smu_part_access);
101 static int smu_irq_inited;
102 
103 static void smu_i2c_retry(unsigned long data);
104 
105 /*
106  * SMU driver low level stuff
107  */
108 
109 static void smu_start_cmd(void)
110 {
111 	unsigned long faddr, fend;
112 	struct smu_cmd *cmd;
113 
114 	if (list_empty(&smu->cmd_list))
115 		return;
116 
117 	/* Fetch first command in queue */
118 	cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
119 	smu->cmd_cur = cmd;
120 	list_del(&cmd->link);
121 
122 	DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
123 		cmd->data_len);
124 	DPRINTK("SMU: data buffer: %8ph\n", cmd->data_buf);
125 
126 	/* Fill the SMU command buffer */
127 	smu->cmd_buf->cmd = cmd->cmd;
128 	smu->cmd_buf->length = cmd->data_len;
129 	memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
130 
131 	/* Flush command and data to RAM */
132 	faddr = (unsigned long)smu->cmd_buf;
133 	fend = faddr + smu->cmd_buf->length + 2;
134 	flush_inval_dcache_range(faddr, fend);
135 
136 
137 	/* We also disable NAP mode for the duration of the command
138 	 * on U3 based machines.
139 	 * This is slightly racy as it can be written back to 1 by a sysctl
140 	 * but that never happens in practice. There seem to be an issue with
141 	 * U3 based machines such as the iMac G5 where napping for the
142 	 * whole duration of the command prevents the SMU from fetching it
143 	 * from memory. This might be related to the strange i2c based
144 	 * mechanism the SMU uses to access memory.
145 	 */
146 	if (smu->broken_nap)
147 		powersave_nap = 0;
148 
149 	/* This isn't exactly a DMA mapping here, I suspect
150 	 * the SMU is actually communicating with us via i2c to the
151 	 * northbridge or the CPU to access RAM.
152 	 */
153 	writel(smu->cmd_buf_abs, smu->db_buf);
154 
155 	/* Ring the SMU doorbell */
156 	pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
157 }
158 
159 
160 static irqreturn_t smu_db_intr(int irq, void *arg)
161 {
162 	unsigned long flags;
163 	struct smu_cmd *cmd;
164 	void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
165 	void *misc = NULL;
166 	u8 gpio;
167 	int rc = 0;
168 
169 	/* SMU completed the command, well, we hope, let's make sure
170 	 * of it
171 	 */
172 	spin_lock_irqsave(&smu->lock, flags);
173 
174 	gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
175 	if ((gpio & 7) != 7) {
176 		spin_unlock_irqrestore(&smu->lock, flags);
177 		return IRQ_HANDLED;
178 	}
179 
180 	cmd = smu->cmd_cur;
181 	smu->cmd_cur = NULL;
182 	if (cmd == NULL)
183 		goto bail;
184 
185 	if (rc == 0) {
186 		unsigned long faddr;
187 		int reply_len;
188 		u8 ack;
189 
190 		/* CPU might have brought back the cache line, so we need
191 		 * to flush again before peeking at the SMU response. We
192 		 * flush the entire buffer for now as we haven't read the
193 		 * reply length (it's only 2 cache lines anyway)
194 		 */
195 		faddr = (unsigned long)smu->cmd_buf;
196 		flush_inval_dcache_range(faddr, faddr + 256);
197 
198 		/* Now check ack */
199 		ack = (~cmd->cmd) & 0xff;
200 		if (ack != smu->cmd_buf->cmd) {
201 			DPRINTK("SMU: incorrect ack, want %x got %x\n",
202 				ack, smu->cmd_buf->cmd);
203 			rc = -EIO;
204 		}
205 		reply_len = rc == 0 ? smu->cmd_buf->length : 0;
206 		DPRINTK("SMU: reply len: %d\n", reply_len);
207 		if (reply_len > cmd->reply_len) {
208 			printk(KERN_WARNING "SMU: reply buffer too small,"
209 			       "got %d bytes for a %d bytes buffer\n",
210 			       reply_len, cmd->reply_len);
211 			reply_len = cmd->reply_len;
212 		}
213 		cmd->reply_len = reply_len;
214 		if (cmd->reply_buf && reply_len)
215 			memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
216 	}
217 
218 	/* Now complete the command. Write status last in order as we lost
219 	 * ownership of the command structure as soon as it's no longer -1
220 	 */
221 	done = cmd->done;
222 	misc = cmd->misc;
223 	mb();
224 	cmd->status = rc;
225 
226 	/* Re-enable NAP mode */
227 	if (smu->broken_nap)
228 		powersave_nap = 1;
229  bail:
230 	/* Start next command if any */
231 	smu_start_cmd();
232 	spin_unlock_irqrestore(&smu->lock, flags);
233 
234 	/* Call command completion handler if any */
235 	if (done)
236 		done(cmd, misc);
237 
238 	/* It's an edge interrupt, nothing to do */
239 	return IRQ_HANDLED;
240 }
241 
242 
243 static irqreturn_t smu_msg_intr(int irq, void *arg)
244 {
245 	/* I don't quite know what to do with this one, we seem to never
246 	 * receive it, so I suspect we have to arm it someway in the SMU
247 	 * to start getting events that way.
248 	 */
249 
250 	printk(KERN_INFO "SMU: message interrupt !\n");
251 
252 	/* It's an edge interrupt, nothing to do */
253 	return IRQ_HANDLED;
254 }
255 
256 
257 /*
258  * Queued command management.
259  *
260  */
261 
262 int smu_queue_cmd(struct smu_cmd *cmd)
263 {
264 	unsigned long flags;
265 
266 	if (smu == NULL)
267 		return -ENODEV;
268 	if (cmd->data_len > SMU_MAX_DATA ||
269 	    cmd->reply_len > SMU_MAX_DATA)
270 		return -EINVAL;
271 
272 	cmd->status = 1;
273 	spin_lock_irqsave(&smu->lock, flags);
274 	list_add_tail(&cmd->link, &smu->cmd_list);
275 	if (smu->cmd_cur == NULL)
276 		smu_start_cmd();
277 	spin_unlock_irqrestore(&smu->lock, flags);
278 
279 	/* Workaround for early calls when irq isn't available */
280 	if (!smu_irq_inited || smu->db_irq == NO_IRQ)
281 		smu_spinwait_cmd(cmd);
282 
283 	return 0;
284 }
285 EXPORT_SYMBOL(smu_queue_cmd);
286 
287 
288 int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
289 		     unsigned int data_len,
290 		     void (*done)(struct smu_cmd *cmd, void *misc),
291 		     void *misc, ...)
292 {
293 	struct smu_cmd *cmd = &scmd->cmd;
294 	va_list list;
295 	int i;
296 
297 	if (data_len > sizeof(scmd->buffer))
298 		return -EINVAL;
299 
300 	memset(scmd, 0, sizeof(*scmd));
301 	cmd->cmd = command;
302 	cmd->data_len = data_len;
303 	cmd->data_buf = scmd->buffer;
304 	cmd->reply_len = sizeof(scmd->buffer);
305 	cmd->reply_buf = scmd->buffer;
306 	cmd->done = done;
307 	cmd->misc = misc;
308 
309 	va_start(list, misc);
310 	for (i = 0; i < data_len; ++i)
311 		scmd->buffer[i] = (u8)va_arg(list, int);
312 	va_end(list);
313 
314 	return smu_queue_cmd(cmd);
315 }
316 EXPORT_SYMBOL(smu_queue_simple);
317 
318 
319 void smu_poll(void)
320 {
321 	u8 gpio;
322 
323 	if (smu == NULL)
324 		return;
325 
326 	gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
327 	if ((gpio & 7) == 7)
328 		smu_db_intr(smu->db_irq, smu);
329 }
330 EXPORT_SYMBOL(smu_poll);
331 
332 
333 void smu_done_complete(struct smu_cmd *cmd, void *misc)
334 {
335 	struct completion *comp = misc;
336 
337 	complete(comp);
338 }
339 EXPORT_SYMBOL(smu_done_complete);
340 
341 
342 void smu_spinwait_cmd(struct smu_cmd *cmd)
343 {
344 	while(cmd->status == 1)
345 		smu_poll();
346 }
347 EXPORT_SYMBOL(smu_spinwait_cmd);
348 
349 
350 /* RTC low level commands */
351 static inline int bcd2hex (int n)
352 {
353 	return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
354 }
355 
356 
357 static inline int hex2bcd (int n)
358 {
359 	return ((n / 10) << 4) + (n % 10);
360 }
361 
362 
363 static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
364 					struct rtc_time *time)
365 {
366 	cmd_buf->cmd = 0x8e;
367 	cmd_buf->length = 8;
368 	cmd_buf->data[0] = 0x80;
369 	cmd_buf->data[1] = hex2bcd(time->tm_sec);
370 	cmd_buf->data[2] = hex2bcd(time->tm_min);
371 	cmd_buf->data[3] = hex2bcd(time->tm_hour);
372 	cmd_buf->data[4] = time->tm_wday;
373 	cmd_buf->data[5] = hex2bcd(time->tm_mday);
374 	cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
375 	cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
376 }
377 
378 
379 int smu_get_rtc_time(struct rtc_time *time, int spinwait)
380 {
381 	struct smu_simple_cmd cmd;
382 	int rc;
383 
384 	if (smu == NULL)
385 		return -ENODEV;
386 
387 	memset(time, 0, sizeof(struct rtc_time));
388 	rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
389 			      SMU_CMD_RTC_GET_DATETIME);
390 	if (rc)
391 		return rc;
392 	smu_spinwait_simple(&cmd);
393 
394 	time->tm_sec = bcd2hex(cmd.buffer[0]);
395 	time->tm_min = bcd2hex(cmd.buffer[1]);
396 	time->tm_hour = bcd2hex(cmd.buffer[2]);
397 	time->tm_wday = bcd2hex(cmd.buffer[3]);
398 	time->tm_mday = bcd2hex(cmd.buffer[4]);
399 	time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
400 	time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
401 
402 	return 0;
403 }
404 
405 
406 int smu_set_rtc_time(struct rtc_time *time, int spinwait)
407 {
408 	struct smu_simple_cmd cmd;
409 	int rc;
410 
411 	if (smu == NULL)
412 		return -ENODEV;
413 
414 	rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
415 			      SMU_CMD_RTC_SET_DATETIME,
416 			      hex2bcd(time->tm_sec),
417 			      hex2bcd(time->tm_min),
418 			      hex2bcd(time->tm_hour),
419 			      time->tm_wday,
420 			      hex2bcd(time->tm_mday),
421 			      hex2bcd(time->tm_mon) + 1,
422 			      hex2bcd(time->tm_year - 100));
423 	if (rc)
424 		return rc;
425 	smu_spinwait_simple(&cmd);
426 
427 	return 0;
428 }
429 
430 
431 void smu_shutdown(void)
432 {
433 	struct smu_simple_cmd cmd;
434 
435 	if (smu == NULL)
436 		return;
437 
438 	if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
439 			     'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
440 		return;
441 	smu_spinwait_simple(&cmd);
442 	for (;;)
443 		;
444 }
445 
446 
447 void smu_restart(void)
448 {
449 	struct smu_simple_cmd cmd;
450 
451 	if (smu == NULL)
452 		return;
453 
454 	if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
455 			     'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
456 		return;
457 	smu_spinwait_simple(&cmd);
458 	for (;;)
459 		;
460 }
461 
462 
463 int smu_present(void)
464 {
465 	return smu != NULL;
466 }
467 EXPORT_SYMBOL(smu_present);
468 
469 
470 int __init smu_init (void)
471 {
472 	struct device_node *np;
473 	const u32 *data;
474 	int ret = 0;
475 
476         np = of_find_node_by_type(NULL, "smu");
477         if (np == NULL)
478 		return -ENODEV;
479 
480 	printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
481 
482 	if (smu_cmdbuf_abs == 0) {
483 		printk(KERN_ERR "SMU: Command buffer not allocated !\n");
484 		ret = -EINVAL;
485 		goto fail_np;
486 	}
487 
488 	smu = alloc_bootmem(sizeof(struct smu_device));
489 
490 	spin_lock_init(&smu->lock);
491 	INIT_LIST_HEAD(&smu->cmd_list);
492 	INIT_LIST_HEAD(&smu->cmd_i2c_list);
493 	smu->of_node = np;
494 	smu->db_irq = NO_IRQ;
495 	smu->msg_irq = NO_IRQ;
496 
497 	/* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
498 	 * 32 bits value safely
499 	 */
500 	smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
501 	smu->cmd_buf = __va(smu_cmdbuf_abs);
502 
503 	smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
504 	if (smu->db_node == NULL) {
505 		printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
506 		ret = -ENXIO;
507 		goto fail_bootmem;
508 	}
509 	data = of_get_property(smu->db_node, "reg", NULL);
510 	if (data == NULL) {
511 		printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
512 		ret = -ENXIO;
513 		goto fail_db_node;
514 	}
515 
516 	/* Current setup has one doorbell GPIO that does both doorbell
517 	 * and ack. GPIOs are at 0x50, best would be to find that out
518 	 * in the device-tree though.
519 	 */
520 	smu->doorbell = *data;
521 	if (smu->doorbell < 0x50)
522 		smu->doorbell += 0x50;
523 
524 	/* Now look for the smu-interrupt GPIO */
525 	do {
526 		smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
527 		if (smu->msg_node == NULL)
528 			break;
529 		data = of_get_property(smu->msg_node, "reg", NULL);
530 		if (data == NULL) {
531 			of_node_put(smu->msg_node);
532 			smu->msg_node = NULL;
533 			break;
534 		}
535 		smu->msg = *data;
536 		if (smu->msg < 0x50)
537 			smu->msg += 0x50;
538 	} while(0);
539 
540 	/* Doorbell buffer is currently hard-coded, I didn't find a proper
541 	 * device-tree entry giving the address. Best would probably to use
542 	 * an offset for K2 base though, but let's do it that way for now.
543 	 */
544 	smu->db_buf = ioremap(0x8000860c, 0x1000);
545 	if (smu->db_buf == NULL) {
546 		printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
547 		ret = -ENXIO;
548 		goto fail_msg_node;
549 	}
550 
551 	/* U3 has an issue with NAP mode when issuing SMU commands */
552 	smu->broken_nap = pmac_get_uninorth_variant() < 4;
553 	if (smu->broken_nap)
554 		printk(KERN_INFO "SMU: using NAP mode workaround\n");
555 
556 	sys_ctrler = SYS_CTRLER_SMU;
557 	return 0;
558 
559 fail_msg_node:
560 	if (smu->msg_node)
561 		of_node_put(smu->msg_node);
562 fail_db_node:
563 	of_node_put(smu->db_node);
564 fail_bootmem:
565 	free_bootmem(__pa(smu), sizeof(struct smu_device));
566 	smu = NULL;
567 fail_np:
568 	of_node_put(np);
569 	return ret;
570 }
571 
572 
573 static int smu_late_init(void)
574 {
575 	if (!smu)
576 		return 0;
577 
578 	init_timer(&smu->i2c_timer);
579 	smu->i2c_timer.function = smu_i2c_retry;
580 	smu->i2c_timer.data = (unsigned long)smu;
581 
582 	if (smu->db_node) {
583 		smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
584 		if (smu->db_irq == NO_IRQ)
585 			printk(KERN_ERR "smu: failed to map irq for node %s\n",
586 			       smu->db_node->full_name);
587 	}
588 	if (smu->msg_node) {
589 		smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
590 		if (smu->msg_irq == NO_IRQ)
591 			printk(KERN_ERR "smu: failed to map irq for node %s\n",
592 			       smu->msg_node->full_name);
593 	}
594 
595 	/*
596 	 * Try to request the interrupts
597 	 */
598 
599 	if (smu->db_irq != NO_IRQ) {
600 		if (request_irq(smu->db_irq, smu_db_intr,
601 				IRQF_SHARED, "SMU doorbell", smu) < 0) {
602 			printk(KERN_WARNING "SMU: can't "
603 			       "request interrupt %d\n",
604 			       smu->db_irq);
605 			smu->db_irq = NO_IRQ;
606 		}
607 	}
608 
609 	if (smu->msg_irq != NO_IRQ) {
610 		if (request_irq(smu->msg_irq, smu_msg_intr,
611 				IRQF_SHARED, "SMU message", smu) < 0) {
612 			printk(KERN_WARNING "SMU: can't "
613 			       "request interrupt %d\n",
614 			       smu->msg_irq);
615 			smu->msg_irq = NO_IRQ;
616 		}
617 	}
618 
619 	smu_irq_inited = 1;
620 	return 0;
621 }
622 /* This has to be before arch_initcall as the low i2c stuff relies on the
623  * above having been done before we reach arch_initcalls
624  */
625 core_initcall(smu_late_init);
626 
627 /*
628  * sysfs visibility
629  */
630 
631 static void smu_expose_childs(struct work_struct *unused)
632 {
633 	struct device_node *np;
634 
635 	for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
636 		if (of_device_is_compatible(np, "smu-sensors"))
637 			of_platform_device_create(np, "smu-sensors",
638 						  &smu->of_dev->dev);
639 }
640 
641 static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
642 
643 static int smu_platform_probe(struct platform_device* dev)
644 {
645 	if (!smu)
646 		return -ENODEV;
647 	smu->of_dev = dev;
648 
649 	/*
650 	 * Ok, we are matched, now expose all i2c busses. We have to defer
651 	 * that unfortunately or it would deadlock inside the device model
652 	 */
653 	schedule_work(&smu_expose_childs_work);
654 
655 	return 0;
656 }
657 
658 static const struct of_device_id smu_platform_match[] =
659 {
660 	{
661 		.type		= "smu",
662 	},
663 	{},
664 };
665 
666 static struct platform_driver smu_of_platform_driver =
667 {
668 	.driver = {
669 		.name = "smu",
670 		.of_match_table = smu_platform_match,
671 	},
672 	.probe		= smu_platform_probe,
673 };
674 
675 static int __init smu_init_sysfs(void)
676 {
677 	/*
678 	 * For now, we don't power manage machines with an SMU chip,
679 	 * I'm a bit too far from figuring out how that works with those
680 	 * new chipsets, but that will come back and bite us
681 	 */
682 	platform_driver_register(&smu_of_platform_driver);
683 	return 0;
684 }
685 
686 device_initcall(smu_init_sysfs);
687 
688 struct platform_device *smu_get_ofdev(void)
689 {
690 	if (!smu)
691 		return NULL;
692 	return smu->of_dev;
693 }
694 
695 EXPORT_SYMBOL_GPL(smu_get_ofdev);
696 
697 /*
698  * i2c interface
699  */
700 
701 static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
702 {
703 	void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
704 	void *misc = cmd->misc;
705 	unsigned long flags;
706 
707 	/* Check for read case */
708 	if (!fail && cmd->read) {
709 		if (cmd->pdata[0] < 1)
710 			fail = 1;
711 		else
712 			memcpy(cmd->info.data, &cmd->pdata[1],
713 			       cmd->info.datalen);
714 	}
715 
716 	DPRINTK("SMU: completing, success: %d\n", !fail);
717 
718 	/* Update status and mark no pending i2c command with lock
719 	 * held so nobody comes in while we dequeue an eventual
720 	 * pending next i2c command
721 	 */
722 	spin_lock_irqsave(&smu->lock, flags);
723 	smu->cmd_i2c_cur = NULL;
724 	wmb();
725 	cmd->status = fail ? -EIO : 0;
726 
727 	/* Is there another i2c command waiting ? */
728 	if (!list_empty(&smu->cmd_i2c_list)) {
729 		struct smu_i2c_cmd *newcmd;
730 
731 		/* Fetch it, new current, remove from list */
732 		newcmd = list_entry(smu->cmd_i2c_list.next,
733 				    struct smu_i2c_cmd, link);
734 		smu->cmd_i2c_cur = newcmd;
735 		list_del(&cmd->link);
736 
737 		/* Queue with low level smu */
738 		list_add_tail(&cmd->scmd.link, &smu->cmd_list);
739 		if (smu->cmd_cur == NULL)
740 			smu_start_cmd();
741 	}
742 	spin_unlock_irqrestore(&smu->lock, flags);
743 
744 	/* Call command completion handler if any */
745 	if (done)
746 		done(cmd, misc);
747 
748 }
749 
750 
751 static void smu_i2c_retry(unsigned long data)
752 {
753 	struct smu_i2c_cmd	*cmd = smu->cmd_i2c_cur;
754 
755 	DPRINTK("SMU: i2c failure, requeuing...\n");
756 
757 	/* requeue command simply by resetting reply_len */
758 	cmd->pdata[0] = 0xff;
759 	cmd->scmd.reply_len = sizeof(cmd->pdata);
760 	smu_queue_cmd(&cmd->scmd);
761 }
762 
763 
764 static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
765 {
766 	struct smu_i2c_cmd	*cmd = misc;
767 	int			fail = 0;
768 
769 	DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
770 		cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
771 
772 	/* Check for possible status */
773 	if (scmd->status < 0)
774 		fail = 1;
775 	else if (cmd->read) {
776 		if (cmd->stage == 0)
777 			fail = cmd->pdata[0] != 0;
778 		else
779 			fail = cmd->pdata[0] >= 0x80;
780 	} else {
781 		fail = cmd->pdata[0] != 0;
782 	}
783 
784 	/* Handle failures by requeuing command, after 5ms interval
785 	 */
786 	if (fail && --cmd->retries > 0) {
787 		DPRINTK("SMU: i2c failure, starting timer...\n");
788 		BUG_ON(cmd != smu->cmd_i2c_cur);
789 		if (!smu_irq_inited) {
790 			mdelay(5);
791 			smu_i2c_retry(0);
792 			return;
793 		}
794 		mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
795 		return;
796 	}
797 
798 	/* If failure or stage 1, command is complete */
799 	if (fail || cmd->stage != 0) {
800 		smu_i2c_complete_command(cmd, fail);
801 		return;
802 	}
803 
804 	DPRINTK("SMU: going to stage 1\n");
805 
806 	/* Ok, initial command complete, now poll status */
807 	scmd->reply_buf = cmd->pdata;
808 	scmd->reply_len = sizeof(cmd->pdata);
809 	scmd->data_buf = cmd->pdata;
810 	scmd->data_len = 1;
811 	cmd->pdata[0] = 0;
812 	cmd->stage = 1;
813 	cmd->retries = 20;
814 	smu_queue_cmd(scmd);
815 }
816 
817 
818 int smu_queue_i2c(struct smu_i2c_cmd *cmd)
819 {
820 	unsigned long flags;
821 
822 	if (smu == NULL)
823 		return -ENODEV;
824 
825 	/* Fill most fields of scmd */
826 	cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
827 	cmd->scmd.done = smu_i2c_low_completion;
828 	cmd->scmd.misc = cmd;
829 	cmd->scmd.reply_buf = cmd->pdata;
830 	cmd->scmd.reply_len = sizeof(cmd->pdata);
831 	cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
832 	cmd->scmd.status = 1;
833 	cmd->stage = 0;
834 	cmd->pdata[0] = 0xff;
835 	cmd->retries = 20;
836 	cmd->status = 1;
837 
838 	/* Check transfer type, sanitize some "info" fields
839 	 * based on transfer type and do more checking
840 	 */
841 	cmd->info.caddr = cmd->info.devaddr;
842 	cmd->read = cmd->info.devaddr & 0x01;
843 	switch(cmd->info.type) {
844 	case SMU_I2C_TRANSFER_SIMPLE:
845 		memset(&cmd->info.sublen, 0, 4);
846 		break;
847 	case SMU_I2C_TRANSFER_COMBINED:
848 		cmd->info.devaddr &= 0xfe;
849 	case SMU_I2C_TRANSFER_STDSUB:
850 		if (cmd->info.sublen > 3)
851 			return -EINVAL;
852 		break;
853 	default:
854 		return -EINVAL;
855 	}
856 
857 	/* Finish setting up command based on transfer direction
858 	 */
859 	if (cmd->read) {
860 		if (cmd->info.datalen > SMU_I2C_READ_MAX)
861 			return -EINVAL;
862 		memset(cmd->info.data, 0xff, cmd->info.datalen);
863 		cmd->scmd.data_len = 9;
864 	} else {
865 		if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
866 			return -EINVAL;
867 		cmd->scmd.data_len = 9 + cmd->info.datalen;
868 	}
869 
870 	DPRINTK("SMU: i2c enqueuing command\n");
871 	DPRINTK("SMU:   %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
872 		cmd->read ? "read" : "write", cmd->info.datalen,
873 		cmd->info.bus, cmd->info.caddr,
874 		cmd->info.subaddr[0], cmd->info.type);
875 
876 
877 	/* Enqueue command in i2c list, and if empty, enqueue also in
878 	 * main command list
879 	 */
880 	spin_lock_irqsave(&smu->lock, flags);
881 	if (smu->cmd_i2c_cur == NULL) {
882 		smu->cmd_i2c_cur = cmd;
883 		list_add_tail(&cmd->scmd.link, &smu->cmd_list);
884 		if (smu->cmd_cur == NULL)
885 			smu_start_cmd();
886 	} else
887 		list_add_tail(&cmd->link, &smu->cmd_i2c_list);
888 	spin_unlock_irqrestore(&smu->lock, flags);
889 
890 	return 0;
891 }
892 
893 /*
894  * Handling of "partitions"
895  */
896 
897 static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
898 {
899 	DECLARE_COMPLETION_ONSTACK(comp);
900 	unsigned int chunk;
901 	struct smu_cmd cmd;
902 	int rc;
903 	u8 params[8];
904 
905 	/* We currently use a chunk size of 0xe. We could check the
906 	 * SMU firmware version and use bigger sizes though
907 	 */
908 	chunk = 0xe;
909 
910 	while (len) {
911 		unsigned int clen = min(len, chunk);
912 
913 		cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
914 		cmd.data_len = 7;
915 		cmd.data_buf = params;
916 		cmd.reply_len = chunk;
917 		cmd.reply_buf = dest;
918 		cmd.done = smu_done_complete;
919 		cmd.misc = &comp;
920 		params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
921 		params[1] = 0x4;
922 		*((u32 *)&params[2]) = addr;
923 		params[6] = clen;
924 
925 		rc = smu_queue_cmd(&cmd);
926 		if (rc)
927 			return rc;
928 		wait_for_completion(&comp);
929 		if (cmd.status != 0)
930 			return rc;
931 		if (cmd.reply_len != clen) {
932 			printk(KERN_DEBUG "SMU: short read in "
933 			       "smu_read_datablock, got: %d, want: %d\n",
934 			       cmd.reply_len, clen);
935 			return -EIO;
936 		}
937 		len -= clen;
938 		addr += clen;
939 		dest += clen;
940 	}
941 	return 0;
942 }
943 
944 static struct smu_sdbp_header *smu_create_sdb_partition(int id)
945 {
946 	DECLARE_COMPLETION_ONSTACK(comp);
947 	struct smu_simple_cmd cmd;
948 	unsigned int addr, len, tlen;
949 	struct smu_sdbp_header *hdr;
950 	struct property *prop;
951 
952 	/* First query the partition info */
953 	DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
954 	smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
955 			 smu_done_complete, &comp,
956 			 SMU_CMD_PARTITION_LATEST, id);
957 	wait_for_completion(&comp);
958 	DPRINTK("SMU: done, status: %d, reply_len: %d\n",
959 		cmd.cmd.status, cmd.cmd.reply_len);
960 
961 	/* Partition doesn't exist (or other error) */
962 	if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
963 		return NULL;
964 
965 	/* Fetch address and length from reply */
966 	addr = *((u16 *)cmd.buffer);
967 	len = cmd.buffer[3] << 2;
968 	/* Calucluate total length to allocate, including the 17 bytes
969 	 * for "sdb-partition-XX" that we append at the end of the buffer
970 	 */
971 	tlen = sizeof(struct property) + len + 18;
972 
973 	prop = kzalloc(tlen, GFP_KERNEL);
974 	if (prop == NULL)
975 		return NULL;
976 	hdr = (struct smu_sdbp_header *)(prop + 1);
977 	prop->name = ((char *)prop) + tlen - 18;
978 	sprintf(prop->name, "sdb-partition-%02x", id);
979 	prop->length = len;
980 	prop->value = hdr;
981 	prop->next = NULL;
982 
983 	/* Read the datablock */
984 	if (smu_read_datablock((u8 *)hdr, addr, len)) {
985 		printk(KERN_DEBUG "SMU: datablock read failed while reading "
986 		       "partition %02x !\n", id);
987 		goto failure;
988 	}
989 
990 	/* Got it, check a few things and create the property */
991 	if (hdr->id != id) {
992 		printk(KERN_DEBUG "SMU: Reading partition %02x and got "
993 		       "%02x !\n", id, hdr->id);
994 		goto failure;
995 	}
996 	if (of_add_property(smu->of_node, prop)) {
997 		printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
998 		       "property !\n", id);
999 		goto failure;
1000 	}
1001 
1002 	return hdr;
1003  failure:
1004 	kfree(prop);
1005 	return NULL;
1006 }
1007 
1008 /* Note: Only allowed to return error code in pointers (using ERR_PTR)
1009  * when interruptible is 1
1010  */
1011 const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
1012 		unsigned int *size, int interruptible)
1013 {
1014 	char pname[32];
1015 	const struct smu_sdbp_header *part;
1016 
1017 	if (!smu)
1018 		return NULL;
1019 
1020 	sprintf(pname, "sdb-partition-%02x", id);
1021 
1022 	DPRINTK("smu_get_sdb_partition(%02x)\n", id);
1023 
1024 	if (interruptible) {
1025 		int rc;
1026 		rc = mutex_lock_interruptible(&smu_part_access);
1027 		if (rc)
1028 			return ERR_PTR(rc);
1029 	} else
1030 		mutex_lock(&smu_part_access);
1031 
1032 	part = of_get_property(smu->of_node, pname, size);
1033 	if (part == NULL) {
1034 		DPRINTK("trying to extract from SMU ...\n");
1035 		part = smu_create_sdb_partition(id);
1036 		if (part != NULL && size)
1037 			*size = part->len << 2;
1038 	}
1039 	mutex_unlock(&smu_part_access);
1040 	return part;
1041 }
1042 
1043 const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
1044 {
1045 	return __smu_get_sdb_partition(id, size, 0);
1046 }
1047 EXPORT_SYMBOL(smu_get_sdb_partition);
1048 
1049 
1050 /*
1051  * Userland driver interface
1052  */
1053 
1054 
1055 static LIST_HEAD(smu_clist);
1056 static DEFINE_SPINLOCK(smu_clist_lock);
1057 
1058 enum smu_file_mode {
1059 	smu_file_commands,
1060 	smu_file_events,
1061 	smu_file_closing
1062 };
1063 
1064 struct smu_private
1065 {
1066 	struct list_head	list;
1067 	enum smu_file_mode	mode;
1068 	int			busy;
1069 	struct smu_cmd		cmd;
1070 	spinlock_t		lock;
1071 	wait_queue_head_t	wait;
1072 	u8			buffer[SMU_MAX_DATA];
1073 };
1074 
1075 
1076 static int smu_open(struct inode *inode, struct file *file)
1077 {
1078 	struct smu_private *pp;
1079 	unsigned long flags;
1080 
1081 	pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
1082 	if (pp == 0)
1083 		return -ENOMEM;
1084 	spin_lock_init(&pp->lock);
1085 	pp->mode = smu_file_commands;
1086 	init_waitqueue_head(&pp->wait);
1087 
1088 	mutex_lock(&smu_mutex);
1089 	spin_lock_irqsave(&smu_clist_lock, flags);
1090 	list_add(&pp->list, &smu_clist);
1091 	spin_unlock_irqrestore(&smu_clist_lock, flags);
1092 	file->private_data = pp;
1093 	mutex_unlock(&smu_mutex);
1094 
1095 	return 0;
1096 }
1097 
1098 
1099 static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
1100 {
1101 	struct smu_private *pp = misc;
1102 
1103 	wake_up_all(&pp->wait);
1104 }
1105 
1106 
1107 static ssize_t smu_write(struct file *file, const char __user *buf,
1108 			 size_t count, loff_t *ppos)
1109 {
1110 	struct smu_private *pp = file->private_data;
1111 	unsigned long flags;
1112 	struct smu_user_cmd_hdr hdr;
1113 	int rc = 0;
1114 
1115 	if (pp->busy)
1116 		return -EBUSY;
1117 	else if (copy_from_user(&hdr, buf, sizeof(hdr)))
1118 		return -EFAULT;
1119 	else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
1120 		pp->mode = smu_file_events;
1121 		return 0;
1122 	} else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
1123 		const struct smu_sdbp_header *part;
1124 		part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
1125 		if (part == NULL)
1126 			return -EINVAL;
1127 		else if (IS_ERR(part))
1128 			return PTR_ERR(part);
1129 		return 0;
1130 	} else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
1131 		return -EINVAL;
1132 	else if (pp->mode != smu_file_commands)
1133 		return -EBADFD;
1134 	else if (hdr.data_len > SMU_MAX_DATA)
1135 		return -EINVAL;
1136 
1137 	spin_lock_irqsave(&pp->lock, flags);
1138 	if (pp->busy) {
1139 		spin_unlock_irqrestore(&pp->lock, flags);
1140 		return -EBUSY;
1141 	}
1142 	pp->busy = 1;
1143 	pp->cmd.status = 1;
1144 	spin_unlock_irqrestore(&pp->lock, flags);
1145 
1146 	if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
1147 		pp->busy = 0;
1148 		return -EFAULT;
1149 	}
1150 
1151 	pp->cmd.cmd = hdr.cmd;
1152 	pp->cmd.data_len = hdr.data_len;
1153 	pp->cmd.reply_len = SMU_MAX_DATA;
1154 	pp->cmd.data_buf = pp->buffer;
1155 	pp->cmd.reply_buf = pp->buffer;
1156 	pp->cmd.done = smu_user_cmd_done;
1157 	pp->cmd.misc = pp;
1158 	rc = smu_queue_cmd(&pp->cmd);
1159 	if (rc < 0)
1160 		return rc;
1161 	return count;
1162 }
1163 
1164 
1165 static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
1166 				char __user *buf, size_t count)
1167 {
1168 	DECLARE_WAITQUEUE(wait, current);
1169 	struct smu_user_reply_hdr hdr;
1170 	unsigned long flags;
1171 	int size, rc = 0;
1172 
1173 	if (!pp->busy)
1174 		return 0;
1175 	if (count < sizeof(struct smu_user_reply_hdr))
1176 		return -EOVERFLOW;
1177 	spin_lock_irqsave(&pp->lock, flags);
1178 	if (pp->cmd.status == 1) {
1179 		if (file->f_flags & O_NONBLOCK) {
1180 			spin_unlock_irqrestore(&pp->lock, flags);
1181 			return -EAGAIN;
1182 		}
1183 		add_wait_queue(&pp->wait, &wait);
1184 		for (;;) {
1185 			set_current_state(TASK_INTERRUPTIBLE);
1186 			rc = 0;
1187 			if (pp->cmd.status != 1)
1188 				break;
1189 			rc = -ERESTARTSYS;
1190 			if (signal_pending(current))
1191 				break;
1192 			spin_unlock_irqrestore(&pp->lock, flags);
1193 			schedule();
1194 			spin_lock_irqsave(&pp->lock, flags);
1195 		}
1196 		set_current_state(TASK_RUNNING);
1197 		remove_wait_queue(&pp->wait, &wait);
1198 	}
1199 	spin_unlock_irqrestore(&pp->lock, flags);
1200 	if (rc)
1201 		return rc;
1202 	if (pp->cmd.status != 0)
1203 		pp->cmd.reply_len = 0;
1204 	size = sizeof(hdr) + pp->cmd.reply_len;
1205 	if (count < size)
1206 		size = count;
1207 	rc = size;
1208 	hdr.status = pp->cmd.status;
1209 	hdr.reply_len = pp->cmd.reply_len;
1210 	if (copy_to_user(buf, &hdr, sizeof(hdr)))
1211 		return -EFAULT;
1212 	size -= sizeof(hdr);
1213 	if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
1214 		return -EFAULT;
1215 	pp->busy = 0;
1216 
1217 	return rc;
1218 }
1219 
1220 
1221 static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
1222 			       char __user *buf, size_t count)
1223 {
1224 	/* Not implemented */
1225 	msleep_interruptible(1000);
1226 	return 0;
1227 }
1228 
1229 
1230 static ssize_t smu_read(struct file *file, char __user *buf,
1231 			size_t count, loff_t *ppos)
1232 {
1233 	struct smu_private *pp = file->private_data;
1234 
1235 	if (pp->mode == smu_file_commands)
1236 		return smu_read_command(file, pp, buf, count);
1237 	if (pp->mode == smu_file_events)
1238 		return smu_read_events(file, pp, buf, count);
1239 
1240 	return -EBADFD;
1241 }
1242 
1243 static unsigned int smu_fpoll(struct file *file, poll_table *wait)
1244 {
1245 	struct smu_private *pp = file->private_data;
1246 	unsigned int mask = 0;
1247 	unsigned long flags;
1248 
1249 	if (pp == 0)
1250 		return 0;
1251 
1252 	if (pp->mode == smu_file_commands) {
1253 		poll_wait(file, &pp->wait, wait);
1254 
1255 		spin_lock_irqsave(&pp->lock, flags);
1256 		if (pp->busy && pp->cmd.status != 1)
1257 			mask |= POLLIN;
1258 		spin_unlock_irqrestore(&pp->lock, flags);
1259 	}
1260 	if (pp->mode == smu_file_events) {
1261 		/* Not yet implemented */
1262 	}
1263 	return mask;
1264 }
1265 
1266 static int smu_release(struct inode *inode, struct file *file)
1267 {
1268 	struct smu_private *pp = file->private_data;
1269 	unsigned long flags;
1270 	unsigned int busy;
1271 
1272 	if (pp == 0)
1273 		return 0;
1274 
1275 	file->private_data = NULL;
1276 
1277 	/* Mark file as closing to avoid races with new request */
1278 	spin_lock_irqsave(&pp->lock, flags);
1279 	pp->mode = smu_file_closing;
1280 	busy = pp->busy;
1281 
1282 	/* Wait for any pending request to complete */
1283 	if (busy && pp->cmd.status == 1) {
1284 		DECLARE_WAITQUEUE(wait, current);
1285 
1286 		add_wait_queue(&pp->wait, &wait);
1287 		for (;;) {
1288 			set_current_state(TASK_UNINTERRUPTIBLE);
1289 			if (pp->cmd.status != 1)
1290 				break;
1291 			spin_unlock_irqrestore(&pp->lock, flags);
1292 			schedule();
1293 			spin_lock_irqsave(&pp->lock, flags);
1294 		}
1295 		set_current_state(TASK_RUNNING);
1296 		remove_wait_queue(&pp->wait, &wait);
1297 	}
1298 	spin_unlock_irqrestore(&pp->lock, flags);
1299 
1300 	spin_lock_irqsave(&smu_clist_lock, flags);
1301 	list_del(&pp->list);
1302 	spin_unlock_irqrestore(&smu_clist_lock, flags);
1303 	kfree(pp);
1304 
1305 	return 0;
1306 }
1307 
1308 
1309 static const struct file_operations smu_device_fops = {
1310 	.llseek		= no_llseek,
1311 	.read		= smu_read,
1312 	.write		= smu_write,
1313 	.poll		= smu_fpoll,
1314 	.open		= smu_open,
1315 	.release	= smu_release,
1316 };
1317 
1318 static struct miscdevice pmu_device = {
1319 	MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
1320 };
1321 
1322 static int smu_device_init(void)
1323 {
1324 	if (!smu)
1325 		return -ENODEV;
1326 	if (misc_register(&pmu_device) < 0)
1327 		printk(KERN_ERR "via-pmu: cannot register misc device.\n");
1328 	return 0;
1329 }
1330 device_initcall(smu_device_init);
1331