xref: /linux/drivers/irqchip/irq-riscv-rpmi-sysmsi.c (revision e3966940559d52aa1800a008dcfeec218dd31f88) 
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2025 Ventana Micro Systems Inc. */
3 
4 #include <linux/acpi.h>
5 #include <linux/bits.h>
6 #include <linux/bug.h>
7 #include <linux/device.h>
8 #include <linux/device/devres.h>
9 #include <linux/dev_printk.h>
10 #include <linux/errno.h>
11 #include <linux/irq.h>
12 #include <linux/irqdomain.h>
13 #include <linux/irqchip/riscv-imsic.h>
14 #include <linux/mailbox_client.h>
15 #include <linux/mailbox/riscv-rpmi-message.h>
16 #include <linux/module.h>
17 #include <linux/msi.h>
18 #include <linux/of_irq.h>
19 #include <linux/platform_device.h>
20 #include <linux/types.h>
21 
22 struct rpmi_sysmsi_get_attrs_rx {
23 	__le32 status;
24 	__le32 sys_num_msi;
25 	__le32 flag0;
26 	__le32 flag1;
27 };
28 
29 #define RPMI_SYSMSI_MSI_ATTRIBUTES_FLAG0_PREF_PRIV	BIT(0)
30 
31 struct rpmi_sysmsi_set_msi_state_tx {
32 	__le32 sys_msi_index;
33 	__le32 sys_msi_state;
34 };
35 
36 struct rpmi_sysmsi_set_msi_state_rx {
37 	__le32 status;
38 };
39 
40 #define RPMI_SYSMSI_MSI_STATE_ENABLE			BIT(0)
41 #define RPMI_SYSMSI_MSI_STATE_PENDING			BIT(1)
42 
43 struct rpmi_sysmsi_set_msi_target_tx {
44 	__le32 sys_msi_index;
45 	__le32 sys_msi_address_low;
46 	__le32 sys_msi_address_high;
47 	__le32 sys_msi_data;
48 };
49 
50 struct rpmi_sysmsi_set_msi_target_rx {
51 	__le32 status;
52 };
53 
54 struct rpmi_sysmsi_priv {
55 	struct device		*dev;
56 	struct mbox_client	client;
57 	struct mbox_chan	*chan;
58 	u32			nr_irqs;
59 	u32			gsi_base;
60 };
61 
62 static int rpmi_sysmsi_get_num_msi(struct rpmi_sysmsi_priv *priv)
63 {
64 	struct rpmi_sysmsi_get_attrs_rx rx;
65 	struct rpmi_mbox_message msg;
66 	int ret;
67 
68 	rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_GET_ATTRIBUTES,
69 					  NULL, 0, &rx, sizeof(rx));
70 	ret = rpmi_mbox_send_message(priv->chan, &msg);
71 	if (ret)
72 		return ret;
73 	if (rx.status)
74 		return rpmi_to_linux_error(le32_to_cpu(rx.status));
75 
76 	return le32_to_cpu(rx.sys_num_msi);
77 }
78 
79 static int rpmi_sysmsi_set_msi_state(struct rpmi_sysmsi_priv *priv,
80 				     u32 sys_msi_index, u32 sys_msi_state)
81 {
82 	struct rpmi_sysmsi_set_msi_state_tx tx;
83 	struct rpmi_sysmsi_set_msi_state_rx rx;
84 	struct rpmi_mbox_message msg;
85 	int ret;
86 
87 	tx.sys_msi_index = cpu_to_le32(sys_msi_index);
88 	tx.sys_msi_state = cpu_to_le32(sys_msi_state);
89 	rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_SET_MSI_STATE,
90 					  &tx, sizeof(tx), &rx, sizeof(rx));
91 	ret = rpmi_mbox_send_message(priv->chan, &msg);
92 	if (ret)
93 		return ret;
94 	if (rx.status)
95 		return rpmi_to_linux_error(le32_to_cpu(rx.status));
96 
97 	return 0;
98 }
99 
100 static int rpmi_sysmsi_set_msi_target(struct rpmi_sysmsi_priv *priv,
101 				      u32 sys_msi_index, struct msi_msg *m)
102 {
103 	struct rpmi_sysmsi_set_msi_target_tx tx;
104 	struct rpmi_sysmsi_set_msi_target_rx rx;
105 	struct rpmi_mbox_message msg;
106 	int ret;
107 
108 	tx.sys_msi_index = cpu_to_le32(sys_msi_index);
109 	tx.sys_msi_address_low = cpu_to_le32(m->address_lo);
110 	tx.sys_msi_address_high = cpu_to_le32(m->address_hi);
111 	tx.sys_msi_data = cpu_to_le32(m->data);
112 	rpmi_mbox_init_send_with_response(&msg, RPMI_SYSMSI_SRV_SET_MSI_TARGET,
113 					  &tx, sizeof(tx), &rx, sizeof(rx));
114 	ret = rpmi_mbox_send_message(priv->chan, &msg);
115 	if (ret)
116 		return ret;
117 	if (rx.status)
118 		return rpmi_to_linux_error(le32_to_cpu(rx.status));
119 
120 	return 0;
121 }
122 
123 static void rpmi_sysmsi_irq_mask(struct irq_data *d)
124 {
125 	struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
126 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
127 	int ret;
128 
129 	ret = rpmi_sysmsi_set_msi_state(priv, hwirq, 0);
130 	if (ret)
131 		dev_warn(priv->dev, "Failed to mask hwirq %lu (error %d)\n", hwirq, ret);
132 	irq_chip_mask_parent(d);
133 }
134 
135 static void rpmi_sysmsi_irq_unmask(struct irq_data *d)
136 {
137 	struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
138 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
139 	int ret;
140 
141 	irq_chip_unmask_parent(d);
142 	ret = rpmi_sysmsi_set_msi_state(priv, hwirq, RPMI_SYSMSI_MSI_STATE_ENABLE);
143 	if (ret)
144 		dev_warn(priv->dev, "Failed to unmask hwirq %lu (error %d)\n", hwirq, ret);
145 }
146 
147 static void rpmi_sysmsi_write_msg(struct irq_data *d, struct msi_msg *msg)
148 {
149 	struct rpmi_sysmsi_priv *priv = irq_data_get_irq_chip_data(d);
150 	irq_hw_number_t hwirq = irqd_to_hwirq(d);
151 	int ret;
152 
153 	/* For zeroed MSI, do nothing as of now */
154 	if (!msg->address_hi && !msg->address_lo && !msg->data)
155 		return;
156 
157 	ret = rpmi_sysmsi_set_msi_target(priv, hwirq, msg);
158 	if (ret)
159 		dev_warn(priv->dev, "Failed to set target for hwirq %lu (error %d)\n", hwirq, ret);
160 }
161 
162 static void rpmi_sysmsi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
163 {
164 	arg->desc = desc;
165 	arg->hwirq = desc->data.icookie.value;
166 }
167 
168 static int rpmi_sysmsi_translate(struct irq_domain *d, struct irq_fwspec *fwspec,
169 				 unsigned long *hwirq, unsigned int *type)
170 {
171 	struct msi_domain_info *info = d->host_data;
172 	struct rpmi_sysmsi_priv *priv = info->data;
173 
174 	if (WARN_ON(fwspec->param_count < 1))
175 		return -EINVAL;
176 
177 	/* For DT, gsi_base is always zero. */
178 	*hwirq = fwspec->param[0] - priv->gsi_base;
179 	*type = IRQ_TYPE_NONE;
180 	return 0;
181 }
182 
183 static const struct msi_domain_template rpmi_sysmsi_template = {
184 	.chip = {
185 		.name			= "RPMI-SYSMSI",
186 		.irq_mask		= rpmi_sysmsi_irq_mask,
187 		.irq_unmask		= rpmi_sysmsi_irq_unmask,
188 #ifdef CONFIG_SMP
189 		.irq_set_affinity	= irq_chip_set_affinity_parent,
190 #endif
191 		.irq_write_msi_msg	= rpmi_sysmsi_write_msg,
192 		.flags			= IRQCHIP_SET_TYPE_MASKED |
193 					  IRQCHIP_SKIP_SET_WAKE |
194 					  IRQCHIP_MASK_ON_SUSPEND,
195 	},
196 
197 	.ops = {
198 		.set_desc		= rpmi_sysmsi_set_desc,
199 		.msi_translate		= rpmi_sysmsi_translate,
200 	},
201 
202 	.info = {
203 		.bus_token		= DOMAIN_BUS_WIRED_TO_MSI,
204 		.flags			= MSI_FLAG_USE_DEV_FWNODE,
205 		.handler		= handle_simple_irq,
206 		.handler_name		= "simple",
207 	},
208 };
209 
210 static int rpmi_sysmsi_probe(struct platform_device *pdev)
211 {
212 	struct device *dev = &pdev->dev;
213 	struct rpmi_sysmsi_priv *priv;
214 	struct fwnode_handle *fwnode;
215 	u32 id;
216 	int rc;
217 
218 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
219 	if (!priv)
220 		return -ENOMEM;
221 	priv->dev = dev;
222 
223 	/* Setup mailbox client */
224 	priv->client.dev		= priv->dev;
225 	priv->client.rx_callback	= NULL;
226 	priv->client.tx_block		= false;
227 	priv->client.knows_txdone	= true;
228 	priv->client.tx_tout		= 0;
229 
230 	/* Request mailbox channel */
231 	priv->chan = mbox_request_channel(&priv->client, 0);
232 	if (IS_ERR(priv->chan))
233 		return PTR_ERR(priv->chan);
234 
235 	/* Get number of system MSIs */
236 	rc = rpmi_sysmsi_get_num_msi(priv);
237 	if (rc < 1) {
238 		mbox_free_channel(priv->chan);
239 		if (rc)
240 			return dev_err_probe(dev, rc, "Failed to get number of system MSIs\n");
241 		else
242 			return dev_err_probe(dev, -ENODEV, "No system MSIs found\n");
243 	}
244 	priv->nr_irqs = rc;
245 
246 	fwnode = dev_fwnode(dev);
247 	if (is_acpi_node(fwnode)) {
248 		u32 nr_irqs;
249 
250 		rc = riscv_acpi_get_gsi_info(fwnode, &priv->gsi_base, &id,
251 					     &nr_irqs, NULL);
252 		if (rc) {
253 			dev_err(dev, "failed to find GSI mapping\n");
254 			return rc;
255 		}
256 
257 		/* Update with actual GSI range */
258 		if (nr_irqs != priv->nr_irqs)
259 			riscv_acpi_update_gsi_range(priv->gsi_base, priv->nr_irqs);
260 	}
261 
262 	/*
263 	 * The device MSI domain for platform devices on RISC-V architecture
264 	 * is only available after the MSI controller driver is probed so,
265 	 * explicitly configure here.
266 	 */
267 	if (!dev_get_msi_domain(dev)) {
268 		/*
269 		 * The device MSI domain for OF devices is only set at the
270 		 * time of populating/creating OF device. If the device MSI
271 		 * domain is discovered later after the OF device is created
272 		 * then we need to set it explicitly before using any platform
273 		 * MSI functions.
274 		 */
275 		if (is_of_node(fwnode)) {
276 			of_msi_configure(dev, dev_of_node(dev));
277 		} else if (is_acpi_device_node(fwnode)) {
278 			struct irq_domain *msi_domain;
279 
280 			msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev),
281 							      DOMAIN_BUS_PLATFORM_MSI);
282 			dev_set_msi_domain(dev, msi_domain);
283 		}
284 
285 		if (!dev_get_msi_domain(dev)) {
286 			mbox_free_channel(priv->chan);
287 			return -EPROBE_DEFER;
288 		}
289 	}
290 
291 	if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN,
292 					  &rpmi_sysmsi_template,
293 					  priv->nr_irqs, priv, priv)) {
294 		mbox_free_channel(priv->chan);
295 		return dev_err_probe(dev, -ENOMEM, "failed to create MSI irq domain\n");
296 	}
297 
298 #ifdef CONFIG_ACPI
299 	struct acpi_device *adev = ACPI_COMPANION(dev);
300 
301 	if (adev)
302 		acpi_dev_clear_dependencies(adev);
303 #endif
304 
305 	dev_info(dev, "%u system MSIs registered\n", priv->nr_irqs);
306 	return 0;
307 }
308 
309 static const struct of_device_id rpmi_sysmsi_match[] = {
310 	{ .compatible = "riscv,rpmi-system-msi" },
311 	{}
312 };
313 
314 static const struct acpi_device_id acpi_rpmi_sysmsi_match[] = {
315 	{ "RSCV0006" },
316 	{}
317 };
318 MODULE_DEVICE_TABLE(acpi, acpi_rpmi_sysmsi_match);
319 
320 static struct platform_driver rpmi_sysmsi_driver = {
321 	.driver = {
322 		.name			= "rpmi-sysmsi",
323 		.of_match_table		= rpmi_sysmsi_match,
324 		.acpi_match_table	= acpi_rpmi_sysmsi_match,
325 	},
326 	.probe = rpmi_sysmsi_probe,
327 };
328 builtin_platform_driver(rpmi_sysmsi_driver);
329