xref: /linux/drivers/irqchip/irq-riscv-aplic-main.h (revision 6f7e6393d1ce636bb7ec77a7fe7b77458fddf701)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2021 Western Digital Corporation or its affiliates.
4  * Copyright (C) 2022 Ventana Micro Systems Inc.
5  */
6 
7 #ifndef _IRQ_RISCV_APLIC_MAIN_H
8 #define _IRQ_RISCV_APLIC_MAIN_H
9 
10 #include <linux/device.h>
11 #include <linux/io.h>
12 #include <linux/irq.h>
13 #include <linux/irqdomain.h>
14 #include <linux/fwnode.h>
15 
16 #define APLIC_DEFAULT_PRIORITY		1
17 
18 struct aplic_msicfg {
19 	phys_addr_t		base_ppn;
20 	u32			hhxs;
21 	u32			hhxw;
22 	u32			lhxs;
23 	u32			lhxw;
24 };
25 
26 struct aplic_src_ctrl {
27 	u32			sourcecfg;
28 	u32			target;
29 	u32			ie;
30 };
31 
32 struct aplic_saved_regs {
33 	u32			domaincfg;
34 #ifdef CONFIG_RISCV_M_MODE
35 	u32			msiaddr;
36 	u32			msiaddrh;
37 #endif
38 	struct aplic_src_ctrl	*srcs;
39 };
40 
41 struct aplic_priv {
42 	struct list_head	head;
43 	struct notifier_block	genpd_nb;
44 	struct aplic_saved_regs	saved_hw_regs;
45 	struct device		*dev;
46 	u32			gsi_base;
47 	u32			nr_irqs;
48 	u32			nr_idcs;
49 	u32			acpi_aplic_id;
50 	void __iomem		*regs;
51 	struct aplic_msicfg	msicfg;
52 };
53 
54 void aplic_irq_unmask(struct irq_data *d);
55 void aplic_irq_mask(struct irq_data *d);
56 int aplic_irq_set_type(struct irq_data *d, unsigned int type);
57 int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base,
58 			      unsigned long *hwirq, unsigned int *type);
59 void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode);
60 int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs);
61 void aplic_direct_restore_states(struct aplic_priv *priv);
62 int aplic_direct_setup(struct device *dev, void __iomem *regs);
63 #ifdef CONFIG_RISCV_APLIC_MSI
64 int aplic_msi_setup(struct device *dev, void __iomem *regs);
65 #else
66 static inline int aplic_msi_setup(struct device *dev, void __iomem *regs)
67 {
68 	return -ENODEV;
69 }
70 #endif
71 
72 #endif
73