1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2022 Linutronix GmbH 3 // Copyright (C) 2022 Intel 4 5 #include <linux/export.h> 6 7 #include <linux/irqchip/irq-msi-lib.h> 8 9 /** 10 * msi_lib_init_dev_msi_info - Domain info setup for MSI domains 11 * @dev: The device for which the domain is created for 12 * @domain: The domain providing this callback 13 * @real_parent: The real parent domain of the domain to be initialized 14 * which might be a domain built on top of @domain or 15 * @domain itself 16 * @info: The domain info for the domain to be initialize 17 * 18 * This function is to be used for all types of MSI domains above the root 19 * parent domain and any intermediates. The topmost parent domain specific 20 * functionality is determined via @real_parent. 21 * 22 * All intermediate domains between the root and the device domain must 23 * have either msi_parent_ops.init_dev_msi_info = msi_parent_init_dev_msi_info 24 * or invoke it down the line. 25 */ 26 bool msi_lib_init_dev_msi_info(struct device *dev, struct irq_domain *domain, 27 struct irq_domain *real_parent, 28 struct msi_domain_info *info) 29 { 30 const struct msi_parent_ops *pops = real_parent->msi_parent_ops; 31 struct irq_chip *chip = info->chip; 32 u32 required_flags; 33 34 /* Parent ops available? */ 35 if (WARN_ON_ONCE(!pops)) 36 return false; 37 38 /* 39 * MSI parent domain specific settings. For now there is only the 40 * root parent domain, e.g. NEXUS, acting as a MSI parent, but it is 41 * possible to stack MSI parents. See x86 vector -> irq remapping 42 */ 43 if (domain->bus_token == pops->bus_select_token) { 44 if (WARN_ON_ONCE(domain != real_parent)) 45 return false; 46 } else { 47 WARN_ON_ONCE(1); 48 return false; 49 } 50 51 if (WARN_ON_ONCE(!chip->irq_write_msi_msg)) 52 return false; 53 54 required_flags = pops->required_flags; 55 56 /* Is the target domain bus token supported? */ 57 switch(info->bus_token) { 58 case DOMAIN_BUS_PCI_DEVICE_MSI: 59 case DOMAIN_BUS_PCI_DEVICE_MSIX: 60 if (WARN_ON_ONCE(!IS_ENABLED(CONFIG_PCI_MSI))) 61 return false; 62 63 break; 64 case DOMAIN_BUS_DEVICE_MSI: 65 /* 66 * Per device MSI should never have any MSI feature bits 67 * set. It's sole purpose is to create a dumb interrupt 68 * chip which has a device specific irq_write_msi_msg() 69 * callback. 70 */ 71 if (WARN_ON_ONCE(info->flags)) 72 return false; 73 74 /* Core managed MSI descriptors */ 75 info->flags = MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS; 76 fallthrough; 77 case DOMAIN_BUS_WIRED_TO_MSI: 78 /* Remove PCI specific flags */ 79 required_flags &= ~MSI_FLAG_PCI_MSI_MASK_PARENT; 80 break; 81 default: 82 /* 83 * This should never be reached. See 84 * msi_lib_irq_domain_select() 85 */ 86 WARN_ON_ONCE(1); 87 return false; 88 } 89 90 /* 91 * Mask out the domain specific MSI feature flags which are not 92 * supported by the real parent. 93 */ 94 info->flags &= pops->supported_flags; 95 /* Enforce the required flags */ 96 info->flags |= required_flags; 97 98 /* Chip updates for all child bus types */ 99 if (!chip->irq_eoi && (pops->chip_flags & MSI_CHIP_FLAG_SET_EOI)) 100 chip->irq_eoi = irq_chip_eoi_parent; 101 if (!chip->irq_ack && (pops->chip_flags & MSI_CHIP_FLAG_SET_ACK)) 102 chip->irq_ack = irq_chip_ack_parent; 103 104 /* 105 * The device MSI domain can never have a set affinity callback. It 106 * always has to rely on the parent domain to handle affinity 107 * settings. The device MSI domain just has to write the resulting 108 * MSI message into the hardware which is the whole purpose of the 109 * device MSI domain aside of mask/unmask which is provided e.g. by 110 * PCI/MSI device domains. 111 * 112 * The exception to the rule is when the underlying domain 113 * tells you that affinity is not a thing -- for example when 114 * everything is muxed behind a single interrupt. 115 */ 116 if (!chip->irq_set_affinity && !(info->flags & MSI_FLAG_NO_AFFINITY)) 117 chip->irq_set_affinity = msi_domain_set_affinity; 118 119 /* 120 * If the parent domain insists on being in charge of masking, obey 121 * blindly. The interrupt is un-masked at the PCI level on startup 122 * and masked on shutdown to prevent rogue interrupts after the 123 * driver freed the interrupt. Not masking it at the PCI level 124 * speeds up operation for disable/enable_irq() as it avoids 125 * getting all the way out to the PCI device. 126 */ 127 if (info->flags & MSI_FLAG_PCI_MSI_MASK_PARENT) { 128 chip->irq_mask = irq_chip_mask_parent; 129 chip->irq_unmask = irq_chip_unmask_parent; 130 } 131 132 return true; 133 } 134 EXPORT_SYMBOL_GPL(msi_lib_init_dev_msi_info); 135 136 /** 137 * msi_lib_irq_domain_select - Shared select function for NEXUS domains 138 * @d: Pointer to the irq domain on which select is invoked 139 * @fwspec: Firmware spec describing what is searched 140 * @bus_token: The bus token for which a matching irq domain is looked up 141 * 142 * Returns: %0 if @d is not what is being looked for 143 * 144 * %1 if @d is either the domain which is directly searched for or 145 * if @d is providing the parent MSI domain for the functionality 146 * requested with @bus_token. 147 */ 148 int msi_lib_irq_domain_select(struct irq_domain *d, struct irq_fwspec *fwspec, 149 enum irq_domain_bus_token bus_token) 150 { 151 const struct msi_parent_ops *ops = d->msi_parent_ops; 152 u32 busmask = BIT(bus_token); 153 154 if (!ops) 155 return 0; 156 157 struct fwnode_handle *fwh __free(fwnode_handle) = 158 d->flags & IRQ_DOMAIN_FLAG_FWNODE_PARENT ? fwnode_get_parent(fwspec->fwnode) 159 : fwnode_handle_get(fwspec->fwnode); 160 if (fwh != d->fwnode || fwspec->param_count != 0) 161 return 0; 162 163 /* Handle pure domain searches */ 164 if (bus_token == ops->bus_select_token) 165 return 1; 166 167 return !!(ops->bus_select_mask & busmask); 168 } 169 EXPORT_SYMBOL_GPL(msi_lib_irq_domain_select); 170