1 // SPDX-License-Identifier: GPL-2.0 2 3 #define pr_fmt(fmt) "irq-ls-extirq: " fmt 4 5 #include <linux/irq.h> 6 #include <linux/irqchip.h> 7 #include <linux/irqdomain.h> 8 #include <linux/of.h> 9 #include <linux/of_address.h> 10 #include <linux/slab.h> 11 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 14 #define MAXIRQ 12 15 #define LS1021A_SCFGREVCR 0x200 16 17 struct ls_extirq_data { 18 void __iomem *intpcr; 19 raw_spinlock_t lock; 20 bool big_endian; 21 bool is_ls1021a_or_ls1043a; 22 u32 nirq; 23 struct irq_fwspec map[MAXIRQ]; 24 }; 25 26 static void ls_extirq_intpcr_rmw(struct ls_extirq_data *priv, u32 mask, 27 u32 value) 28 { 29 u32 intpcr; 30 31 /* 32 * Serialize concurrent calls to ls_extirq_set_type() from multiple 33 * IRQ descriptors, making sure the read-modify-write is atomic. 34 */ 35 raw_spin_lock(&priv->lock); 36 37 if (priv->big_endian) 38 intpcr = ioread32be(priv->intpcr); 39 else 40 intpcr = ioread32(priv->intpcr); 41 42 intpcr &= ~mask; 43 intpcr |= value; 44 45 if (priv->big_endian) 46 iowrite32be(intpcr, priv->intpcr); 47 else 48 iowrite32(intpcr, priv->intpcr); 49 50 raw_spin_unlock(&priv->lock); 51 } 52 53 static int 54 ls_extirq_set_type(struct irq_data *data, unsigned int type) 55 { 56 struct ls_extirq_data *priv = data->chip_data; 57 irq_hw_number_t hwirq = data->hwirq; 58 u32 value, mask; 59 60 if (priv->is_ls1021a_or_ls1043a) 61 mask = 1U << (31 - hwirq); 62 else 63 mask = 1U << hwirq; 64 65 switch (type) { 66 case IRQ_TYPE_LEVEL_LOW: 67 type = IRQ_TYPE_LEVEL_HIGH; 68 value = mask; 69 break; 70 case IRQ_TYPE_EDGE_FALLING: 71 type = IRQ_TYPE_EDGE_RISING; 72 value = mask; 73 break; 74 case IRQ_TYPE_LEVEL_HIGH: 75 case IRQ_TYPE_EDGE_RISING: 76 value = 0; 77 break; 78 default: 79 return -EINVAL; 80 } 81 82 ls_extirq_intpcr_rmw(priv, mask, value); 83 84 return irq_chip_set_type_parent(data, type); 85 } 86 87 static struct irq_chip ls_extirq_chip = { 88 .name = "ls-extirq", 89 .irq_mask = irq_chip_mask_parent, 90 .irq_unmask = irq_chip_unmask_parent, 91 .irq_eoi = irq_chip_eoi_parent, 92 .irq_set_type = ls_extirq_set_type, 93 .irq_retrigger = irq_chip_retrigger_hierarchy, 94 .irq_set_affinity = irq_chip_set_affinity_parent, 95 .flags = IRQCHIP_SET_TYPE_MASKED | IRQCHIP_SKIP_SET_WAKE, 96 }; 97 98 static int 99 ls_extirq_domain_alloc(struct irq_domain *domain, unsigned int virq, 100 unsigned int nr_irqs, void *arg) 101 { 102 struct ls_extirq_data *priv = domain->host_data; 103 struct irq_fwspec *fwspec = arg; 104 irq_hw_number_t hwirq; 105 106 if (fwspec->param_count != 2) 107 return -EINVAL; 108 109 hwirq = fwspec->param[0]; 110 if (hwirq >= priv->nirq) 111 return -EINVAL; 112 113 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, &ls_extirq_chip, 114 priv); 115 116 return irq_domain_alloc_irqs_parent(domain, virq, 1, &priv->map[hwirq]); 117 } 118 119 static const struct irq_domain_ops extirq_domain_ops = { 120 .xlate = irq_domain_xlate_twocell, 121 .alloc = ls_extirq_domain_alloc, 122 .free = irq_domain_free_irqs_common, 123 }; 124 125 static int 126 ls_extirq_parse_map(struct ls_extirq_data *priv, struct device_node *node) 127 { 128 const __be32 *map; 129 u32 mapsize; 130 int ret; 131 132 map = of_get_property(node, "interrupt-map", &mapsize); 133 if (!map) 134 return -ENOENT; 135 if (mapsize % sizeof(*map)) 136 return -EINVAL; 137 mapsize /= sizeof(*map); 138 139 while (mapsize) { 140 struct device_node *ipar; 141 u32 hwirq, intsize, j; 142 143 if (mapsize < 3) 144 return -EINVAL; 145 hwirq = be32_to_cpup(map); 146 if (hwirq >= MAXIRQ) 147 return -EINVAL; 148 priv->nirq = max(priv->nirq, hwirq + 1); 149 150 ipar = of_find_node_by_phandle(be32_to_cpup(map + 2)); 151 map += 3; 152 mapsize -= 3; 153 if (!ipar) 154 return -EINVAL; 155 priv->map[hwirq].fwnode = &ipar->fwnode; 156 ret = of_property_read_u32(ipar, "#interrupt-cells", &intsize); 157 if (ret) 158 return ret; 159 160 if (intsize > mapsize) 161 return -EINVAL; 162 163 priv->map[hwirq].param_count = intsize; 164 for (j = 0; j < intsize; ++j) 165 priv->map[hwirq].param[j] = be32_to_cpup(map++); 166 mapsize -= intsize; 167 } 168 return 0; 169 } 170 171 static int __init 172 ls_extirq_of_init(struct device_node *node, struct device_node *parent) 173 { 174 struct irq_domain *domain, *parent_domain; 175 struct ls_extirq_data *priv; 176 int ret; 177 178 parent_domain = irq_find_host(parent); 179 if (!parent_domain) { 180 pr_err("Cannot find parent domain\n"); 181 ret = -ENODEV; 182 goto err_irq_find_host; 183 } 184 185 priv = kzalloc(sizeof(*priv), GFP_KERNEL); 186 if (!priv) { 187 ret = -ENOMEM; 188 goto err_alloc_priv; 189 } 190 191 /* 192 * All extirq OF nodes are under a scfg/syscon node with 193 * the 'ranges' property 194 */ 195 priv->intpcr = of_iomap(node, 0); 196 if (!priv->intpcr) { 197 pr_err("Cannot ioremap OF node %pOF\n", node); 198 ret = -ENOMEM; 199 goto err_iomap; 200 } 201 202 ret = ls_extirq_parse_map(priv, node); 203 if (ret) 204 goto err_parse_map; 205 206 priv->big_endian = of_device_is_big_endian(node->parent); 207 priv->is_ls1021a_or_ls1043a = of_device_is_compatible(node, "fsl,ls1021a-extirq") || 208 of_device_is_compatible(node, "fsl,ls1043a-extirq"); 209 raw_spin_lock_init(&priv->lock); 210 211 domain = irq_domain_add_hierarchy(parent_domain, 0, priv->nirq, node, 212 &extirq_domain_ops, priv); 213 if (!domain) { 214 ret = -ENOMEM; 215 goto err_add_hierarchy; 216 } 217 218 return 0; 219 220 err_add_hierarchy: 221 err_parse_map: 222 iounmap(priv->intpcr); 223 err_iomap: 224 kfree(priv); 225 err_alloc_priv: 226 err_irq_find_host: 227 return ret; 228 } 229 230 IRQCHIP_DECLARE(ls1021a_extirq, "fsl,ls1021a-extirq", ls_extirq_of_init); 231 IRQCHIP_DECLARE(ls1043a_extirq, "fsl,ls1043a-extirq", ls_extirq_of_init); 232 IRQCHIP_DECLARE(ls1088a_extirq, "fsl,ls1088a-extirq", ls_extirq_of_init); 233