1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Apple DART page table allocator. 4 * 5 * Copyright (C) 2022 The Asahi Linux Contributors 6 * 7 * Based on io-pgtable-arm. 8 * 9 * Copyright (C) 2014 ARM Limited 10 * 11 * Author: Will Deacon <will.deacon@arm.com> 12 */ 13 14 #define pr_fmt(fmt) "dart io-pgtable: " fmt 15 16 #include <linux/atomic.h> 17 #include <linux/bitfield.h> 18 #include <linux/bitops.h> 19 #include <linux/io-pgtable.h> 20 #include <linux/kernel.h> 21 #include <linux/sizes.h> 22 #include <linux/slab.h> 23 #include <linux/types.h> 24 25 #include <asm/barrier.h> 26 #include "iommu-pages.h" 27 28 #define DART1_MAX_ADDR_BITS 36 29 30 #define DART_MAX_TABLE_BITS 2 31 #define DART_MAX_TABLES BIT(DART_MAX_TABLE_BITS) 32 #define DART_MAX_LEVELS 4 /* Includes TTBR level */ 33 34 /* Struct accessors */ 35 #define io_pgtable_to_data(x) \ 36 container_of((x), struct dart_io_pgtable, iop) 37 38 #define io_pgtable_ops_to_data(x) \ 39 io_pgtable_to_data(io_pgtable_ops_to_pgtable(x)) 40 41 #define DART_GRANULE(d) \ 42 (sizeof(dart_iopte) << (d)->bits_per_level) 43 #define DART_PTES_PER_TABLE(d) \ 44 (DART_GRANULE(d) >> ilog2(sizeof(dart_iopte))) 45 46 #define APPLE_DART_PTE_SUBPAGE_START GENMASK_ULL(63, 52) 47 #define APPLE_DART_PTE_SUBPAGE_END GENMASK_ULL(51, 40) 48 49 #define APPLE_DART1_PADDR_MASK GENMASK_ULL(35, 12) 50 #define APPLE_DART2_PADDR_MASK GENMASK_ULL(37, 10) 51 #define APPLE_DART2_PADDR_SHIFT (4) 52 53 /* Apple DART1 protection bits */ 54 #define APPLE_DART1_PTE_PROT_NO_READ BIT(8) 55 #define APPLE_DART1_PTE_PROT_NO_WRITE BIT(7) 56 #define APPLE_DART1_PTE_PROT_SP_DIS BIT(1) 57 58 /* Apple DART2 protection bits */ 59 #define APPLE_DART2_PTE_PROT_NO_READ BIT(3) 60 #define APPLE_DART2_PTE_PROT_NO_WRITE BIT(2) 61 #define APPLE_DART2_PTE_PROT_NO_CACHE BIT(1) 62 63 /* marks PTE as valid */ 64 #define APPLE_DART_PTE_VALID BIT(0) 65 66 /* IOPTE accessors */ 67 #define iopte_deref(pte, d) __va(iopte_to_paddr(pte, d)) 68 69 struct dart_io_pgtable { 70 struct io_pgtable iop; 71 72 int levels; 73 int tbl_bits; 74 int bits_per_level; 75 76 void *pgd[DART_MAX_TABLES]; 77 }; 78 79 typedef u64 dart_iopte; 80 81 82 static dart_iopte paddr_to_iopte(phys_addr_t paddr, 83 struct dart_io_pgtable *data) 84 { 85 dart_iopte pte; 86 87 if (data->iop.fmt == APPLE_DART) 88 return paddr & APPLE_DART1_PADDR_MASK; 89 90 /* format is APPLE_DART2 */ 91 pte = paddr >> APPLE_DART2_PADDR_SHIFT; 92 pte &= APPLE_DART2_PADDR_MASK; 93 94 return pte; 95 } 96 97 static phys_addr_t iopte_to_paddr(dart_iopte pte, 98 struct dart_io_pgtable *data) 99 { 100 u64 paddr; 101 102 if (data->iop.fmt == APPLE_DART) 103 return pte & APPLE_DART1_PADDR_MASK; 104 105 /* format is APPLE_DART2 */ 106 paddr = pte & APPLE_DART2_PADDR_MASK; 107 paddr <<= APPLE_DART2_PADDR_SHIFT; 108 109 return paddr; 110 } 111 112 static int dart_init_pte(struct dart_io_pgtable *data, 113 unsigned long iova, phys_addr_t paddr, 114 dart_iopte prot, int num_entries, 115 dart_iopte *ptep) 116 { 117 int i; 118 dart_iopte pte = prot; 119 size_t sz = data->iop.cfg.pgsize_bitmap; 120 121 for (i = 0; i < num_entries; i++) 122 if (ptep[i] & APPLE_DART_PTE_VALID) { 123 /* We require an unmap first */ 124 WARN_ON(ptep[i] & APPLE_DART_PTE_VALID); 125 return -EEXIST; 126 } 127 128 /* subpage protection: always allow access to the entire page */ 129 pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_START, 0); 130 pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_END, 0xfff); 131 132 pte |= APPLE_DART_PTE_VALID; 133 134 for (i = 0; i < num_entries; i++) 135 ptep[i] = pte | paddr_to_iopte(paddr + i * sz, data); 136 137 return 0; 138 } 139 140 static dart_iopte dart_install_table(dart_iopte *table, 141 dart_iopte *ptep, 142 dart_iopte curr, 143 struct dart_io_pgtable *data) 144 { 145 dart_iopte old, new; 146 147 new = paddr_to_iopte(__pa(table), data) | APPLE_DART_PTE_VALID; 148 149 /* 150 * Ensure the table itself is visible before its PTE can be. 151 * Whilst we could get away with cmpxchg64_release below, this 152 * doesn't have any ordering semantics when !CONFIG_SMP. 153 */ 154 dma_wmb(); 155 156 old = cmpxchg64_relaxed(ptep, curr, new); 157 158 return old; 159 } 160 161 static int dart_get_index(struct dart_io_pgtable *data, unsigned long iova, int level) 162 { 163 return (iova >> (level * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 164 ((1 << data->bits_per_level) - 1); 165 } 166 167 static int dart_get_last_index(struct dart_io_pgtable *data, unsigned long iova) 168 { 169 170 return (iova >> (data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 171 ((1 << data->bits_per_level) - 1); 172 } 173 174 static dart_iopte *dart_get_last(struct dart_io_pgtable *data, unsigned long iova) 175 { 176 dart_iopte pte, *ptep; 177 int level = data->levels; 178 int tbl = dart_get_index(data, iova, level); 179 180 if (tbl >= (1 << data->tbl_bits)) 181 return NULL; 182 183 ptep = data->pgd[tbl]; 184 if (!ptep) 185 return NULL; 186 187 while (--level > 1) { 188 ptep += dart_get_index(data, iova, level); 189 pte = READ_ONCE(*ptep); 190 191 /* Valid entry? */ 192 if (!pte) 193 return NULL; 194 195 /* Deref to get next level table */ 196 ptep = iopte_deref(pte, data); 197 } 198 199 return ptep; 200 } 201 202 static dart_iopte dart_prot_to_pte(struct dart_io_pgtable *data, 203 int prot) 204 { 205 dart_iopte pte = 0; 206 207 if (data->iop.fmt == APPLE_DART) { 208 pte |= APPLE_DART1_PTE_PROT_SP_DIS; 209 if (!(prot & IOMMU_WRITE)) 210 pte |= APPLE_DART1_PTE_PROT_NO_WRITE; 211 if (!(prot & IOMMU_READ)) 212 pte |= APPLE_DART1_PTE_PROT_NO_READ; 213 } 214 if (data->iop.fmt == APPLE_DART2) { 215 if (!(prot & IOMMU_WRITE)) 216 pte |= APPLE_DART2_PTE_PROT_NO_WRITE; 217 if (!(prot & IOMMU_READ)) 218 pte |= APPLE_DART2_PTE_PROT_NO_READ; 219 if (!(prot & IOMMU_CACHE)) 220 pte |= APPLE_DART2_PTE_PROT_NO_CACHE; 221 } 222 223 return pte; 224 } 225 226 static int dart_map_pages(struct io_pgtable_ops *ops, unsigned long iova, 227 phys_addr_t paddr, size_t pgsize, size_t pgcount, 228 int iommu_prot, gfp_t gfp, size_t *mapped) 229 { 230 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 231 struct io_pgtable_cfg *cfg = &data->iop.cfg; 232 size_t tblsz = DART_GRANULE(data); 233 int ret = 0, tbl, num_entries, max_entries, map_idx_start; 234 dart_iopte pte, *cptep, *ptep; 235 dart_iopte prot; 236 int level = data->levels; 237 238 if (WARN_ON(pgsize != cfg->pgsize_bitmap)) 239 return -EINVAL; 240 241 if (WARN_ON(paddr >> cfg->oas)) 242 return -ERANGE; 243 244 if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE))) 245 return -EINVAL; 246 247 tbl = dart_get_index(data, iova, level); 248 249 if (tbl >= (1 << data->tbl_bits)) 250 return -ENOMEM; 251 252 ptep = data->pgd[tbl]; 253 while (--level > 1) { 254 ptep += dart_get_index(data, iova, level); 255 pte = READ_ONCE(*ptep); 256 257 /* no table present */ 258 if (!pte) { 259 cptep = iommu_alloc_pages_sz(gfp, tblsz); 260 if (!cptep) 261 return -ENOMEM; 262 263 pte = dart_install_table(cptep, ptep, 0, data); 264 if (pte) 265 iommu_free_pages(cptep); 266 267 /* L2 table is present (now) */ 268 pte = READ_ONCE(*ptep); 269 } 270 271 ptep = iopte_deref(pte, data); 272 } 273 274 /* install a leaf entries into L2 table */ 275 prot = dart_prot_to_pte(data, iommu_prot); 276 map_idx_start = dart_get_last_index(data, iova); 277 max_entries = DART_PTES_PER_TABLE(data) - map_idx_start; 278 num_entries = min_t(int, pgcount, max_entries); 279 ptep += map_idx_start; 280 ret = dart_init_pte(data, iova, paddr, prot, num_entries, ptep); 281 if (!ret && mapped) 282 *mapped += num_entries * pgsize; 283 284 /* 285 * Synchronise all PTE updates for the new mapping before there's 286 * a chance for anything to kick off a table walk for the new iova. 287 */ 288 wmb(); 289 290 return ret; 291 } 292 293 static size_t dart_unmap_pages(struct io_pgtable_ops *ops, unsigned long iova, 294 size_t pgsize, size_t pgcount, 295 struct iommu_iotlb_gather *gather) 296 { 297 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 298 struct io_pgtable_cfg *cfg = &data->iop.cfg; 299 int i = 0, num_entries, max_entries, unmap_idx_start; 300 dart_iopte pte, *ptep; 301 302 if (WARN_ON(pgsize != cfg->pgsize_bitmap || !pgcount)) 303 return 0; 304 305 ptep = dart_get_last(data, iova); 306 307 /* Valid L2 IOPTE pointer? */ 308 if (WARN_ON(!ptep)) 309 return 0; 310 311 unmap_idx_start = dart_get_last_index(data, iova); 312 ptep += unmap_idx_start; 313 314 max_entries = DART_PTES_PER_TABLE(data) - unmap_idx_start; 315 num_entries = min_t(int, pgcount, max_entries); 316 317 while (i < num_entries) { 318 pte = READ_ONCE(*ptep); 319 if (WARN_ON(!pte)) 320 break; 321 322 /* clear pte */ 323 *ptep = 0; 324 325 if (!iommu_iotlb_gather_queued(gather)) 326 io_pgtable_tlb_add_page(&data->iop, gather, 327 iova + i * pgsize, pgsize); 328 329 ptep++; 330 i++; 331 } 332 333 return i * pgsize; 334 } 335 336 static phys_addr_t dart_iova_to_phys(struct io_pgtable_ops *ops, 337 unsigned long iova) 338 { 339 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 340 dart_iopte pte, *ptep; 341 342 ptep = dart_get_last(data, iova); 343 344 /* Valid L2 IOPTE pointer? */ 345 if (!ptep) 346 return 0; 347 348 ptep += dart_get_last_index(data, iova); 349 350 pte = READ_ONCE(*ptep); 351 /* Found translation */ 352 if (pte) { 353 iova &= (data->iop.cfg.pgsize_bitmap - 1); 354 return iopte_to_paddr(pte, data) | iova; 355 } 356 357 /* Ran out of page tables to walk */ 358 return 0; 359 } 360 361 static struct dart_io_pgtable * 362 dart_alloc_pgtable(struct io_pgtable_cfg *cfg) 363 { 364 struct dart_io_pgtable *data; 365 int levels, max_tbl_bits, tbl_bits, bits_per_level, va_bits, pg_shift; 366 367 /* 368 * Old 4K page DARTs can use up to 4 top-level tables. 369 * Newer ones only ever use a maximum of 1. 370 */ 371 if (cfg->pgsize_bitmap == SZ_4K) 372 max_tbl_bits = DART_MAX_TABLE_BITS; 373 else 374 max_tbl_bits = 0; 375 376 pg_shift = __ffs(cfg->pgsize_bitmap); 377 bits_per_level = pg_shift - ilog2(sizeof(dart_iopte)); 378 379 va_bits = cfg->ias - pg_shift; 380 381 levels = max_t(int, 2, (va_bits - max_tbl_bits + bits_per_level - 1) / bits_per_level); 382 383 if (levels > (DART_MAX_LEVELS - 1)) 384 return NULL; 385 386 tbl_bits = max_t(int, 0, va_bits - (bits_per_level * levels)); 387 388 if (tbl_bits > max_tbl_bits) 389 return NULL; 390 391 data = kzalloc(sizeof(*data), GFP_KERNEL); 392 if (!data) 393 return NULL; 394 395 data->levels = levels + 1; /* Table level counts as one level */ 396 data->tbl_bits = tbl_bits; 397 data->bits_per_level = bits_per_level; 398 399 data->iop.ops = (struct io_pgtable_ops) { 400 .map_pages = dart_map_pages, 401 .unmap_pages = dart_unmap_pages, 402 .iova_to_phys = dart_iova_to_phys, 403 }; 404 405 return data; 406 } 407 408 static struct io_pgtable * 409 apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) 410 { 411 struct dart_io_pgtable *data; 412 int i; 413 414 if (!cfg->coherent_walk) 415 return NULL; 416 417 if (cfg->oas != 36 && cfg->oas != 42) 418 return NULL; 419 420 if (cfg->ias > cfg->oas) 421 return NULL; 422 423 if (!(cfg->pgsize_bitmap == SZ_4K || cfg->pgsize_bitmap == SZ_16K)) 424 return NULL; 425 426 data = dart_alloc_pgtable(cfg); 427 if (!data) 428 return NULL; 429 430 cfg->apple_dart_cfg.n_ttbrs = 1 << data->tbl_bits; 431 cfg->apple_dart_cfg.n_levels = data->levels; 432 433 for (i = 0; i < cfg->apple_dart_cfg.n_ttbrs; ++i) { 434 data->pgd[i] = 435 iommu_alloc_pages_sz(GFP_KERNEL, DART_GRANULE(data)); 436 if (!data->pgd[i]) 437 goto out_free_data; 438 cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]); 439 } 440 441 return &data->iop; 442 443 out_free_data: 444 while (--i >= 0) { 445 iommu_free_pages(data->pgd[i]); 446 } 447 kfree(data); 448 return NULL; 449 } 450 451 static void apple_dart_free_pgtables(struct dart_io_pgtable *data, dart_iopte *ptep, int level) 452 { 453 dart_iopte *end; 454 dart_iopte *start = ptep; 455 456 if (level > 1) { 457 end = (void *)ptep + DART_GRANULE(data); 458 459 while (ptep != end) { 460 dart_iopte pte = *ptep++; 461 462 if (pte) 463 apple_dart_free_pgtables(data, iopte_deref(pte, data), level - 1); 464 } 465 } 466 iommu_free_pages(start); 467 } 468 469 static void apple_dart_free_pgtable(struct io_pgtable *iop) 470 { 471 struct dart_io_pgtable *data = io_pgtable_to_data(iop); 472 int i; 473 474 for (i = 0; i < (1 << data->tbl_bits) && data->pgd[i]; ++i) 475 apple_dart_free_pgtables(data, data->pgd[i], data->levels - 1); 476 477 kfree(data); 478 } 479 480 struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns = { 481 .alloc = apple_dart_alloc_pgtable, 482 .free = apple_dart_free_pgtable, 483 }; 484