1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Apple DART page table allocator. 4 * 5 * Copyright (C) 2022 The Asahi Linux Contributors 6 * 7 * Based on io-pgtable-arm. 8 * 9 * Copyright (C) 2014 ARM Limited 10 * 11 * Author: Will Deacon <will.deacon@arm.com> 12 */ 13 14 #define pr_fmt(fmt) "dart io-pgtable: " fmt 15 16 #include <linux/atomic.h> 17 #include <linux/bitfield.h> 18 #include <linux/bitops.h> 19 #include <linux/io-pgtable.h> 20 #include <linux/kernel.h> 21 #include <linux/sizes.h> 22 #include <linux/slab.h> 23 #include <linux/types.h> 24 25 #include <asm/barrier.h> 26 #include "iommu-pages.h" 27 28 #define DART1_MAX_ADDR_BITS 36 29 30 #define DART_MAX_TABLES 4 31 #define DART_LEVELS 2 32 33 /* Struct accessors */ 34 #define io_pgtable_to_data(x) \ 35 container_of((x), struct dart_io_pgtable, iop) 36 37 #define io_pgtable_ops_to_data(x) \ 38 io_pgtable_to_data(io_pgtable_ops_to_pgtable(x)) 39 40 #define DART_GRANULE(d) \ 41 (sizeof(dart_iopte) << (d)->bits_per_level) 42 #define DART_PTES_PER_TABLE(d) \ 43 (DART_GRANULE(d) >> ilog2(sizeof(dart_iopte))) 44 45 #define APPLE_DART_PTE_SUBPAGE_START GENMASK_ULL(63, 52) 46 #define APPLE_DART_PTE_SUBPAGE_END GENMASK_ULL(51, 40) 47 48 #define APPLE_DART1_PADDR_MASK GENMASK_ULL(35, 12) 49 #define APPLE_DART2_PADDR_MASK GENMASK_ULL(37, 10) 50 #define APPLE_DART2_PADDR_SHIFT (4) 51 52 /* Apple DART1 protection bits */ 53 #define APPLE_DART1_PTE_PROT_NO_READ BIT(8) 54 #define APPLE_DART1_PTE_PROT_NO_WRITE BIT(7) 55 #define APPLE_DART1_PTE_PROT_SP_DIS BIT(1) 56 57 /* Apple DART2 protection bits */ 58 #define APPLE_DART2_PTE_PROT_NO_READ BIT(3) 59 #define APPLE_DART2_PTE_PROT_NO_WRITE BIT(2) 60 #define APPLE_DART2_PTE_PROT_NO_CACHE BIT(1) 61 62 /* marks PTE as valid */ 63 #define APPLE_DART_PTE_VALID BIT(0) 64 65 /* IOPTE accessors */ 66 #define iopte_deref(pte, d) __va(iopte_to_paddr(pte, d)) 67 68 struct dart_io_pgtable { 69 struct io_pgtable iop; 70 71 int tbl_bits; 72 int bits_per_level; 73 74 void *pgd[DART_MAX_TABLES]; 75 }; 76 77 typedef u64 dart_iopte; 78 79 80 static dart_iopte paddr_to_iopte(phys_addr_t paddr, 81 struct dart_io_pgtable *data) 82 { 83 dart_iopte pte; 84 85 if (data->iop.fmt == APPLE_DART) 86 return paddr & APPLE_DART1_PADDR_MASK; 87 88 /* format is APPLE_DART2 */ 89 pte = paddr >> APPLE_DART2_PADDR_SHIFT; 90 pte &= APPLE_DART2_PADDR_MASK; 91 92 return pte; 93 } 94 95 static phys_addr_t iopte_to_paddr(dart_iopte pte, 96 struct dart_io_pgtable *data) 97 { 98 u64 paddr; 99 100 if (data->iop.fmt == APPLE_DART) 101 return pte & APPLE_DART1_PADDR_MASK; 102 103 /* format is APPLE_DART2 */ 104 paddr = pte & APPLE_DART2_PADDR_MASK; 105 paddr <<= APPLE_DART2_PADDR_SHIFT; 106 107 return paddr; 108 } 109 110 static int dart_init_pte(struct dart_io_pgtable *data, 111 unsigned long iova, phys_addr_t paddr, 112 dart_iopte prot, int num_entries, 113 dart_iopte *ptep) 114 { 115 int i; 116 dart_iopte pte = prot; 117 size_t sz = data->iop.cfg.pgsize_bitmap; 118 119 for (i = 0; i < num_entries; i++) 120 if (ptep[i] & APPLE_DART_PTE_VALID) { 121 /* We require an unmap first */ 122 WARN_ON(ptep[i] & APPLE_DART_PTE_VALID); 123 return -EEXIST; 124 } 125 126 /* subpage protection: always allow access to the entire page */ 127 pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_START, 0); 128 pte |= FIELD_PREP(APPLE_DART_PTE_SUBPAGE_END, 0xfff); 129 130 pte |= APPLE_DART_PTE_VALID; 131 132 for (i = 0; i < num_entries; i++) 133 ptep[i] = pte | paddr_to_iopte(paddr + i * sz, data); 134 135 return 0; 136 } 137 138 static dart_iopte dart_install_table(dart_iopte *table, 139 dart_iopte *ptep, 140 dart_iopte curr, 141 struct dart_io_pgtable *data) 142 { 143 dart_iopte old, new; 144 145 new = paddr_to_iopte(__pa(table), data) | APPLE_DART_PTE_VALID; 146 147 /* 148 * Ensure the table itself is visible before its PTE can be. 149 * Whilst we could get away with cmpxchg64_release below, this 150 * doesn't have any ordering semantics when !CONFIG_SMP. 151 */ 152 dma_wmb(); 153 154 old = cmpxchg64_relaxed(ptep, curr, new); 155 156 return old; 157 } 158 159 static int dart_get_table(struct dart_io_pgtable *data, unsigned long iova) 160 { 161 return (iova >> (3 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 162 ((1 << data->tbl_bits) - 1); 163 } 164 165 static int dart_get_l1_index(struct dart_io_pgtable *data, unsigned long iova) 166 { 167 168 return (iova >> (2 * data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 169 ((1 << data->bits_per_level) - 1); 170 } 171 172 static int dart_get_l2_index(struct dart_io_pgtable *data, unsigned long iova) 173 { 174 175 return (iova >> (data->bits_per_level + ilog2(sizeof(dart_iopte)))) & 176 ((1 << data->bits_per_level) - 1); 177 } 178 179 static dart_iopte *dart_get_l2(struct dart_io_pgtable *data, unsigned long iova) 180 { 181 dart_iopte pte, *ptep; 182 int tbl = dart_get_table(data, iova); 183 184 ptep = data->pgd[tbl]; 185 if (!ptep) 186 return NULL; 187 188 ptep += dart_get_l1_index(data, iova); 189 pte = READ_ONCE(*ptep); 190 191 /* Valid entry? */ 192 if (!pte) 193 return NULL; 194 195 /* Deref to get level 2 table */ 196 return iopte_deref(pte, data); 197 } 198 199 static dart_iopte dart_prot_to_pte(struct dart_io_pgtable *data, 200 int prot) 201 { 202 dart_iopte pte = 0; 203 204 if (data->iop.fmt == APPLE_DART) { 205 pte |= APPLE_DART1_PTE_PROT_SP_DIS; 206 if (!(prot & IOMMU_WRITE)) 207 pte |= APPLE_DART1_PTE_PROT_NO_WRITE; 208 if (!(prot & IOMMU_READ)) 209 pte |= APPLE_DART1_PTE_PROT_NO_READ; 210 } 211 if (data->iop.fmt == APPLE_DART2) { 212 if (!(prot & IOMMU_WRITE)) 213 pte |= APPLE_DART2_PTE_PROT_NO_WRITE; 214 if (!(prot & IOMMU_READ)) 215 pte |= APPLE_DART2_PTE_PROT_NO_READ; 216 if (!(prot & IOMMU_CACHE)) 217 pte |= APPLE_DART2_PTE_PROT_NO_CACHE; 218 } 219 220 return pte; 221 } 222 223 static int dart_map_pages(struct io_pgtable_ops *ops, unsigned long iova, 224 phys_addr_t paddr, size_t pgsize, size_t pgcount, 225 int iommu_prot, gfp_t gfp, size_t *mapped) 226 { 227 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 228 struct io_pgtable_cfg *cfg = &data->iop.cfg; 229 size_t tblsz = DART_GRANULE(data); 230 int ret = 0, tbl, num_entries, max_entries, map_idx_start; 231 dart_iopte pte, *cptep, *ptep; 232 dart_iopte prot; 233 234 if (WARN_ON(pgsize != cfg->pgsize_bitmap)) 235 return -EINVAL; 236 237 if (WARN_ON(paddr >> cfg->oas)) 238 return -ERANGE; 239 240 if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE))) 241 return -EINVAL; 242 243 tbl = dart_get_table(data, iova); 244 245 ptep = data->pgd[tbl]; 246 ptep += dart_get_l1_index(data, iova); 247 pte = READ_ONCE(*ptep); 248 249 /* no L2 table present */ 250 if (!pte) { 251 cptep = iommu_alloc_pages_sz(gfp, tblsz); 252 if (!cptep) 253 return -ENOMEM; 254 255 pte = dart_install_table(cptep, ptep, 0, data); 256 if (pte) 257 iommu_free_pages(cptep); 258 259 /* L2 table is present (now) */ 260 pte = READ_ONCE(*ptep); 261 } 262 263 ptep = iopte_deref(pte, data); 264 265 /* install a leaf entries into L2 table */ 266 prot = dart_prot_to_pte(data, iommu_prot); 267 map_idx_start = dart_get_l2_index(data, iova); 268 max_entries = DART_PTES_PER_TABLE(data) - map_idx_start; 269 num_entries = min_t(int, pgcount, max_entries); 270 ptep += map_idx_start; 271 ret = dart_init_pte(data, iova, paddr, prot, num_entries, ptep); 272 if (!ret && mapped) 273 *mapped += num_entries * pgsize; 274 275 /* 276 * Synchronise all PTE updates for the new mapping before there's 277 * a chance for anything to kick off a table walk for the new iova. 278 */ 279 wmb(); 280 281 return ret; 282 } 283 284 static size_t dart_unmap_pages(struct io_pgtable_ops *ops, unsigned long iova, 285 size_t pgsize, size_t pgcount, 286 struct iommu_iotlb_gather *gather) 287 { 288 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 289 struct io_pgtable_cfg *cfg = &data->iop.cfg; 290 int i = 0, num_entries, max_entries, unmap_idx_start; 291 dart_iopte pte, *ptep; 292 293 if (WARN_ON(pgsize != cfg->pgsize_bitmap || !pgcount)) 294 return 0; 295 296 ptep = dart_get_l2(data, iova); 297 298 /* Valid L2 IOPTE pointer? */ 299 if (WARN_ON(!ptep)) 300 return 0; 301 302 unmap_idx_start = dart_get_l2_index(data, iova); 303 ptep += unmap_idx_start; 304 305 max_entries = DART_PTES_PER_TABLE(data) - unmap_idx_start; 306 num_entries = min_t(int, pgcount, max_entries); 307 308 while (i < num_entries) { 309 pte = READ_ONCE(*ptep); 310 if (WARN_ON(!pte)) 311 break; 312 313 /* clear pte */ 314 *ptep = 0; 315 316 if (!iommu_iotlb_gather_queued(gather)) 317 io_pgtable_tlb_add_page(&data->iop, gather, 318 iova + i * pgsize, pgsize); 319 320 ptep++; 321 i++; 322 } 323 324 return i * pgsize; 325 } 326 327 static phys_addr_t dart_iova_to_phys(struct io_pgtable_ops *ops, 328 unsigned long iova) 329 { 330 struct dart_io_pgtable *data = io_pgtable_ops_to_data(ops); 331 dart_iopte pte, *ptep; 332 333 ptep = dart_get_l2(data, iova); 334 335 /* Valid L2 IOPTE pointer? */ 336 if (!ptep) 337 return 0; 338 339 ptep += dart_get_l2_index(data, iova); 340 341 pte = READ_ONCE(*ptep); 342 /* Found translation */ 343 if (pte) { 344 iova &= (data->iop.cfg.pgsize_bitmap - 1); 345 return iopte_to_paddr(pte, data) | iova; 346 } 347 348 /* Ran out of page tables to walk */ 349 return 0; 350 } 351 352 static struct dart_io_pgtable * 353 dart_alloc_pgtable(struct io_pgtable_cfg *cfg) 354 { 355 struct dart_io_pgtable *data; 356 int tbl_bits, bits_per_level, va_bits, pg_shift; 357 358 pg_shift = __ffs(cfg->pgsize_bitmap); 359 bits_per_level = pg_shift - ilog2(sizeof(dart_iopte)); 360 361 va_bits = cfg->ias - pg_shift; 362 363 tbl_bits = max_t(int, 0, va_bits - (bits_per_level * DART_LEVELS)); 364 if ((1 << tbl_bits) > DART_MAX_TABLES) 365 return NULL; 366 367 data = kzalloc(sizeof(*data), GFP_KERNEL); 368 if (!data) 369 return NULL; 370 371 data->tbl_bits = tbl_bits; 372 data->bits_per_level = bits_per_level; 373 374 data->iop.ops = (struct io_pgtable_ops) { 375 .map_pages = dart_map_pages, 376 .unmap_pages = dart_unmap_pages, 377 .iova_to_phys = dart_iova_to_phys, 378 }; 379 380 return data; 381 } 382 383 static struct io_pgtable * 384 apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) 385 { 386 struct dart_io_pgtable *data; 387 int i; 388 389 if (!cfg->coherent_walk) 390 return NULL; 391 392 if (cfg->oas != 36 && cfg->oas != 42) 393 return NULL; 394 395 if (cfg->ias > cfg->oas) 396 return NULL; 397 398 if (!(cfg->pgsize_bitmap == SZ_4K || cfg->pgsize_bitmap == SZ_16K)) 399 return NULL; 400 401 data = dart_alloc_pgtable(cfg); 402 if (!data) 403 return NULL; 404 405 cfg->apple_dart_cfg.n_ttbrs = 1 << data->tbl_bits; 406 407 for (i = 0; i < cfg->apple_dart_cfg.n_ttbrs; ++i) { 408 data->pgd[i] = 409 iommu_alloc_pages_sz(GFP_KERNEL, DART_GRANULE(data)); 410 if (!data->pgd[i]) 411 goto out_free_data; 412 cfg->apple_dart_cfg.ttbr[i] = virt_to_phys(data->pgd[i]); 413 } 414 415 return &data->iop; 416 417 out_free_data: 418 while (--i >= 0) { 419 iommu_free_pages(data->pgd[i]); 420 } 421 kfree(data); 422 return NULL; 423 } 424 425 static void apple_dart_free_pgtable(struct io_pgtable *iop) 426 { 427 struct dart_io_pgtable *data = io_pgtable_to_data(iop); 428 dart_iopte *ptep, *end; 429 int i; 430 431 for (i = 0; i < (1 << data->tbl_bits) && data->pgd[i]; ++i) { 432 ptep = data->pgd[i]; 433 end = (void *)ptep + DART_GRANULE(data); 434 435 while (ptep != end) { 436 dart_iopte pte = *ptep++; 437 438 if (pte) 439 iommu_free_pages(iopte_deref(pte, data)); 440 } 441 iommu_free_pages(data->pgd[i]); 442 } 443 444 kfree(data); 445 } 446 447 struct io_pgtable_init_fns io_pgtable_apple_dart_init_fns = { 448 .alloc = apple_dart_alloc_pgtable, 449 .free = apple_dart_free_pgtable, 450 }; 451