1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * pasid.h - PASID idr, table and entry header 4 * 5 * Copyright (C) 2018 Intel Corporation 6 * 7 * Author: Lu Baolu <baolu.lu@linux.intel.com> 8 */ 9 10 #ifndef __INTEL_PASID_H 11 #define __INTEL_PASID_H 12 13 #define PASID_RID2PASID 0x0 14 #define PASID_MIN 0x1 15 #define PASID_MAX 0x100000 16 #define PASID_PTE_MASK 0x3F 17 #define PASID_PTE_PRESENT 1 18 #define PASID_PTE_FPD 2 19 #define PDE_PFN_MASK PAGE_MASK 20 #define PASID_PDE_SHIFT 6 21 #define MAX_NR_PASID_BITS 20 22 #define PASID_TBL_ENTRIES BIT(PASID_PDE_SHIFT) 23 24 #define is_pasid_enabled(entry) (((entry)->lo >> 3) & 0x1) 25 #define get_pasid_dir_size(entry) (1 << ((((entry)->lo >> 9) & 0x7) + 7)) 26 27 /* Virtual command interface for enlightened pasid management. */ 28 #define VCMD_CMD_ALLOC 0x1 29 #define VCMD_CMD_FREE 0x2 30 #define VCMD_VRSP_IP 0x1 31 #define VCMD_VRSP_SC(e) (((e) & 0xff) >> 1) 32 #define VCMD_VRSP_SC_SUCCESS 0 33 #define VCMD_VRSP_SC_NO_PASID_AVAIL 16 34 #define VCMD_VRSP_SC_INVALID_PASID 16 35 #define VCMD_VRSP_RESULT_PASID(e) (((e) >> 16) & 0xfffff) 36 #define VCMD_CMD_OPERAND(e) ((e) << 16) 37 /* 38 * Domain ID reserved for pasid entries programmed for first-level 39 * only and pass-through transfer modes. 40 */ 41 #define FLPT_DEFAULT_DID 1 42 43 /* 44 * The SUPERVISOR_MODE flag indicates a first level translation which 45 * can be used for access to kernel addresses. It is valid only for 46 * access to the kernel's static 1:1 mapping of physical memory — not 47 * to vmalloc or even module mappings. 48 */ 49 #define PASID_FLAG_SUPERVISOR_MODE BIT(0) 50 #define PASID_FLAG_NESTED BIT(1) 51 #define PASID_FLAG_PAGE_SNOOP BIT(2) 52 53 /* 54 * The PASID_FLAG_FL5LP flag Indicates using 5-level paging for first- 55 * level translation, otherwise, 4-level paging will be used. 56 */ 57 #define PASID_FLAG_FL5LP BIT(1) 58 59 struct pasid_dir_entry { 60 u64 val; 61 }; 62 63 struct pasid_entry { 64 u64 val[8]; 65 }; 66 67 #define PASID_ENTRY_PGTT_FL_ONLY (1) 68 #define PASID_ENTRY_PGTT_SL_ONLY (2) 69 #define PASID_ENTRY_PGTT_NESTED (3) 70 #define PASID_ENTRY_PGTT_PT (4) 71 72 /* The representative of a PASID table */ 73 struct pasid_table { 74 void *table; /* pasid table pointer */ 75 int order; /* page order of pasid table */ 76 u32 max_pasid; /* max pasid */ 77 struct list_head dev; /* device list */ 78 }; 79 80 /* Get PRESENT bit of a PASID directory entry. */ 81 static inline bool pasid_pde_is_present(struct pasid_dir_entry *pde) 82 { 83 return READ_ONCE(pde->val) & PASID_PTE_PRESENT; 84 } 85 86 /* Get PASID table from a PASID directory entry. */ 87 static inline struct pasid_entry * 88 get_pasid_table_from_pde(struct pasid_dir_entry *pde) 89 { 90 if (!pasid_pde_is_present(pde)) 91 return NULL; 92 93 return phys_to_virt(READ_ONCE(pde->val) & PDE_PFN_MASK); 94 } 95 96 /* Get PRESENT bit of a PASID table entry. */ 97 static inline bool pasid_pte_is_present(struct pasid_entry *pte) 98 { 99 return READ_ONCE(pte->val[0]) & PASID_PTE_PRESENT; 100 } 101 102 /* Get PGTT field of a PASID table entry */ 103 static inline u16 pasid_pte_get_pgtt(struct pasid_entry *pte) 104 { 105 return (u16)((READ_ONCE(pte->val[0]) >> 6) & 0x7); 106 } 107 108 extern unsigned int intel_pasid_max_id; 109 int intel_pasid_alloc_table(struct device *dev); 110 void intel_pasid_free_table(struct device *dev); 111 struct pasid_table *intel_pasid_get_table(struct device *dev); 112 int intel_pasid_setup_first_level(struct intel_iommu *iommu, 113 struct device *dev, pgd_t *pgd, 114 u32 pasid, u16 did, int flags); 115 int intel_pasid_setup_second_level(struct intel_iommu *iommu, 116 struct dmar_domain *domain, 117 struct device *dev, u32 pasid); 118 int intel_pasid_setup_pass_through(struct intel_iommu *iommu, 119 struct dmar_domain *domain, 120 struct device *dev, u32 pasid); 121 void intel_pasid_tear_down_entry(struct intel_iommu *iommu, 122 struct device *dev, u32 pasid, 123 bool fault_ignore); 124 int vcmd_alloc_pasid(struct intel_iommu *iommu, u32 *pasid); 125 void vcmd_free_pasid(struct intel_iommu *iommu, u32 pasid); 126 void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu, 127 struct device *dev, u32 pasid); 128 #endif /* __INTEL_PASID_H */ 129