1ab65ba57SJerry Snitselaar# SPDX-License-Identifier: GPL-2.0-only 2ab65ba57SJerry Snitselaar# Intel IOMMU support 3ab65ba57SJerry Snitselaarconfig DMAR_TABLE 4ab65ba57SJerry Snitselaar bool 5ab65ba57SJerry Snitselaar 655ee5e67SLu Baoluconfig DMAR_PERF 755ee5e67SLu Baolu bool 855ee5e67SLu Baolu 9914ff771SKyung Min Parkconfig DMAR_DEBUG 10914ff771SKyung Min Park bool 11914ff771SKyung Min Park 12ab65ba57SJerry Snitselaarconfig INTEL_IOMMU 13ab65ba57SJerry Snitselaar bool "Support for Intel IOMMU using DMA Remapping Devices" 14ab65ba57SJerry Snitselaar depends on PCI_MSI && ACPI && (X86 || IA64) 15952ace79SLinus Torvalds select DMA_OPS 16ab65ba57SJerry Snitselaar select IOMMU_API 17ab65ba57SJerry Snitselaar select IOMMU_IOVA 18ab65ba57SJerry Snitselaar select NEED_DMA_MAP_STATE 19ab65ba57SJerry Snitselaar select DMAR_TABLE 20ab65ba57SJerry Snitselaar select SWIOTLB 21ab65ba57SJerry Snitselaar select IOASID 22c588072bSTom Murphy select IOMMU_DMA 23879fcc6bSLu Baolu select PCI_ATS 24ab65ba57SJerry Snitselaar help 25ab65ba57SJerry Snitselaar DMA remapping (DMAR) devices support enables independent address 26ab65ba57SJerry Snitselaar translations for Direct Memory Access (DMA) from devices. 27ab65ba57SJerry Snitselaar These DMA remapping devices are reported via ACPI tables 28ab65ba57SJerry Snitselaar and include PCI device scope covered by these DMA 29ab65ba57SJerry Snitselaar remapping devices. 30ab65ba57SJerry Snitselaar 3101dac2d9SLu Baoluif INTEL_IOMMU 3201dac2d9SLu Baolu 33ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEBUGFS 34ab65ba57SJerry Snitselaar bool "Export Intel IOMMU internals in Debugfs" 3501dac2d9SLu Baolu depends on IOMMU_DEBUGFS 36456bb0b9SLu Baolu select DMAR_PERF 37914ff771SKyung Min Park select DMAR_DEBUG 38ab65ba57SJerry Snitselaar help 39ab65ba57SJerry Snitselaar !!!WARNING!!! 40ab65ba57SJerry Snitselaar 41ab65ba57SJerry Snitselaar DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!! 42ab65ba57SJerry Snitselaar 43ab65ba57SJerry Snitselaar Expose Intel IOMMU internals in Debugfs. 44ab65ba57SJerry Snitselaar 45ab65ba57SJerry Snitselaar This option is -NOT- intended for production environments, and should 46ab65ba57SJerry Snitselaar only be enabled for debugging Intel IOMMU. 47ab65ba57SJerry Snitselaar 48ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SVM 49ab65ba57SJerry Snitselaar bool "Support for Shared Virtual Memory with Intel IOMMU" 5001dac2d9SLu Baolu depends on X86_64 51ab65ba57SJerry Snitselaar select PCI_PASID 52ab65ba57SJerry Snitselaar select PCI_PRI 53ab65ba57SJerry Snitselaar select MMU_NOTIFIER 54ab65ba57SJerry Snitselaar select IOASID 55*7ba56472SFenghua Yu select IOMMU_SVA 56ab65ba57SJerry Snitselaar help 57ab65ba57SJerry Snitselaar Shared Virtual Memory (SVM) provides a facility for devices 58ab65ba57SJerry Snitselaar to access DMA resources through process address space by 59ab65ba57SJerry Snitselaar means of a Process Address Space ID (PASID). 60ab65ba57SJerry Snitselaar 61ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEFAULT_ON 6201dac2d9SLu Baolu bool "Enable Intel DMA Remapping Devices by default" 6301dac2d9SLu Baolu default y 64ab65ba57SJerry Snitselaar help 65ab65ba57SJerry Snitselaar Selecting this option will enable a DMAR device at boot time if 66ab65ba57SJerry Snitselaar one is found. If this option is not selected, DMAR support can 67ab65ba57SJerry Snitselaar be enabled by passing intel_iommu=on to the kernel. 68ab65ba57SJerry Snitselaar 69ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_BROKEN_GFX_WA 70ab65ba57SJerry Snitselaar bool "Workaround broken graphics drivers (going away soon)" 7101dac2d9SLu Baolu depends on BROKEN && X86 72ab65ba57SJerry Snitselaar help 73ab65ba57SJerry Snitselaar Current Graphics drivers tend to use physical address 74ab65ba57SJerry Snitselaar for DMA and avoid using DMA APIs. Setting this config 75ab65ba57SJerry Snitselaar option permits the IOMMU driver to set a unity map for 76ab65ba57SJerry Snitselaar all the OS-visible memory. Hence the driver can continue 77ab65ba57SJerry Snitselaar to use physical addresses for DMA, at least until this 78ab65ba57SJerry Snitselaar option is removed in the 2.6.32 kernel. 79ab65ba57SJerry Snitselaar 80ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_FLOPPY_WA 81ab65ba57SJerry Snitselaar def_bool y 8201dac2d9SLu Baolu depends on X86 83ab65ba57SJerry Snitselaar help 84ab65ba57SJerry Snitselaar Floppy disk drivers are known to bypass DMA API calls 85ab65ba57SJerry Snitselaar thereby failing to work when IOMMU is enabled. This 86ab65ba57SJerry Snitselaar workaround will setup a 1:1 mapping for the first 87ab65ba57SJerry Snitselaar 16MiB to make floppy (an ISA device) work. 88ab65ba57SJerry Snitselaar 89ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON 90ab65ba57SJerry Snitselaar bool "Enable Intel IOMMU scalable mode by default" 91792fb43cSLu Baolu default y 92ab65ba57SJerry Snitselaar help 93ab65ba57SJerry Snitselaar Selecting this option will enable by default the scalable mode if 94ab65ba57SJerry Snitselaar hardware presents the capability. The scalable mode is defined in 95ab65ba57SJerry Snitselaar VT-d 3.0. The scalable mode capability could be checked by reading 96ab65ba57SJerry Snitselaar /sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option 97ab65ba57SJerry Snitselaar is not selected, scalable mode support could also be enabled by 98ab65ba57SJerry Snitselaar passing intel_iommu=sm_on to the kernel. If not sure, please use 99ab65ba57SJerry Snitselaar the default value. 10001dac2d9SLu Baolu 10101dac2d9SLu Baoluendif # INTEL_IOMMU 102