1ab65ba57SJerry Snitselaar# SPDX-License-Identifier: GPL-2.0-only 2ab65ba57SJerry Snitselaar# Intel IOMMU support 3ab65ba57SJerry Snitselaarconfig DMAR_TABLE 4ab65ba57SJerry Snitselaar bool 5ab65ba57SJerry Snitselaar 655ee5e67SLu Baoluconfig DMAR_PERF 755ee5e67SLu Baolu bool 855ee5e67SLu Baolu 9ab65ba57SJerry Snitselaarconfig INTEL_IOMMU 10ab65ba57SJerry Snitselaar bool "Support for Intel IOMMU using DMA Remapping Devices" 11ab65ba57SJerry Snitselaar depends on PCI_MSI && ACPI && (X86 || IA64) 12952ace79SLinus Torvalds select DMA_OPS 13ab65ba57SJerry Snitselaar select IOMMU_API 14ab65ba57SJerry Snitselaar select IOMMU_IOVA 15ab65ba57SJerry Snitselaar select NEED_DMA_MAP_STATE 16ab65ba57SJerry Snitselaar select DMAR_TABLE 17ab65ba57SJerry Snitselaar select SWIOTLB 18ab65ba57SJerry Snitselaar select IOASID 19c588072bSTom Murphy select IOMMU_DMA 20879fcc6bSLu Baolu select PCI_ATS 21ab65ba57SJerry Snitselaar help 22ab65ba57SJerry Snitselaar DMA remapping (DMAR) devices support enables independent address 23ab65ba57SJerry Snitselaar translations for Direct Memory Access (DMA) from devices. 24ab65ba57SJerry Snitselaar These DMA remapping devices are reported via ACPI tables 25ab65ba57SJerry Snitselaar and include PCI device scope covered by these DMA 26ab65ba57SJerry Snitselaar remapping devices. 27ab65ba57SJerry Snitselaar 28*01dac2d9SLu Baoluif INTEL_IOMMU 29*01dac2d9SLu Baolu 30ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEBUGFS 31ab65ba57SJerry Snitselaar bool "Export Intel IOMMU internals in Debugfs" 32*01dac2d9SLu Baolu depends on IOMMU_DEBUGFS 33456bb0b9SLu Baolu select DMAR_PERF 34ab65ba57SJerry Snitselaar help 35ab65ba57SJerry Snitselaar !!!WARNING!!! 36ab65ba57SJerry Snitselaar 37ab65ba57SJerry Snitselaar DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!! 38ab65ba57SJerry Snitselaar 39ab65ba57SJerry Snitselaar Expose Intel IOMMU internals in Debugfs. 40ab65ba57SJerry Snitselaar 41ab65ba57SJerry Snitselaar This option is -NOT- intended for production environments, and should 42ab65ba57SJerry Snitselaar only be enabled for debugging Intel IOMMU. 43ab65ba57SJerry Snitselaar 44ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SVM 45ab65ba57SJerry Snitselaar bool "Support for Shared Virtual Memory with Intel IOMMU" 46*01dac2d9SLu Baolu depends on X86_64 47ab65ba57SJerry Snitselaar select PCI_PASID 48ab65ba57SJerry Snitselaar select PCI_PRI 49ab65ba57SJerry Snitselaar select MMU_NOTIFIER 50ab65ba57SJerry Snitselaar select IOASID 5140483774SLu Baolu select IOMMU_SVA_LIB 52ab65ba57SJerry Snitselaar help 53ab65ba57SJerry Snitselaar Shared Virtual Memory (SVM) provides a facility for devices 54ab65ba57SJerry Snitselaar to access DMA resources through process address space by 55ab65ba57SJerry Snitselaar means of a Process Address Space ID (PASID). 56ab65ba57SJerry Snitselaar 57ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEFAULT_ON 58*01dac2d9SLu Baolu bool "Enable Intel DMA Remapping Devices by default" 59*01dac2d9SLu Baolu default y 60ab65ba57SJerry Snitselaar help 61ab65ba57SJerry Snitselaar Selecting this option will enable a DMAR device at boot time if 62ab65ba57SJerry Snitselaar one is found. If this option is not selected, DMAR support can 63ab65ba57SJerry Snitselaar be enabled by passing intel_iommu=on to the kernel. 64ab65ba57SJerry Snitselaar 65ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_BROKEN_GFX_WA 66ab65ba57SJerry Snitselaar bool "Workaround broken graphics drivers (going away soon)" 67*01dac2d9SLu Baolu depends on BROKEN && X86 68ab65ba57SJerry Snitselaar help 69ab65ba57SJerry Snitselaar Current Graphics drivers tend to use physical address 70ab65ba57SJerry Snitselaar for DMA and avoid using DMA APIs. Setting this config 71ab65ba57SJerry Snitselaar option permits the IOMMU driver to set a unity map for 72ab65ba57SJerry Snitselaar all the OS-visible memory. Hence the driver can continue 73ab65ba57SJerry Snitselaar to use physical addresses for DMA, at least until this 74ab65ba57SJerry Snitselaar option is removed in the 2.6.32 kernel. 75ab65ba57SJerry Snitselaar 76ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_FLOPPY_WA 77ab65ba57SJerry Snitselaar def_bool y 78*01dac2d9SLu Baolu depends on X86 79ab65ba57SJerry Snitselaar help 80ab65ba57SJerry Snitselaar Floppy disk drivers are known to bypass DMA API calls 81ab65ba57SJerry Snitselaar thereby failing to work when IOMMU is enabled. This 82ab65ba57SJerry Snitselaar workaround will setup a 1:1 mapping for the first 83ab65ba57SJerry Snitselaar 16MiB to make floppy (an ISA device) work. 84ab65ba57SJerry Snitselaar 85ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON 86ab65ba57SJerry Snitselaar bool "Enable Intel IOMMU scalable mode by default" 87ab65ba57SJerry Snitselaar help 88ab65ba57SJerry Snitselaar Selecting this option will enable by default the scalable mode if 89ab65ba57SJerry Snitselaar hardware presents the capability. The scalable mode is defined in 90ab65ba57SJerry Snitselaar VT-d 3.0. The scalable mode capability could be checked by reading 91ab65ba57SJerry Snitselaar /sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option 92ab65ba57SJerry Snitselaar is not selected, scalable mode support could also be enabled by 93ab65ba57SJerry Snitselaar passing intel_iommu=sm_on to the kernel. If not sure, please use 94ab65ba57SJerry Snitselaar the default value. 95*01dac2d9SLu Baolu 96*01dac2d9SLu Baoluendif # INTEL_IOMMU 97