1ab65ba57SJerry Snitselaar# SPDX-License-Identifier: GPL-2.0-only 2ab65ba57SJerry Snitselaar# Intel IOMMU support 3ab65ba57SJerry Snitselaarconfig DMAR_TABLE 4ab65ba57SJerry Snitselaar bool 5ab65ba57SJerry Snitselaar 655ee5e67SLu Baoluconfig DMAR_PERF 755ee5e67SLu Baolu bool 855ee5e67SLu Baolu 9914ff771SKyung Min Parkconfig DMAR_DEBUG 10914ff771SKyung Min Park bool 11914ff771SKyung Min Park 12ab65ba57SJerry Snitselaarconfig INTEL_IOMMU 13ab65ba57SJerry Snitselaar bool "Support for Intel IOMMU using DMA Remapping Devices" 14cf8e8658SArd Biesheuvel depends on PCI_MSI && ACPI && X86 15ab65ba57SJerry Snitselaar select IOMMU_API 16ab65ba57SJerry Snitselaar select IOMMU_IOVA 17*140f5dedSJoel Granados select IOMMU_IOPF 18f35f22ccSJoao Martins select IOMMUFD_DRIVER if IOMMUFD 19ab65ba57SJerry Snitselaar select NEED_DMA_MAP_STATE 20ab65ba57SJerry Snitselaar select DMAR_TABLE 21ab65ba57SJerry Snitselaar select SWIOTLB 22879fcc6bSLu Baolu select PCI_ATS 230faa19a1SLu Baolu select PCI_PRI 240faa19a1SLu Baolu select PCI_PASID 25ab65ba57SJerry Snitselaar help 26ab65ba57SJerry Snitselaar DMA remapping (DMAR) devices support enables independent address 27ab65ba57SJerry Snitselaar translations for Direct Memory Access (DMA) from devices. 28ab65ba57SJerry Snitselaar These DMA remapping devices are reported via ACPI tables 29ab65ba57SJerry Snitselaar and include PCI device scope covered by these DMA 30ab65ba57SJerry Snitselaar remapping devices. 31ab65ba57SJerry Snitselaar 3201dac2d9SLu Baoluif INTEL_IOMMU 3301dac2d9SLu Baolu 34ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEBUGFS 35ab65ba57SJerry Snitselaar bool "Export Intel IOMMU internals in Debugfs" 3601dac2d9SLu Baolu depends on IOMMU_DEBUGFS 37456bb0b9SLu Baolu select DMAR_PERF 38914ff771SKyung Min Park select DMAR_DEBUG 39ab65ba57SJerry Snitselaar help 40ab65ba57SJerry Snitselaar !!!WARNING!!! 41ab65ba57SJerry Snitselaar 42ab65ba57SJerry Snitselaar DO NOT ENABLE THIS OPTION UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!!! 43ab65ba57SJerry Snitselaar 44ab65ba57SJerry Snitselaar Expose Intel IOMMU internals in Debugfs. 45ab65ba57SJerry Snitselaar 46ab65ba57SJerry Snitselaar This option is -NOT- intended for production environments, and should 47ab65ba57SJerry Snitselaar only be enabled for debugging Intel IOMMU. 48ab65ba57SJerry Snitselaar 49ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SVM 50ab65ba57SJerry Snitselaar bool "Support for Shared Virtual Memory with Intel IOMMU" 5101dac2d9SLu Baolu depends on X86_64 52ab65ba57SJerry Snitselaar select MMU_NOTIFIER 537ba56472SFenghua Yu select IOMMU_SVA 54ab65ba57SJerry Snitselaar help 55ab65ba57SJerry Snitselaar Shared Virtual Memory (SVM) provides a facility for devices 56ab65ba57SJerry Snitselaar to access DMA resources through process address space by 57ab65ba57SJerry Snitselaar means of a Process Address Space ID (PASID). 58ab65ba57SJerry Snitselaar 59ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_DEFAULT_ON 6001dac2d9SLu Baolu bool "Enable Intel DMA Remapping Devices by default" 6101dac2d9SLu Baolu default y 62ab65ba57SJerry Snitselaar help 63ab65ba57SJerry Snitselaar Selecting this option will enable a DMAR device at boot time if 64ab65ba57SJerry Snitselaar one is found. If this option is not selected, DMAR support can 65ab65ba57SJerry Snitselaar be enabled by passing intel_iommu=on to the kernel. 66ab65ba57SJerry Snitselaar 67ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_FLOPPY_WA 68ab65ba57SJerry Snitselaar def_bool y 6901dac2d9SLu Baolu depends on X86 70ab65ba57SJerry Snitselaar help 71ab65ba57SJerry Snitselaar Floppy disk drivers are known to bypass DMA API calls 72ab65ba57SJerry Snitselaar thereby failing to work when IOMMU is enabled. This 73ab65ba57SJerry Snitselaar workaround will setup a 1:1 mapping for the first 74ab65ba57SJerry Snitselaar 16MiB to make floppy (an ISA device) work. 75ab65ba57SJerry Snitselaar 76ab65ba57SJerry Snitselaarconfig INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON 77ab65ba57SJerry Snitselaar bool "Enable Intel IOMMU scalable mode by default" 78792fb43cSLu Baolu default y 79ab65ba57SJerry Snitselaar help 80ab65ba57SJerry Snitselaar Selecting this option will enable by default the scalable mode if 81ab65ba57SJerry Snitselaar hardware presents the capability. The scalable mode is defined in 82ab65ba57SJerry Snitselaar VT-d 3.0. The scalable mode capability could be checked by reading 83ab65ba57SJerry Snitselaar /sys/devices/virtual/iommu/dmar*/intel-iommu/ecap. If this option 84ab65ba57SJerry Snitselaar is not selected, scalable mode support could also be enabled by 85ab65ba57SJerry Snitselaar passing intel_iommu=sm_on to the kernel. If not sure, please use 86ab65ba57SJerry Snitselaar the default value. 8701dac2d9SLu Baolu 88a6a5006dSKan Liangconfig INTEL_IOMMU_PERF_EVENTS 89a6a5006dSKan Liang bool "Intel IOMMU performance events" 90cd14b018SMasahiro Yamada default y 91a6a5006dSKan Liang depends on INTEL_IOMMU && PERF_EVENTS 92a6a5006dSKan Liang help 93a6a5006dSKan Liang Selecting this option will enable the performance monitoring 94a6a5006dSKan Liang infrastructure in the Intel IOMMU. It collects information about 95a6a5006dSKan Liang key events occurring during operation of the remapping hardware, 96a6a5006dSKan Liang to aid performance tuning and debug. These are available on modern 97a6a5006dSKan Liang processors which support Intel VT-d 4.0 and later. 98a6a5006dSKan Liang 9901dac2d9SLu Baoluendif # INTEL_IOMMU 100