1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Apple DART (Device Address Resolution Table) IOMMU driver 4 * 5 * Copyright (C) 2021 The Asahi Linux Contributors 6 * 7 * Based on arm/arm-smmu/arm-ssmu.c and arm/arm-smmu-v3/arm-smmu-v3.c 8 * Copyright (C) 2013 ARM Limited 9 * Copyright (C) 2015 ARM Limited 10 * and on exynos-iommu.c 11 * Copyright (c) 2011,2016 Samsung Electronics Co., Ltd. 12 */ 13 14 #include <linux/atomic.h> 15 #include <linux/bitfield.h> 16 #include <linux/clk.h> 17 #include <linux/dev_printk.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/err.h> 20 #include <linux/interrupt.h> 21 #include <linux/io-pgtable.h> 22 #include <linux/iommu.h> 23 #include <linux/iopoll.h> 24 #include <linux/module.h> 25 #include <linux/of.h> 26 #include <linux/of_address.h> 27 #include <linux/of_iommu.h> 28 #include <linux/of_platform.h> 29 #include <linux/pci.h> 30 #include <linux/platform_device.h> 31 #include <linux/slab.h> 32 #include <linux/swab.h> 33 #include <linux/types.h> 34 35 #include "dma-iommu.h" 36 37 #define DART_MAX_STREAMS 256 38 #define DART_MAX_TTBR 4 39 #define MAX_DARTS_PER_DEVICE 2 40 41 /* Common registers */ 42 43 #define DART_PARAMS1 0x00 44 #define DART_PARAMS1_PAGE_SHIFT GENMASK(27, 24) 45 46 #define DART_PARAMS2 0x04 47 #define DART_PARAMS2_BYPASS_SUPPORT BIT(0) 48 49 /* T8020/T6000 registers */ 50 51 #define DART_T8020_STREAM_COMMAND 0x20 52 #define DART_T8020_STREAM_COMMAND_BUSY BIT(2) 53 #define DART_T8020_STREAM_COMMAND_INVALIDATE BIT(20) 54 55 #define DART_T8020_STREAM_SELECT 0x34 56 57 #define DART_T8020_ERROR 0x40 58 #define DART_T8020_ERROR_STREAM GENMASK(27, 24) 59 #define DART_T8020_ERROR_CODE GENMASK(11, 0) 60 #define DART_T8020_ERROR_FLAG BIT(31) 61 62 #define DART_T8020_ERROR_READ_FAULT BIT(4) 63 #define DART_T8020_ERROR_WRITE_FAULT BIT(3) 64 #define DART_T8020_ERROR_NO_PTE BIT(2) 65 #define DART_T8020_ERROR_NO_PMD BIT(1) 66 #define DART_T8020_ERROR_NO_TTBR BIT(0) 67 68 #define DART_T8020_CONFIG 0x60 69 #define DART_T8020_CONFIG_LOCK BIT(15) 70 71 #define DART_STREAM_COMMAND_BUSY_TIMEOUT 100 72 73 #define DART_T8020_ERROR_ADDR_HI 0x54 74 #define DART_T8020_ERROR_ADDR_LO 0x50 75 76 #define DART_T8020_STREAMS_ENABLE 0xfc 77 78 #define DART_T8020_TCR 0x100 79 #define DART_T8020_TCR_TRANSLATE_ENABLE BIT(7) 80 #define DART_T8020_TCR_BYPASS_DART BIT(8) 81 #define DART_T8020_TCR_BYPASS_DAPF BIT(12) 82 83 #define DART_T8020_TTBR 0x200 84 #define DART_T8020_USB4_TTBR 0x400 85 #define DART_T8020_TTBR_VALID BIT(31) 86 #define DART_T8020_TTBR_ADDR_FIELD_SHIFT 0 87 #define DART_T8020_TTBR_SHIFT 12 88 89 /* T8110 registers */ 90 91 #define DART_T8110_PARAMS3 0x08 92 #define DART_T8110_PARAMS3_PA_WIDTH GENMASK(29, 24) 93 #define DART_T8110_PARAMS3_VA_WIDTH GENMASK(21, 16) 94 #define DART_T8110_PARAMS3_VER_MAJ GENMASK(15, 8) 95 #define DART_T8110_PARAMS3_VER_MIN GENMASK(7, 0) 96 97 #define DART_T8110_PARAMS4 0x0c 98 #define DART_T8110_PARAMS4_NUM_CLIENTS GENMASK(24, 16) 99 #define DART_T8110_PARAMS4_NUM_SIDS GENMASK(8, 0) 100 101 #define DART_T8110_TLB_CMD 0x80 102 #define DART_T8110_TLB_CMD_BUSY BIT(31) 103 #define DART_T8110_TLB_CMD_OP GENMASK(10, 8) 104 #define DART_T8110_TLB_CMD_OP_FLUSH_ALL 0 105 #define DART_T8110_TLB_CMD_OP_FLUSH_SID 1 106 #define DART_T8110_TLB_CMD_STREAM GENMASK(7, 0) 107 108 #define DART_T8110_ERROR 0x100 109 #define DART_T8110_ERROR_STREAM GENMASK(27, 20) 110 #define DART_T8110_ERROR_CODE GENMASK(14, 0) 111 #define DART_T8110_ERROR_FLAG BIT(31) 112 113 #define DART_T8110_ERROR_MASK 0x104 114 115 #define DART_T8110_ERROR_READ_FAULT BIT(5) 116 #define DART_T8110_ERROR_WRITE_FAULT BIT(4) 117 #define DART_T8110_ERROR_NO_PTE BIT(3) 118 #define DART_T8110_ERROR_NO_PMD BIT(2) 119 #define DART_T8110_ERROR_NO_PGD BIT(1) 120 #define DART_T8110_ERROR_NO_TTBR BIT(0) 121 122 #define DART_T8110_ERROR_ADDR_LO 0x170 123 #define DART_T8110_ERROR_ADDR_HI 0x174 124 125 #define DART_T8110_PROTECT 0x200 126 #define DART_T8110_UNPROTECT 0x204 127 #define DART_T8110_PROTECT_LOCK 0x208 128 #define DART_T8110_PROTECT_TTBR_TCR BIT(0) 129 130 #define DART_T8110_ENABLE_STREAMS 0xc00 131 #define DART_T8110_DISABLE_STREAMS 0xc20 132 133 #define DART_T8110_TCR 0x1000 134 #define DART_T8110_TCR_REMAP GENMASK(11, 8) 135 #define DART_T8110_TCR_REMAP_EN BIT(7) 136 #define DART_T8110_TCR_BYPASS_DAPF BIT(2) 137 #define DART_T8110_TCR_BYPASS_DART BIT(1) 138 #define DART_T8110_TCR_TRANSLATE_ENABLE BIT(0) 139 140 #define DART_T8110_TTBR 0x1400 141 #define DART_T8110_TTBR_VALID BIT(0) 142 #define DART_T8110_TTBR_ADDR_FIELD_SHIFT 2 143 #define DART_T8110_TTBR_SHIFT 14 144 145 #define DART_TCR(dart, sid) ((dart)->hw->tcr + ((sid) << 2)) 146 147 #define DART_TTBR(dart, sid, idx) ((dart)->hw->ttbr + \ 148 (((dart)->hw->ttbr_count * (sid)) << 2) + \ 149 ((idx) << 2)) 150 151 struct apple_dart_stream_map; 152 153 enum dart_type { 154 DART_T8020, 155 DART_T6000, 156 DART_T8110, 157 }; 158 159 struct apple_dart_hw { 160 enum dart_type type; 161 irqreturn_t (*irq_handler)(int irq, void *dev); 162 int (*invalidate_tlb)(struct apple_dart_stream_map *stream_map); 163 164 u32 oas; 165 enum io_pgtable_fmt fmt; 166 167 int max_sid_count; 168 169 u64 lock; 170 u64 lock_bit; 171 172 u64 error; 173 174 u64 enable_streams; 175 176 u64 tcr; 177 u64 tcr_enabled; 178 u64 tcr_disabled; 179 u64 tcr_bypass; 180 181 u64 ttbr; 182 u64 ttbr_valid; 183 u64 ttbr_addr_field_shift; 184 u64 ttbr_shift; 185 int ttbr_count; 186 }; 187 188 /* 189 * Private structure associated with each DART device. 190 * 191 * @dev: device struct 192 * @hw: SoC-specific hardware data 193 * @regs: mapped MMIO region 194 * @irq: interrupt number, can be shared with other DARTs 195 * @clks: clocks associated with this DART 196 * @num_clks: number of @clks 197 * @lock: lock for hardware operations involving this dart 198 * @pgsize: pagesize supported by this DART 199 * @supports_bypass: indicates if this DART supports bypass mode 200 * @sid2group: maps stream ids to iommu_groups 201 * @iommu: iommu core device 202 */ 203 struct apple_dart { 204 struct device *dev; 205 const struct apple_dart_hw *hw; 206 207 void __iomem *regs; 208 209 int irq; 210 struct clk_bulk_data *clks; 211 int num_clks; 212 213 spinlock_t lock; 214 215 u32 ias; 216 u32 oas; 217 u32 pgsize; 218 u32 num_streams; 219 u32 supports_bypass : 1; 220 221 struct iommu_group *sid2group[DART_MAX_STREAMS]; 222 struct iommu_device iommu; 223 224 u32 save_tcr[DART_MAX_STREAMS]; 225 u32 save_ttbr[DART_MAX_STREAMS][DART_MAX_TTBR]; 226 }; 227 228 /* 229 * Convenience struct to identify streams. 230 * 231 * The normal variant is used inside apple_dart_master_cfg which isn't written 232 * to concurrently. 233 * The atomic variant is used inside apple_dart_domain where we have to guard 234 * against races from potential parallel calls to attach/detach_device. 235 * Note that even inside the atomic variant the apple_dart pointer is not 236 * protected: This pointer is initialized once under the domain init mutex 237 * and never changed again afterwards. Devices with different dart pointers 238 * cannot be attached to the same domain. 239 * 240 * @dart dart pointer 241 * @sid stream id bitmap 242 */ 243 struct apple_dart_stream_map { 244 struct apple_dart *dart; 245 DECLARE_BITMAP(sidmap, DART_MAX_STREAMS); 246 }; 247 struct apple_dart_atomic_stream_map { 248 struct apple_dart *dart; 249 atomic_long_t sidmap[BITS_TO_LONGS(DART_MAX_STREAMS)]; 250 }; 251 252 /* 253 * This structure is attached to each iommu domain handled by a DART. 254 * 255 * @pgtbl_ops: pagetable ops allocated by io-pgtable 256 * @finalized: true if the domain has been completely initialized 257 * @init_lock: protects domain initialization 258 * @stream_maps: streams attached to this domain (valid for DMA/UNMANAGED only) 259 * @domain: core iommu domain pointer 260 */ 261 struct apple_dart_domain { 262 struct io_pgtable_ops *pgtbl_ops; 263 264 bool finalized; 265 struct mutex init_lock; 266 struct apple_dart_atomic_stream_map stream_maps[MAX_DARTS_PER_DEVICE]; 267 268 struct iommu_domain domain; 269 }; 270 271 /* 272 * This structure is attached to devices with dev_iommu_priv_set() on of_xlate 273 * and contains a list of streams bound to this device. 274 * So far the worst case seen is a single device with two streams 275 * from different darts, such that this simple static array is enough. 276 * 277 * @streams: streams for this device 278 */ 279 struct apple_dart_master_cfg { 280 struct apple_dart_stream_map stream_maps[MAX_DARTS_PER_DEVICE]; 281 }; 282 283 /* 284 * Helper macro to iterate over apple_dart_master_cfg.stream_maps and 285 * apple_dart_domain.stream_maps 286 * 287 * @i int used as loop variable 288 * @base pointer to base struct (apple_dart_master_cfg or apple_dart_domain) 289 * @stream pointer to the apple_dart_streams struct for each loop iteration 290 */ 291 #define for_each_stream_map(i, base, stream_map) \ 292 for (i = 0, stream_map = &(base)->stream_maps[0]; \ 293 i < MAX_DARTS_PER_DEVICE && stream_map->dart; \ 294 stream_map = &(base)->stream_maps[++i]) 295 296 static struct platform_driver apple_dart_driver; 297 static const struct iommu_ops apple_dart_iommu_ops; 298 299 static struct apple_dart_domain *to_dart_domain(struct iommu_domain *dom) 300 { 301 return container_of(dom, struct apple_dart_domain, domain); 302 } 303 304 static void 305 apple_dart_hw_enable_translation(struct apple_dart_stream_map *stream_map) 306 { 307 struct apple_dart *dart = stream_map->dart; 308 int sid; 309 310 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) 311 writel(dart->hw->tcr_enabled, dart->regs + DART_TCR(dart, sid)); 312 } 313 314 static void apple_dart_hw_disable_dma(struct apple_dart_stream_map *stream_map) 315 { 316 struct apple_dart *dart = stream_map->dart; 317 int sid; 318 319 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) 320 writel(dart->hw->tcr_disabled, dart->regs + DART_TCR(dart, sid)); 321 } 322 323 static void 324 apple_dart_hw_enable_bypass(struct apple_dart_stream_map *stream_map) 325 { 326 struct apple_dart *dart = stream_map->dart; 327 int sid; 328 329 WARN_ON(!stream_map->dart->supports_bypass); 330 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) 331 writel(dart->hw->tcr_bypass, 332 dart->regs + DART_TCR(dart, sid)); 333 } 334 335 static void apple_dart_hw_set_ttbr(struct apple_dart_stream_map *stream_map, 336 u8 idx, phys_addr_t paddr) 337 { 338 struct apple_dart *dart = stream_map->dart; 339 int sid; 340 341 WARN_ON(paddr & ((1 << dart->hw->ttbr_shift) - 1)); 342 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) 343 writel(dart->hw->ttbr_valid | 344 (paddr >> dart->hw->ttbr_shift) << dart->hw->ttbr_addr_field_shift, 345 dart->regs + DART_TTBR(dart, sid, idx)); 346 } 347 348 static void apple_dart_hw_clear_ttbr(struct apple_dart_stream_map *stream_map, 349 u8 idx) 350 { 351 struct apple_dart *dart = stream_map->dart; 352 int sid; 353 354 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) 355 writel(0, dart->regs + DART_TTBR(dart, sid, idx)); 356 } 357 358 static void 359 apple_dart_hw_clear_all_ttbrs(struct apple_dart_stream_map *stream_map) 360 { 361 int i; 362 363 for (i = 0; i < stream_map->dart->hw->ttbr_count; ++i) 364 apple_dart_hw_clear_ttbr(stream_map, i); 365 } 366 367 static int 368 apple_dart_t8020_hw_stream_command(struct apple_dart_stream_map *stream_map, 369 u32 command) 370 { 371 unsigned long flags; 372 int ret, i; 373 u32 command_reg; 374 375 spin_lock_irqsave(&stream_map->dart->lock, flags); 376 377 for (i = 0; i < BITS_TO_U32(stream_map->dart->num_streams); i++) 378 writel(stream_map->sidmap[i], 379 stream_map->dart->regs + DART_T8020_STREAM_SELECT + 4 * i); 380 writel(command, stream_map->dart->regs + DART_T8020_STREAM_COMMAND); 381 382 ret = readl_poll_timeout_atomic( 383 stream_map->dart->regs + DART_T8020_STREAM_COMMAND, command_reg, 384 !(command_reg & DART_T8020_STREAM_COMMAND_BUSY), 1, 385 DART_STREAM_COMMAND_BUSY_TIMEOUT); 386 387 spin_unlock_irqrestore(&stream_map->dart->lock, flags); 388 389 if (ret) { 390 dev_err(stream_map->dart->dev, 391 "busy bit did not clear after command %x for streams %lx\n", 392 command, stream_map->sidmap[0]); 393 return ret; 394 } 395 396 return 0; 397 } 398 399 static int 400 apple_dart_t8110_hw_tlb_command(struct apple_dart_stream_map *stream_map, 401 u32 command) 402 { 403 struct apple_dart *dart = stream_map->dart; 404 unsigned long flags; 405 int ret = 0; 406 int sid; 407 408 spin_lock_irqsave(&dart->lock, flags); 409 410 for_each_set_bit(sid, stream_map->sidmap, dart->num_streams) { 411 u32 val = FIELD_PREP(DART_T8110_TLB_CMD_OP, command) | 412 FIELD_PREP(DART_T8110_TLB_CMD_STREAM, sid); 413 writel(val, dart->regs + DART_T8110_TLB_CMD); 414 415 ret = readl_poll_timeout_atomic( 416 dart->regs + DART_T8110_TLB_CMD, val, 417 !(val & DART_T8110_TLB_CMD_BUSY), 1, 418 DART_STREAM_COMMAND_BUSY_TIMEOUT); 419 420 if (ret) 421 break; 422 423 } 424 425 spin_unlock_irqrestore(&dart->lock, flags); 426 427 if (ret) { 428 dev_err(stream_map->dart->dev, 429 "busy bit did not clear after command %x for stream %d\n", 430 command, sid); 431 return ret; 432 } 433 434 return 0; 435 } 436 437 static int 438 apple_dart_t8020_hw_invalidate_tlb(struct apple_dart_stream_map *stream_map) 439 { 440 return apple_dart_t8020_hw_stream_command( 441 stream_map, DART_T8020_STREAM_COMMAND_INVALIDATE); 442 } 443 444 static int 445 apple_dart_t8110_hw_invalidate_tlb(struct apple_dart_stream_map *stream_map) 446 { 447 return apple_dart_t8110_hw_tlb_command( 448 stream_map, DART_T8110_TLB_CMD_OP_FLUSH_SID); 449 } 450 451 static int apple_dart_hw_reset(struct apple_dart *dart) 452 { 453 u32 config; 454 struct apple_dart_stream_map stream_map; 455 int i; 456 457 config = readl(dart->regs + dart->hw->lock); 458 if (config & dart->hw->lock_bit) { 459 dev_err(dart->dev, "DART is locked down until reboot: %08x\n", 460 config); 461 return -EINVAL; 462 } 463 464 stream_map.dart = dart; 465 bitmap_zero(stream_map.sidmap, DART_MAX_STREAMS); 466 bitmap_set(stream_map.sidmap, 0, dart->num_streams); 467 apple_dart_hw_disable_dma(&stream_map); 468 apple_dart_hw_clear_all_ttbrs(&stream_map); 469 470 /* enable all streams globally since TCR is used to control isolation */ 471 for (i = 0; i < BITS_TO_U32(dart->num_streams); i++) 472 writel(U32_MAX, dart->regs + dart->hw->enable_streams + 4 * i); 473 474 /* clear any pending errors before the interrupt is unmasked */ 475 writel(readl(dart->regs + dart->hw->error), dart->regs + dart->hw->error); 476 477 if (dart->hw->type == DART_T8110) 478 writel(0, dart->regs + DART_T8110_ERROR_MASK); 479 480 return dart->hw->invalidate_tlb(&stream_map); 481 } 482 483 static void apple_dart_domain_flush_tlb(struct apple_dart_domain *domain) 484 { 485 int i, j; 486 struct apple_dart_atomic_stream_map *domain_stream_map; 487 struct apple_dart_stream_map stream_map; 488 489 for_each_stream_map(i, domain, domain_stream_map) { 490 stream_map.dart = domain_stream_map->dart; 491 492 for (j = 0; j < BITS_TO_LONGS(stream_map.dart->num_streams); j++) 493 stream_map.sidmap[j] = atomic_long_read(&domain_stream_map->sidmap[j]); 494 495 stream_map.dart->hw->invalidate_tlb(&stream_map); 496 } 497 } 498 499 static void apple_dart_flush_iotlb_all(struct iommu_domain *domain) 500 { 501 apple_dart_domain_flush_tlb(to_dart_domain(domain)); 502 } 503 504 static void apple_dart_iotlb_sync(struct iommu_domain *domain, 505 struct iommu_iotlb_gather *gather) 506 { 507 apple_dart_domain_flush_tlb(to_dart_domain(domain)); 508 } 509 510 static int apple_dart_iotlb_sync_map(struct iommu_domain *domain, 511 unsigned long iova, size_t size) 512 { 513 apple_dart_domain_flush_tlb(to_dart_domain(domain)); 514 return 0; 515 } 516 517 static phys_addr_t apple_dart_iova_to_phys(struct iommu_domain *domain, 518 dma_addr_t iova) 519 { 520 struct apple_dart_domain *dart_domain = to_dart_domain(domain); 521 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops; 522 523 if (!ops) 524 return 0; 525 526 return ops->iova_to_phys(ops, iova); 527 } 528 529 static int apple_dart_map_pages(struct iommu_domain *domain, unsigned long iova, 530 phys_addr_t paddr, size_t pgsize, 531 size_t pgcount, int prot, gfp_t gfp, 532 size_t *mapped) 533 { 534 struct apple_dart_domain *dart_domain = to_dart_domain(domain); 535 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops; 536 537 if (!ops) 538 return -ENODEV; 539 540 return ops->map_pages(ops, iova, paddr, pgsize, pgcount, prot, gfp, 541 mapped); 542 } 543 544 static size_t apple_dart_unmap_pages(struct iommu_domain *domain, 545 unsigned long iova, size_t pgsize, 546 size_t pgcount, 547 struct iommu_iotlb_gather *gather) 548 { 549 struct apple_dart_domain *dart_domain = to_dart_domain(domain); 550 struct io_pgtable_ops *ops = dart_domain->pgtbl_ops; 551 552 return ops->unmap_pages(ops, iova, pgsize, pgcount, gather); 553 } 554 555 static void 556 apple_dart_setup_translation(struct apple_dart_domain *domain, 557 struct apple_dart_stream_map *stream_map) 558 { 559 int i; 560 struct io_pgtable_cfg *pgtbl_cfg = 561 &io_pgtable_ops_to_pgtable(domain->pgtbl_ops)->cfg; 562 563 for (i = 0; i < pgtbl_cfg->apple_dart_cfg.n_ttbrs; ++i) 564 apple_dart_hw_set_ttbr(stream_map, i, 565 pgtbl_cfg->apple_dart_cfg.ttbr[i]); 566 for (; i < stream_map->dart->hw->ttbr_count; ++i) 567 apple_dart_hw_clear_ttbr(stream_map, i); 568 569 apple_dart_hw_enable_translation(stream_map); 570 stream_map->dart->hw->invalidate_tlb(stream_map); 571 } 572 573 static int apple_dart_finalize_domain(struct apple_dart_domain *dart_domain, 574 struct apple_dart_master_cfg *cfg) 575 { 576 struct apple_dart *dart = cfg->stream_maps[0].dart; 577 struct io_pgtable_cfg pgtbl_cfg; 578 int ret = 0; 579 int i, j; 580 581 if (dart->pgsize > PAGE_SIZE) 582 return -EINVAL; 583 584 mutex_lock(&dart_domain->init_lock); 585 586 if (dart_domain->finalized) 587 goto done; 588 589 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) { 590 dart_domain->stream_maps[i].dart = cfg->stream_maps[i].dart; 591 for (j = 0; j < BITS_TO_LONGS(dart->num_streams); j++) 592 atomic_long_set(&dart_domain->stream_maps[i].sidmap[j], 593 cfg->stream_maps[i].sidmap[j]); 594 } 595 596 pgtbl_cfg = (struct io_pgtable_cfg){ 597 .pgsize_bitmap = dart->pgsize, 598 .ias = dart->ias, 599 .oas = dart->oas, 600 .coherent_walk = 1, 601 .iommu_dev = dart->dev, 602 }; 603 604 dart_domain->pgtbl_ops = alloc_io_pgtable_ops(dart->hw->fmt, &pgtbl_cfg, 605 &dart_domain->domain); 606 if (!dart_domain->pgtbl_ops) { 607 ret = -ENOMEM; 608 goto done; 609 } 610 611 dart_domain->domain.pgsize_bitmap = pgtbl_cfg.pgsize_bitmap; 612 dart_domain->domain.geometry.aperture_start = 0; 613 dart_domain->domain.geometry.aperture_end = 614 (dma_addr_t)DMA_BIT_MASK(dart->ias); 615 dart_domain->domain.geometry.force_aperture = true; 616 617 dart_domain->finalized = true; 618 619 done: 620 mutex_unlock(&dart_domain->init_lock); 621 return ret; 622 } 623 624 static int 625 apple_dart_mod_streams(struct apple_dart_atomic_stream_map *domain_maps, 626 struct apple_dart_stream_map *master_maps, 627 bool add_streams) 628 { 629 int i, j; 630 631 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) { 632 if (domain_maps[i].dart != master_maps[i].dart) 633 return -EINVAL; 634 } 635 636 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) { 637 if (!domain_maps[i].dart) 638 break; 639 for (j = 0; j < BITS_TO_LONGS(domain_maps[i].dart->num_streams); j++) { 640 if (add_streams) 641 atomic_long_or(master_maps[i].sidmap[j], 642 &domain_maps[i].sidmap[j]); 643 else 644 atomic_long_and(~master_maps[i].sidmap[j], 645 &domain_maps[i].sidmap[j]); 646 } 647 } 648 649 return 0; 650 } 651 652 static int apple_dart_domain_add_streams(struct apple_dart_domain *domain, 653 struct apple_dart_master_cfg *cfg) 654 { 655 return apple_dart_mod_streams(domain->stream_maps, cfg->stream_maps, 656 true); 657 } 658 659 static int apple_dart_attach_dev_paging(struct iommu_domain *domain, 660 struct device *dev) 661 { 662 int ret, i; 663 struct apple_dart_stream_map *stream_map; 664 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 665 struct apple_dart_domain *dart_domain = to_dart_domain(domain); 666 667 ret = apple_dart_finalize_domain(dart_domain, cfg); 668 if (ret) 669 return ret; 670 671 ret = apple_dart_domain_add_streams(dart_domain, cfg); 672 if (ret) 673 return ret; 674 675 for_each_stream_map(i, cfg, stream_map) 676 apple_dart_setup_translation(dart_domain, stream_map); 677 return 0; 678 } 679 680 static int apple_dart_attach_dev_identity(struct iommu_domain *domain, 681 struct device *dev) 682 { 683 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 684 struct apple_dart_stream_map *stream_map; 685 int i; 686 687 if (!cfg->stream_maps[0].dart->supports_bypass) 688 return -EINVAL; 689 690 for_each_stream_map(i, cfg, stream_map) 691 apple_dart_hw_enable_bypass(stream_map); 692 return 0; 693 } 694 695 static const struct iommu_domain_ops apple_dart_identity_ops = { 696 .attach_dev = apple_dart_attach_dev_identity, 697 }; 698 699 static struct iommu_domain apple_dart_identity_domain = { 700 .type = IOMMU_DOMAIN_IDENTITY, 701 .ops = &apple_dart_identity_ops, 702 }; 703 704 static int apple_dart_attach_dev_blocked(struct iommu_domain *domain, 705 struct device *dev) 706 { 707 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 708 struct apple_dart_stream_map *stream_map; 709 int i; 710 711 for_each_stream_map(i, cfg, stream_map) 712 apple_dart_hw_disable_dma(stream_map); 713 return 0; 714 } 715 716 static const struct iommu_domain_ops apple_dart_blocked_ops = { 717 .attach_dev = apple_dart_attach_dev_blocked, 718 }; 719 720 static struct iommu_domain apple_dart_blocked_domain = { 721 .type = IOMMU_DOMAIN_BLOCKED, 722 .ops = &apple_dart_blocked_ops, 723 }; 724 725 static struct iommu_device *apple_dart_probe_device(struct device *dev) 726 { 727 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 728 struct apple_dart_stream_map *stream_map; 729 int i; 730 731 if (!cfg) 732 return ERR_PTR(-ENODEV); 733 734 for_each_stream_map(i, cfg, stream_map) 735 device_link_add( 736 dev, stream_map->dart->dev, 737 DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_SUPPLIER); 738 739 return &cfg->stream_maps[0].dart->iommu; 740 } 741 742 static void apple_dart_release_device(struct device *dev) 743 { 744 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 745 746 kfree(cfg); 747 } 748 749 static struct iommu_domain *apple_dart_domain_alloc_paging(struct device *dev) 750 { 751 struct apple_dart_domain *dart_domain; 752 753 dart_domain = kzalloc(sizeof(*dart_domain), GFP_KERNEL); 754 if (!dart_domain) 755 return NULL; 756 757 mutex_init(&dart_domain->init_lock); 758 759 if (dev) { 760 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 761 int ret; 762 763 ret = apple_dart_finalize_domain(dart_domain, cfg); 764 if (ret) { 765 kfree(dart_domain); 766 return ERR_PTR(ret); 767 } 768 } 769 return &dart_domain->domain; 770 } 771 772 static void apple_dart_domain_free(struct iommu_domain *domain) 773 { 774 struct apple_dart_domain *dart_domain = to_dart_domain(domain); 775 776 if (dart_domain->pgtbl_ops) 777 free_io_pgtable_ops(dart_domain->pgtbl_ops); 778 779 kfree(dart_domain); 780 } 781 782 static int apple_dart_of_xlate(struct device *dev, struct of_phandle_args *args) 783 { 784 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 785 struct platform_device *iommu_pdev = of_find_device_by_node(args->np); 786 struct apple_dart *dart = platform_get_drvdata(iommu_pdev); 787 struct apple_dart *cfg_dart; 788 int i, sid; 789 790 if (args->args_count != 1) 791 return -EINVAL; 792 sid = args->args[0]; 793 794 if (!cfg) 795 cfg = kzalloc(sizeof(*cfg), GFP_KERNEL); 796 if (!cfg) 797 return -ENOMEM; 798 dev_iommu_priv_set(dev, cfg); 799 800 cfg_dart = cfg->stream_maps[0].dart; 801 if (cfg_dart) { 802 if (cfg_dart->supports_bypass != dart->supports_bypass) 803 return -EINVAL; 804 if (cfg_dart->pgsize != dart->pgsize) 805 return -EINVAL; 806 } 807 808 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) { 809 if (cfg->stream_maps[i].dart == dart) { 810 set_bit(sid, cfg->stream_maps[i].sidmap); 811 return 0; 812 } 813 } 814 for (i = 0; i < MAX_DARTS_PER_DEVICE; ++i) { 815 if (!cfg->stream_maps[i].dart) { 816 cfg->stream_maps[i].dart = dart; 817 set_bit(sid, cfg->stream_maps[i].sidmap); 818 return 0; 819 } 820 } 821 822 return -EINVAL; 823 } 824 825 static DEFINE_MUTEX(apple_dart_groups_lock); 826 827 static void apple_dart_release_group(void *iommu_data) 828 { 829 int i, sid; 830 struct apple_dart_stream_map *stream_map; 831 struct apple_dart_master_cfg *group_master_cfg = iommu_data; 832 833 mutex_lock(&apple_dart_groups_lock); 834 835 for_each_stream_map(i, group_master_cfg, stream_map) 836 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams) 837 stream_map->dart->sid2group[sid] = NULL; 838 839 kfree(iommu_data); 840 mutex_unlock(&apple_dart_groups_lock); 841 } 842 843 static int apple_dart_merge_master_cfg(struct apple_dart_master_cfg *dst, 844 struct apple_dart_master_cfg *src) 845 { 846 /* 847 * We know that this function is only called for groups returned from 848 * pci_device_group and that all Apple Silicon platforms never spread 849 * PCIe devices from the same bus across multiple DARTs such that we can 850 * just assume that both src and dst only have the same single DART. 851 */ 852 if (src->stream_maps[1].dart) 853 return -EINVAL; 854 if (dst->stream_maps[1].dart) 855 return -EINVAL; 856 if (src->stream_maps[0].dart != dst->stream_maps[0].dart) 857 return -EINVAL; 858 859 bitmap_or(dst->stream_maps[0].sidmap, 860 dst->stream_maps[0].sidmap, 861 src->stream_maps[0].sidmap, 862 dst->stream_maps[0].dart->num_streams); 863 return 0; 864 } 865 866 static struct iommu_group *apple_dart_device_group(struct device *dev) 867 { 868 int i, sid; 869 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 870 struct apple_dart_stream_map *stream_map; 871 struct apple_dart_master_cfg *group_master_cfg; 872 struct iommu_group *group = NULL; 873 struct iommu_group *res = ERR_PTR(-EINVAL); 874 875 mutex_lock(&apple_dart_groups_lock); 876 877 for_each_stream_map(i, cfg, stream_map) { 878 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams) { 879 struct iommu_group *stream_group = 880 stream_map->dart->sid2group[sid]; 881 882 if (group && group != stream_group) { 883 res = ERR_PTR(-EINVAL); 884 goto out; 885 } 886 887 group = stream_group; 888 } 889 } 890 891 if (group) { 892 res = iommu_group_ref_get(group); 893 goto out; 894 } 895 896 #ifdef CONFIG_PCI 897 if (dev_is_pci(dev)) 898 group = pci_device_group(dev); 899 else 900 #endif 901 group = generic_device_group(dev); 902 903 res = ERR_PTR(-ENOMEM); 904 if (!group) 905 goto out; 906 907 group_master_cfg = iommu_group_get_iommudata(group); 908 if (group_master_cfg) { 909 int ret; 910 911 ret = apple_dart_merge_master_cfg(group_master_cfg, cfg); 912 if (ret) { 913 dev_err(dev, "Failed to merge DART IOMMU groups.\n"); 914 iommu_group_put(group); 915 res = ERR_PTR(ret); 916 goto out; 917 } 918 } else { 919 group_master_cfg = kmemdup(cfg, sizeof(*group_master_cfg), 920 GFP_KERNEL); 921 if (!group_master_cfg) { 922 iommu_group_put(group); 923 goto out; 924 } 925 926 iommu_group_set_iommudata(group, group_master_cfg, 927 apple_dart_release_group); 928 } 929 930 for_each_stream_map(i, cfg, stream_map) 931 for_each_set_bit(sid, stream_map->sidmap, stream_map->dart->num_streams) 932 stream_map->dart->sid2group[sid] = group; 933 934 res = group; 935 936 out: 937 mutex_unlock(&apple_dart_groups_lock); 938 return res; 939 } 940 941 static int apple_dart_def_domain_type(struct device *dev) 942 { 943 struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); 944 945 if (cfg->stream_maps[0].dart->pgsize > PAGE_SIZE) 946 return IOMMU_DOMAIN_IDENTITY; 947 if (!cfg->stream_maps[0].dart->supports_bypass) 948 return IOMMU_DOMAIN_DMA; 949 950 return 0; 951 } 952 953 #ifndef CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR 954 /* Keep things compiling when CONFIG_PCI_APPLE isn't selected */ 955 #define CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR 0 956 #endif 957 #define DOORBELL_ADDR (CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR & PAGE_MASK) 958 959 static void apple_dart_get_resv_regions(struct device *dev, 960 struct list_head *head) 961 { 962 if (IS_ENABLED(CONFIG_PCIE_APPLE) && dev_is_pci(dev)) { 963 struct iommu_resv_region *region; 964 int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO; 965 966 region = iommu_alloc_resv_region(DOORBELL_ADDR, 967 PAGE_SIZE, prot, 968 IOMMU_RESV_MSI, GFP_KERNEL); 969 if (!region) 970 return; 971 972 list_add_tail(®ion->list, head); 973 } 974 975 iommu_dma_get_resv_regions(dev, head); 976 } 977 978 static const struct iommu_ops apple_dart_iommu_ops = { 979 .identity_domain = &apple_dart_identity_domain, 980 .blocked_domain = &apple_dart_blocked_domain, 981 .domain_alloc_paging = apple_dart_domain_alloc_paging, 982 .probe_device = apple_dart_probe_device, 983 .release_device = apple_dart_release_device, 984 .device_group = apple_dart_device_group, 985 .of_xlate = apple_dart_of_xlate, 986 .def_domain_type = apple_dart_def_domain_type, 987 .get_resv_regions = apple_dart_get_resv_regions, 988 .pgsize_bitmap = -1UL, /* Restricted during dart probe */ 989 .owner = THIS_MODULE, 990 .default_domain_ops = &(const struct iommu_domain_ops) { 991 .attach_dev = apple_dart_attach_dev_paging, 992 .map_pages = apple_dart_map_pages, 993 .unmap_pages = apple_dart_unmap_pages, 994 .flush_iotlb_all = apple_dart_flush_iotlb_all, 995 .iotlb_sync = apple_dart_iotlb_sync, 996 .iotlb_sync_map = apple_dart_iotlb_sync_map, 997 .iova_to_phys = apple_dart_iova_to_phys, 998 .free = apple_dart_domain_free, 999 } 1000 }; 1001 1002 static irqreturn_t apple_dart_t8020_irq(int irq, void *dev) 1003 { 1004 struct apple_dart *dart = dev; 1005 const char *fault_name = NULL; 1006 u32 error = readl(dart->regs + DART_T8020_ERROR); 1007 u32 error_code = FIELD_GET(DART_T8020_ERROR_CODE, error); 1008 u32 addr_lo = readl(dart->regs + DART_T8020_ERROR_ADDR_LO); 1009 u32 addr_hi = readl(dart->regs + DART_T8020_ERROR_ADDR_HI); 1010 u64 addr = addr_lo | (((u64)addr_hi) << 32); 1011 u8 stream_idx = FIELD_GET(DART_T8020_ERROR_STREAM, error); 1012 1013 if (!(error & DART_T8020_ERROR_FLAG)) 1014 return IRQ_NONE; 1015 1016 /* there should only be a single bit set but let's use == to be sure */ 1017 if (error_code == DART_T8020_ERROR_READ_FAULT) 1018 fault_name = "READ FAULT"; 1019 else if (error_code == DART_T8020_ERROR_WRITE_FAULT) 1020 fault_name = "WRITE FAULT"; 1021 else if (error_code == DART_T8020_ERROR_NO_PTE) 1022 fault_name = "NO PTE FOR IOVA"; 1023 else if (error_code == DART_T8020_ERROR_NO_PMD) 1024 fault_name = "NO PMD FOR IOVA"; 1025 else if (error_code == DART_T8020_ERROR_NO_TTBR) 1026 fault_name = "NO TTBR FOR IOVA"; 1027 else 1028 fault_name = "unknown"; 1029 1030 dev_err_ratelimited( 1031 dart->dev, 1032 "translation fault: status:0x%x stream:%d code:0x%x (%s) at 0x%llx", 1033 error, stream_idx, error_code, fault_name, addr); 1034 1035 writel(error, dart->regs + DART_T8020_ERROR); 1036 return IRQ_HANDLED; 1037 } 1038 1039 static irqreturn_t apple_dart_t8110_irq(int irq, void *dev) 1040 { 1041 struct apple_dart *dart = dev; 1042 const char *fault_name = NULL; 1043 u32 error = readl(dart->regs + DART_T8110_ERROR); 1044 u32 error_code = FIELD_GET(DART_T8110_ERROR_CODE, error); 1045 u32 addr_lo = readl(dart->regs + DART_T8110_ERROR_ADDR_LO); 1046 u32 addr_hi = readl(dart->regs + DART_T8110_ERROR_ADDR_HI); 1047 u64 addr = addr_lo | (((u64)addr_hi) << 32); 1048 u8 stream_idx = FIELD_GET(DART_T8110_ERROR_STREAM, error); 1049 1050 if (!(error & DART_T8110_ERROR_FLAG)) 1051 return IRQ_NONE; 1052 1053 /* there should only be a single bit set but let's use == to be sure */ 1054 if (error_code == DART_T8110_ERROR_READ_FAULT) 1055 fault_name = "READ FAULT"; 1056 else if (error_code == DART_T8110_ERROR_WRITE_FAULT) 1057 fault_name = "WRITE FAULT"; 1058 else if (error_code == DART_T8110_ERROR_NO_PTE) 1059 fault_name = "NO PTE FOR IOVA"; 1060 else if (error_code == DART_T8110_ERROR_NO_PMD) 1061 fault_name = "NO PMD FOR IOVA"; 1062 else if (error_code == DART_T8110_ERROR_NO_PGD) 1063 fault_name = "NO PGD FOR IOVA"; 1064 else if (error_code == DART_T8110_ERROR_NO_TTBR) 1065 fault_name = "NO TTBR FOR IOVA"; 1066 else 1067 fault_name = "unknown"; 1068 1069 dev_err_ratelimited( 1070 dart->dev, 1071 "translation fault: status:0x%x stream:%d code:0x%x (%s) at 0x%llx", 1072 error, stream_idx, error_code, fault_name, addr); 1073 1074 writel(error, dart->regs + DART_T8110_ERROR); 1075 return IRQ_HANDLED; 1076 } 1077 1078 static int apple_dart_probe(struct platform_device *pdev) 1079 { 1080 int ret; 1081 u32 dart_params[4]; 1082 struct resource *res; 1083 struct apple_dart *dart; 1084 struct device *dev = &pdev->dev; 1085 1086 dart = devm_kzalloc(dev, sizeof(*dart), GFP_KERNEL); 1087 if (!dart) 1088 return -ENOMEM; 1089 1090 dart->dev = dev; 1091 dart->hw = of_device_get_match_data(dev); 1092 spin_lock_init(&dart->lock); 1093 1094 dart->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 1095 if (IS_ERR(dart->regs)) 1096 return PTR_ERR(dart->regs); 1097 1098 if (resource_size(res) < 0x4000) { 1099 dev_err(dev, "MMIO region too small (%pr)\n", res); 1100 return -EINVAL; 1101 } 1102 1103 dart->irq = platform_get_irq(pdev, 0); 1104 if (dart->irq < 0) 1105 return -ENODEV; 1106 1107 ret = devm_clk_bulk_get_all(dev, &dart->clks); 1108 if (ret < 0) 1109 return ret; 1110 dart->num_clks = ret; 1111 1112 ret = clk_bulk_prepare_enable(dart->num_clks, dart->clks); 1113 if (ret) 1114 return ret; 1115 1116 dart_params[0] = readl(dart->regs + DART_PARAMS1); 1117 dart_params[1] = readl(dart->regs + DART_PARAMS2); 1118 dart->pgsize = 1 << FIELD_GET(DART_PARAMS1_PAGE_SHIFT, dart_params[0]); 1119 dart->supports_bypass = dart_params[1] & DART_PARAMS2_BYPASS_SUPPORT; 1120 1121 switch (dart->hw->type) { 1122 case DART_T8020: 1123 case DART_T6000: 1124 dart->ias = 32; 1125 dart->oas = dart->hw->oas; 1126 dart->num_streams = dart->hw->max_sid_count; 1127 break; 1128 1129 case DART_T8110: 1130 dart_params[2] = readl(dart->regs + DART_T8110_PARAMS3); 1131 dart_params[3] = readl(dart->regs + DART_T8110_PARAMS4); 1132 dart->ias = FIELD_GET(DART_T8110_PARAMS3_VA_WIDTH, dart_params[2]); 1133 dart->oas = FIELD_GET(DART_T8110_PARAMS3_PA_WIDTH, dart_params[2]); 1134 dart->num_streams = FIELD_GET(DART_T8110_PARAMS4_NUM_SIDS, dart_params[3]); 1135 break; 1136 } 1137 1138 if (dart->num_streams > DART_MAX_STREAMS) { 1139 dev_err(&pdev->dev, "Too many streams (%d > %d)\n", 1140 dart->num_streams, DART_MAX_STREAMS); 1141 ret = -EINVAL; 1142 goto err_clk_disable; 1143 } 1144 1145 ret = apple_dart_hw_reset(dart); 1146 if (ret) 1147 goto err_clk_disable; 1148 1149 ret = request_irq(dart->irq, dart->hw->irq_handler, IRQF_SHARED, 1150 "apple-dart fault handler", dart); 1151 if (ret) 1152 goto err_clk_disable; 1153 1154 platform_set_drvdata(pdev, dart); 1155 1156 ret = iommu_device_sysfs_add(&dart->iommu, dev, NULL, "apple-dart.%s", 1157 dev_name(&pdev->dev)); 1158 if (ret) 1159 goto err_free_irq; 1160 1161 ret = iommu_device_register(&dart->iommu, &apple_dart_iommu_ops, dev); 1162 if (ret) 1163 goto err_sysfs_remove; 1164 1165 dev_info( 1166 &pdev->dev, 1167 "DART [pagesize %x, %d streams, bypass support: %d, bypass forced: %d] initialized\n", 1168 dart->pgsize, dart->num_streams, dart->supports_bypass, 1169 dart->pgsize > PAGE_SIZE); 1170 return 0; 1171 1172 err_sysfs_remove: 1173 iommu_device_sysfs_remove(&dart->iommu); 1174 err_free_irq: 1175 free_irq(dart->irq, dart); 1176 err_clk_disable: 1177 clk_bulk_disable_unprepare(dart->num_clks, dart->clks); 1178 1179 return ret; 1180 } 1181 1182 static void apple_dart_remove(struct platform_device *pdev) 1183 { 1184 struct apple_dart *dart = platform_get_drvdata(pdev); 1185 1186 apple_dart_hw_reset(dart); 1187 free_irq(dart->irq, dart); 1188 1189 iommu_device_unregister(&dart->iommu); 1190 iommu_device_sysfs_remove(&dart->iommu); 1191 1192 clk_bulk_disable_unprepare(dart->num_clks, dart->clks); 1193 } 1194 1195 static const struct apple_dart_hw apple_dart_hw_t8103 = { 1196 .type = DART_T8020, 1197 .irq_handler = apple_dart_t8020_irq, 1198 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb, 1199 .oas = 36, 1200 .fmt = APPLE_DART, 1201 .max_sid_count = 16, 1202 1203 .enable_streams = DART_T8020_STREAMS_ENABLE, 1204 .lock = DART_T8020_CONFIG, 1205 .lock_bit = DART_T8020_CONFIG_LOCK, 1206 1207 .error = DART_T8020_ERROR, 1208 1209 .tcr = DART_T8020_TCR, 1210 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE, 1211 .tcr_disabled = 0, 1212 .tcr_bypass = DART_T8020_TCR_BYPASS_DAPF | DART_T8020_TCR_BYPASS_DART, 1213 1214 .ttbr = DART_T8020_TTBR, 1215 .ttbr_valid = DART_T8020_TTBR_VALID, 1216 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT, 1217 .ttbr_shift = DART_T8020_TTBR_SHIFT, 1218 .ttbr_count = 4, 1219 }; 1220 1221 static const struct apple_dart_hw apple_dart_hw_t8103_usb4 = { 1222 .type = DART_T8020, 1223 .irq_handler = apple_dart_t8020_irq, 1224 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb, 1225 .oas = 36, 1226 .fmt = APPLE_DART, 1227 .max_sid_count = 64, 1228 1229 .enable_streams = DART_T8020_STREAMS_ENABLE, 1230 .lock = DART_T8020_CONFIG, 1231 .lock_bit = DART_T8020_CONFIG_LOCK, 1232 1233 .error = DART_T8020_ERROR, 1234 1235 .tcr = DART_T8020_TCR, 1236 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE, 1237 .tcr_disabled = 0, 1238 .tcr_bypass = 0, 1239 1240 .ttbr = DART_T8020_USB4_TTBR, 1241 .ttbr_valid = DART_T8020_TTBR_VALID, 1242 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT, 1243 .ttbr_shift = DART_T8020_TTBR_SHIFT, 1244 .ttbr_count = 4, 1245 }; 1246 1247 static const struct apple_dart_hw apple_dart_hw_t6000 = { 1248 .type = DART_T6000, 1249 .irq_handler = apple_dart_t8020_irq, 1250 .invalidate_tlb = apple_dart_t8020_hw_invalidate_tlb, 1251 .oas = 42, 1252 .fmt = APPLE_DART2, 1253 .max_sid_count = 16, 1254 1255 .enable_streams = DART_T8020_STREAMS_ENABLE, 1256 .lock = DART_T8020_CONFIG, 1257 .lock_bit = DART_T8020_CONFIG_LOCK, 1258 1259 .error = DART_T8020_ERROR, 1260 1261 .tcr = DART_T8020_TCR, 1262 .tcr_enabled = DART_T8020_TCR_TRANSLATE_ENABLE, 1263 .tcr_disabled = 0, 1264 .tcr_bypass = DART_T8020_TCR_BYPASS_DAPF | DART_T8020_TCR_BYPASS_DART, 1265 1266 .ttbr = DART_T8020_TTBR, 1267 .ttbr_valid = DART_T8020_TTBR_VALID, 1268 .ttbr_addr_field_shift = DART_T8020_TTBR_ADDR_FIELD_SHIFT, 1269 .ttbr_shift = DART_T8020_TTBR_SHIFT, 1270 .ttbr_count = 4, 1271 }; 1272 1273 static const struct apple_dart_hw apple_dart_hw_t8110 = { 1274 .type = DART_T8110, 1275 .irq_handler = apple_dart_t8110_irq, 1276 .invalidate_tlb = apple_dart_t8110_hw_invalidate_tlb, 1277 .fmt = APPLE_DART2, 1278 .max_sid_count = 256, 1279 1280 .enable_streams = DART_T8110_ENABLE_STREAMS, 1281 .lock = DART_T8110_PROTECT, 1282 .lock_bit = DART_T8110_PROTECT_TTBR_TCR, 1283 1284 .error = DART_T8110_ERROR, 1285 1286 .tcr = DART_T8110_TCR, 1287 .tcr_enabled = DART_T8110_TCR_TRANSLATE_ENABLE, 1288 .tcr_disabled = 0, 1289 .tcr_bypass = DART_T8110_TCR_BYPASS_DAPF | DART_T8110_TCR_BYPASS_DART, 1290 1291 .ttbr = DART_T8110_TTBR, 1292 .ttbr_valid = DART_T8110_TTBR_VALID, 1293 .ttbr_addr_field_shift = DART_T8110_TTBR_ADDR_FIELD_SHIFT, 1294 .ttbr_shift = DART_T8110_TTBR_SHIFT, 1295 .ttbr_count = 1, 1296 }; 1297 1298 static __maybe_unused int apple_dart_suspend(struct device *dev) 1299 { 1300 struct apple_dart *dart = dev_get_drvdata(dev); 1301 unsigned int sid, idx; 1302 1303 for (sid = 0; sid < dart->num_streams; sid++) { 1304 dart->save_tcr[sid] = readl(dart->regs + DART_TCR(dart, sid)); 1305 for (idx = 0; idx < dart->hw->ttbr_count; idx++) 1306 dart->save_ttbr[sid][idx] = 1307 readl(dart->regs + DART_TTBR(dart, sid, idx)); 1308 } 1309 1310 return 0; 1311 } 1312 1313 static __maybe_unused int apple_dart_resume(struct device *dev) 1314 { 1315 struct apple_dart *dart = dev_get_drvdata(dev); 1316 unsigned int sid, idx; 1317 int ret; 1318 1319 ret = apple_dart_hw_reset(dart); 1320 if (ret) { 1321 dev_err(dev, "Failed to reset DART on resume\n"); 1322 return ret; 1323 } 1324 1325 for (sid = 0; sid < dart->num_streams; sid++) { 1326 for (idx = 0; idx < dart->hw->ttbr_count; idx++) 1327 writel(dart->save_ttbr[sid][idx], 1328 dart->regs + DART_TTBR(dart, sid, idx)); 1329 writel(dart->save_tcr[sid], dart->regs + DART_TCR(dart, sid)); 1330 } 1331 1332 return 0; 1333 } 1334 1335 static DEFINE_SIMPLE_DEV_PM_OPS(apple_dart_pm_ops, apple_dart_suspend, apple_dart_resume); 1336 1337 static const struct of_device_id apple_dart_of_match[] = { 1338 { .compatible = "apple,t8103-dart", .data = &apple_dart_hw_t8103 }, 1339 { .compatible = "apple,t8103-usb4-dart", .data = &apple_dart_hw_t8103_usb4 }, 1340 { .compatible = "apple,t8110-dart", .data = &apple_dart_hw_t8110 }, 1341 { .compatible = "apple,t6000-dart", .data = &apple_dart_hw_t6000 }, 1342 {}, 1343 }; 1344 MODULE_DEVICE_TABLE(of, apple_dart_of_match); 1345 1346 static struct platform_driver apple_dart_driver = { 1347 .driver = { 1348 .name = "apple-dart", 1349 .of_match_table = apple_dart_of_match, 1350 .suppress_bind_attrs = true, 1351 .pm = pm_sleep_ptr(&apple_dart_pm_ops), 1352 }, 1353 .probe = apple_dart_probe, 1354 .remove_new = apple_dart_remove, 1355 }; 1356 1357 module_platform_driver(apple_dart_driver); 1358 1359 MODULE_DESCRIPTION("IOMMU API for Apple's DART"); 1360 MODULE_AUTHOR("Sven Peter <sven@svenpeter.dev>"); 1361 MODULE_LICENSE("GPL v2"); 1362