17d8b06ecSSuravee Suthikulpanit /* SPDX-License-Identifier: GPL-2.0-only */ 27d8b06ecSSuravee Suthikulpanit /* 37d8b06ecSSuravee Suthikulpanit * Copyright (C) 2025 Advanced Micro Devices, Inc. 47d8b06ecSSuravee Suthikulpanit */ 57d8b06ecSSuravee Suthikulpanit 67d8b06ecSSuravee Suthikulpanit #ifndef AMD_IOMMUFD_H 77d8b06ecSSuravee Suthikulpanit #define AMD_IOMMUFD_H 87d8b06ecSSuravee Suthikulpanit 97d8b06ecSSuravee Suthikulpanit #if IS_ENABLED(CONFIG_AMD_IOMMU_IOMMUFD) 10*5b0530bbSNathan Chancellor void *amd_iommufd_hw_info(struct device *dev, u32 *length, enum iommu_hw_info_type *type); 11e113a725SSuravee Suthikulpanit size_t amd_iommufd_get_viommu_size(struct device *dev, enum iommu_viommu_type viommu_type); 12e113a725SSuravee Suthikulpanit int amd_iommufd_viommu_init(struct iommufd_viommu *viommu, struct iommu_domain *parent, 13e113a725SSuravee Suthikulpanit const struct iommu_user_data *user_data); 147d8b06ecSSuravee Suthikulpanit #else 157d8b06ecSSuravee Suthikulpanit #define amd_iommufd_hw_info NULL 16e113a725SSuravee Suthikulpanit #define amd_iommufd_viommu_init NULL 17e113a725SSuravee Suthikulpanit #define amd_iommufd_get_viommu_size NULL 187d8b06ecSSuravee Suthikulpanit #endif /* CONFIG_AMD_IOMMU_IOMMUFD */ 197d8b06ecSSuravee Suthikulpanit 207d8b06ecSSuravee Suthikulpanit #endif /* AMD_IOMMUFD_H */ 21