1ab493a0fSOhad Ben-Cohen# IOMMU_API always gets selected by whoever wants it. 2ab493a0fSOhad Ben-Cohenconfig IOMMU_API 3ab493a0fSOhad Ben-Cohen bool 4b10f127eSOhad Ben-Cohen 568255b62SJoerg Roedelmenuconfig IOMMU_SUPPORT 668255b62SJoerg Roedel bool "IOMMU Hardware Support" 7e5144c93SArnd Bergmann depends on MMU 868255b62SJoerg Roedel default y 968255b62SJoerg Roedel ---help--- 1068255b62SJoerg Roedel Say Y here if you want to compile device drivers for IO Memory 1168255b62SJoerg Roedel Management Units into the kernel. These devices usually allow to 1268255b62SJoerg Roedel remap DMA requests and/or remap interrupts from other devices on the 1368255b62SJoerg Roedel system. 1468255b62SJoerg Roedel 1568255b62SJoerg Roedelif IOMMU_SUPPORT 1668255b62SJoerg Roedel 17fdb1d7beSWill Deaconmenu "Generic IOMMU Pagetable Support" 18fdb1d7beSWill Deacon 19fdb1d7beSWill Deacon# Selected by the actual pagetable implementations 20fdb1d7beSWill Deaconconfig IOMMU_IO_PGTABLE 21fdb1d7beSWill Deacon bool 22fdb1d7beSWill Deacon 23e1d3c0fdSWill Deaconconfig IOMMU_IO_PGTABLE_LPAE 24e1d3c0fdSWill Deacon bool "ARMv7/v8 Long Descriptor Format" 25e1d3c0fdSWill Deacon select IOMMU_IO_PGTABLE 26ffcb6d16SRobin Murphy depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST) 27e1d3c0fdSWill Deacon help 28e1d3c0fdSWill Deacon Enable support for the ARM long descriptor pagetable format. 29e1d3c0fdSWill Deacon This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page 30e1d3c0fdSWill Deacon sizes at both stage-1 and stage-2, as well as address spaces 31e1d3c0fdSWill Deacon up to 48-bits in size. 32e1d3c0fdSWill Deacon 33fe4b991dSWill Deaconconfig IOMMU_IO_PGTABLE_LPAE_SELFTEST 34fe4b991dSWill Deacon bool "LPAE selftests" 35fe4b991dSWill Deacon depends on IOMMU_IO_PGTABLE_LPAE 36fe4b991dSWill Deacon help 37fe4b991dSWill Deacon Enable self-tests for LPAE page table allocator. This performs 38fe4b991dSWill Deacon a series of page-table consistency checks during boot. 39fe4b991dSWill Deacon 40fe4b991dSWill Deacon If unsure, say N here. 41fe4b991dSWill Deacon 42*e5fc9753SRobin Murphyconfig IOMMU_IO_PGTABLE_ARMV7S 43*e5fc9753SRobin Murphy bool "ARMv7/v8 Short Descriptor Format" 44*e5fc9753SRobin Murphy select IOMMU_IO_PGTABLE 45*e5fc9753SRobin Murphy depends on HAS_DMA && (ARM || ARM64 || COMPILE_TEST) 46*e5fc9753SRobin Murphy help 47*e5fc9753SRobin Murphy Enable support for the ARM Short-descriptor pagetable format. 48*e5fc9753SRobin Murphy This supports 32-bit virtual and physical addresses mapped using 49*e5fc9753SRobin Murphy 2-level tables with 4KB pages/1MB sections, and contiguous entries 50*e5fc9753SRobin Murphy for 64KB pages/16MB supersections if indicated by the IOMMU driver. 51*e5fc9753SRobin Murphy 52*e5fc9753SRobin Murphyconfig IOMMU_IO_PGTABLE_ARMV7S_SELFTEST 53*e5fc9753SRobin Murphy bool "ARMv7s selftests" 54*e5fc9753SRobin Murphy depends on IOMMU_IO_PGTABLE_ARMV7S 55*e5fc9753SRobin Murphy help 56*e5fc9753SRobin Murphy Enable self-tests for ARMv7s page table allocator. This performs 57*e5fc9753SRobin Murphy a series of page-table consistency checks during boot. 58*e5fc9753SRobin Murphy 59*e5fc9753SRobin Murphy If unsure, say N here. 60*e5fc9753SRobin Murphy 61fdb1d7beSWill Deaconendmenu 62fdb1d7beSWill Deacon 63114150d8SRobin Murphyconfig IOMMU_IOVA 6415bbdec3SSakari Ailus tristate 65114150d8SRobin Murphy 664e0ee78fSHiroshi Doyuconfig OF_IOMMU 674e0ee78fSHiroshi Doyu def_bool y 687eba1d51SWill Deacon depends on OF && IOMMU_API 694e0ee78fSHiroshi Doyu 700db2e5d1SRobin Murphy# IOMMU-agnostic DMA-mapping layer 710db2e5d1SRobin Murphyconfig IOMMU_DMA 720db2e5d1SRobin Murphy bool 730db2e5d1SRobin Murphy depends on NEED_SG_DMA_LENGTH 740db2e5d1SRobin Murphy select IOMMU_API 750db2e5d1SRobin Murphy select IOMMU_IOVA 760db2e5d1SRobin Murphy 77695093e3SVarun Sethiconfig FSL_PAMU 78695093e3SVarun Sethi bool "Freescale IOMMU support" 79477ab7a1SJoerg Roedel depends on PPC32 80477ab7a1SJoerg Roedel depends on PPC_E500MC || COMPILE_TEST 81695093e3SVarun Sethi select IOMMU_API 82695093e3SVarun Sethi select GENERIC_ALLOCATOR 83695093e3SVarun Sethi help 84695093e3SVarun Sethi Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms. 85695093e3SVarun Sethi PAMU can authorize memory access, remap the memory address, and remap I/O 86695093e3SVarun Sethi transaction types. 87695093e3SVarun Sethi 88b10f127eSOhad Ben-Cohen# MSM IOMMU support 89b10f127eSOhad Ben-Cohenconfig MSM_IOMMU 90b10f127eSOhad Ben-Cohen bool "MSM IOMMU Support" 91477ab7a1SJoerg Roedel depends on ARM 92477ab7a1SJoerg Roedel depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST 93a3f447a4SThierry Reding depends on BROKEN 94b10f127eSOhad Ben-Cohen select IOMMU_API 95b10f127eSOhad Ben-Cohen help 96b10f127eSOhad Ben-Cohen Support for the IOMMUs found on certain Qualcomm SOCs. 97b10f127eSOhad Ben-Cohen These IOMMUs allow virtualization of the address space used by most 98b10f127eSOhad Ben-Cohen cores within the multimedia subsystem. 99b10f127eSOhad Ben-Cohen 100b10f127eSOhad Ben-Cohen If unsure, say N here. 101b10f127eSOhad Ben-Cohen 102b10f127eSOhad Ben-Cohenconfig IOMMU_PGTABLES_L2 103b10f127eSOhad Ben-Cohen def_bool y 104b10f127eSOhad Ben-Cohen depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n 10529b68415SOhad Ben-Cohen 10629b68415SOhad Ben-Cohen# AMD IOMMU support 10729b68415SOhad Ben-Cohenconfig AMD_IOMMU 10829b68415SOhad Ben-Cohen bool "AMD IOMMU support" 10929b68415SOhad Ben-Cohen select SWIOTLB 11029b68415SOhad Ben-Cohen select PCI_MSI 11152815b75SJoerg Roedel select PCI_ATS 11252815b75SJoerg Roedel select PCI_PRI 11352815b75SJoerg Roedel select PCI_PASID 11429b68415SOhad Ben-Cohen select IOMMU_API 1150dbc6078SThomas Petazzoni depends on X86_64 && PCI && ACPI 11629b68415SOhad Ben-Cohen ---help--- 11729b68415SOhad Ben-Cohen With this option you can enable support for AMD IOMMU hardware in 11829b68415SOhad Ben-Cohen your system. An IOMMU is a hardware component which provides 11929b68415SOhad Ben-Cohen remapping of DMA memory accesses from devices. With an AMD IOMMU you 12059bf8964SMasanari Iida can isolate the DMA memory of different devices and protect the 12129b68415SOhad Ben-Cohen system from misbehaving device drivers or hardware. 12229b68415SOhad Ben-Cohen 12329b68415SOhad Ben-Cohen You can find out if your system has an AMD IOMMU if you look into 12429b68415SOhad Ben-Cohen your BIOS for an option to enable it or if you have an IVRS ACPI 12529b68415SOhad Ben-Cohen table. 12629b68415SOhad Ben-Cohen 12729b68415SOhad Ben-Cohenconfig AMD_IOMMU_STATS 12829b68415SOhad Ben-Cohen bool "Export AMD IOMMU statistics to debugfs" 12929b68415SOhad Ben-Cohen depends on AMD_IOMMU 13029b68415SOhad Ben-Cohen select DEBUG_FS 13129b68415SOhad Ben-Cohen ---help--- 13229b68415SOhad Ben-Cohen This option enables code in the AMD IOMMU driver to collect various 13329b68415SOhad Ben-Cohen statistics about whats happening in the driver and exports that 13429b68415SOhad Ben-Cohen information to userspace via debugfs. 13529b68415SOhad Ben-Cohen If unsure, say N. 136166e9278SOhad Ben-Cohen 137e3c495c7SJoerg Roedelconfig AMD_IOMMU_V2 138a446e219SKees Cook tristate "AMD IOMMU Version 2 driver" 139e5cac32cSBorislav Petkov depends on AMD_IOMMU 1408736b2c3SJoerg Roedel select MMU_NOTIFIER 141e3c495c7SJoerg Roedel ---help--- 142e3c495c7SJoerg Roedel This option enables support for the AMD IOMMUv2 features of the IOMMU 143e3c495c7SJoerg Roedel hardware. Select this option if you want to use devices that support 14459bf8964SMasanari Iida the PCI PRI and PASID interface. 145e3c495c7SJoerg Roedel 146166e9278SOhad Ben-Cohen# Intel IOMMU support 147d3f13810SSuresh Siddhaconfig DMAR_TABLE 148d3f13810SSuresh Siddha bool 149d3f13810SSuresh Siddha 150d3f13810SSuresh Siddhaconfig INTEL_IOMMU 151d3f13810SSuresh Siddha bool "Support for Intel IOMMU using DMA Remapping Devices" 152166e9278SOhad Ben-Cohen depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) 153166e9278SOhad Ben-Cohen select IOMMU_API 154114150d8SRobin Murphy select IOMMU_IOVA 155d3f13810SSuresh Siddha select DMAR_TABLE 156166e9278SOhad Ben-Cohen help 157166e9278SOhad Ben-Cohen DMA remapping (DMAR) devices support enables independent address 158166e9278SOhad Ben-Cohen translations for Direct Memory Access (DMA) from devices. 159166e9278SOhad Ben-Cohen These DMA remapping devices are reported via ACPI tables 160166e9278SOhad Ben-Cohen and include PCI device scope covered by these DMA 161166e9278SOhad Ben-Cohen remapping devices. 162166e9278SOhad Ben-Cohen 1638a94ade4SDavid Woodhouseconfig INTEL_IOMMU_SVM 1648a94ade4SDavid Woodhouse bool "Support for Shared Virtual Memory with Intel IOMMU" 1658a94ade4SDavid Woodhouse depends on INTEL_IOMMU && X86 166b16d0cb9SDavid Woodhouse select PCI_PASID 1672f26e0a9SDavid Woodhouse select MMU_NOTIFIER 1688a94ade4SDavid Woodhouse help 1698a94ade4SDavid Woodhouse Shared Virtual Memory (SVM) provides a facility for devices 1708a94ade4SDavid Woodhouse to access DMA resources through process address space by 1718a94ade4SDavid Woodhouse means of a Process Address Space ID (PASID). 1728a94ade4SDavid Woodhouse 173d3f13810SSuresh Siddhaconfig INTEL_IOMMU_DEFAULT_ON 174166e9278SOhad Ben-Cohen def_bool y 175d3f13810SSuresh Siddha prompt "Enable Intel DMA Remapping Devices by default" 176d3f13810SSuresh Siddha depends on INTEL_IOMMU 177166e9278SOhad Ben-Cohen help 178166e9278SOhad Ben-Cohen Selecting this option will enable a DMAR device at boot time if 179166e9278SOhad Ben-Cohen one is found. If this option is not selected, DMAR support can 180166e9278SOhad Ben-Cohen be enabled by passing intel_iommu=on to the kernel. 181166e9278SOhad Ben-Cohen 182d3f13810SSuresh Siddhaconfig INTEL_IOMMU_BROKEN_GFX_WA 183166e9278SOhad Ben-Cohen bool "Workaround broken graphics drivers (going away soon)" 184d3f13810SSuresh Siddha depends on INTEL_IOMMU && BROKEN && X86 185166e9278SOhad Ben-Cohen ---help--- 186166e9278SOhad Ben-Cohen Current Graphics drivers tend to use physical address 187166e9278SOhad Ben-Cohen for DMA and avoid using DMA APIs. Setting this config 188166e9278SOhad Ben-Cohen option permits the IOMMU driver to set a unity map for 189166e9278SOhad Ben-Cohen all the OS-visible memory. Hence the driver can continue 190166e9278SOhad Ben-Cohen to use physical addresses for DMA, at least until this 191166e9278SOhad Ben-Cohen option is removed in the 2.6.32 kernel. 192166e9278SOhad Ben-Cohen 193d3f13810SSuresh Siddhaconfig INTEL_IOMMU_FLOPPY_WA 194166e9278SOhad Ben-Cohen def_bool y 195d3f13810SSuresh Siddha depends on INTEL_IOMMU && X86 196166e9278SOhad Ben-Cohen ---help--- 197166e9278SOhad Ben-Cohen Floppy disk drivers are known to bypass DMA API calls 198166e9278SOhad Ben-Cohen thereby failing to work when IOMMU is enabled. This 199166e9278SOhad Ben-Cohen workaround will setup a 1:1 mapping for the first 200166e9278SOhad Ben-Cohen 16MiB to make floppy (an ISA device) work. 201166e9278SOhad Ben-Cohen 202d3f13810SSuresh Siddhaconfig IRQ_REMAP 203a446e219SKees Cook bool "Support for Interrupt Remapping" 204a446e219SKees Cook depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI 205d3f13810SSuresh Siddha select DMAR_TABLE 206166e9278SOhad Ben-Cohen ---help--- 207166e9278SOhad Ben-Cohen Supports Interrupt remapping for IO-APIC and MSI devices. 208166e9278SOhad Ben-Cohen To use x2apic mode in the CPU's which support x2APIC enhancements or 209166e9278SOhad Ben-Cohen to support platforms with CPU's having > 8 bit APIC ID, say Y. 21068255b62SJoerg Roedel 211fcf3a6efSOhad Ben-Cohen# OMAP IOMMU support 212fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU 213fcf3a6efSOhad Ben-Cohen bool "OMAP IOMMU Support" 214477ab7a1SJoerg Roedel depends on ARM && MMU 215477ab7a1SJoerg Roedel depends on ARCH_OMAP2PLUS || COMPILE_TEST 216fcf3a6efSOhad Ben-Cohen select IOMMU_API 21706b718c0SGerd Hoffmann ---help--- 21806b718c0SGerd Hoffmann The OMAP3 media platform drivers depend on iommu support, 21906b718c0SGerd Hoffmann if you need them say Y here. 220fcf3a6efSOhad Ben-Cohen 221fcf3a6efSOhad Ben-Cohenconfig OMAP_IOMMU_DEBUG 22261c75352SSuman Anna bool "Export OMAP IOMMU internals in DebugFS" 223baaa7b5dSLaurent Pinchart depends on OMAP_IOMMU && DEBUG_FS 22461c75352SSuman Anna ---help--- 225fcf3a6efSOhad Ben-Cohen Select this to see extensive information about 226baaa7b5dSLaurent Pinchart the internal state of OMAP IOMMU in debugfs. 227fcf3a6efSOhad Ben-Cohen 228fcf3a6efSOhad Ben-Cohen Say N unless you know you need this. 229fcf3a6efSOhad Ben-Cohen 230c68a2921SDaniel Kurtzconfig ROCKCHIP_IOMMU 231c68a2921SDaniel Kurtz bool "Rockchip IOMMU Support" 23211175886SJoerg Roedel depends on ARM 23311175886SJoerg Roedel depends on ARCH_ROCKCHIP || COMPILE_TEST 234c68a2921SDaniel Kurtz select IOMMU_API 235c68a2921SDaniel Kurtz select ARM_DMA_USE_IOMMU 236c68a2921SDaniel Kurtz help 237c68a2921SDaniel Kurtz Support for IOMMUs found on Rockchip rk32xx SOCs. 238c68a2921SDaniel Kurtz These IOMMUs allow virtualization of the address space used by most 239c68a2921SDaniel Kurtz cores within the multimedia subsystem. 240c68a2921SDaniel Kurtz Say Y here if you are using a Rockchip SoC that includes an IOMMU 241c68a2921SDaniel Kurtz device. 242c68a2921SDaniel Kurtz 243d53e54b4SHiroshi DOYUconfig TEGRA_IOMMU_GART 244d53e54b4SHiroshi DOYU bool "Tegra GART IOMMU Support" 245d53e54b4SHiroshi DOYU depends on ARCH_TEGRA_2x_SOC 246d53e54b4SHiroshi DOYU select IOMMU_API 247d53e54b4SHiroshi DOYU help 248d53e54b4SHiroshi DOYU Enables support for remapping discontiguous physical memory 249d53e54b4SHiroshi DOYU shared with the operating system into contiguous I/O virtual 250d53e54b4SHiroshi DOYU space through the GART (Graphics Address Relocation Table) 251d53e54b4SHiroshi DOYU hardware included on Tegra SoCs. 252d53e54b4SHiroshi DOYU 2537a31f6f4SHiroshi DOYUconfig TEGRA_IOMMU_SMMU 25489184651SThierry Reding bool "NVIDIA Tegra SMMU Support" 25589184651SThierry Reding depends on ARCH_TEGRA 25689184651SThierry Reding depends on TEGRA_AHB 25789184651SThierry Reding depends on TEGRA_MC 2587a31f6f4SHiroshi DOYU select IOMMU_API 2597a31f6f4SHiroshi DOYU help 26089184651SThierry Reding This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra 261588c43a7SThierry Reding SoCs (Tegra30 up to Tegra210). 2627a31f6f4SHiroshi DOYU 2632a96536eSKyongHo Choconfig EXYNOS_IOMMU 2642a96536eSKyongHo Cho bool "Exynos IOMMU Support" 265e5144c93SArnd Bergmann depends on ARCH_EXYNOS && ARM && MMU 2662a96536eSKyongHo Cho select IOMMU_API 2674802c1d0STushar Behera select ARM_DMA_USE_IOMMU 2682a96536eSKyongHo Cho help 2692a96536eSKyongHo Cho Support for the IOMMU (System MMU) of Samsung Exynos application 2705455d700SSachin Kamat processor family. This enables H/W multimedia accelerators to see 2715455d700SSachin Kamat non-linear physical memory chunks as linear memory in their 2725455d700SSachin Kamat address space. 2732a96536eSKyongHo Cho 2742a96536eSKyongHo Cho If unsure, say N here. 2752a96536eSKyongHo Cho 2762a96536eSKyongHo Choconfig EXYNOS_IOMMU_DEBUG 2772a96536eSKyongHo Cho bool "Debugging log for Exynos IOMMU" 2782a96536eSKyongHo Cho depends on EXYNOS_IOMMU 2792a96536eSKyongHo Cho help 2802a96536eSKyongHo Cho Select this to see the detailed log message that shows what 2815455d700SSachin Kamat happens in the IOMMU driver. 2822a96536eSKyongHo Cho 2835455d700SSachin Kamat Say N unless you need kernel log message for IOMMU debugging. 2842a96536eSKyongHo Cho 285d25a2a16SLaurent Pinchartconfig IPMMU_VMSA 286d25a2a16SLaurent Pinchart bool "Renesas VMSA-compatible IPMMU" 287d25a2a16SLaurent Pinchart depends on ARM_LPAE 288d25a2a16SLaurent Pinchart depends on ARCH_SHMOBILE || COMPILE_TEST 289d25a2a16SLaurent Pinchart select IOMMU_API 290f20ed39fSLaurent Pinchart select IOMMU_IO_PGTABLE_LPAE 291d25a2a16SLaurent Pinchart select ARM_DMA_USE_IOMMU 292d25a2a16SLaurent Pinchart help 293d25a2a16SLaurent Pinchart Support for the Renesas VMSA-compatible IPMMU Renesas found in the 294d25a2a16SLaurent Pinchart R-Mobile APE6 and R-Car H2/M2 SoCs. 295d25a2a16SLaurent Pinchart 296d25a2a16SLaurent Pinchart If unsure, say N. 297d25a2a16SLaurent Pinchart 2984e13c1acSAlexey Kardashevskiyconfig SPAPR_TCE_IOMMU 2994e13c1acSAlexey Kardashevskiy bool "sPAPR TCE IOMMU Support" 3005b25199eSAlexey Kardashevskiy depends on PPC_POWERNV || PPC_PSERIES 3014e13c1acSAlexey Kardashevskiy select IOMMU_API 3024e13c1acSAlexey Kardashevskiy help 3034e13c1acSAlexey Kardashevskiy Enables bits of IOMMU API required by VFIO. The iommu_ops 3044e13c1acSAlexey Kardashevskiy is not implemented as it is not necessary for VFIO. 3054e13c1acSAlexey Kardashevskiy 30648ec83bcSWill Deacon# ARM IOMMU support 30745ae7cffSWill Deaconconfig ARM_SMMU 30845ae7cffSWill Deacon bool "ARM Ltd. System MMU (SMMU) Support" 309a20cc76bSJoerg Roedel depends on (ARM64 || ARM) && MMU 31045ae7cffSWill Deacon select IOMMU_API 311518f7136SWill Deacon select IOMMU_IO_PGTABLE_LPAE 31245ae7cffSWill Deacon select ARM_DMA_USE_IOMMU if ARM 31345ae7cffSWill Deacon help 31445ae7cffSWill Deacon Support for implementations of the ARM System MMU architecture 315518f7136SWill Deacon versions 1 and 2. 31645ae7cffSWill Deacon 31745ae7cffSWill Deacon Say Y here if your SoC includes an IOMMU device implementing 31845ae7cffSWill Deacon the ARM SMMU architecture. 31945ae7cffSWill Deacon 32048ec83bcSWill Deaconconfig ARM_SMMU_V3 32148ec83bcSWill Deacon bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" 32248ec83bcSWill Deacon depends on ARM64 && PCI 32348ec83bcSWill Deacon select IOMMU_API 32448ec83bcSWill Deacon select IOMMU_IO_PGTABLE_LPAE 325166bdbd2SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 32648ec83bcSWill Deacon help 32748ec83bcSWill Deacon Support for implementations of the ARM System MMU architecture 32848ec83bcSWill Deacon version 3 providing translation support to a PCIe root complex. 32948ec83bcSWill Deacon 33048ec83bcSWill Deacon Say Y here if your system includes an IOMMU device implementing 33148ec83bcSWill Deacon the ARM SMMUv3 architecture. 33248ec83bcSWill Deacon 3338128f23cSGerald Schaeferconfig S390_IOMMU 3348128f23cSGerald Schaefer def_bool y if S390 && PCI 3358128f23cSGerald Schaefer depends on S390 && PCI 3368128f23cSGerald Schaefer select IOMMU_API 3378128f23cSGerald Schaefer help 3388128f23cSGerald Schaefer Support for the IOMMU API for s390 PCI devices. 3398128f23cSGerald Schaefer 34068255b62SJoerg Roedelendif # IOMMU_SUPPORT 341