xref: /linux/drivers/interconnect/qcom/sm8450.h (revision 03ab8e6297acd1bc0eedaa050e2a1635c576fd11)
1*fafc114aSVinod Koul /* SPDX-License-Identifier: GPL-2.0-only */
2*fafc114aSVinod Koul /*
3*fafc114aSVinod Koul  * SM8450 interconnect IDs
4*fafc114aSVinod Koul  *
5*fafc114aSVinod Koul  * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
6*fafc114aSVinod Koul  * Copyright (c) 2021, Linaro Limited
7*fafc114aSVinod Koul  */
8*fafc114aSVinod Koul 
9*fafc114aSVinod Koul #ifndef __DRIVERS_INTERCONNECT_QCOM_SM8450_H
10*fafc114aSVinod Koul #define __DRIVERS_INTERCONNECT_QCOM_SM8450_H
11*fafc114aSVinod Koul 
12*fafc114aSVinod Koul #define SM8450_MASTER_GPU_TCU				0
13*fafc114aSVinod Koul #define SM8450_MASTER_SYS_TCU				1
14*fafc114aSVinod Koul #define SM8450_MASTER_APPSS_PROC			2
15*fafc114aSVinod Koul #define SM8450_MASTER_LLCC				3
16*fafc114aSVinod Koul #define SM8450_MASTER_CNOC_LPASS_AG_NOC			4
17*fafc114aSVinod Koul #define SM8450_MASTER_GIC_AHB				5
18*fafc114aSVinod Koul #define SM8450_MASTER_CDSP_NOC_CFG			6
19*fafc114aSVinod Koul #define SM8450_MASTER_QDSS_BAM				7
20*fafc114aSVinod Koul #define SM8450_MASTER_QSPI_0				8
21*fafc114aSVinod Koul #define SM8450_MASTER_QUP_0				9
22*fafc114aSVinod Koul #define SM8450_MASTER_QUP_1				10
23*fafc114aSVinod Koul #define SM8450_MASTER_QUP_2				11
24*fafc114aSVinod Koul #define SM8450_MASTER_A1NOC_CFG				12
25*fafc114aSVinod Koul #define SM8450_MASTER_A2NOC_CFG				13
26*fafc114aSVinod Koul #define SM8450_MASTER_A1NOC_SNOC			14
27*fafc114aSVinod Koul #define SM8450_MASTER_A2NOC_SNOC			15
28*fafc114aSVinod Koul #define SM8450_MASTER_CAMNOC_HF				16
29*fafc114aSVinod Koul #define SM8450_MASTER_CAMNOC_ICP			17
30*fafc114aSVinod Koul #define SM8450_MASTER_CAMNOC_SF				18
31*fafc114aSVinod Koul #define SM8450_MASTER_GEM_NOC_CNOC			19
32*fafc114aSVinod Koul #define SM8450_MASTER_GEM_NOC_PCIE_SNOC			20
33*fafc114aSVinod Koul #define SM8450_MASTER_GFX3D				21
34*fafc114aSVinod Koul #define SM8450_MASTER_LPASS_ANOC			22
35*fafc114aSVinod Koul #define SM8450_MASTER_MDP				23
36*fafc114aSVinod Koul #define SM8450_MASTER_MDP0				SM8450_MASTER_MDP
37*fafc114aSVinod Koul #define SM8450_MASTER_MDP1				SM8450_MASTER_MDP
38*fafc114aSVinod Koul #define SM8450_MASTER_MSS_PROC				24
39*fafc114aSVinod Koul #define SM8450_MASTER_CNOC_MNOC_CFG			25
40*fafc114aSVinod Koul #define SM8450_MASTER_MNOC_HF_MEM_NOC			26
41*fafc114aSVinod Koul #define SM8450_MASTER_MNOC_SF_MEM_NOC			27
42*fafc114aSVinod Koul #define SM8450_MASTER_COMPUTE_NOC			28
43*fafc114aSVinod Koul #define SM8450_MASTER_ANOC_PCIE_GEM_NOC			29
44*fafc114aSVinod Koul #define SM8450_MASTER_PCIE_ANOC_CFG			30
45*fafc114aSVinod Koul #define SM8450_MASTER_ROTATOR				31
46*fafc114aSVinod Koul #define SM8450_MASTER_SNOC_CFG				32
47*fafc114aSVinod Koul #define SM8450_MASTER_SNOC_GC_MEM_NOC			33
48*fafc114aSVinod Koul #define SM8450_MASTER_SNOC_SF_MEM_NOC			34
49*fafc114aSVinod Koul #define SM8450_MASTER_CDSP_HCP				35
50*fafc114aSVinod Koul #define SM8450_MASTER_VIDEO				36
51*fafc114aSVinod Koul #define SM8450_MASTER_VIDEO_P0				SM8450_MASTER_VIDEO
52*fafc114aSVinod Koul #define SM8450_MASTER_VIDEO_P1				SM8450_MASTER_VIDEO
53*fafc114aSVinod Koul #define SM8450_MASTER_VIDEO_CV_PROC			37
54*fafc114aSVinod Koul #define SM8450_MASTER_VIDEO_PROC			38
55*fafc114aSVinod Koul #define SM8450_MASTER_VIDEO_V_PROC			39
56*fafc114aSVinod Koul #define SM8450_MASTER_QUP_CORE_0			40
57*fafc114aSVinod Koul #define SM8450_MASTER_QUP_CORE_1			41
58*fafc114aSVinod Koul #define SM8450_MASTER_QUP_CORE_2			42
59*fafc114aSVinod Koul #define SM8450_MASTER_CRYPTO				43
60*fafc114aSVinod Koul #define SM8450_MASTER_IPA				44
61*fafc114aSVinod Koul #define SM8450_MASTER_LPASS_PROC			45
62*fafc114aSVinod Koul #define SM8450_MASTER_CDSP_PROC				46
63*fafc114aSVinod Koul #define SM8450_MASTER_PIMEM				47
64*fafc114aSVinod Koul #define SM8450_MASTER_SENSORS_PROC			48
65*fafc114aSVinod Koul #define SM8450_MASTER_SP				49
66*fafc114aSVinod Koul #define SM8450_MASTER_GIC				50
67*fafc114aSVinod Koul #define SM8450_MASTER_PCIE_0				51
68*fafc114aSVinod Koul #define SM8450_MASTER_PCIE_1				52
69*fafc114aSVinod Koul #define SM8450_MASTER_QDSS_ETR				53
70*fafc114aSVinod Koul #define SM8450_MASTER_QDSS_ETR_1			54
71*fafc114aSVinod Koul #define SM8450_MASTER_SDCC_2				55
72*fafc114aSVinod Koul #define SM8450_MASTER_SDCC_4				56
73*fafc114aSVinod Koul #define SM8450_MASTER_UFS_MEM				57
74*fafc114aSVinod Koul #define SM8450_MASTER_USB3_0				58
75*fafc114aSVinod Koul #define SM8450_SLAVE_EBI1				512
76*fafc114aSVinod Koul #define SM8450_SLAVE_AHB2PHY_SOUTH			513
77*fafc114aSVinod Koul #define SM8450_SLAVE_AHB2PHY_NORTH			514
78*fafc114aSVinod Koul #define SM8450_SLAVE_AOSS				515
79*fafc114aSVinod Koul #define SM8450_SLAVE_CAMERA_CFG				516
80*fafc114aSVinod Koul #define SM8450_SLAVE_CLK_CTL				517
81*fafc114aSVinod Koul #define SM8450_SLAVE_CDSP_CFG				518
82*fafc114aSVinod Koul #define SM8450_SLAVE_RBCPR_CX_CFG			519
83*fafc114aSVinod Koul #define SM8450_SLAVE_RBCPR_MMCX_CFG			520
84*fafc114aSVinod Koul #define SM8450_SLAVE_RBCPR_MXA_CFG			521
85*fafc114aSVinod Koul #define SM8450_SLAVE_RBCPR_MXC_CFG			522
86*fafc114aSVinod Koul #define SM8450_SLAVE_CRYPTO_0_CFG			523
87*fafc114aSVinod Koul #define SM8450_SLAVE_CX_RDPM				524
88*fafc114aSVinod Koul #define SM8450_SLAVE_DISPLAY_CFG			525
89*fafc114aSVinod Koul #define SM8450_SLAVE_GFX3D_CFG				526
90*fafc114aSVinod Koul #define SM8450_SLAVE_IMEM_CFG				527
91*fafc114aSVinod Koul #define SM8450_SLAVE_IPA_CFG				528
92*fafc114aSVinod Koul #define SM8450_SLAVE_IPC_ROUTER_CFG			529
93*fafc114aSVinod Koul #define SM8450_SLAVE_LPASS				530
94*fafc114aSVinod Koul #define SM8450_SLAVE_LPASS_CORE_CFG			531
95*fafc114aSVinod Koul #define SM8450_SLAVE_LPASS_LPI_CFG			532
96*fafc114aSVinod Koul #define SM8450_SLAVE_LPASS_MPU_CFG			533
97*fafc114aSVinod Koul #define SM8450_SLAVE_LPASS_TOP_CFG			534
98*fafc114aSVinod Koul #define SM8450_SLAVE_CNOC_MSS				535
99*fafc114aSVinod Koul #define SM8450_SLAVE_MX_RDPM				536
100*fafc114aSVinod Koul #define SM8450_SLAVE_PCIE_0_CFG				537
101*fafc114aSVinod Koul #define SM8450_SLAVE_PCIE_1_CFG				538
102*fafc114aSVinod Koul #define SM8450_SLAVE_PDM				539
103*fafc114aSVinod Koul #define SM8450_SLAVE_PIMEM_CFG				540
104*fafc114aSVinod Koul #define SM8450_SLAVE_PRNG				541
105*fafc114aSVinod Koul #define SM8450_SLAVE_QDSS_CFG				542
106*fafc114aSVinod Koul #define SM8450_SLAVE_QSPI_0				543
107*fafc114aSVinod Koul #define SM8450_SLAVE_QUP_0				544
108*fafc114aSVinod Koul #define SM8450_SLAVE_QUP_1				545
109*fafc114aSVinod Koul #define SM8450_SLAVE_QUP_2				546
110*fafc114aSVinod Koul #define SM8450_SLAVE_SDCC_2				547
111*fafc114aSVinod Koul #define SM8450_SLAVE_SDCC_4				548
112*fafc114aSVinod Koul #define SM8450_SLAVE_SPSS_CFG				549
113*fafc114aSVinod Koul #define SM8450_SLAVE_TCSR				550
114*fafc114aSVinod Koul #define SM8450_SLAVE_TLMM				551
115*fafc114aSVinod Koul #define SM8450_SLAVE_TME_CFG				552
116*fafc114aSVinod Koul #define SM8450_SLAVE_UFS_MEM_CFG			553
117*fafc114aSVinod Koul #define SM8450_SLAVE_USB3_0				554
118*fafc114aSVinod Koul #define SM8450_SLAVE_VENUS_CFG				555
119*fafc114aSVinod Koul #define SM8450_SLAVE_VSENSE_CTRL_CFG			556
120*fafc114aSVinod Koul #define SM8450_SLAVE_A1NOC_CFG				557
121*fafc114aSVinod Koul #define SM8450_SLAVE_A1NOC_SNOC				558
122*fafc114aSVinod Koul #define SM8450_SLAVE_A2NOC_CFG				559
123*fafc114aSVinod Koul #define SM8450_SLAVE_A2NOC_SNOC				560
124*fafc114aSVinod Koul #define SM8450_SLAVE_DDRSS_CFG				561
125*fafc114aSVinod Koul #define SM8450_SLAVE_GEM_NOC_CNOC			562
126*fafc114aSVinod Koul #define SM8450_SLAVE_SNOC_GEM_NOC_GC			563
127*fafc114aSVinod Koul #define SM8450_SLAVE_SNOC_GEM_NOC_SF			564
128*fafc114aSVinod Koul #define SM8450_SLAVE_LLCC				565
129*fafc114aSVinod Koul #define SM8450_SLAVE_MNOC_HF_MEM_NOC			566
130*fafc114aSVinod Koul #define SM8450_SLAVE_MNOC_SF_MEM_NOC			567
131*fafc114aSVinod Koul #define SM8450_SLAVE_CNOC_MNOC_CFG			568
132*fafc114aSVinod Koul #define SM8450_SLAVE_CDSP_MEM_NOC			569
133*fafc114aSVinod Koul #define SM8450_SLAVE_MEM_NOC_PCIE_SNOC			570
134*fafc114aSVinod Koul #define SM8450_SLAVE_PCIE_ANOC_CFG			571
135*fafc114aSVinod Koul #define SM8450_SLAVE_ANOC_PCIE_GEM_NOC			572
136*fafc114aSVinod Koul #define SM8450_SLAVE_SNOC_CFG				573
137*fafc114aSVinod Koul #define SM8450_SLAVE_LPASS_SNOC				574
138*fafc114aSVinod Koul #define SM8450_SLAVE_QUP_CORE_0				575
139*fafc114aSVinod Koul #define SM8450_SLAVE_QUP_CORE_1				576
140*fafc114aSVinod Koul #define SM8450_SLAVE_QUP_CORE_2				577
141*fafc114aSVinod Koul #define SM8450_SLAVE_IMEM				578
142*fafc114aSVinod Koul #define SM8450_SLAVE_PIMEM				579
143*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_NSP_NOC			580
144*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_A1NOC			581
145*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_A2NOC			582
146*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_CNOC			583
147*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_MNOC			584
148*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICES_LPASS_AML_NOC		585
149*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_LPASS_AG_NOC		586
150*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_PCIE_ANOC			587
151*fafc114aSVinod Koul #define SM8450_SLAVE_SERVICE_SNOC			588
152*fafc114aSVinod Koul #define SM8450_SLAVE_PCIE_0				589
153*fafc114aSVinod Koul #define SM8450_SLAVE_PCIE_1				590
154*fafc114aSVinod Koul #define SM8450_SLAVE_QDSS_STM				591
155*fafc114aSVinod Koul #define SM8450_SLAVE_TCU				592
156*fafc114aSVinod Koul #define SM8450_MASTER_LLCC_DISP				1000
157*fafc114aSVinod Koul #define SM8450_MASTER_MDP_DISP				1001
158*fafc114aSVinod Koul #define SM8450_MASTER_MDP0_DISP				SM8450_MASTER_MDP_DISP
159*fafc114aSVinod Koul #define SM8450_MASTER_MDP1_DISP				SM8450_MASTER_MDP_DISP
160*fafc114aSVinod Koul #define SM8450_MASTER_MNOC_HF_MEM_NOC_DISP		1002
161*fafc114aSVinod Koul #define SM8450_MASTER_MNOC_SF_MEM_NOC_DISP		1003
162*fafc114aSVinod Koul #define SM8450_MASTER_ANOC_PCIE_GEM_NOC_DISP		1004
163*fafc114aSVinod Koul #define SM8450_MASTER_ROTATOR_DISP			1005
164*fafc114aSVinod Koul #define SM8450_SLAVE_EBI1_DISP				1512
165*fafc114aSVinod Koul #define SM8450_SLAVE_LLCC_DISP				1513
166*fafc114aSVinod Koul #define SM8450_SLAVE_MNOC_HF_MEM_NOC_DISP		1514
167*fafc114aSVinod Koul #define SM8450_SLAVE_MNOC_SF_MEM_NOC_DISP		1515
168*fafc114aSVinod Koul 
169*fafc114aSVinod Koul #endif
170