1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef __DRIVERS_INTERCONNECT_QCOM_SDX75_H 7 #define __DRIVERS_INTERCONNECT_QCOM_SDX75_H 8 9 #define SDX75_MASTER_ANOC_PCIE_GEM_NOC 0 10 #define SDX75_MASTER_ANOC_SNOC 1 11 #define SDX75_MASTER_APPSS_PROC 2 12 #define SDX75_MASTER_AUDIO 3 13 #define SDX75_MASTER_CNOC_DC_NOC 4 14 #define SDX75_MASTER_CRYPTO 5 15 #define SDX75_MASTER_EMAC_0 6 16 #define SDX75_MASTER_EMAC_1 7 17 #define SDX75_MASTER_GEM_NOC_CFG 8 18 #define SDX75_MASTER_GEM_NOC_CNOC 9 19 #define SDX75_MASTER_GEM_NOC_PCIE_SNOC 10 20 #define SDX75_MASTER_GIC 11 21 #define SDX75_MASTER_GIC_AHB 12 22 #define SDX75_MASTER_IPA 13 23 #define SDX75_MASTER_IPA_PCIE 14 24 #define SDX75_MASTER_LLCC 15 25 #define SDX75_MASTER_MSS_PROC 16 26 #define SDX75_MASTER_MVMSS 17 27 #define SDX75_MASTER_PCIE_0 18 28 #define SDX75_MASTER_PCIE_1 19 29 #define SDX75_MASTER_PCIE_2 20 30 #define SDX75_MASTER_PCIE_ANOC_CFG 21 31 #define SDX75_MASTER_PCIE_RSCC 22 32 #define SDX75_MASTER_QDSS_BAM 23 33 #define SDX75_MASTER_QDSS_ETR 24 34 #define SDX75_MASTER_QDSS_ETR_1 25 35 #define SDX75_MASTER_QPIC 26 36 #define SDX75_MASTER_QPIC_CORE 27 37 #define SDX75_MASTER_QUP_0 28 38 #define SDX75_MASTER_QUP_CORE_0 29 39 #define SDX75_MASTER_SDCC_1 30 40 #define SDX75_MASTER_SDCC_4 31 41 #define SDX75_MASTER_SNOC_CFG 32 42 #define SDX75_MASTER_SNOC_SF_MEM_NOC 33 43 #define SDX75_MASTER_SYS_TCU 34 44 #define SDX75_MASTER_USB3_0 35 45 #define SDX75_SLAVE_A1NOC_CFG 36 46 #define SDX75_SLAVE_ANOC_PCIE_GEM_NOC 37 47 #define SDX75_SLAVE_AUDIO 38 48 #define SDX75_SLAVE_CLK_CTL 39 49 #define SDX75_SLAVE_CRYPTO_0_CFG 40 50 #define SDX75_SLAVE_CNOC_MSS 41 51 #define SDX75_SLAVE_DDRSS_CFG 42 52 #define SDX75_SLAVE_EBI1 43 53 #define SDX75_SLAVE_ETH0_CFG 44 54 #define SDX75_SLAVE_ETH1_CFG 45 55 #define SDX75_SLAVE_GEM_NOC_CFG 46 56 #define SDX75_SLAVE_GEM_NOC_CNOC 47 57 #define SDX75_SLAVE_ICBDI_MVMSS_CFG 48 58 #define SDX75_SLAVE_IMEM 49 59 #define SDX75_SLAVE_IMEM_CFG 50 60 #define SDX75_SLAVE_IPA_CFG 51 61 #define SDX75_SLAVE_IPC_ROUTER_CFG 52 62 #define SDX75_SLAVE_LAGG_CFG 53 63 #define SDX75_SLAVE_LLCC 54 64 #define SDX75_SLAVE_MCCC_MASTER 55 65 #define SDX75_SLAVE_MEM_NOC_PCIE_SNOC 56 66 #define SDX75_SLAVE_PCIE_0 57 67 #define SDX75_SLAVE_PCIE_1 58 68 #define SDX75_SLAVE_PCIE_2 59 69 #define SDX75_SLAVE_PCIE_0_CFG 60 70 #define SDX75_SLAVE_PCIE_1_CFG 61 71 #define SDX75_SLAVE_PCIE_2_CFG 62 72 #define SDX75_SLAVE_PCIE_ANOC_CFG 63 73 #define SDX75_SLAVE_PCIE_RSC_CFG 64 74 #define SDX75_SLAVE_PDM 65 75 #define SDX75_SLAVE_PRNG 66 76 #define SDX75_SLAVE_QDSS_CFG 67 77 #define SDX75_SLAVE_QDSS_STM 68 78 #define SDX75_SLAVE_QPIC 69 79 #define SDX75_SLAVE_QPIC_CORE 70 80 #define SDX75_SLAVE_QUP_0 71 81 #define SDX75_SLAVE_QUP_CORE_0 72 82 #define SDX75_SLAVE_SDCC_1 73 83 #define SDX75_SLAVE_SDCC_4 74 84 #define SDX75_SLAVE_SERVICE_GEM_NOC 75 85 #define SDX75_SLAVE_SERVICE_PCIE_ANOC 76 86 #define SDX75_SLAVE_SERVICE_SNOC 77 87 #define SDX75_SLAVE_SNOC_CFG 78 88 #define SDX75_SLAVE_SNOC_GEM_NOC_SF 79 89 #define SDX75_SLAVE_SNOOP_BWMON 80 90 #define SDX75_SLAVE_SPMI_VGI_COEX 81 91 #define SDX75_SLAVE_TCSR 82 92 #define SDX75_SLAVE_TCU 83 93 #define SDX75_SLAVE_TLMM 84 94 #define SDX75_SLAVE_USB3 85 95 #define SDX75_SLAVE_USB3_PHY_CFG 86 96 97 #endif 98