1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2021 MediaTek Inc. 4 * Copyright (c) 2024 Collabora Ltd. 5 * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 6 */ 7 8 #include <linux/device.h> 9 #include <linux/interconnect.h> 10 #include <linux/interconnect-provider.h> 11 #include <linux/mod_devicetable.h> 12 #include <linux/module.h> 13 #include <linux/platform_device.h> 14 #include <dt-bindings/interconnect/mediatek,mt8195.h> 15 16 #include "icc-emi.h" 17 18 static struct mtk_icc_node ddr_emi = { 19 .name = "ddr-emi", 20 .id = SLAVE_DDR_EMI, 21 .ep = 1, 22 }; 23 24 static struct mtk_icc_node mcusys = { 25 .name = "mcusys", 26 .id = MASTER_MCUSYS, 27 .ep = 0, 28 .num_links = 1, 29 .links = { SLAVE_DDR_EMI } 30 }; 31 32 static struct mtk_icc_node gpu = { 33 .name = "gpu", 34 .id = MASTER_GPUSYS, 35 .ep = 0, 36 .num_links = 1, 37 .links = { SLAVE_DDR_EMI } 38 }; 39 40 static struct mtk_icc_node mmsys = { 41 .name = "mmsys", 42 .id = MASTER_MMSYS, 43 .ep = 0, 44 .num_links = 1, 45 .links = { SLAVE_DDR_EMI } 46 }; 47 48 static struct mtk_icc_node mm_vpu = { 49 .name = "mm-vpu", 50 .id = MASTER_MM_VPU, 51 .ep = 0, 52 .num_links = 1, 53 .links = { MASTER_MMSYS } 54 }; 55 56 static struct mtk_icc_node mm_disp = { 57 .name = "mm-disp", 58 .id = MASTER_MM_DISP, 59 .ep = 0, 60 .num_links = 1, 61 .links = { MASTER_MMSYS } 62 }; 63 64 static struct mtk_icc_node mm_vdec = { 65 .name = "mm-vdec", 66 .id = MASTER_MM_VDEC, 67 .ep = 0, 68 .num_links = 1, 69 .links = { MASTER_MMSYS } 70 }; 71 72 static struct mtk_icc_node mm_venc = { 73 .name = "mm-venc", 74 .id = MASTER_MM_VENC, 75 .ep = 0, 76 .num_links = 1, 77 .links = { MASTER_MMSYS } 78 }; 79 80 static struct mtk_icc_node mm_cam = { 81 .name = "mm-cam", 82 .id = MASTER_MM_CAM, 83 .ep = 0, 84 .num_links = 1, 85 .links = { MASTER_MMSYS } 86 }; 87 88 static struct mtk_icc_node mm_img = { 89 .name = "mm-img", 90 .id = MASTER_MM_IMG, 91 .ep = 0, 92 .num_links = 1, 93 .links = { MASTER_MMSYS } 94 }; 95 96 static struct mtk_icc_node mm_mdp = { 97 .name = "mm-mdp", 98 .id = MASTER_MM_MDP, 99 .ep = 0, 100 .num_links = 1, 101 .links = { MASTER_MMSYS } 102 }; 103 104 static struct mtk_icc_node vpusys = { 105 .name = "vpusys", 106 .id = MASTER_VPUSYS, 107 .ep = 0, 108 .num_links = 1, 109 .links = { SLAVE_DDR_EMI } 110 }; 111 112 static struct mtk_icc_node vpu_port0 = { 113 .name = "vpu-port0", 114 .id = MASTER_VPU_0, 115 .ep = 0, 116 .num_links = 1, 117 .links = { MASTER_VPUSYS } 118 }; 119 120 static struct mtk_icc_node vpu_port1 = { 121 .name = "vpu-port1", 122 .id = MASTER_VPU_1, 123 .ep = 0, 124 .num_links = 1, 125 .links = { MASTER_VPUSYS } 126 }; 127 128 static struct mtk_icc_node mdlasys = { 129 .name = "mdlasys", 130 .id = MASTER_MDLASYS, 131 .ep = 0, 132 .num_links = 1, 133 .links = { SLAVE_DDR_EMI } 134 }; 135 136 static struct mtk_icc_node mdla_port0 = { 137 .name = "mdla-port0", 138 .id = MASTER_MDLA_0, 139 .ep = 0, 140 .num_links = 1, 141 .links = { MASTER_MDLASYS } 142 }; 143 144 static struct mtk_icc_node ufs = { 145 .name = "ufs", 146 .id = MASTER_UFS, 147 .ep = 0, 148 .num_links = 1, 149 .links = { SLAVE_DDR_EMI } 150 }; 151 152 static struct mtk_icc_node pcie0 = { 153 .name = "pcie0", 154 .id = MASTER_PCIE_0, 155 .ep = 0, 156 .num_links = 1, 157 .links = { SLAVE_DDR_EMI } 158 }; 159 160 static struct mtk_icc_node pcie1 = { 161 .name = "pcie1", 162 .id = MASTER_PCIE_1, 163 .ep = 0, 164 .num_links = 1, 165 .links = { SLAVE_DDR_EMI } 166 }; 167 168 static struct mtk_icc_node usb = { 169 .name = "usb", 170 .id = MASTER_USB, 171 .ep = 0, 172 .num_links = 1, 173 .links = { SLAVE_DDR_EMI } 174 }; 175 176 static struct mtk_icc_node wifi = { 177 .name = "wifi", 178 .id = MASTER_WIFI, 179 .ep = 0, 180 .num_links = 1, 181 .links = { SLAVE_DDR_EMI } 182 }; 183 184 static struct mtk_icc_node bt = { 185 .name = "bt", 186 .id = MASTER_BT, 187 .ep = 0, 188 .num_links = 1, 189 .links = { SLAVE_DDR_EMI } 190 }; 191 192 static struct mtk_icc_node netsys = { 193 .name = "netsys", 194 .id = MASTER_NETSYS, 195 .ep = 0, 196 .num_links = 1, 197 .links = { SLAVE_DDR_EMI } 198 }; 199 200 static struct mtk_icc_node dbgif = { 201 .name = "dbgif", 202 .id = MASTER_DBGIF, 203 .ep = 0, 204 .num_links = 1, 205 .links = { SLAVE_DDR_EMI } 206 }; 207 208 static struct mtk_icc_node hrt_ddr_emi = { 209 .name = "hrt-ddr-emi", 210 .id = SLAVE_HRT_DDR_EMI, 211 .ep = 2, 212 }; 213 214 static struct mtk_icc_node hrt_mmsys = { 215 .name = "hrt-mmsys", 216 .id = MASTER_HRT_MMSYS, 217 .ep = 0, 218 .num_links = 1, 219 .links = { SLAVE_HRT_DDR_EMI } 220 }; 221 222 static struct mtk_icc_node hrt_mm_disp = { 223 .name = "hrt-mm-disp", 224 .id = MASTER_HRT_MM_DISP, 225 .ep = 0, 226 .num_links = 1, 227 .links = { MASTER_HRT_MMSYS } 228 }; 229 230 static struct mtk_icc_node hrt_mm_vdec = { 231 .name = "hrt-mm-vdec", 232 .id = MASTER_HRT_MM_VDEC, 233 .ep = 0, 234 .num_links = 1, 235 .links = { MASTER_HRT_MMSYS } 236 }; 237 238 static struct mtk_icc_node hrt_mm_venc = { 239 .name = "hrt-mm-venc", 240 .id = MASTER_HRT_MM_VENC, 241 .ep = 0, 242 .num_links = 1, 243 .links = { MASTER_HRT_MMSYS } 244 }; 245 246 static struct mtk_icc_node hrt_mm_cam = { 247 .name = "hrt-mm-cam", 248 .id = MASTER_HRT_MM_CAM, 249 .ep = 0, 250 .num_links = 1, 251 .links = { MASTER_HRT_MMSYS } 252 }; 253 254 static struct mtk_icc_node hrt_mm_img = { 255 .name = "hrt-mm-img", 256 .id = MASTER_HRT_MM_IMG, 257 .ep = 0, 258 .num_links = 1, 259 .links = { MASTER_HRT_MMSYS } 260 }; 261 262 static struct mtk_icc_node hrt_mm_mdp = { 263 .name = "hrt-mm-mdp", 264 .id = MASTER_HRT_MM_MDP, 265 .ep = 0, 266 .num_links = 1, 267 .links = { MASTER_HRT_MMSYS } 268 }; 269 270 static struct mtk_icc_node hrt_dbgif = { 271 .name = "hrt-dbgif", 272 .id = MASTER_HRT_DBGIF, 273 .ep = 0, 274 .num_links = 1, 275 .links = { SLAVE_HRT_DDR_EMI } 276 }; 277 278 static struct mtk_icc_node *mt8195_emi_icc_nodes[] = { 279 [SLAVE_DDR_EMI] = &ddr_emi, 280 [MASTER_MCUSYS] = &mcusys, 281 [MASTER_GPUSYS] = &gpu, 282 [MASTER_MMSYS] = &mmsys, 283 [MASTER_MM_VPU] = &mm_vpu, 284 [MASTER_MM_DISP] = &mm_disp, 285 [MASTER_MM_VDEC] = &mm_vdec, 286 [MASTER_MM_VENC] = &mm_venc, 287 [MASTER_MM_CAM] = &mm_cam, 288 [MASTER_MM_IMG] = &mm_img, 289 [MASTER_MM_MDP] = &mm_mdp, 290 [MASTER_VPUSYS] = &vpusys, 291 [MASTER_VPU_0] = &vpu_port0, 292 [MASTER_VPU_1] = &vpu_port1, 293 [MASTER_MDLASYS] = &mdlasys, 294 [MASTER_MDLA_0] = &mdla_port0, 295 [MASTER_UFS] = &ufs, 296 [MASTER_PCIE_0] = &pcie0, 297 [MASTER_PCIE_1] = &pcie1, 298 [MASTER_USB] = &usb, 299 [MASTER_WIFI] = &wifi, 300 [MASTER_BT] = &bt, 301 [MASTER_NETSYS] = &netsys, 302 [MASTER_DBGIF] = &dbgif, 303 [SLAVE_HRT_DDR_EMI] = &hrt_ddr_emi, 304 [MASTER_HRT_MMSYS] = &hrt_mmsys, 305 [MASTER_HRT_MM_DISP] = &hrt_mm_disp, 306 [MASTER_HRT_MM_VDEC] = &hrt_mm_vdec, 307 [MASTER_HRT_MM_VENC] = &hrt_mm_venc, 308 [MASTER_HRT_MM_CAM] = &hrt_mm_cam, 309 [MASTER_HRT_MM_IMG] = &hrt_mm_img, 310 [MASTER_HRT_MM_MDP] = &hrt_mm_mdp, 311 [MASTER_HRT_DBGIF] = &hrt_dbgif 312 }; 313 314 static struct mtk_icc_desc mt8195_emi_icc = { 315 .nodes = mt8195_emi_icc_nodes, 316 .num_nodes = ARRAY_SIZE(mt8195_emi_icc_nodes), 317 }; 318 319 static const struct of_device_id mtk_mt8195_emi_icc_of_match[] = { 320 { .compatible = "mediatek,mt8195-emi", .data = &mt8195_emi_icc }, 321 { /* sentinel */ }, 322 }; 323 MODULE_DEVICE_TABLE(of, mtk_mt8195_emi_icc_of_match); 324 325 static struct platform_driver mtk_emi_icc_mt8195_driver = { 326 .driver = { 327 .name = "emi-icc-mt8195", 328 .of_match_table = mtk_mt8195_emi_icc_of_match, 329 .sync_state = icc_sync_state, 330 }, 331 .probe = mtk_emi_icc_probe, 332 .remove_new = mtk_emi_icc_remove, 333 334 }; 335 module_platform_driver(mtk_emi_icc_mt8195_driver); 336 337 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>"); 338 MODULE_DESCRIPTION("MediaTek MT8195 EMI ICC driver"); 339 MODULE_LICENSE("GPL"); 340