1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2021 MediaTek Inc. 4 * Copyright (c) 2024 Collabora Ltd. 5 * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 6 */ 7 8 #include <linux/device.h> 9 #include <linux/interconnect.h> 10 #include <linux/interconnect-provider.h> 11 #include <linux/module.h> 12 #include <linux/platform_device.h> 13 #include <dt-bindings/interconnect/mediatek,mt8195.h> 14 15 #include "icc-emi.h" 16 17 static struct mtk_icc_node ddr_emi = { 18 .name = "ddr-emi", 19 .id = SLAVE_DDR_EMI, 20 .ep = 1, 21 }; 22 23 static struct mtk_icc_node mcusys = { 24 .name = "mcusys", 25 .id = MASTER_MCUSYS, 26 .ep = 0, 27 .num_links = 1, 28 .links = { SLAVE_DDR_EMI } 29 }; 30 31 static struct mtk_icc_node gpu = { 32 .name = "gpu", 33 .id = MASTER_GPUSYS, 34 .ep = 0, 35 .num_links = 1, 36 .links = { SLAVE_DDR_EMI } 37 }; 38 39 static struct mtk_icc_node mmsys = { 40 .name = "mmsys", 41 .id = MASTER_MMSYS, 42 .ep = 0, 43 .num_links = 1, 44 .links = { SLAVE_DDR_EMI } 45 }; 46 47 static struct mtk_icc_node mm_vpu = { 48 .name = "mm-vpu", 49 .id = MASTER_MM_VPU, 50 .ep = 0, 51 .num_links = 1, 52 .links = { MASTER_MMSYS } 53 }; 54 55 static struct mtk_icc_node mm_disp = { 56 .name = "mm-disp", 57 .id = MASTER_MM_DISP, 58 .ep = 0, 59 .num_links = 1, 60 .links = { MASTER_MMSYS } 61 }; 62 63 static struct mtk_icc_node mm_vdec = { 64 .name = "mm-vdec", 65 .id = MASTER_MM_VDEC, 66 .ep = 0, 67 .num_links = 1, 68 .links = { MASTER_MMSYS } 69 }; 70 71 static struct mtk_icc_node mm_venc = { 72 .name = "mm-venc", 73 .id = MASTER_MM_VENC, 74 .ep = 0, 75 .num_links = 1, 76 .links = { MASTER_MMSYS } 77 }; 78 79 static struct mtk_icc_node mm_cam = { 80 .name = "mm-cam", 81 .id = MASTER_MM_CAM, 82 .ep = 0, 83 .num_links = 1, 84 .links = { MASTER_MMSYS } 85 }; 86 87 static struct mtk_icc_node mm_img = { 88 .name = "mm-img", 89 .id = MASTER_MM_IMG, 90 .ep = 0, 91 .num_links = 1, 92 .links = { MASTER_MMSYS } 93 }; 94 95 static struct mtk_icc_node mm_mdp = { 96 .name = "mm-mdp", 97 .id = MASTER_MM_MDP, 98 .ep = 0, 99 .num_links = 1, 100 .links = { MASTER_MMSYS } 101 }; 102 103 static struct mtk_icc_node vpusys = { 104 .name = "vpusys", 105 .id = MASTER_VPUSYS, 106 .ep = 0, 107 .num_links = 1, 108 .links = { SLAVE_DDR_EMI } 109 }; 110 111 static struct mtk_icc_node vpu_port0 = { 112 .name = "vpu-port0", 113 .id = MASTER_VPU_0, 114 .ep = 0, 115 .num_links = 1, 116 .links = { MASTER_VPUSYS } 117 }; 118 119 static struct mtk_icc_node vpu_port1 = { 120 .name = "vpu-port1", 121 .id = MASTER_VPU_1, 122 .ep = 0, 123 .num_links = 1, 124 .links = { MASTER_VPUSYS } 125 }; 126 127 static struct mtk_icc_node mdlasys = { 128 .name = "mdlasys", 129 .id = MASTER_MDLASYS, 130 .ep = 0, 131 .num_links = 1, 132 .links = { SLAVE_DDR_EMI } 133 }; 134 135 static struct mtk_icc_node mdla_port0 = { 136 .name = "mdla-port0", 137 .id = MASTER_MDLA_0, 138 .ep = 0, 139 .num_links = 1, 140 .links = { MASTER_MDLASYS } 141 }; 142 143 static struct mtk_icc_node ufs = { 144 .name = "ufs", 145 .id = MASTER_UFS, 146 .ep = 0, 147 .num_links = 1, 148 .links = { SLAVE_DDR_EMI } 149 }; 150 151 static struct mtk_icc_node pcie0 = { 152 .name = "pcie0", 153 .id = MASTER_PCIE_0, 154 .ep = 0, 155 .num_links = 1, 156 .links = { SLAVE_DDR_EMI } 157 }; 158 159 static struct mtk_icc_node pcie1 = { 160 .name = "pcie1", 161 .id = MASTER_PCIE_1, 162 .ep = 0, 163 .num_links = 1, 164 .links = { SLAVE_DDR_EMI } 165 }; 166 167 static struct mtk_icc_node usb = { 168 .name = "usb", 169 .id = MASTER_USB, 170 .ep = 0, 171 .num_links = 1, 172 .links = { SLAVE_DDR_EMI } 173 }; 174 175 static struct mtk_icc_node wifi = { 176 .name = "wifi", 177 .id = MASTER_WIFI, 178 .ep = 0, 179 .num_links = 1, 180 .links = { SLAVE_DDR_EMI } 181 }; 182 183 static struct mtk_icc_node bt = { 184 .name = "bt", 185 .id = MASTER_BT, 186 .ep = 0, 187 .num_links = 1, 188 .links = { SLAVE_DDR_EMI } 189 }; 190 191 static struct mtk_icc_node netsys = { 192 .name = "netsys", 193 .id = MASTER_NETSYS, 194 .ep = 0, 195 .num_links = 1, 196 .links = { SLAVE_DDR_EMI } 197 }; 198 199 static struct mtk_icc_node dbgif = { 200 .name = "dbgif", 201 .id = MASTER_DBGIF, 202 .ep = 0, 203 .num_links = 1, 204 .links = { SLAVE_DDR_EMI } 205 }; 206 207 static struct mtk_icc_node hrt_ddr_emi = { 208 .name = "hrt-ddr-emi", 209 .id = SLAVE_HRT_DDR_EMI, 210 .ep = 2, 211 }; 212 213 static struct mtk_icc_node hrt_mmsys = { 214 .name = "hrt-mmsys", 215 .id = MASTER_HRT_MMSYS, 216 .ep = 0, 217 .num_links = 1, 218 .links = { SLAVE_HRT_DDR_EMI } 219 }; 220 221 static struct mtk_icc_node hrt_mm_disp = { 222 .name = "hrt-mm-disp", 223 .id = MASTER_HRT_MM_DISP, 224 .ep = 0, 225 .num_links = 1, 226 .links = { MASTER_HRT_MMSYS } 227 }; 228 229 static struct mtk_icc_node hrt_mm_vdec = { 230 .name = "hrt-mm-vdec", 231 .id = MASTER_HRT_MM_VDEC, 232 .ep = 0, 233 .num_links = 1, 234 .links = { MASTER_HRT_MMSYS } 235 }; 236 237 static struct mtk_icc_node hrt_mm_venc = { 238 .name = "hrt-mm-venc", 239 .id = MASTER_HRT_MM_VENC, 240 .ep = 0, 241 .num_links = 1, 242 .links = { MASTER_HRT_MMSYS } 243 }; 244 245 static struct mtk_icc_node hrt_mm_cam = { 246 .name = "hrt-mm-cam", 247 .id = MASTER_HRT_MM_CAM, 248 .ep = 0, 249 .num_links = 1, 250 .links = { MASTER_HRT_MMSYS } 251 }; 252 253 static struct mtk_icc_node hrt_mm_img = { 254 .name = "hrt-mm-img", 255 .id = MASTER_HRT_MM_IMG, 256 .ep = 0, 257 .num_links = 1, 258 .links = { MASTER_HRT_MMSYS } 259 }; 260 261 static struct mtk_icc_node hrt_mm_mdp = { 262 .name = "hrt-mm-mdp", 263 .id = MASTER_HRT_MM_MDP, 264 .ep = 0, 265 .num_links = 1, 266 .links = { MASTER_HRT_MMSYS } 267 }; 268 269 static struct mtk_icc_node hrt_dbgif = { 270 .name = "hrt-dbgif", 271 .id = MASTER_HRT_DBGIF, 272 .ep = 0, 273 .num_links = 1, 274 .links = { SLAVE_HRT_DDR_EMI } 275 }; 276 277 static struct mtk_icc_node *mt8195_emi_icc_nodes[] = { 278 [SLAVE_DDR_EMI] = &ddr_emi, 279 [MASTER_MCUSYS] = &mcusys, 280 [MASTER_GPUSYS] = &gpu, 281 [MASTER_MMSYS] = &mmsys, 282 [MASTER_MM_VPU] = &mm_vpu, 283 [MASTER_MM_DISP] = &mm_disp, 284 [MASTER_MM_VDEC] = &mm_vdec, 285 [MASTER_MM_VENC] = &mm_venc, 286 [MASTER_MM_CAM] = &mm_cam, 287 [MASTER_MM_IMG] = &mm_img, 288 [MASTER_MM_MDP] = &mm_mdp, 289 [MASTER_VPUSYS] = &vpusys, 290 [MASTER_VPU_0] = &vpu_port0, 291 [MASTER_VPU_1] = &vpu_port1, 292 [MASTER_MDLASYS] = &mdlasys, 293 [MASTER_MDLA_0] = &mdla_port0, 294 [MASTER_UFS] = &ufs, 295 [MASTER_PCIE_0] = &pcie0, 296 [MASTER_PCIE_1] = &pcie1, 297 [MASTER_USB] = &usb, 298 [MASTER_WIFI] = &wifi, 299 [MASTER_BT] = &bt, 300 [MASTER_NETSYS] = &netsys, 301 [MASTER_DBGIF] = &dbgif, 302 [SLAVE_HRT_DDR_EMI] = &hrt_ddr_emi, 303 [MASTER_HRT_MMSYS] = &hrt_mmsys, 304 [MASTER_HRT_MM_DISP] = &hrt_mm_disp, 305 [MASTER_HRT_MM_VDEC] = &hrt_mm_vdec, 306 [MASTER_HRT_MM_VENC] = &hrt_mm_venc, 307 [MASTER_HRT_MM_CAM] = &hrt_mm_cam, 308 [MASTER_HRT_MM_IMG] = &hrt_mm_img, 309 [MASTER_HRT_MM_MDP] = &hrt_mm_mdp, 310 [MASTER_HRT_DBGIF] = &hrt_dbgif 311 }; 312 313 static struct mtk_icc_desc mt8195_emi_icc = { 314 .nodes = mt8195_emi_icc_nodes, 315 .num_nodes = ARRAY_SIZE(mt8195_emi_icc_nodes), 316 }; 317 318 static const struct of_device_id mtk_mt8195_emi_icc_of_match[] = { 319 { .compatible = "mediatek,mt8195-emi", .data = &mt8195_emi_icc }, 320 { /* sentinel */ }, 321 }; 322 MODULE_DEVICE_TABLE(of, mtk_mt8195_emi_icc_of_match); 323 324 static struct platform_driver mtk_emi_icc_mt8195_driver = { 325 .driver = { 326 .name = "emi-icc-mt8195", 327 .of_match_table = mtk_mt8195_emi_icc_of_match, 328 .sync_state = icc_sync_state, 329 }, 330 .probe = mtk_emi_icc_probe, 331 .remove = mtk_emi_icc_remove, 332 333 }; 334 module_platform_driver(mtk_emi_icc_mt8195_driver); 335 336 MODULE_AUTHOR("AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>"); 337 MODULE_DESCRIPTION("MediaTek MT8195 EMI ICC driver"); 338 MODULE_LICENSE("GPL"); 339