1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Interconnect framework driver for i.MX SoC 4 * 5 * Copyright (c) 2019, BayLibre 6 * Copyright (c) 2019-2020, NXP 7 * Author: Alexandre Bailon <abailon@baylibre.com> 8 * Author: Leonard Crestez <leonard.crestez@nxp.com> 9 */ 10 #ifndef __DRIVERS_INTERCONNECT_IMX_H 11 #define __DRIVERS_INTERCONNECT_IMX_H 12 13 #include <linux/args.h> 14 #include <linux/bits.h> 15 #include <linux/types.h> 16 17 #include <linux/interconnect-provider.h> 18 19 struct platform_device; 20 21 #define IMX_ICC_MAX_LINKS 4 22 23 /* 24 * High throughput priority level in Regulator mode 25 * Read Priority in Fixed/Limiter mode 26 */ 27 #define PRIORITY0_SHIFT 0 28 /* 29 * Low throughput priority level in Regulator mode 30 * Write Priority in Fixed/Limiter mode 31 */ 32 #define PRIORITY1_SHIFT 8 33 #define PRIORITY_MASK 0x7 34 35 #define PRIORITY_COMP_MARK BIT(31) /* Must set */ 36 37 #define IMX_NOC_MODE_FIXED 0 38 #define IMX_NOC_MODE_LIMITER 1 39 #define IMX_NOC_MODE_BYPASS 2 40 #define IMX_NOC_MODE_REGULATOR 3 41 #define IMX_NOC_MODE_UNCONFIGURED 0xFF 42 43 #define IMX_NOC_PRIO_REG 0x8 44 #define IMX_NOC_MODE_REG 0xC 45 #define IMX_NOC_BANDWIDTH_REG 0x10 46 #define IMX_NOC_SATURATION 0x14 47 #define IMX_NOC_EXT_CTL_REG 0x18 48 49 struct imx_icc_provider { 50 void __iomem *noc_base; 51 struct icc_provider provider; 52 }; 53 54 /* 55 * struct imx_icc_node_adj - Describe a dynamic adjustable node 56 */ 57 struct imx_icc_node_adj_desc { 58 unsigned int bw_mul, bw_div; 59 const char *phandle_name; 60 bool main_noc; 61 }; 62 63 /* 64 * struct imx_icc_node - Describe an interconnect node 65 * @name: name of the node 66 * @id: an unique id to identify the node 67 * @links: an array of slaves' node id 68 * @num_links: number of id defined in links 69 */ 70 struct imx_icc_node_desc { 71 const char *name; 72 u16 id; 73 u16 links[IMX_ICC_MAX_LINKS]; 74 u16 num_links; 75 const struct imx_icc_node_adj_desc *adj; 76 }; 77 78 /* 79 * struct imx_icc_noc_setting - Describe an interconnect node setting 80 * @reg: register offset inside the NoC 81 * @prio_level: priority level 82 * @mode: functional mode 83 * @ext_control: external input control 84 */ 85 struct imx_icc_noc_setting { 86 u32 reg; 87 u32 prio_level; 88 u32 mode; 89 u32 ext_control; 90 }; 91 92 #define DEFINE_BUS_INTERCONNECT(_name, _id, _adj, ...) \ 93 { \ 94 .id = _id, \ 95 .name = _name, \ 96 .adj = _adj, \ 97 .num_links = COUNT_ARGS(__VA_ARGS__), \ 98 .links = { __VA_ARGS__ }, \ 99 } 100 101 #define DEFINE_BUS_MASTER(_name, _id, _dest_id) \ 102 DEFINE_BUS_INTERCONNECT(_name, _id, NULL, _dest_id) 103 104 #define DEFINE_BUS_SLAVE(_name, _id, _adj) \ 105 DEFINE_BUS_INTERCONNECT(_name, _id, _adj) 106 107 int imx_icc_register(struct platform_device *pdev, 108 struct imx_icc_node_desc *nodes, 109 int nodes_count, 110 struct imx_icc_noc_setting *noc_settings); 111 void imx_icc_unregister(struct platform_device *pdev); 112 113 #endif /* __DRIVERS_INTERCONNECT_IMX_H */ 114